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libnvdimm: Move nd_device_attribute_group to device_type
[mirror_ubuntu-jammy-kernel.git] / drivers / nvdimm / region_devs.c
CommitLineData
5b497af4 1// SPDX-License-Identifier: GPL-2.0-only
1f7df6f8
DW
2/*
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
1f7df6f8 4 */
eaf96153 5#include <linux/scatterlist.h>
047fc8a1 6#include <linux/highmem.h>
eaf96153 7#include <linux/sched.h>
1f7df6f8 8#include <linux/slab.h>
0c27af60 9#include <linux/hash.h>
eaf96153 10#include <linux/sort.h>
1f7df6f8 11#include <linux/io.h>
bf9bccc1 12#include <linux/nd.h>
1f7df6f8
DW
13#include "nd-core.h"
14#include "nd.h"
15
f284a4f2
DW
16/*
17 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
18 * irrelevant.
19 */
20#include <linux/io-64-nonatomic-hi-lo.h>
21
1f7df6f8 22static DEFINE_IDA(region_ida);
0c27af60 23static DEFINE_PER_CPU(int, flush_idx);
1f7df6f8 24
e5ae3b25
DW
25static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
26 struct nd_region_data *ndrd)
27{
28 int i, j;
29
30 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
31 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
595c7307 32 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
e5ae3b25
DW
33 struct resource *res = &nvdimm->flush_wpq[i];
34 unsigned long pfn = PHYS_PFN(res->start);
35 void __iomem *flush_page;
36
37 /* check if flush hints share a page */
38 for (j = 0; j < i; j++) {
39 struct resource *res_j = &nvdimm->flush_wpq[j];
40 unsigned long pfn_j = PHYS_PFN(res_j->start);
41
42 if (pfn == pfn_j)
43 break;
44 }
45
46 if (j < i)
47 flush_page = (void __iomem *) ((unsigned long)
595c7307
DW
48 ndrd_get_flush_wpq(ndrd, dimm, j)
49 & PAGE_MASK);
e5ae3b25
DW
50 else
51 flush_page = devm_nvdimm_ioremap(dev,
480b6837 52 PFN_PHYS(pfn), PAGE_SIZE);
e5ae3b25
DW
53 if (!flush_page)
54 return -ENXIO;
595c7307
DW
55 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
56 + (res->start & ~PAGE_MASK));
e5ae3b25
DW
57 }
58
59 return 0;
60}
61
62int nd_region_activate(struct nd_region *nd_region)
63{
db58028e 64 int i, j, num_flush = 0;
e5ae3b25
DW
65 struct nd_region_data *ndrd;
66 struct device *dev = &nd_region->dev;
67 size_t flush_data_size = sizeof(void *);
68
69 nvdimm_bus_lock(&nd_region->dev);
70 for (i = 0; i < nd_region->ndr_mappings; i++) {
71 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
72 struct nvdimm *nvdimm = nd_mapping->nvdimm;
73
7d988097
DJ
74 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
75 nvdimm_bus_unlock(&nd_region->dev);
76 return -EBUSY;
77 }
78
e5ae3b25
DW
79 /* at least one null hint slot per-dimm for the "no-hint" case */
80 flush_data_size += sizeof(void *);
0c27af60 81 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
e5ae3b25
DW
82 if (!nvdimm->num_flush)
83 continue;
84 flush_data_size += nvdimm->num_flush * sizeof(void *);
85 }
86 nvdimm_bus_unlock(&nd_region->dev);
87
88 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
89 if (!ndrd)
90 return -ENOMEM;
91 dev_set_drvdata(dev, ndrd);
92
595c7307
DW
93 if (!num_flush)
94 return 0;
95
96 ndrd->hints_shift = ilog2(num_flush);
e5ae3b25
DW
97 for (i = 0; i < nd_region->ndr_mappings; i++) {
98 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
99 struct nvdimm *nvdimm = nd_mapping->nvdimm;
100 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
101
102 if (rc)
103 return rc;
104 }
105
db58028e
DJ
106 /*
107 * Clear out entries that are duplicates. This should prevent the
108 * extra flushings.
109 */
110 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
111 /* ignore if NULL already */
112 if (!ndrd_get_flush_wpq(ndrd, i, 0))
113 continue;
114
115 for (j = i + 1; j < nd_region->ndr_mappings; j++)
116 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
117 ndrd_get_flush_wpq(ndrd, j, 0))
118 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
119 }
120
e5ae3b25
DW
121 return 0;
122}
123
1f7df6f8
DW
124static void nd_region_release(struct device *dev)
125{
126 struct nd_region *nd_region = to_nd_region(dev);
127 u16 i;
128
129 for (i = 0; i < nd_region->ndr_mappings; i++) {
130 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
131 struct nvdimm *nvdimm = nd_mapping->nvdimm;
132
133 put_device(&nvdimm->dev);
134 }
5212e11f 135 free_percpu(nd_region->lane);
1f7df6f8 136 ida_simple_remove(&region_ida, nd_region->id);
047fc8a1
RZ
137 if (is_nd_blk(dev))
138 kfree(to_nd_blk_region(dev));
139 else
140 kfree(nd_region);
1f7df6f8
DW
141}
142
1f7df6f8
DW
143struct nd_region *to_nd_region(struct device *dev)
144{
145 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
146
147 WARN_ON(dev->type->release != nd_region_release);
148 return nd_region;
149}
150EXPORT_SYMBOL_GPL(to_nd_region);
151
243f29fe
DW
152struct device *nd_region_dev(struct nd_region *nd_region)
153{
154 if (!nd_region)
155 return NULL;
156 return &nd_region->dev;
157}
158EXPORT_SYMBOL_GPL(nd_region_dev);
159
047fc8a1
RZ
160struct nd_blk_region *to_nd_blk_region(struct device *dev)
161{
162 struct nd_region *nd_region = to_nd_region(dev);
163
164 WARN_ON(!is_nd_blk(dev));
165 return container_of(nd_region, struct nd_blk_region, nd_region);
166}
167EXPORT_SYMBOL_GPL(to_nd_blk_region);
168
169void *nd_region_provider_data(struct nd_region *nd_region)
170{
171 return nd_region->provider_data;
172}
173EXPORT_SYMBOL_GPL(nd_region_provider_data);
174
175void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
176{
177 return ndbr->blk_provider_data;
178}
179EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
180
181void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
182{
183 ndbr->blk_provider_data = data;
184}
185EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
186
3d88002e
DW
187/**
188 * nd_region_to_nstype() - region to an integer namespace type
189 * @nd_region: region-device to interrogate
190 *
191 * This is the 'nstype' attribute of a region as well, an input to the
192 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
193 * namespace devices with namespace drivers.
194 */
195int nd_region_to_nstype(struct nd_region *nd_region)
196{
c9e582aa 197 if (is_memory(&nd_region->dev)) {
3d88002e
DW
198 u16 i, alias;
199
200 for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
201 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
202 struct nvdimm *nvdimm = nd_mapping->nvdimm;
203
8f078b38 204 if (test_bit(NDD_ALIASING, &nvdimm->flags))
3d88002e
DW
205 alias++;
206 }
207 if (alias)
208 return ND_DEVICE_NAMESPACE_PMEM;
209 else
210 return ND_DEVICE_NAMESPACE_IO;
211 } else if (is_nd_blk(&nd_region->dev)) {
212 return ND_DEVICE_NAMESPACE_BLK;
213 }
214
215 return 0;
216}
bf9bccc1
DW
217EXPORT_SYMBOL(nd_region_to_nstype);
218
1f7df6f8
DW
219static ssize_t size_show(struct device *dev,
220 struct device_attribute *attr, char *buf)
221{
222 struct nd_region *nd_region = to_nd_region(dev);
223 unsigned long long size = 0;
224
c9e582aa 225 if (is_memory(dev)) {
1f7df6f8
DW
226 size = nd_region->ndr_size;
227 } else if (nd_region->ndr_mappings == 1) {
228 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
229
230 size = nd_mapping->size;
231 }
232
233 return sprintf(buf, "%llu\n", size);
234}
235static DEVICE_ATTR_RO(size);
236
ab630891
DW
237static ssize_t deep_flush_show(struct device *dev,
238 struct device_attribute *attr, char *buf)
239{
240 struct nd_region *nd_region = to_nd_region(dev);
241
242 /*
243 * NOTE: in the nvdimm_has_flush() error case this attribute is
244 * not visible.
245 */
246 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
247}
248
249static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
250 const char *buf, size_t len)
251{
252 bool flush;
253 int rc = strtobool(buf, &flush);
254 struct nd_region *nd_region = to_nd_region(dev);
255
256 if (rc)
257 return rc;
258 if (!flush)
259 return -EINVAL;
c5d4355d
PG
260 rc = nvdimm_flush(nd_region, NULL);
261 if (rc)
262 return rc;
ab630891
DW
263
264 return len;
265}
266static DEVICE_ATTR_RW(deep_flush);
267
1f7df6f8
DW
268static ssize_t mappings_show(struct device *dev,
269 struct device_attribute *attr, char *buf)
270{
271 struct nd_region *nd_region = to_nd_region(dev);
272
273 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
274}
275static DEVICE_ATTR_RO(mappings);
276
3d88002e
DW
277static ssize_t nstype_show(struct device *dev,
278 struct device_attribute *attr, char *buf)
279{
280 struct nd_region *nd_region = to_nd_region(dev);
281
282 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
283}
284static DEVICE_ATTR_RO(nstype);
285
eaf96153
DW
286static ssize_t set_cookie_show(struct device *dev,
287 struct device_attribute *attr, char *buf)
288{
289 struct nd_region *nd_region = to_nd_region(dev);
290 struct nd_interleave_set *nd_set = nd_region->nd_set;
c12c48ce 291 ssize_t rc = 0;
eaf96153 292
c9e582aa 293 if (is_memory(dev) && nd_set)
eaf96153
DW
294 /* pass, should be precluded by region_visible */;
295 else
296 return -ENXIO;
297
c12c48ce
DW
298 /*
299 * The cookie to show depends on which specification of the
300 * labels we are using. If there are not labels then default to
301 * the v1.1 namespace label cookie definition. To read all this
302 * data we need to wait for probing to settle.
303 */
87a30e1f 304 nd_device_lock(dev);
c12c48ce
DW
305 nvdimm_bus_lock(dev);
306 wait_nvdimm_bus_probe_idle(dev);
307 if (nd_region->ndr_mappings) {
308 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
309 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
310
311 if (ndd) {
312 struct nd_namespace_index *nsindex;
313
314 nsindex = to_namespace_index(ndd, ndd->ns_current);
315 rc = sprintf(buf, "%#llx\n",
316 nd_region_interleave_set_cookie(nd_region,
317 nsindex));
318 }
319 }
320 nvdimm_bus_unlock(dev);
87a30e1f 321 nd_device_unlock(dev);
c12c48ce
DW
322
323 if (rc)
324 return rc;
325 return sprintf(buf, "%#llx\n", nd_set->cookie1);
eaf96153
DW
326}
327static DEVICE_ATTR_RO(set_cookie);
328
bf9bccc1
DW
329resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
330{
331 resource_size_t blk_max_overlap = 0, available, overlap;
332 int i;
333
334 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
335
336 retry:
337 available = 0;
338 overlap = blk_max_overlap;
339 for (i = 0; i < nd_region->ndr_mappings; i++) {
340 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
341 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
342
343 /* if a dimm is disabled the available capacity is zero */
344 if (!ndd)
345 return 0;
346
c9e582aa 347 if (is_memory(&nd_region->dev)) {
bf9bccc1
DW
348 available += nd_pmem_available_dpa(nd_region,
349 nd_mapping, &overlap);
350 if (overlap > blk_max_overlap) {
351 blk_max_overlap = overlap;
352 goto retry;
353 }
a1f3e4d6
DW
354 } else if (is_nd_blk(&nd_region->dev))
355 available += nd_blk_available_dpa(nd_region);
bf9bccc1
DW
356 }
357
358 return available;
359}
360
12e3129e
KB
361resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
362{
363 resource_size_t available = 0;
364 int i;
365
366 if (is_memory(&nd_region->dev))
367 available = PHYS_ADDR_MAX;
368
369 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
370 for (i = 0; i < nd_region->ndr_mappings; i++) {
371 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
372
373 if (is_memory(&nd_region->dev))
374 available = min(available,
375 nd_pmem_max_contiguous_dpa(nd_region,
376 nd_mapping));
377 else if (is_nd_blk(&nd_region->dev))
378 available += nd_blk_available_dpa(nd_region);
379 }
380 if (is_memory(&nd_region->dev))
381 return available * nd_region->ndr_mappings;
382 return available;
383}
384
bf9bccc1
DW
385static ssize_t available_size_show(struct device *dev,
386 struct device_attribute *attr, char *buf)
387{
388 struct nd_region *nd_region = to_nd_region(dev);
389 unsigned long long available = 0;
390
391 /*
392 * Flush in-flight updates and grab a snapshot of the available
393 * size. Of course, this value is potentially invalidated the
394 * memory nvdimm_bus_lock() is dropped, but that's userspace's
395 * problem to not race itself.
396 */
87a30e1f 397 nd_device_lock(dev);
bf9bccc1
DW
398 nvdimm_bus_lock(dev);
399 wait_nvdimm_bus_probe_idle(dev);
400 available = nd_region_available_dpa(nd_region);
401 nvdimm_bus_unlock(dev);
87a30e1f 402 nd_device_unlock(dev);
bf9bccc1
DW
403
404 return sprintf(buf, "%llu\n", available);
405}
406static DEVICE_ATTR_RO(available_size);
407
1e687220
KB
408static ssize_t max_available_extent_show(struct device *dev,
409 struct device_attribute *attr, char *buf)
410{
411 struct nd_region *nd_region = to_nd_region(dev);
412 unsigned long long available = 0;
413
87a30e1f 414 nd_device_lock(dev);
1e687220
KB
415 nvdimm_bus_lock(dev);
416 wait_nvdimm_bus_probe_idle(dev);
417 available = nd_region_allocatable_dpa(nd_region);
418 nvdimm_bus_unlock(dev);
87a30e1f 419 nd_device_unlock(dev);
1e687220
KB
420
421 return sprintf(buf, "%llu\n", available);
422}
423static DEVICE_ATTR_RO(max_available_extent);
424
3d88002e
DW
425static ssize_t init_namespaces_show(struct device *dev,
426 struct device_attribute *attr, char *buf)
427{
e5ae3b25 428 struct nd_region_data *ndrd = dev_get_drvdata(dev);
3d88002e
DW
429 ssize_t rc;
430
431 nvdimm_bus_lock(dev);
e5ae3b25
DW
432 if (ndrd)
433 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
3d88002e
DW
434 else
435 rc = -ENXIO;
436 nvdimm_bus_unlock(dev);
437
438 return rc;
439}
440static DEVICE_ATTR_RO(init_namespaces);
441
bf9bccc1
DW
442static ssize_t namespace_seed_show(struct device *dev,
443 struct device_attribute *attr, char *buf)
444{
445 struct nd_region *nd_region = to_nd_region(dev);
446 ssize_t rc;
447
448 nvdimm_bus_lock(dev);
449 if (nd_region->ns_seed)
450 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
451 else
452 rc = sprintf(buf, "\n");
453 nvdimm_bus_unlock(dev);
454 return rc;
455}
456static DEVICE_ATTR_RO(namespace_seed);
457
8c2f7e86
DW
458static ssize_t btt_seed_show(struct device *dev,
459 struct device_attribute *attr, char *buf)
460{
461 struct nd_region *nd_region = to_nd_region(dev);
462 ssize_t rc;
463
464 nvdimm_bus_lock(dev);
465 if (nd_region->btt_seed)
466 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
467 else
468 rc = sprintf(buf, "\n");
469 nvdimm_bus_unlock(dev);
470
471 return rc;
472}
473static DEVICE_ATTR_RO(btt_seed);
474
e1455744
DW
475static ssize_t pfn_seed_show(struct device *dev,
476 struct device_attribute *attr, char *buf)
477{
478 struct nd_region *nd_region = to_nd_region(dev);
479 ssize_t rc;
480
481 nvdimm_bus_lock(dev);
482 if (nd_region->pfn_seed)
483 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
484 else
485 rc = sprintf(buf, "\n");
486 nvdimm_bus_unlock(dev);
487
488 return rc;
489}
490static DEVICE_ATTR_RO(pfn_seed);
491
cd03412a
DW
492static ssize_t dax_seed_show(struct device *dev,
493 struct device_attribute *attr, char *buf)
494{
495 struct nd_region *nd_region = to_nd_region(dev);
496 ssize_t rc;
497
498 nvdimm_bus_lock(dev);
499 if (nd_region->dax_seed)
500 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
501 else
502 rc = sprintf(buf, "\n");
503 nvdimm_bus_unlock(dev);
504
505 return rc;
506}
507static DEVICE_ATTR_RO(dax_seed);
508
58138820
DW
509static ssize_t read_only_show(struct device *dev,
510 struct device_attribute *attr, char *buf)
511{
512 struct nd_region *nd_region = to_nd_region(dev);
513
514 return sprintf(buf, "%d\n", nd_region->ro);
515}
516
517static ssize_t read_only_store(struct device *dev,
518 struct device_attribute *attr, const char *buf, size_t len)
519{
520 bool ro;
521 int rc = strtobool(buf, &ro);
522 struct nd_region *nd_region = to_nd_region(dev);
523
524 if (rc)
525 return rc;
526
527 nd_region->ro = ro;
528 return len;
529}
530static DEVICE_ATTR_RW(read_only);
531
23f49844 532static ssize_t region_badblocks_show(struct device *dev,
6a6bef90
DJ
533 struct device_attribute *attr, char *buf)
534{
535 struct nd_region *nd_region = to_nd_region(dev);
5d394eee 536 ssize_t rc;
6a6bef90 537
87a30e1f 538 nd_device_lock(dev);
5d394eee
DW
539 if (dev->driver)
540 rc = badblocks_show(&nd_region->bb, buf, 0);
541 else
542 rc = -ENXIO;
87a30e1f 543 nd_device_unlock(dev);
23f49844 544
5d394eee
DW
545 return rc;
546}
23f49844 547static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
6a6bef90 548
802f4be6
DJ
549static ssize_t resource_show(struct device *dev,
550 struct device_attribute *attr, char *buf)
551{
552 struct nd_region *nd_region = to_nd_region(dev);
553
554 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
555}
556static DEVICE_ATTR_RO(resource);
557
96c3a239
DJ
558static ssize_t persistence_domain_show(struct device *dev,
559 struct device_attribute *attr, char *buf)
560{
561 struct nd_region *nd_region = to_nd_region(dev);
96c3a239 562
fe9a552e
DW
563 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
564 return sprintf(buf, "cpu_cache\n");
565 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
566 return sprintf(buf, "memory_controller\n");
567 else
568 return sprintf(buf, "\n");
96c3a239
DJ
569}
570static DEVICE_ATTR_RO(persistence_domain);
571
1f7df6f8
DW
572static struct attribute *nd_region_attributes[] = {
573 &dev_attr_size.attr,
3d88002e 574 &dev_attr_nstype.attr,
1f7df6f8 575 &dev_attr_mappings.attr,
8c2f7e86 576 &dev_attr_btt_seed.attr,
e1455744 577 &dev_attr_pfn_seed.attr,
cd03412a 578 &dev_attr_dax_seed.attr,
ab630891 579 &dev_attr_deep_flush.attr,
58138820 580 &dev_attr_read_only.attr,
eaf96153 581 &dev_attr_set_cookie.attr,
bf9bccc1 582 &dev_attr_available_size.attr,
1e687220 583 &dev_attr_max_available_extent.attr,
bf9bccc1 584 &dev_attr_namespace_seed.attr,
3d88002e 585 &dev_attr_init_namespaces.attr,
23f49844 586 &dev_attr_badblocks.attr,
802f4be6 587 &dev_attr_resource.attr,
96c3a239 588 &dev_attr_persistence_domain.attr,
1f7df6f8
DW
589 NULL,
590};
591
eaf96153
DW
592static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
593{
594 struct device *dev = container_of(kobj, typeof(*dev), kobj);
595 struct nd_region *nd_region = to_nd_region(dev);
596 struct nd_interleave_set *nd_set = nd_region->nd_set;
bf9bccc1 597 int type = nd_region_to_nstype(nd_region);
eaf96153 598
c9e582aa 599 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
6bb691ac
DK
600 return 0;
601
c9e582aa 602 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
cd03412a
DW
603 return 0;
604
c42adf87 605 if (!is_memory(dev) && a == &dev_attr_badblocks.attr)
6a6bef90
DJ
606 return 0;
607
b8ff981f 608 if (a == &dev_attr_resource.attr) {
c42adf87 609 if (is_memory(dev))
b8ff981f
DW
610 return 0400;
611 else
612 return 0;
613 }
802f4be6 614
ab630891
DW
615 if (a == &dev_attr_deep_flush.attr) {
616 int has_flush = nvdimm_has_flush(nd_region);
617
618 if (has_flush == 1)
619 return a->mode;
620 else if (has_flush == 0)
621 return 0444;
622 else
623 return 0;
624 }
625
896196dc
DW
626 if (a == &dev_attr_persistence_domain.attr) {
627 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
628 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
629 return 0;
630 return a->mode;
631 }
632
bf9bccc1
DW
633 if (a != &dev_attr_set_cookie.attr
634 && a != &dev_attr_available_size.attr)
eaf96153
DW
635 return a->mode;
636
bf9bccc1
DW
637 if ((type == ND_DEVICE_NAMESPACE_PMEM
638 || type == ND_DEVICE_NAMESPACE_BLK)
639 && a == &dev_attr_available_size.attr)
640 return a->mode;
c9e582aa 641 else if (is_memory(dev) && nd_set)
bf9bccc1 642 return a->mode;
eaf96153
DW
643
644 return 0;
645}
646
1f7df6f8
DW
647static ssize_t mappingN(struct device *dev, char *buf, int n)
648{
649 struct nd_region *nd_region = to_nd_region(dev);
650 struct nd_mapping *nd_mapping;
651 struct nvdimm *nvdimm;
652
653 if (n >= nd_region->ndr_mappings)
654 return -ENXIO;
655 nd_mapping = &nd_region->mapping[n];
656 nvdimm = nd_mapping->nvdimm;
657
401c0a19
DW
658 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
659 nd_mapping->start, nd_mapping->size,
660 nd_mapping->position);
1f7df6f8
DW
661}
662
663#define REGION_MAPPING(idx) \
664static ssize_t mapping##idx##_show(struct device *dev, \
665 struct device_attribute *attr, char *buf) \
666{ \
667 return mappingN(dev, buf, idx); \
668} \
669static DEVICE_ATTR_RO(mapping##idx)
670
671/*
672 * 32 should be enough for a while, even in the presence of socket
673 * interleave a 32-way interleave set is a degenerate case.
674 */
675REGION_MAPPING(0);
676REGION_MAPPING(1);
677REGION_MAPPING(2);
678REGION_MAPPING(3);
679REGION_MAPPING(4);
680REGION_MAPPING(5);
681REGION_MAPPING(6);
682REGION_MAPPING(7);
683REGION_MAPPING(8);
684REGION_MAPPING(9);
685REGION_MAPPING(10);
686REGION_MAPPING(11);
687REGION_MAPPING(12);
688REGION_MAPPING(13);
689REGION_MAPPING(14);
690REGION_MAPPING(15);
691REGION_MAPPING(16);
692REGION_MAPPING(17);
693REGION_MAPPING(18);
694REGION_MAPPING(19);
695REGION_MAPPING(20);
696REGION_MAPPING(21);
697REGION_MAPPING(22);
698REGION_MAPPING(23);
699REGION_MAPPING(24);
700REGION_MAPPING(25);
701REGION_MAPPING(26);
702REGION_MAPPING(27);
703REGION_MAPPING(28);
704REGION_MAPPING(29);
705REGION_MAPPING(30);
706REGION_MAPPING(31);
707
708static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
709{
710 struct device *dev = container_of(kobj, struct device, kobj);
711 struct nd_region *nd_region = to_nd_region(dev);
712
713 if (n < nd_region->ndr_mappings)
714 return a->mode;
715 return 0;
716}
717
718static struct attribute *mapping_attributes[] = {
719 &dev_attr_mapping0.attr,
720 &dev_attr_mapping1.attr,
721 &dev_attr_mapping2.attr,
722 &dev_attr_mapping3.attr,
723 &dev_attr_mapping4.attr,
724 &dev_attr_mapping5.attr,
725 &dev_attr_mapping6.attr,
726 &dev_attr_mapping7.attr,
727 &dev_attr_mapping8.attr,
728 &dev_attr_mapping9.attr,
729 &dev_attr_mapping10.attr,
730 &dev_attr_mapping11.attr,
731 &dev_attr_mapping12.attr,
732 &dev_attr_mapping13.attr,
733 &dev_attr_mapping14.attr,
734 &dev_attr_mapping15.attr,
735 &dev_attr_mapping16.attr,
736 &dev_attr_mapping17.attr,
737 &dev_attr_mapping18.attr,
738 &dev_attr_mapping19.attr,
739 &dev_attr_mapping20.attr,
740 &dev_attr_mapping21.attr,
741 &dev_attr_mapping22.attr,
742 &dev_attr_mapping23.attr,
743 &dev_attr_mapping24.attr,
744 &dev_attr_mapping25.attr,
745 &dev_attr_mapping26.attr,
746 &dev_attr_mapping27.attr,
747 &dev_attr_mapping28.attr,
748 &dev_attr_mapping29.attr,
749 &dev_attr_mapping30.attr,
750 &dev_attr_mapping31.attr,
751 NULL,
752};
753
754struct attribute_group nd_mapping_attribute_group = {
755 .is_visible = mapping_visible,
756 .attrs = mapping_attributes,
757};
758EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
759
cb719d5f
DW
760struct attribute_group nd_region_attribute_group = {
761 .attrs = nd_region_attributes,
762 .is_visible = region_visible,
763};
764EXPORT_SYMBOL_GPL(nd_region_attribute_group);
765
adbb6829
DW
766static const struct attribute_group *nd_region_attribute_groups[] = {
767 &nd_device_attribute_group,
768 NULL,
769};
770
771static const struct device_type nd_blk_device_type = {
cb719d5f
DW
772 .name = "nd_blk",
773 .release = nd_region_release,
adbb6829 774 .groups = nd_region_attribute_groups,
cb719d5f
DW
775};
776
adbb6829 777static const struct device_type nd_pmem_device_type = {
cb719d5f
DW
778 .name = "nd_pmem",
779 .release = nd_region_release,
adbb6829 780 .groups = nd_region_attribute_groups,
cb719d5f
DW
781};
782
adbb6829 783static const struct device_type nd_volatile_device_type = {
cb719d5f
DW
784 .name = "nd_volatile",
785 .release = nd_region_release,
adbb6829 786 .groups = nd_region_attribute_groups,
cb719d5f
DW
787};
788
789bool is_nd_pmem(struct device *dev)
790{
791 return dev ? dev->type == &nd_pmem_device_type : false;
792}
793
794bool is_nd_blk(struct device *dev)
795{
796 return dev ? dev->type == &nd_blk_device_type : false;
797}
798
799bool is_nd_volatile(struct device *dev)
800{
801 return dev ? dev->type == &nd_volatile_device_type : false;
802}
803
804u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
805 struct nd_namespace_index *nsindex)
806{
807 struct nd_interleave_set *nd_set = nd_region->nd_set;
808
809 if (!nd_set)
810 return 0;
811
812 if (nsindex && __le16_to_cpu(nsindex->major) == 1
813 && __le16_to_cpu(nsindex->minor) == 1)
814 return nd_set->cookie1;
815 return nd_set->cookie2;
816}
817
818u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
819{
820 struct nd_interleave_set *nd_set = nd_region->nd_set;
821
822 if (nd_set)
823 return nd_set->altcookie;
824 return 0;
825}
826
827void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
828{
829 struct nd_label_ent *label_ent, *e;
830
831 lockdep_assert_held(&nd_mapping->lock);
832 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
833 list_del(&label_ent->list);
834 kfree(label_ent);
835 }
836}
837
838/*
839 * When a namespace is activated create new seeds for the next
840 * namespace, or namespace-personality to be configured.
841 */
842void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev)
843{
844 nvdimm_bus_lock(dev);
845 if (nd_region->ns_seed == dev) {
846 nd_region_create_ns_seed(nd_region);
847 } else if (is_nd_btt(dev)) {
848 struct nd_btt *nd_btt = to_nd_btt(dev);
849
850 if (nd_region->btt_seed == dev)
851 nd_region_create_btt_seed(nd_region);
852 if (nd_region->ns_seed == &nd_btt->ndns->dev)
853 nd_region_create_ns_seed(nd_region);
854 } else if (is_nd_pfn(dev)) {
855 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
856
857 if (nd_region->pfn_seed == dev)
858 nd_region_create_pfn_seed(nd_region);
859 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
860 nd_region_create_ns_seed(nd_region);
861 } else if (is_nd_dax(dev)) {
862 struct nd_dax *nd_dax = to_nd_dax(dev);
863
864 if (nd_region->dax_seed == dev)
865 nd_region_create_dax_seed(nd_region);
866 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
867 nd_region_create_ns_seed(nd_region);
868 }
869 nvdimm_bus_unlock(dev);
870}
871
047fc8a1 872int nd_blk_region_init(struct nd_region *nd_region)
1f7df6f8 873{
047fc8a1
RZ
874 struct device *dev = &nd_region->dev;
875 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
876
877 if (!is_nd_blk(dev))
878 return 0;
879
880 if (nd_region->ndr_mappings < 1) {
d5d51fec 881 dev_dbg(dev, "invalid BLK region\n");
047fc8a1
RZ
882 return -ENXIO;
883 }
884
885 return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
1f7df6f8 886}
1f7df6f8 887
5212e11f
VV
888/**
889 * nd_region_acquire_lane - allocate and lock a lane
890 * @nd_region: region id and number of lanes possible
891 *
892 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
893 * We optimize for the common case where there are 256 lanes, one
894 * per-cpu. For larger systems we need to lock to share lanes. For now
895 * this implementation assumes the cost of maintaining an allocator for
896 * free lanes is on the order of the lock hold time, so it implements a
897 * static lane = cpu % num_lanes mapping.
898 *
899 * In the case of a BTT instance on top of a BLK namespace a lane may be
900 * acquired recursively. We lock on the first instance.
901 *
902 * In the case of a BTT instance on top of PMEM, we only acquire a lane
903 * for the BTT metadata updates.
904 */
905unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
906{
907 unsigned int cpu, lane;
908
909 cpu = get_cpu();
910 if (nd_region->num_lanes < nr_cpu_ids) {
911 struct nd_percpu_lane *ndl_lock, *ndl_count;
912
913 lane = cpu % nd_region->num_lanes;
914 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
915 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
916 if (ndl_count->count++ == 0)
917 spin_lock(&ndl_lock->lock);
918 } else
919 lane = cpu;
920
921 return lane;
922}
923EXPORT_SYMBOL(nd_region_acquire_lane);
924
925void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
926{
927 if (nd_region->num_lanes < nr_cpu_ids) {
928 unsigned int cpu = get_cpu();
929 struct nd_percpu_lane *ndl_lock, *ndl_count;
930
931 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
932 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
933 if (--ndl_count->count == 0)
934 spin_unlock(&ndl_lock->lock);
935 put_cpu();
936 }
937 put_cpu();
938}
939EXPORT_SYMBOL(nd_region_release_lane);
940
1f7df6f8 941static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
adbb6829
DW
942 struct nd_region_desc *ndr_desc,
943 const struct device_type *dev_type, const char *caller)
1f7df6f8
DW
944{
945 struct nd_region *nd_region;
946 struct device *dev;
047fc8a1 947 void *region_buf;
5212e11f 948 unsigned int i;
58138820 949 int ro = 0;
1f7df6f8
DW
950
951 for (i = 0; i < ndr_desc->num_mappings; i++) {
44c462eb
DW
952 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
953 struct nvdimm *nvdimm = mapping->nvdimm;
1f7df6f8 954
5b26db95
AK
955 if ((mapping->start | mapping->size) % PAGE_SIZE) {
956 dev_err(&nvdimm_bus->dev,
957 "%s: %s mapping%d is not %ld aligned\n",
958 caller, dev_name(&nvdimm->dev), i, PAGE_SIZE);
1f7df6f8
DW
959 return NULL;
960 }
58138820 961
8f078b38 962 if (test_bit(NDD_UNARMED, &nvdimm->flags))
58138820 963 ro = 1;
d5d30d5a
DW
964
965 if (test_bit(NDD_NOBLK, &nvdimm->flags)
966 && dev_type == &nd_blk_device_type) {
967 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not BLK capable\n",
968 caller, dev_name(&nvdimm->dev), i);
969 return NULL;
970 }
1f7df6f8
DW
971 }
972
047fc8a1
RZ
973 if (dev_type == &nd_blk_device_type) {
974 struct nd_blk_region_desc *ndbr_desc;
975 struct nd_blk_region *ndbr;
976
977 ndbr_desc = to_blk_region_desc(ndr_desc);
978 ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
979 * ndr_desc->num_mappings,
980 GFP_KERNEL);
981 if (ndbr) {
982 nd_region = &ndbr->nd_region;
983 ndbr->enable = ndbr_desc->enable;
047fc8a1
RZ
984 ndbr->do_io = ndbr_desc->do_io;
985 }
986 region_buf = ndbr;
987 } else {
2b90cb22
GS
988 nd_region = kzalloc(struct_size(nd_region, mapping,
989 ndr_desc->num_mappings),
990 GFP_KERNEL);
047fc8a1
RZ
991 region_buf = nd_region;
992 }
993
994 if (!region_buf)
1f7df6f8
DW
995 return NULL;
996 nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
5212e11f
VV
997 if (nd_region->id < 0)
998 goto err_id;
999
1000 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
1001 if (!nd_region->lane)
1002 goto err_percpu;
1003
1004 for (i = 0; i < nr_cpu_ids; i++) {
1005 struct nd_percpu_lane *ndl;
1006
1007 ndl = per_cpu_ptr(nd_region->lane, i);
1008 spin_lock_init(&ndl->lock);
1009 ndl->count = 0;
1f7df6f8
DW
1010 }
1011
1f7df6f8 1012 for (i = 0; i < ndr_desc->num_mappings; i++) {
44c462eb
DW
1013 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1014 struct nvdimm *nvdimm = mapping->nvdimm;
1015
1016 nd_region->mapping[i].nvdimm = nvdimm;
1017 nd_region->mapping[i].start = mapping->start;
1018 nd_region->mapping[i].size = mapping->size;
401c0a19 1019 nd_region->mapping[i].position = mapping->position;
ae8219f1
DW
1020 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1021 mutex_init(&nd_region->mapping[i].lock);
1f7df6f8
DW
1022
1023 get_device(&nvdimm->dev);
1024 }
1025 nd_region->ndr_mappings = ndr_desc->num_mappings;
1026 nd_region->provider_data = ndr_desc->provider_data;
eaf96153 1027 nd_region->nd_set = ndr_desc->nd_set;
5212e11f 1028 nd_region->num_lanes = ndr_desc->num_lanes;
004f1afb 1029 nd_region->flags = ndr_desc->flags;
58138820 1030 nd_region->ro = ro;
41d7a6d6 1031 nd_region->numa_node = ndr_desc->numa_node;
8fc5c735 1032 nd_region->target_node = ndr_desc->target_node;
1b40e09a 1033 ida_init(&nd_region->ns_ida);
8c2f7e86 1034 ida_init(&nd_region->btt_ida);
e1455744 1035 ida_init(&nd_region->pfn_ida);
cd03412a 1036 ida_init(&nd_region->dax_ida);
1f7df6f8
DW
1037 dev = &nd_region->dev;
1038 dev_set_name(dev, "region%d", nd_region->id);
1039 dev->parent = &nvdimm_bus->dev;
1040 dev->type = dev_type;
1041 dev->groups = ndr_desc->attr_groups;
1ff19f48 1042 dev->of_node = ndr_desc->of_node;
1f7df6f8
DW
1043 nd_region->ndr_size = resource_size(ndr_desc->res);
1044 nd_region->ndr_start = ndr_desc->res->start;
c5d4355d
PG
1045 if (ndr_desc->flush)
1046 nd_region->flush = ndr_desc->flush;
1047 else
1048 nd_region->flush = NULL;
1049
1f7df6f8
DW
1050 nd_device_register(dev);
1051
1052 return nd_region;
5212e11f
VV
1053
1054 err_percpu:
1055 ida_simple_remove(&region_ida, nd_region->id);
1056 err_id:
047fc8a1 1057 kfree(region_buf);
5212e11f 1058 return NULL;
1f7df6f8
DW
1059}
1060
1061struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1062 struct nd_region_desc *ndr_desc)
1063{
5212e11f 1064 ndr_desc->num_lanes = ND_MAX_LANES;
1f7df6f8
DW
1065 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1066 __func__);
1067}
1068EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1069
1070struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
1071 struct nd_region_desc *ndr_desc)
1072{
1073 if (ndr_desc->num_mappings > 1)
1074 return NULL;
5212e11f 1075 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
1f7df6f8
DW
1076 return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
1077 __func__);
1078}
1079EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
1080
1081struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1082 struct nd_region_desc *ndr_desc)
1083{
5212e11f 1084 ndr_desc->num_lanes = ND_MAX_LANES;
1f7df6f8
DW
1085 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1086 __func__);
1087}
1088EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
b354aba0 1089
c5d4355d
PG
1090int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1091{
1092 int rc = 0;
1093
1094 if (!nd_region->flush)
1095 rc = generic_nvdimm_flush(nd_region);
1096 else {
1097 if (nd_region->flush(nd_region, bio))
1098 rc = -EIO;
1099 }
1100
1101 return rc;
1102}
f284a4f2
DW
1103/**
1104 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1105 * @nd_region: blk or interleaved pmem region
1106 */
c5d4355d 1107int generic_nvdimm_flush(struct nd_region *nd_region)
f284a4f2
DW
1108{
1109 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
0c27af60
DW
1110 int i, idx;
1111
1112 /*
1113 * Try to encourage some diversity in flush hint addresses
1114 * across cpus assuming a limited number of flush hints.
1115 */
1116 idx = this_cpu_read(flush_idx);
1117 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
f284a4f2
DW
1118
1119 /*
1120 * The first wmb() is needed to 'sfence' all previous writes
1121 * such that they are architecturally visible for the platform
1122 * buffer flush. Note that we've already arranged for pmem
0aed55af
DW
1123 * writes to avoid the cache via memcpy_flushcache(). The final
1124 * wmb() ensures ordering for the NVDIMM flush write.
f284a4f2
DW
1125 */
1126 wmb();
1127 for (i = 0; i < nd_region->ndr_mappings; i++)
595c7307
DW
1128 if (ndrd_get_flush_wpq(ndrd, i, 0))
1129 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
f284a4f2 1130 wmb();
c5d4355d
PG
1131
1132 return 0;
f284a4f2
DW
1133}
1134EXPORT_SYMBOL_GPL(nvdimm_flush);
1135
1136/**
1137 * nvdimm_has_flush - determine write flushing requirements
1138 * @nd_region: blk or interleaved pmem region
1139 *
1140 * Returns 1 if writes require flushing
1141 * Returns 0 if writes do not require flushing
1142 * Returns -ENXIO if flushing capability can not be determined
1143 */
1144int nvdimm_has_flush(struct nd_region *nd_region)
1145{
f284a4f2
DW
1146 int i;
1147
c00b396e
DW
1148 /* no nvdimm or pmem api == flushing capability unknown */
1149 if (nd_region->ndr_mappings == 0
1150 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
f284a4f2
DW
1151 return -ENXIO;
1152
bc042fdf
DW
1153 for (i = 0; i < nd_region->ndr_mappings; i++) {
1154 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1155 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1156
1157 /* flush hints present / available */
1158 if (nvdimm->num_flush)
f284a4f2 1159 return 1;
bc042fdf 1160 }
f284a4f2
DW
1161
1162 /*
1163 * The platform defines dimm devices without hints, assume
1164 * platform persistence mechanism like ADR
1165 */
1166 return 0;
1167}
1168EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1169
0b277961
DW
1170int nvdimm_has_cache(struct nd_region *nd_region)
1171{
546eb031
RZ
1172 return is_nd_pmem(&nd_region->dev) &&
1173 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
0b277961
DW
1174}
1175EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1176
fefc1d97
PG
1177bool is_nvdimm_sync(struct nd_region *nd_region)
1178{
4c806b89
AK
1179 if (is_nd_volatile(&nd_region->dev))
1180 return true;
1181
fefc1d97
PG
1182 return is_nd_pmem(&nd_region->dev) &&
1183 !test_bit(ND_REGION_ASYNC, &nd_region->flags);
1184}
1185EXPORT_SYMBOL_GPL(is_nvdimm_sync);
1186
ae86cbfe
DW
1187struct conflict_context {
1188 struct nd_region *nd_region;
1189 resource_size_t start, size;
1190};
1191
1192static int region_conflict(struct device *dev, void *data)
1193{
1194 struct nd_region *nd_region;
1195 struct conflict_context *ctx = data;
1196 resource_size_t res_end, region_end, region_start;
1197
1198 if (!is_memory(dev))
1199 return 0;
1200
1201 nd_region = to_nd_region(dev);
1202 if (nd_region == ctx->nd_region)
1203 return 0;
1204
1205 res_end = ctx->start + ctx->size;
1206 region_start = nd_region->ndr_start;
1207 region_end = region_start + nd_region->ndr_size;
1208 if (ctx->start >= region_start && ctx->start < region_end)
1209 return -EBUSY;
1210 if (res_end > region_start && res_end <= region_end)
1211 return -EBUSY;
1212 return 0;
1213}
1214
1215int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1216 resource_size_t size)
1217{
1218 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1219 struct conflict_context ctx = {
1220 .nd_region = nd_region,
1221 .start = start,
1222 .size = size,
1223 };
1224
1225 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
1226}
1227
b354aba0
DW
1228void __exit nd_region_devs_exit(void)
1229{
1230 ida_destroy(&region_ida);
1231}