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nvme/scsi: Remove power management support
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CommitLineData
21d34711
CH
1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH
21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH
23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH
25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH
31
32#include "nvme.h"
038bd4cb 33#include "fabrics.h"
21d34711 34
f3ca80fc
CH
35#define NVME_MINORS (1U << MINORBITS)
36
ba0ba7d3
ML
37unsigned char admin_timeout = 60;
38module_param(admin_timeout, byte, 0644);
39MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 40EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML
41
42unsigned char nvme_io_timeout = 30;
43module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
44MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 45EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML
46
47unsigned char shutdown_timeout = 5;
48module_param(shutdown_timeout, byte, 0644);
49MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
f80ec966
KB
51unsigned int nvme_max_retries = 5;
52module_param_named(max_retries, nvme_max_retries, uint, 0644);
53MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
54EXPORT_SYMBOL_GPL(nvme_max_retries);
5bae7f73 55
f3ca80fc
CH
56static int nvme_char_major;
57module_param(nvme_char_major, int, 0);
58
59static LIST_HEAD(nvme_ctrl_list);
9f2482b9 60static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 61
f3ca80fc
CH
62static struct class *nvme_class;
63
c55a2fd4
ML
64void nvme_cancel_request(struct request *req, void *data, bool reserved)
65{
66 int status;
67
68 if (!blk_mq_request_started(req))
69 return;
70
71 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
72 "Cancelling I/O %d", req->tag);
73
74 status = NVME_SC_ABORT_REQ;
75 if (blk_queue_dying(req->q))
76 status |= NVME_SC_DNR;
77 blk_mq_complete_request(req, status);
78}
79EXPORT_SYMBOL_GPL(nvme_cancel_request);
80
bb8d261e
CH
81bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
82 enum nvme_ctrl_state new_state)
83{
f6b6a28e 84 enum nvme_ctrl_state old_state;
bb8d261e
CH
85 bool changed = false;
86
87 spin_lock_irq(&ctrl->lock);
f6b6a28e
GKB
88
89 old_state = ctrl->state;
bb8d261e
CH
90 switch (new_state) {
91 case NVME_CTRL_LIVE:
92 switch (old_state) {
7d2e8008 93 case NVME_CTRL_NEW:
bb8d261e 94 case NVME_CTRL_RESETTING:
def61eca 95 case NVME_CTRL_RECONNECTING:
bb8d261e
CH
96 changed = true;
97 /* FALLTHRU */
98 default:
99 break;
100 }
101 break;
102 case NVME_CTRL_RESETTING:
103 switch (old_state) {
104 case NVME_CTRL_NEW:
def61eca
CH
105 case NVME_CTRL_LIVE:
106 case NVME_CTRL_RECONNECTING:
107 changed = true;
108 /* FALLTHRU */
109 default:
110 break;
111 }
112 break;
113 case NVME_CTRL_RECONNECTING:
114 switch (old_state) {
bb8d261e
CH
115 case NVME_CTRL_LIVE:
116 changed = true;
117 /* FALLTHRU */
118 default:
119 break;
120 }
121 break;
122 case NVME_CTRL_DELETING:
123 switch (old_state) {
124 case NVME_CTRL_LIVE:
125 case NVME_CTRL_RESETTING:
def61eca 126 case NVME_CTRL_RECONNECTING:
bb8d261e
CH
127 changed = true;
128 /* FALLTHRU */
129 default:
130 break;
131 }
132 break;
0ff9d4e1
KB
133 case NVME_CTRL_DEAD:
134 switch (old_state) {
135 case NVME_CTRL_DELETING:
136 changed = true;
137 /* FALLTHRU */
138 default:
139 break;
140 }
141 break;
bb8d261e
CH
142 default:
143 break;
144 }
bb8d261e
CH
145
146 if (changed)
147 ctrl->state = new_state;
148
f6b6a28e
GKB
149 spin_unlock_irq(&ctrl->lock);
150
bb8d261e
CH
151 return changed;
152}
153EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
154
1673f1f0
CH
155static void nvme_free_ns(struct kref *kref)
156{
157 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
158
b0b4e09c
MB
159 if (ns->ndev)
160 nvme_nvm_unregister(ns);
1673f1f0 161
b0b4e09c
MB
162 if (ns->disk) {
163 spin_lock(&dev_list_lock);
164 ns->disk->private_data = NULL;
165 spin_unlock(&dev_list_lock);
166 }
1673f1f0 167
1673f1f0 168 put_disk(ns->disk);
075790eb
KB
169 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
170 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH
171 kfree(ns);
172}
173
5bae7f73 174static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH
175{
176 kref_put(&ns->kref, nvme_free_ns);
177}
178
179static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
180{
181 struct nvme_ns *ns;
182
183 spin_lock(&dev_list_lock);
184 ns = disk->private_data;
e439bb12
SG
185 if (ns) {
186 if (!kref_get_unless_zero(&ns->kref))
187 goto fail;
188 if (!try_module_get(ns->ctrl->ops->module))
189 goto fail_put_ns;
190 }
1673f1f0
CH
191 spin_unlock(&dev_list_lock);
192
193 return ns;
e439bb12
SG
194
195fail_put_ns:
196 kref_put(&ns->kref, nvme_free_ns);
197fail:
198 spin_unlock(&dev_list_lock);
199 return NULL;
1673f1f0
CH
200}
201
7688faa6
CH
202void nvme_requeue_req(struct request *req)
203{
204 unsigned long flags;
205
206 blk_mq_requeue_request(req);
207 spin_lock_irqsave(req->q->queue_lock, flags);
208 if (!blk_queue_stopped(req->q))
209 blk_mq_kick_requeue_list(req->q);
210 spin_unlock_irqrestore(req->q->queue_lock, flags);
211}
576d55d6 212EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 213
4160982e 214struct request *nvme_alloc_request(struct request_queue *q,
eb71f435 215 struct nvme_command *cmd, unsigned int flags, int qid)
21d34711 216{
21d34711 217 struct request *req;
21d34711 218
eb71f435
CH
219 if (qid == NVME_QID_ANY) {
220 req = blk_mq_alloc_request(q, nvme_is_write(cmd), flags);
221 } else {
222 req = blk_mq_alloc_request_hctx(q, nvme_is_write(cmd), flags,
223 qid ? qid - 1 : 0);
224 }
21d34711 225 if (IS_ERR(req))
4160982e 226 return req;
21d34711
CH
227
228 req->cmd_type = REQ_TYPE_DRV_PRIV;
229 req->cmd_flags |= REQ_FAILFAST_DRIVER;
21d34711
CH
230 req->cmd = (unsigned char *)cmd;
231 req->cmd_len = sizeof(struct nvme_command);
21d34711 232
4160982e
CH
233 return req;
234}
576d55d6 235EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 236
8093f7ca
ML
237static inline void nvme_setup_flush(struct nvme_ns *ns,
238 struct nvme_command *cmnd)
239{
240 memset(cmnd, 0, sizeof(*cmnd));
241 cmnd->common.opcode = nvme_cmd_flush;
242 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
243}
244
245static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
246 struct nvme_command *cmnd)
247{
248 struct nvme_dsm_range *range;
249 struct page *page;
250 int offset;
251 unsigned int nr_bytes = blk_rq_bytes(req);
252
253 range = kmalloc(sizeof(*range), GFP_ATOMIC);
254 if (!range)
255 return BLK_MQ_RQ_QUEUE_BUSY;
256
257 range->cattr = cpu_to_le32(0);
258 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
259 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
260
261 memset(cmnd, 0, sizeof(*cmnd));
262 cmnd->dsm.opcode = nvme_cmd_dsm;
263 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
264 cmnd->dsm.nr = 0;
265 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
266
267 req->completion_data = range;
268 page = virt_to_page(range);
269 offset = offset_in_page(range);
270 blk_add_request_payload(req, page, offset, sizeof(*range));
271
272 /*
273 * we set __data_len back to the size of the area to be discarded
274 * on disk. This allows us to report completion on the full amount
275 * of blocks described by the request.
276 */
277 req->__data_len = nr_bytes;
278
279 return 0;
280}
281
282static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
283 struct nvme_command *cmnd)
284{
285 u16 control = 0;
286 u32 dsmgmt = 0;
287
288 if (req->cmd_flags & REQ_FUA)
289 control |= NVME_RW_FUA;
290 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
291 control |= NVME_RW_LR;
292
293 if (req->cmd_flags & REQ_RAHEAD)
294 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
295
296 memset(cmnd, 0, sizeof(*cmnd));
297 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
298 cmnd->rw.command_id = req->tag;
299 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
300 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
301 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
302
303 if (ns->ms) {
304 switch (ns->pi_type) {
305 case NVME_NS_DPS_PI_TYPE3:
306 control |= NVME_RW_PRINFO_PRCHK_GUARD;
307 break;
308 case NVME_NS_DPS_PI_TYPE1:
309 case NVME_NS_DPS_PI_TYPE2:
310 control |= NVME_RW_PRINFO_PRCHK_GUARD |
311 NVME_RW_PRINFO_PRCHK_REF;
312 cmnd->rw.reftag = cpu_to_le32(
313 nvme_block_nr(ns, blk_rq_pos(req)));
314 break;
315 }
316 if (!blk_integrity_rq(req))
317 control |= NVME_RW_PRINFO_PRACT;
318 }
319
320 cmnd->rw.control = cpu_to_le16(control);
321 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
322}
323
324int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
325 struct nvme_command *cmd)
326{
327 int ret = 0;
328
329 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
330 memcpy(cmd, req->cmd, sizeof(*cmd));
3a5e02ce 331 else if (req_op(req) == REQ_OP_FLUSH)
8093f7ca 332 nvme_setup_flush(ns, cmd);
c2df40df 333 else if (req_op(req) == REQ_OP_DISCARD)
8093f7ca
ML
334 ret = nvme_setup_discard(ns, req, cmd);
335 else
336 nvme_setup_rw(ns, req, cmd);
337
338 return ret;
339}
340EXPORT_SYMBOL_GPL(nvme_setup_cmd);
341
4160982e
CH
342/*
343 * Returns 0 on success. If the result is negative, it's a Linux error code;
344 * if the result is positive, it's an NVM Express status code
345 */
346int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5 347 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
eb71f435 348 unsigned timeout, int qid, int at_head, int flags)
4160982e
CH
349{
350 struct request *req;
351 int ret;
352
eb71f435 353 req = nvme_alloc_request(q, cmd, flags, qid);
4160982e
CH
354 if (IS_ERR(req))
355 return PTR_ERR(req);
356
357 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 358 req->special = cqe;
4160982e 359
21d34711
CH
360 if (buffer && bufflen) {
361 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
362 if (ret)
363 goto out;
4160982e
CH
364 }
365
eb71f435 366 blk_execute_rq(req->q, NULL, req, at_head);
4160982e
CH
367 ret = req->errors;
368 out:
369 blk_mq_free_request(req);
370 return ret;
371}
eb71f435 372EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
4160982e
CH
373
374int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
375 void *buffer, unsigned bufflen)
376{
eb71f435
CH
377 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
378 NVME_QID_ANY, 0, 0);
4160982e 379}
576d55d6 380EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 381
0b7f1f26
KB
382int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
383 void __user *ubuffer, unsigned bufflen,
384 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
385 u32 *result, unsigned timeout)
4160982e 386{
7a5abb4b 387 bool write = nvme_is_write(cmd);
1cb3cce5 388 struct nvme_completion cqe;
0b7f1f26
KB
389 struct nvme_ns *ns = q->queuedata;
390 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 391 struct request *req;
0b7f1f26
KB
392 struct bio *bio = NULL;
393 void *meta = NULL;
4160982e
CH
394 int ret;
395
eb71f435 396 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
4160982e
CH
397 if (IS_ERR(req))
398 return PTR_ERR(req);
399
400 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 401 req->special = &cqe;
4160982e
CH
402
403 if (ubuffer && bufflen) {
21d34711
CH
404 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
405 GFP_KERNEL);
406 if (ret)
407 goto out;
408 bio = req->bio;
21d34711 409
0b7f1f26
KB
410 if (!disk)
411 goto submit;
412 bio->bi_bdev = bdget_disk(disk, 0);
413 if (!bio->bi_bdev) {
414 ret = -ENODEV;
415 goto out_unmap;
416 }
417
e9fc63d6 418 if (meta_buffer && meta_len) {
0b7f1f26
KB
419 struct bio_integrity_payload *bip;
420
421 meta = kmalloc(meta_len, GFP_KERNEL);
422 if (!meta) {
423 ret = -ENOMEM;
424 goto out_unmap;
425 }
426
427 if (write) {
428 if (copy_from_user(meta, meta_buffer,
429 meta_len)) {
430 ret = -EFAULT;
431 goto out_free_meta;
432 }
433 }
434
435 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB
436 if (IS_ERR(bip)) {
437 ret = PTR_ERR(bip);
0b7f1f26
KB
438 goto out_free_meta;
439 }
440
441 bip->bip_iter.bi_size = meta_len;
442 bip->bip_iter.bi_sector = meta_seed;
443
444 ret = bio_integrity_add_page(bio, virt_to_page(meta),
445 meta_len, offset_in_page(meta));
446 if (ret != meta_len) {
447 ret = -ENOMEM;
448 goto out_free_meta;
449 }
450 }
451 }
452 submit:
453 blk_execute_rq(req->q, disk, req, 0);
454 ret = req->errors;
21d34711 455 if (result)
1cb3cce5 456 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB
457 if (meta && !ret && !write) {
458 if (copy_to_user(meta_buffer, meta, meta_len))
459 ret = -EFAULT;
460 }
461 out_free_meta:
462 kfree(meta);
463 out_unmap:
464 if (bio) {
465 if (disk && bio->bi_bdev)
466 bdput(bio->bi_bdev);
467 blk_rq_unmap_user(bio);
468 }
21d34711
CH
469 out:
470 blk_mq_free_request(req);
471 return ret;
472}
473
0b7f1f26
KB
474int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
475 void __user *ubuffer, unsigned bufflen, u32 *result,
476 unsigned timeout)
477{
478 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
479 result, timeout);
480}
481
038bd4cb
SG
482static void nvme_keep_alive_end_io(struct request *rq, int error)
483{
484 struct nvme_ctrl *ctrl = rq->end_io_data;
485
486 blk_mq_free_request(rq);
487
488 if (error) {
489 dev_err(ctrl->device,
490 "failed nvme_keep_alive_end_io error=%d\n", error);
491 return;
492 }
493
494 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
495}
496
497static int nvme_keep_alive(struct nvme_ctrl *ctrl)
498{
499 struct nvme_command c;
500 struct request *rq;
501
502 memset(&c, 0, sizeof(c));
503 c.common.opcode = nvme_admin_keep_alive;
504
505 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
506 NVME_QID_ANY);
507 if (IS_ERR(rq))
508 return PTR_ERR(rq);
509
510 rq->timeout = ctrl->kato * HZ;
511 rq->end_io_data = ctrl;
512
513 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
514
515 return 0;
516}
517
518static void nvme_keep_alive_work(struct work_struct *work)
519{
520 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
521 struct nvme_ctrl, ka_work);
522
523 if (nvme_keep_alive(ctrl)) {
524 /* allocation failure, reset the controller */
525 dev_err(ctrl->device, "keep-alive failed\n");
526 ctrl->ops->reset_ctrl(ctrl);
527 return;
528 }
529}
530
531void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
532{
533 if (unlikely(ctrl->kato == 0))
534 return;
535
536 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
537 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
538}
539EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
540
541void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
542{
543 if (unlikely(ctrl->kato == 0))
544 return;
545
546 cancel_delayed_work_sync(&ctrl->ka_work);
547}
548EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
549
1c63dc66 550int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH
551{
552 struct nvme_command c = { };
553 int error;
554
555 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
556 c.identify.opcode = nvme_admin_identify;
557 c.identify.cns = cpu_to_le32(1);
558
559 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
560 if (!*id)
561 return -ENOMEM;
562
563 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
564 sizeof(struct nvme_id_ctrl));
565 if (error)
566 kfree(*id);
567 return error;
568}
569
540c801c
KB
570static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
571{
572 struct nvme_command c = { };
573
574 c.identify.opcode = nvme_admin_identify;
575 c.identify.cns = cpu_to_le32(2);
576 c.identify.nsid = cpu_to_le32(nsid);
577 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
578}
579
1c63dc66 580int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH
581 struct nvme_id_ns **id)
582{
583 struct nvme_command c = { };
584 int error;
585
586 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
587 c.identify.opcode = nvme_admin_identify,
588 c.identify.nsid = cpu_to_le32(nsid),
589
590 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
591 if (!*id)
592 return -ENOMEM;
593
594 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
595 sizeof(struct nvme_id_ns));
596 if (error)
597 kfree(*id);
598 return error;
599}
600
1c63dc66 601int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
21d34711
CH
602 dma_addr_t dma_addr, u32 *result)
603{
604 struct nvme_command c;
1cb3cce5
CH
605 struct nvme_completion cqe;
606 int ret;
21d34711
CH
607
608 memset(&c, 0, sizeof(c));
609 c.features.opcode = nvme_admin_get_features;
610 c.features.nsid = cpu_to_le32(nsid);
eb793e2c 611 c.features.dptr.prp1 = cpu_to_le64(dma_addr);
21d34711
CH
612 c.features.fid = cpu_to_le32(fid);
613
eb71f435
CH
614 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0,
615 NVME_QID_ANY, 0, 0);
9b47f77a 616 if (ret >= 0 && result)
1cb3cce5
CH
617 *result = le32_to_cpu(cqe.result);
618 return ret;
21d34711
CH
619}
620
1c63dc66 621int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
21d34711
CH
622 dma_addr_t dma_addr, u32 *result)
623{
624 struct nvme_command c;
1cb3cce5
CH
625 struct nvme_completion cqe;
626 int ret;
21d34711
CH
627
628 memset(&c, 0, sizeof(c));
629 c.features.opcode = nvme_admin_set_features;
eb793e2c 630 c.features.dptr.prp1 = cpu_to_le64(dma_addr);
21d34711
CH
631 c.features.fid = cpu_to_le32(fid);
632 c.features.dword11 = cpu_to_le32(dword11);
633
eb71f435
CH
634 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0,
635 NVME_QID_ANY, 0, 0);
9b47f77a 636 if (ret >= 0 && result)
1cb3cce5
CH
637 *result = le32_to_cpu(cqe.result);
638 return ret;
21d34711
CH
639}
640
1c63dc66 641int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH
642{
643 struct nvme_command c = { };
644 int error;
645
646 c.common.opcode = nvme_admin_get_log_page,
647 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
648 c.common.cdw10[0] = cpu_to_le32(
649 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
650 NVME_LOG_SMART),
651
652 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
653 if (!*log)
654 return -ENOMEM;
655
656 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
657 sizeof(struct nvme_smart_log));
658 if (error)
659 kfree(*log);
660 return error;
661}
1673f1f0 662
9a0be7ab
CH
663int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
664{
665 u32 q_count = (*count - 1) | ((*count - 1) << 16);
666 u32 result;
667 int status, nr_io_queues;
668
669 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0,
670 &result);
f5fa90dc 671 if (status < 0)
9a0be7ab
CH
672 return status;
673
f5fa90dc
CH
674 /*
675 * Degraded controllers might return an error when setting the queue
676 * count. We still want to be able to bring them online and offer
677 * access to the admin queue, as that might be only way to fix them up.
678 */
679 if (status > 0) {
680 dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
681 *count = 0;
682 } else {
683 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
684 *count = min(*count, nr_io_queues);
685 }
686
9a0be7ab
CH
687 return 0;
688}
576d55d6 689EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 690
1673f1f0
CH
691static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
692{
693 struct nvme_user_io io;
694 struct nvme_command c;
695 unsigned length, meta_len;
696 void __user *metadata;
697
698 if (copy_from_user(&io, uio, sizeof(io)))
699 return -EFAULT;
63088ec7
KB
700 if (io.flags)
701 return -EINVAL;
1673f1f0
CH
702
703 switch (io.opcode) {
704 case nvme_cmd_write:
705 case nvme_cmd_read:
706 case nvme_cmd_compare:
707 break;
708 default:
709 return -EINVAL;
710 }
711
712 length = (io.nblocks + 1) << ns->lba_shift;
713 meta_len = (io.nblocks + 1) * ns->ms;
714 metadata = (void __user *)(uintptr_t)io.metadata;
715
716 if (ns->ext) {
717 length += meta_len;
718 meta_len = 0;
719 } else if (meta_len) {
720 if ((io.metadata & 3) || !io.metadata)
721 return -EINVAL;
722 }
723
724 memset(&c, 0, sizeof(c));
725 c.rw.opcode = io.opcode;
726 c.rw.flags = io.flags;
727 c.rw.nsid = cpu_to_le32(ns->ns_id);
728 c.rw.slba = cpu_to_le64(io.slba);
729 c.rw.length = cpu_to_le16(io.nblocks);
730 c.rw.control = cpu_to_le16(io.control);
731 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
732 c.rw.reftag = cpu_to_le32(io.reftag);
733 c.rw.apptag = cpu_to_le16(io.apptag);
734 c.rw.appmask = cpu_to_le16(io.appmask);
735
736 return __nvme_submit_user_cmd(ns->queue, &c,
737 (void __user *)(uintptr_t)io.addr, length,
738 metadata, meta_len, io.slba, NULL, 0);
739}
740
f3ca80fc 741static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH
742 struct nvme_passthru_cmd __user *ucmd)
743{
744 struct nvme_passthru_cmd cmd;
745 struct nvme_command c;
746 unsigned timeout = 0;
747 int status;
748
749 if (!capable(CAP_SYS_ADMIN))
750 return -EACCES;
751 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
752 return -EFAULT;
63088ec7
KB
753 if (cmd.flags)
754 return -EINVAL;
1673f1f0
CH
755
756 memset(&c, 0, sizeof(c));
757 c.common.opcode = cmd.opcode;
758 c.common.flags = cmd.flags;
759 c.common.nsid = cpu_to_le32(cmd.nsid);
760 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
761 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
762 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
763 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
764 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
765 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
766 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
767 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
768
769 if (cmd.timeout_ms)
770 timeout = msecs_to_jiffies(cmd.timeout_ms);
771
772 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 773 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH
774 &cmd.result, timeout);
775 if (status >= 0) {
776 if (put_user(cmd.result, &ucmd->result))
777 return -EFAULT;
778 }
779
780 return status;
781}
782
783static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
784 unsigned int cmd, unsigned long arg)
785{
786 struct nvme_ns *ns = bdev->bd_disk->private_data;
787
788 switch (cmd) {
789 case NVME_IOCTL_ID:
790 force_successful_syscall_return();
791 return ns->ns_id;
792 case NVME_IOCTL_ADMIN_CMD:
793 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
794 case NVME_IOCTL_IO_CMD:
795 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
796 case NVME_IOCTL_SUBMIT_IO:
797 return nvme_submit_io(ns, (void __user *)arg);
44907332 798#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH
799 case SG_GET_VERSION_NUM:
800 return nvme_sg_get_version_num((void __user *)arg);
801 case SG_IO:
802 return nvme_sg_io(ns, (void __user *)arg);
44907332 803#endif
1673f1f0
CH
804 default:
805 return -ENOTTY;
806 }
807}
808
809#ifdef CONFIG_COMPAT
810static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
811 unsigned int cmd, unsigned long arg)
812{
813 switch (cmd) {
814 case SG_IO:
815 return -ENOIOCTLCMD;
816 }
817 return nvme_ioctl(bdev, mode, cmd, arg);
818}
819#else
820#define nvme_compat_ioctl NULL
821#endif
822
823static int nvme_open(struct block_device *bdev, fmode_t mode)
824{
825 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
826}
827
828static void nvme_release(struct gendisk *disk, fmode_t mode)
829{
e439bb12
SG
830 struct nvme_ns *ns = disk->private_data;
831
832 module_put(ns->ctrl->ops->module);
833 nvme_put_ns(ns);
1673f1f0
CH
834}
835
836static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
837{
838 /* some standard values */
839 geo->heads = 1 << 6;
840 geo->sectors = 1 << 5;
841 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
842 return 0;
843}
844
845#ifdef CONFIG_BLK_DEV_INTEGRITY
846static void nvme_init_integrity(struct nvme_ns *ns)
847{
848 struct blk_integrity integrity;
849
fa9a89fc 850 memset(&integrity, 0, sizeof(integrity));
1673f1f0
CH
851 switch (ns->pi_type) {
852 case NVME_NS_DPS_PI_TYPE3:
853 integrity.profile = &t10_pi_type3_crc;
ba36c21b
NB
854 integrity.tag_size = sizeof(u16) + sizeof(u32);
855 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH
856 break;
857 case NVME_NS_DPS_PI_TYPE1:
858 case NVME_NS_DPS_PI_TYPE2:
859 integrity.profile = &t10_pi_type1_crc;
ba36c21b
NB
860 integrity.tag_size = sizeof(u16);
861 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH
862 break;
863 default:
864 integrity.profile = NULL;
865 break;
866 }
867 integrity.tuple_size = ns->ms;
868 blk_integrity_register(ns->disk, &integrity);
869 blk_queue_max_integrity_segments(ns->queue, 1);
870}
871#else
872static void nvme_init_integrity(struct nvme_ns *ns)
873{
874}
875#endif /* CONFIG_BLK_DEV_INTEGRITY */
876
877static void nvme_config_discard(struct nvme_ns *ns)
878{
08095e70 879 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 880 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB
881
882 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
883 ns->queue->limits.discard_zeroes_data = 1;
884 else
885 ns->queue->limits.discard_zeroes_data = 0;
886
1673f1f0
CH
887 ns->queue->limits.discard_alignment = logical_block_size;
888 ns->queue->limits.discard_granularity = logical_block_size;
bd0fc288 889 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1673f1f0
CH
890 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
891}
892
ac81bfa9 893static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
1673f1f0 894{
ac81bfa9 895 if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
b0b4e09c 896 dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
1673f1f0
CH
897 return -ENODEV;
898 }
1673f1f0 899
ac81bfa9
MB
900 if ((*id)->ncap == 0) {
901 kfree(*id);
902 return -ENODEV;
1673f1f0
CH
903 }
904
2b9b6e86 905 if (ns->ctrl->vs >= NVME_VS(1, 1))
ac81bfa9 906 memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
2b9b6e86 907 if (ns->ctrl->vs >= NVME_VS(1, 2))
ac81bfa9
MB
908 memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid));
909
910 return 0;
911}
912
913static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
914{
915 struct nvme_ns *ns = disk->private_data;
916 u8 lbaf, pi_type;
917 u16 old_ms;
918 unsigned short bs;
2b9b6e86 919
1673f1f0
CH
920 old_ms = ns->ms;
921 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
922 ns->lba_shift = id->lbaf[lbaf].ds;
923 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
924 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
925
926 /*
927 * If identify namespace failed, use default 512 byte block size so
928 * block layer can use before failing read/write for 0 capacity.
929 */
930 if (ns->lba_shift == 0)
931 ns->lba_shift = 9;
932 bs = 1 << ns->lba_shift;
1673f1f0
CH
933 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
934 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
935 id->dps & NVME_NS_DPS_PI_MASK : 0;
936
937 blk_mq_freeze_queue(disk->queue);
938 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
939 ns->ms != old_ms ||
940 bs != queue_logical_block_size(disk->queue) ||
941 (ns->ms && ns->ext)))
942 blk_integrity_unregister(disk);
943
944 ns->pi_type = pi_type;
945 blk_queue_logical_block_size(ns->queue, bs);
946
4b9d5b15 947 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 948 nvme_init_integrity(ns);
1673f1f0
CH
949 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
950 set_capacity(disk, 0);
951 else
952 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
953
954 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
955 nvme_config_discard(ns);
956 blk_mq_unfreeze_queue(disk->queue);
ac81bfa9 957}
1673f1f0 958
ac81bfa9
MB
959static int nvme_revalidate_disk(struct gendisk *disk)
960{
961 struct nvme_ns *ns = disk->private_data;
962 struct nvme_id_ns *id = NULL;
963 int ret;
964
965 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
966 set_capacity(disk, 0);
967 return -ENODEV;
968 }
969
970 ret = nvme_revalidate_ns(ns, &id);
971 if (ret)
972 return ret;
973
974 __nvme_revalidate_disk(disk, id);
1673f1f0 975 kfree(id);
ac81bfa9 976
1673f1f0
CH
977 return 0;
978}
979
980static char nvme_pr_type(enum pr_type type)
981{
982 switch (type) {
983 case PR_WRITE_EXCLUSIVE:
984 return 1;
985 case PR_EXCLUSIVE_ACCESS:
986 return 2;
987 case PR_WRITE_EXCLUSIVE_REG_ONLY:
988 return 3;
989 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
990 return 4;
991 case PR_WRITE_EXCLUSIVE_ALL_REGS:
992 return 5;
993 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
994 return 6;
995 default:
996 return 0;
997 }
998};
999
1000static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
1001 u64 key, u64 sa_key, u8 op)
1002{
1003 struct nvme_ns *ns = bdev->bd_disk->private_data;
1004 struct nvme_command c;
1005 u8 data[16] = { 0, };
1006
1007 put_unaligned_le64(key, &data[0]);
1008 put_unaligned_le64(sa_key, &data[8]);
1009
1010 memset(&c, 0, sizeof(c));
1011 c.common.opcode = op;
1012 c.common.nsid = cpu_to_le32(ns->ns_id);
1013 c.common.cdw10[0] = cpu_to_le32(cdw10);
1014
1015 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
1016}
1017
1018static int nvme_pr_register(struct block_device *bdev, u64 old,
1019 u64 new, unsigned flags)
1020{
1021 u32 cdw10;
1022
1023 if (flags & ~PR_FL_IGNORE_KEY)
1024 return -EOPNOTSUPP;
1025
1026 cdw10 = old ? 2 : 0;
1027 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1028 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1029 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1030}
1031
1032static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1033 enum pr_type type, unsigned flags)
1034{
1035 u32 cdw10;
1036
1037 if (flags & ~PR_FL_IGNORE_KEY)
1038 return -EOPNOTSUPP;
1039
1040 cdw10 = nvme_pr_type(type) << 8;
1041 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1042 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1043}
1044
1045static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1046 enum pr_type type, bool abort)
1047{
1048 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1049 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1050}
1051
1052static int nvme_pr_clear(struct block_device *bdev, u64 key)
1053{
8c0b3915 1054 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH
1055 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1056}
1057
1058static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1059{
1060 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1061 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1062}
1063
1064static const struct pr_ops nvme_pr_ops = {
1065 .pr_register = nvme_pr_register,
1066 .pr_reserve = nvme_pr_reserve,
1067 .pr_release = nvme_pr_release,
1068 .pr_preempt = nvme_pr_preempt,
1069 .pr_clear = nvme_pr_clear,
1070};
1071
5bae7f73 1072static const struct block_device_operations nvme_fops = {
1673f1f0
CH
1073 .owner = THIS_MODULE,
1074 .ioctl = nvme_ioctl,
1075 .compat_ioctl = nvme_compat_ioctl,
1076 .open = nvme_open,
1077 .release = nvme_release,
1078 .getgeo = nvme_getgeo,
1079 .revalidate_disk= nvme_revalidate_disk,
1080 .pr_ops = &nvme_pr_ops,
1081};
1082
5fd4ce1b
CH
1083static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1084{
1085 unsigned long timeout =
1086 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1087 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1088 int ret;
1089
1090 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1091 if ((csts & NVME_CSTS_RDY) == bit)
1092 break;
1093
1094 msleep(100);
1095 if (fatal_signal_pending(current))
1096 return -EINTR;
1097 if (time_after(jiffies, timeout)) {
1b3c47c1 1098 dev_err(ctrl->device,
5fd4ce1b
CH
1099 "Device not ready; aborting %s\n", enabled ?
1100 "initialisation" : "reset");
1101 return -ENODEV;
1102 }
1103 }
1104
1105 return ret;
1106}
1107
1108/*
1109 * If the device has been passed off to us in an enabled state, just clear
1110 * the enabled bit. The spec says we should set the 'shutdown notification
1111 * bits', but doing so may cause the device to complete commands to the
1112 * admin queue ... and we don't know what memory that might be pointing at!
1113 */
1114int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1115{
1116 int ret;
1117
1118 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1119 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1120
1121 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1122 if (ret)
1123 return ret;
54adc010
GP
1124
1125 /* Checking for ctrl->tagset is a trick to avoid sleeping on module
1126 * load, since we only need the quirk on reset_controller. Notice
1127 * that the HGST device needs this delay only in firmware activation
1128 * procedure; unfortunately we have no (easy) way to verify this.
1129 */
1130 if ((ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) && ctrl->tagset)
1131 msleep(NVME_QUIRK_DELAY_AMOUNT);
1132
5fd4ce1b
CH
1133 return nvme_wait_ready(ctrl, cap, false);
1134}
576d55d6 1135EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH
1136
1137int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1138{
1139 /*
1140 * Default to a 4K page size, with the intention to update this
1141 * path in the future to accomodate architectures with differing
1142 * kernel and IO page sizes.
1143 */
1144 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1145 int ret;
1146
1147 if (page_shift < dev_page_min) {
1b3c47c1 1148 dev_err(ctrl->device,
5fd4ce1b
CH
1149 "Minimum device page size %u too large for host (%u)\n",
1150 1 << dev_page_min, 1 << page_shift);
1151 return -ENODEV;
1152 }
1153
1154 ctrl->page_size = 1 << page_shift;
1155
1156 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1157 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1158 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1159 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1160 ctrl->ctrl_config |= NVME_CC_ENABLE;
1161
1162 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1163 if (ret)
1164 return ret;
1165 return nvme_wait_ready(ctrl, cap, true);
1166}
576d55d6 1167EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH
1168
1169int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1170{
1171 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1172 u32 csts;
1173 int ret;
1174
1175 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1176 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1177
1178 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1179 if (ret)
1180 return ret;
1181
1182 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1183 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1184 break;
1185
1186 msleep(100);
1187 if (fatal_signal_pending(current))
1188 return -EINTR;
1189 if (time_after(jiffies, timeout)) {
1b3c47c1 1190 dev_err(ctrl->device,
5fd4ce1b
CH
1191 "Device shutdown incomplete; abort shutdown\n");
1192 return -ENODEV;
1193 }
1194 }
1195
1196 return ret;
1197}
576d55d6 1198EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1199
da35825d
CH
1200static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1201 struct request_queue *q)
1202{
7c88cb00
JA
1203 bool vwc = false;
1204
da35825d 1205 if (ctrl->max_hw_sectors) {
45686b61
CH
1206 u32 max_segments =
1207 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1208
da35825d 1209 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1210 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH
1211 }
1212 if (ctrl->stripe_size)
1213 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1214 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA
1215 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1216 vwc = true;
1217 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH
1218}
1219
7fd8930f
CH
1220/*
1221 * Initialize the cached copies of the Identify data and various controller
1222 * register in our nvme_ctrl structure. This should be called as soon as
1223 * the admin queue is fully up and running.
1224 */
1225int nvme_init_identify(struct nvme_ctrl *ctrl)
1226{
1227 struct nvme_id_ctrl *id;
1228 u64 cap;
1229 int ret, page_shift;
a229dbf6 1230 u32 max_hw_sectors;
7fd8930f 1231
f3ca80fc
CH
1232 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1233 if (ret) {
1b3c47c1 1234 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH
1235 return ret;
1236 }
1237
7fd8930f
CH
1238 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1239 if (ret) {
1b3c47c1 1240 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH
1241 return ret;
1242 }
1243 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1244
f3ca80fc
CH
1245 if (ctrl->vs >= NVME_VS(1, 1))
1246 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1247
7fd8930f
CH
1248 ret = nvme_identify_ctrl(ctrl, &id);
1249 if (ret) {
1b3c47c1 1250 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH
1251 return -EIO;
1252 }
1253
118472ab 1254 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1255 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1256 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1257 ctrl->vwc = id->vwc;
931e1c22 1258 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH
1259 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1260 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1261 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1262 if (id->mdts)
a229dbf6 1263 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
7fd8930f 1264 else
a229dbf6
CH
1265 max_hw_sectors = UINT_MAX;
1266 ctrl->max_hw_sectors =
1267 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
7fd8930f
CH
1268
1269 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1270 unsigned int max_hw_sectors;
1271
1272 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1273 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1274 if (ctrl->max_hw_sectors) {
1275 ctrl->max_hw_sectors = min(max_hw_sectors,
1276 ctrl->max_hw_sectors);
1277 } else {
1278 ctrl->max_hw_sectors = max_hw_sectors;
1279 }
1280 }
1281
da35825d 1282 nvme_set_queue_limits(ctrl, ctrl->admin_q);
07bfcd09 1283 ctrl->sgls = le32_to_cpu(id->sgls);
038bd4cb 1284 ctrl->kas = le16_to_cpu(id->kas);
07bfcd09
CH
1285
1286 if (ctrl->ops->is_fabrics) {
1287 ctrl->icdoff = le16_to_cpu(id->icdoff);
1288 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1289 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1290 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1291
1292 /*
1293 * In fabrics we need to verify the cntlid matches the
1294 * admin connect
1295 */
1296 if (ctrl->cntlid != le16_to_cpu(id->cntlid))
1297 ret = -EINVAL;
038bd4cb
SG
1298
1299 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
1300 dev_err(ctrl->dev,
1301 "keep-alive support is mandatory for fabrics\n");
1302 ret = -EINVAL;
1303 }
07bfcd09
CH
1304 } else {
1305 ctrl->cntlid = le16_to_cpu(id->cntlid);
1306 }
da35825d 1307
7fd8930f 1308 kfree(id);
07bfcd09 1309 return ret;
7fd8930f 1310}
576d55d6 1311EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1312
f3ca80fc 1313static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1314{
f3ca80fc
CH
1315 struct nvme_ctrl *ctrl;
1316 int instance = iminor(inode);
1317 int ret = -ENODEV;
1673f1f0 1318
f3ca80fc
CH
1319 spin_lock(&dev_list_lock);
1320 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1321 if (ctrl->instance != instance)
1322 continue;
1323
1324 if (!ctrl->admin_q) {
1325 ret = -EWOULDBLOCK;
1326 break;
1327 }
1328 if (!kref_get_unless_zero(&ctrl->kref))
1329 break;
1330 file->private_data = ctrl;
1331 ret = 0;
1332 break;
1333 }
1334 spin_unlock(&dev_list_lock);
1335
1336 return ret;
1673f1f0
CH
1337}
1338
f3ca80fc 1339static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1340{
f3ca80fc
CH
1341 nvme_put_ctrl(file->private_data);
1342 return 0;
1343}
1344
bfd89471
CH
1345static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1346{
1347 struct nvme_ns *ns;
1348 int ret;
1349
1350 mutex_lock(&ctrl->namespaces_mutex);
1351 if (list_empty(&ctrl->namespaces)) {
1352 ret = -ENOTTY;
1353 goto out_unlock;
1354 }
1355
1356 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1357 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1358 dev_warn(ctrl->device,
bfd89471
CH
1359 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1360 ret = -EINVAL;
1361 goto out_unlock;
1362 }
1363
1b3c47c1 1364 dev_warn(ctrl->device,
bfd89471
CH
1365 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1366 kref_get(&ns->kref);
1367 mutex_unlock(&ctrl->namespaces_mutex);
1368
1369 ret = nvme_user_cmd(ctrl, ns, argp);
1370 nvme_put_ns(ns);
1371 return ret;
1372
1373out_unlock:
1374 mutex_unlock(&ctrl->namespaces_mutex);
1375 return ret;
1376}
1377
f3ca80fc
CH
1378static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1379 unsigned long arg)
1380{
1381 struct nvme_ctrl *ctrl = file->private_data;
1382 void __user *argp = (void __user *)arg;
f3ca80fc
CH
1383
1384 switch (cmd) {
1385 case NVME_IOCTL_ADMIN_CMD:
1386 return nvme_user_cmd(ctrl, NULL, argp);
1387 case NVME_IOCTL_IO_CMD:
bfd89471 1388 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1389 case NVME_IOCTL_RESET:
1b3c47c1 1390 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH
1391 return ctrl->ops->reset_ctrl(ctrl);
1392 case NVME_IOCTL_SUBSYS_RESET:
1393 return nvme_reset_subsystem(ctrl);
9ec3bb2f
KB
1394 case NVME_IOCTL_RESCAN:
1395 nvme_queue_scan(ctrl);
1396 return 0;
f3ca80fc
CH
1397 default:
1398 return -ENOTTY;
1399 }
1400}
1401
1402static const struct file_operations nvme_dev_fops = {
1403 .owner = THIS_MODULE,
1404 .open = nvme_dev_open,
1405 .release = nvme_dev_release,
1406 .unlocked_ioctl = nvme_dev_ioctl,
1407 .compat_ioctl = nvme_dev_ioctl,
1408};
1409
1410static ssize_t nvme_sysfs_reset(struct device *dev,
1411 struct device_attribute *attr, const char *buf,
1412 size_t count)
1413{
1414 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1415 int ret;
1416
1417 ret = ctrl->ops->reset_ctrl(ctrl);
1418 if (ret < 0)
1419 return ret;
1420 return count;
1673f1f0 1421}
f3ca80fc 1422static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1423
9ec3bb2f
KB
1424static ssize_t nvme_sysfs_rescan(struct device *dev,
1425 struct device_attribute *attr, const char *buf,
1426 size_t count)
1427{
1428 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1429
1430 nvme_queue_scan(ctrl);
1431 return count;
1432}
1433static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
1434
118472ab
KB
1435static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1436 char *buf)
1437{
40267efd 1438 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
118472ab
KB
1439 struct nvme_ctrl *ctrl = ns->ctrl;
1440 int serial_len = sizeof(ctrl->serial);
1441 int model_len = sizeof(ctrl->model);
1442
1443 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1444 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1445
1446 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1447 return sprintf(buf, "eui.%8phN\n", ns->eui);
1448
1449 while (ctrl->serial[serial_len - 1] == ' ')
1450 serial_len--;
1451 while (ctrl->model[model_len - 1] == ' ')
1452 model_len--;
1453
1454 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1455 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1456}
1457static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1458
2b9b6e86
KB
1459static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1460 char *buf)
1461{
40267efd 1462 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1463 return sprintf(buf, "%pU\n", ns->uuid);
1464}
1465static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1466
1467static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1468 char *buf)
1469{
40267efd 1470 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1471 return sprintf(buf, "%8phd\n", ns->eui);
1472}
1473static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1474
1475static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1476 char *buf)
1477{
40267efd 1478 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1479 return sprintf(buf, "%d\n", ns->ns_id);
1480}
1481static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1482
1483static struct attribute *nvme_ns_attrs[] = {
118472ab 1484 &dev_attr_wwid.attr,
2b9b6e86
KB
1485 &dev_attr_uuid.attr,
1486 &dev_attr_eui.attr,
1487 &dev_attr_nsid.attr,
1488 NULL,
1489};
1490
1a353d85 1491static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
2b9b6e86
KB
1492 struct attribute *a, int n)
1493{
1494 struct device *dev = container_of(kobj, struct device, kobj);
40267efd 1495 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1496
1497 if (a == &dev_attr_uuid.attr) {
1498 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1499 return 0;
1500 }
1501 if (a == &dev_attr_eui.attr) {
1502 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1503 return 0;
1504 }
1505 return a->mode;
1506}
1507
1508static const struct attribute_group nvme_ns_attr_group = {
1509 .attrs = nvme_ns_attrs,
1a353d85 1510 .is_visible = nvme_ns_attrs_are_visible,
2b9b6e86
KB
1511};
1512
931e1c22 1513#define nvme_show_str_function(field) \
779ff756
KB
1514static ssize_t field##_show(struct device *dev, \
1515 struct device_attribute *attr, char *buf) \
1516{ \
1517 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1518 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1519} \
1520static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1521
931e1c22
ML
1522#define nvme_show_int_function(field) \
1523static ssize_t field##_show(struct device *dev, \
1524 struct device_attribute *attr, char *buf) \
1525{ \
1526 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1527 return sprintf(buf, "%d\n", ctrl->field); \
1528} \
1529static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1530
1531nvme_show_str_function(model);
1532nvme_show_str_function(serial);
1533nvme_show_str_function(firmware_rev);
1534nvme_show_int_function(cntlid);
779ff756 1535
1a353d85
ML
1536static ssize_t nvme_sysfs_delete(struct device *dev,
1537 struct device_attribute *attr, const char *buf,
1538 size_t count)
1539{
1540 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1541
1542 if (device_remove_file_self(dev, attr))
1543 ctrl->ops->delete_ctrl(ctrl);
1544 return count;
1545}
1546static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
1547
1548static ssize_t nvme_sysfs_show_transport(struct device *dev,
1549 struct device_attribute *attr,
1550 char *buf)
1551{
1552 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1553
1554 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
1555}
1556static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
1557
1558static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
1559 struct device_attribute *attr,
1560 char *buf)
1561{
1562 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1563
1564 return snprintf(buf, PAGE_SIZE, "%s\n",
1565 ctrl->ops->get_subsysnqn(ctrl));
1566}
1567static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
1568
1569static ssize_t nvme_sysfs_show_address(struct device *dev,
1570 struct device_attribute *attr,
1571 char *buf)
1572{
1573 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1574
1575 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
1576}
1577static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
1578
779ff756
KB
1579static struct attribute *nvme_dev_attrs[] = {
1580 &dev_attr_reset_controller.attr,
9ec3bb2f 1581 &dev_attr_rescan_controller.attr,
779ff756
KB
1582 &dev_attr_model.attr,
1583 &dev_attr_serial.attr,
1584 &dev_attr_firmware_rev.attr,
931e1c22 1585 &dev_attr_cntlid.attr,
1a353d85
ML
1586 &dev_attr_delete_controller.attr,
1587 &dev_attr_transport.attr,
1588 &dev_attr_subsysnqn.attr,
1589 &dev_attr_address.attr,
779ff756
KB
1590 NULL
1591};
1592
1a353d85
ML
1593#define CHECK_ATTR(ctrl, a, name) \
1594 if ((a) == &dev_attr_##name.attr && \
1595 !(ctrl)->ops->get_##name) \
1596 return 0
1597
1598static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
1599 struct attribute *a, int n)
1600{
1601 struct device *dev = container_of(kobj, struct device, kobj);
1602 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1603
1604 if (a == &dev_attr_delete_controller.attr) {
1605 if (!ctrl->ops->delete_ctrl)
1606 return 0;
1607 }
1608
1609 CHECK_ATTR(ctrl, a, subsysnqn);
1610 CHECK_ATTR(ctrl, a, address);
1611
1612 return a->mode;
1613}
1614
779ff756 1615static struct attribute_group nvme_dev_attrs_group = {
1a353d85
ML
1616 .attrs = nvme_dev_attrs,
1617 .is_visible = nvme_dev_attrs_are_visible,
779ff756
KB
1618};
1619
1620static const struct attribute_group *nvme_dev_attr_groups[] = {
1621 &nvme_dev_attrs_group,
1622 NULL,
1623};
1624
5bae7f73
CH
1625static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1626{
1627 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1628 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1629
1630 return nsa->ns_id - nsb->ns_id;
1631}
1632
32f0c4af 1633static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
5bae7f73 1634{
32f0c4af 1635 struct nvme_ns *ns, *ret = NULL;
69d3b8ac 1636
32f0c4af 1637 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73 1638 list_for_each_entry(ns, &ctrl->namespaces, list) {
32f0c4af
KB
1639 if (ns->ns_id == nsid) {
1640 kref_get(&ns->kref);
1641 ret = ns;
1642 break;
1643 }
5bae7f73
CH
1644 if (ns->ns_id > nsid)
1645 break;
1646 }
32f0c4af
KB
1647 mutex_unlock(&ctrl->namespaces_mutex);
1648 return ret;
5bae7f73
CH
1649}
1650
1651static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1652{
1653 struct nvme_ns *ns;
1654 struct gendisk *disk;
ac81bfa9
MB
1655 struct nvme_id_ns *id;
1656 char disk_name[DISK_NAME_LEN];
5bae7f73
CH
1657 int node = dev_to_node(ctrl->dev);
1658
1659 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1660 if (!ns)
1661 return;
1662
075790eb
KB
1663 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1664 if (ns->instance < 0)
1665 goto out_free_ns;
1666
5bae7f73
CH
1667 ns->queue = blk_mq_init_queue(ctrl->tagset);
1668 if (IS_ERR(ns->queue))
075790eb 1669 goto out_release_instance;
5bae7f73
CH
1670 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1671 ns->queue->queuedata = ns;
1672 ns->ctrl = ctrl;
1673
5bae7f73
CH
1674 kref_init(&ns->kref);
1675 ns->ns_id = nsid;
5bae7f73 1676 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73
CH
1677
1678 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1679 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73 1680
ac81bfa9 1681 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1682
ac81bfa9
MB
1683 if (nvme_revalidate_ns(ns, &id))
1684 goto out_free_queue;
1685
1686 if (nvme_nvm_ns_supported(ns, id)) {
40267efd
SL
1687 if (nvme_nvm_register(ns, disk_name, node,
1688 &nvme_ns_attr_group)) {
b0b4e09c
MB
1689 dev_warn(ctrl->dev, "%s: LightNVM init failure\n",
1690 __func__);
ac81bfa9
MB
1691 goto out_free_id;
1692 }
ac81bfa9
MB
1693 } else {
1694 disk = alloc_disk_node(0, node);
1695 if (!disk)
1696 goto out_free_id;
1697
1698 disk->fops = &nvme_fops;
1699 disk->private_data = ns;
1700 disk->queue = ns->queue;
1701 disk->flags = GENHD_FL_EXT_DEVT;
1702 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
1703 ns->disk = disk;
1704
1705 __nvme_revalidate_disk(disk, id);
1706 }
5bae7f73 1707
32f0c4af
KB
1708 mutex_lock(&ctrl->namespaces_mutex);
1709 list_add_tail(&ns->list, &ctrl->namespaces);
1710 mutex_unlock(&ctrl->namespaces_mutex);
1711
5bae7f73 1712 kref_get(&ctrl->kref);
ac81bfa9
MB
1713
1714 kfree(id);
1715
b0b4e09c 1716 if (ns->ndev)
2b9b6e86 1717 return;
5bae7f73 1718
0d52c756 1719 device_add_disk(ctrl->device, ns->disk);
2b9b6e86
KB
1720 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1721 &nvme_ns_attr_group))
1722 pr_warn("%s: failed to create sysfs group for identification\n",
1723 ns->disk->disk_name);
5bae7f73 1724 return;
ac81bfa9
MB
1725 out_free_id:
1726 kfree(id);
5bae7f73
CH
1727 out_free_queue:
1728 blk_cleanup_queue(ns->queue);
075790eb
KB
1729 out_release_instance:
1730 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH
1731 out_free_ns:
1732 kfree(ns);
1733}
1734
1735static void nvme_ns_remove(struct nvme_ns *ns)
1736{
646017a6
KB
1737 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1738 return;
69d3b8ac 1739
b0b4e09c 1740 if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
5bae7f73
CH
1741 if (blk_get_integrity(ns->disk))
1742 blk_integrity_unregister(ns->disk);
2b9b6e86
KB
1743 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1744 &nvme_ns_attr_group);
5bae7f73 1745 del_gendisk(ns->disk);
5bae7f73
CH
1746 blk_mq_abort_requeue_list(ns->queue);
1747 blk_cleanup_queue(ns->queue);
1748 }
32f0c4af
KB
1749
1750 mutex_lock(&ns->ctrl->namespaces_mutex);
5bae7f73 1751 list_del_init(&ns->list);
32f0c4af
KB
1752 mutex_unlock(&ns->ctrl->namespaces_mutex);
1753
5bae7f73
CH
1754 nvme_put_ns(ns);
1755}
1756
540c801c
KB
1757static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1758{
1759 struct nvme_ns *ns;
1760
32f0c4af 1761 ns = nvme_find_get_ns(ctrl, nsid);
540c801c 1762 if (ns) {
b0b4e09c 1763 if (ns->disk && revalidate_disk(ns->disk))
540c801c 1764 nvme_ns_remove(ns);
32f0c4af 1765 nvme_put_ns(ns);
540c801c
KB
1766 } else
1767 nvme_alloc_ns(ctrl, nsid);
1768}
1769
47b0e50a
SB
1770static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
1771 unsigned nsid)
1772{
1773 struct nvme_ns *ns, *next;
1774
1775 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1776 if (ns->ns_id > nsid)
1777 nvme_ns_remove(ns);
1778 }
1779}
1780
540c801c
KB
1781static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1782{
1783 struct nvme_ns *ns;
1784 __le32 *ns_list;
1785 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1786 int ret = 0;
1787
1788 ns_list = kzalloc(0x1000, GFP_KERNEL);
1789 if (!ns_list)
1790 return -ENOMEM;
1791
1792 for (i = 0; i < num_lists; i++) {
1793 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1794 if (ret)
47b0e50a 1795 goto free;
540c801c
KB
1796
1797 for (j = 0; j < min(nn, 1024U); j++) {
1798 nsid = le32_to_cpu(ns_list[j]);
1799 if (!nsid)
1800 goto out;
1801
1802 nvme_validate_ns(ctrl, nsid);
1803
1804 while (++prev < nsid) {
32f0c4af
KB
1805 ns = nvme_find_get_ns(ctrl, prev);
1806 if (ns) {
540c801c 1807 nvme_ns_remove(ns);
32f0c4af
KB
1808 nvme_put_ns(ns);
1809 }
540c801c
KB
1810 }
1811 }
1812 nn -= j;
1813 }
1814 out:
47b0e50a
SB
1815 nvme_remove_invalid_namespaces(ctrl, prev);
1816 free:
540c801c
KB
1817 kfree(ns_list);
1818 return ret;
1819}
1820
5955be21 1821static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73 1822{
5bae7f73
CH
1823 unsigned i;
1824
540c801c
KB
1825 for (i = 1; i <= nn; i++)
1826 nvme_validate_ns(ctrl, i);
1827
47b0e50a 1828 nvme_remove_invalid_namespaces(ctrl, nn);
5bae7f73
CH
1829}
1830
5955be21 1831static void nvme_scan_work(struct work_struct *work)
5bae7f73 1832{
5955be21
CH
1833 struct nvme_ctrl *ctrl =
1834 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1835 struct nvme_id_ctrl *id;
540c801c 1836 unsigned nn;
5bae7f73 1837
5955be21
CH
1838 if (ctrl->state != NVME_CTRL_LIVE)
1839 return;
1840
5bae7f73
CH
1841 if (nvme_identify_ctrl(ctrl, &id))
1842 return;
540c801c
KB
1843
1844 nn = le32_to_cpu(id->nn);
1845 if (ctrl->vs >= NVME_VS(1, 1) &&
1846 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1847 if (!nvme_scan_ns_list(ctrl, nn))
1848 goto done;
1849 }
5955be21 1850 nvme_scan_ns_sequential(ctrl, nn);
540c801c 1851 done:
32f0c4af 1852 mutex_lock(&ctrl->namespaces_mutex);
540c801c 1853 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1854 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1855 kfree(id);
5955be21
CH
1856
1857 if (ctrl->ops->post_scan)
1858 ctrl->ops->post_scan(ctrl);
5bae7f73 1859}
5955be21
CH
1860
1861void nvme_queue_scan(struct nvme_ctrl *ctrl)
1862{
1863 /*
1864 * Do not queue new scan work when a controller is reset during
1865 * removal.
1866 */
1867 if (ctrl->state == NVME_CTRL_LIVE)
1868 schedule_work(&ctrl->scan_work);
1869}
1870EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73 1871
32f0c4af
KB
1872/*
1873 * This function iterates the namespace list unlocked to allow recovery from
1874 * controller failure. It is up to the caller to ensure the namespace list is
1875 * not modified by scan work while this function is executing.
1876 */
5bae7f73
CH
1877void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1878{
1879 struct nvme_ns *ns, *next;
1880
0ff9d4e1
KB
1881 /*
1882 * The dead states indicates the controller was not gracefully
1883 * disconnected. In that case, we won't be able to flush any data while
1884 * removing the namespaces' disks; fail all the queues now to avoid
1885 * potentially having to clean up the failed sync later.
1886 */
1887 if (ctrl->state == NVME_CTRL_DEAD)
1888 nvme_kill_queues(ctrl);
1889
5bae7f73
CH
1890 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1891 nvme_ns_remove(ns);
1892}
576d55d6 1893EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1894
f866fc42
CH
1895static void nvme_async_event_work(struct work_struct *work)
1896{
1897 struct nvme_ctrl *ctrl =
1898 container_of(work, struct nvme_ctrl, async_event_work);
1899
1900 spin_lock_irq(&ctrl->lock);
1901 while (ctrl->event_limit > 0) {
1902 int aer_idx = --ctrl->event_limit;
1903
1904 spin_unlock_irq(&ctrl->lock);
1905 ctrl->ops->submit_async_event(ctrl, aer_idx);
1906 spin_lock_irq(&ctrl->lock);
1907 }
1908 spin_unlock_irq(&ctrl->lock);
1909}
1910
1911void nvme_complete_async_event(struct nvme_ctrl *ctrl,
1912 struct nvme_completion *cqe)
1913{
1914 u16 status = le16_to_cpu(cqe->status) >> 1;
1915 u32 result = le32_to_cpu(cqe->result);
1916
1917 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) {
1918 ++ctrl->event_limit;
1919 schedule_work(&ctrl->async_event_work);
1920 }
1921
1922 if (status != NVME_SC_SUCCESS)
1923 return;
1924
1925 switch (result & 0xff07) {
1926 case NVME_AER_NOTICE_NS_CHANGED:
1927 dev_info(ctrl->device, "rescanning\n");
1928 nvme_queue_scan(ctrl);
1929 break;
1930 default:
1931 dev_warn(ctrl->device, "async event result %08x\n", result);
1932 }
1933}
1934EXPORT_SYMBOL_GPL(nvme_complete_async_event);
1935
1936void nvme_queue_async_events(struct nvme_ctrl *ctrl)
1937{
1938 ctrl->event_limit = NVME_NR_AERS;
1939 schedule_work(&ctrl->async_event_work);
1940}
1941EXPORT_SYMBOL_GPL(nvme_queue_async_events);
1942
f3ca80fc
CH
1943static DEFINE_IDA(nvme_instance_ida);
1944
1945static int nvme_set_instance(struct nvme_ctrl *ctrl)
1946{
1947 int instance, error;
1948
1949 do {
1950 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1951 return -ENODEV;
1952
1953 spin_lock(&dev_list_lock);
1954 error = ida_get_new(&nvme_instance_ida, &instance);
1955 spin_unlock(&dev_list_lock);
1956 } while (error == -EAGAIN);
1957
1958 if (error)
1959 return -ENODEV;
1960
1961 ctrl->instance = instance;
1962 return 0;
1963}
1964
1965static void nvme_release_instance(struct nvme_ctrl *ctrl)
1966{
1967 spin_lock(&dev_list_lock);
1968 ida_remove(&nvme_instance_ida, ctrl->instance);
1969 spin_unlock(&dev_list_lock);
1970}
1971
53029b04 1972void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1973{
f866fc42 1974 flush_work(&ctrl->async_event_work);
5955be21
CH
1975 flush_work(&ctrl->scan_work);
1976 nvme_remove_namespaces(ctrl);
1977
53029b04 1978 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH
1979
1980 spin_lock(&dev_list_lock);
1981 list_del(&ctrl->node);
1982 spin_unlock(&dev_list_lock);
53029b04 1983}
576d55d6 1984EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB
1985
1986static void nvme_free_ctrl(struct kref *kref)
1987{
1988 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH
1989
1990 put_device(ctrl->device);
1991 nvme_release_instance(ctrl);
075790eb 1992 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH
1993
1994 ctrl->ops->free_ctrl(ctrl);
1995}
1996
1997void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1998{
1999 kref_put(&ctrl->kref, nvme_free_ctrl);
2000}
576d55d6 2001EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH
2002
2003/*
2004 * Initialize a NVMe controller structures. This needs to be called during
2005 * earliest initialization so that we have the initialized structured around
2006 * during probing.
2007 */
2008int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
2009 const struct nvme_ctrl_ops *ops, unsigned long quirks)
2010{
2011 int ret;
2012
bb8d261e
CH
2013 ctrl->state = NVME_CTRL_NEW;
2014 spin_lock_init(&ctrl->lock);
f3ca80fc 2015 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 2016 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH
2017 kref_init(&ctrl->kref);
2018 ctrl->dev = dev;
2019 ctrl->ops = ops;
2020 ctrl->quirks = quirks;
5955be21 2021 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f866fc42 2022 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
f3ca80fc
CH
2023
2024 ret = nvme_set_instance(ctrl);
2025 if (ret)
2026 goto out;
2027
779ff756 2028 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 2029 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 2030 ctrl, nvme_dev_attr_groups,
779ff756 2031 "nvme%d", ctrl->instance);
f3ca80fc
CH
2032 if (IS_ERR(ctrl->device)) {
2033 ret = PTR_ERR(ctrl->device);
2034 goto out_release_instance;
2035 }
2036 get_device(ctrl->device);
075790eb 2037 ida_init(&ctrl->ns_ida);
f3ca80fc 2038
f3ca80fc
CH
2039 spin_lock(&dev_list_lock);
2040 list_add_tail(&ctrl->node, &nvme_ctrl_list);
2041 spin_unlock(&dev_list_lock);
2042
2043 return 0;
f3ca80fc
CH
2044out_release_instance:
2045 nvme_release_instance(ctrl);
2046out:
2047 return ret;
2048}
576d55d6 2049EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 2050
69d9a99c
KB
2051/**
2052 * nvme_kill_queues(): Ends all namespace queues
2053 * @ctrl: the dead controller that needs to end
2054 *
2055 * Call this function when the driver determines it is unable to get the
2056 * controller in a state capable of servicing IO.
2057 */
2058void nvme_kill_queues(struct nvme_ctrl *ctrl)
2059{
2060 struct nvme_ns *ns;
2061
32f0c4af
KB
2062 mutex_lock(&ctrl->namespaces_mutex);
2063 list_for_each_entry(ns, &ctrl->namespaces, list) {
69d9a99c
KB
2064 /*
2065 * Revalidating a dead namespace sets capacity to 0. This will
2066 * end buffered writers dirtying pages that can't be synced.
2067 */
b0b4e09c 2068 if (ns->disk && !test_and_set_bit(NVME_NS_DEAD, &ns->flags))
69d9a99c
KB
2069 revalidate_disk(ns->disk);
2070
2071 blk_set_queue_dying(ns->queue);
2072 blk_mq_abort_requeue_list(ns->queue);
2073 blk_mq_start_stopped_hw_queues(ns->queue, true);
69d9a99c 2074 }
32f0c4af 2075 mutex_unlock(&ctrl->namespaces_mutex);
69d9a99c 2076}
237045fc 2077EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 2078
25646264 2079void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
2080{
2081 struct nvme_ns *ns;
2082
32f0c4af
KB
2083 mutex_lock(&ctrl->namespaces_mutex);
2084 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac
SG
2085 spin_lock_irq(ns->queue->queue_lock);
2086 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2087 spin_unlock_irq(ns->queue->queue_lock);
2088
2089 blk_mq_cancel_requeue_work(ns->queue);
2090 blk_mq_stop_hw_queues(ns->queue);
2091 }
32f0c4af 2092 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 2093}
576d55d6 2094EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 2095
25646264 2096void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
2097{
2098 struct nvme_ns *ns;
2099
32f0c4af
KB
2100 mutex_lock(&ctrl->namespaces_mutex);
2101 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac 2102 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG
2103 blk_mq_start_stopped_hw_queues(ns->queue, true);
2104 blk_mq_kick_requeue_list(ns->queue);
2105 }
32f0c4af 2106 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 2107}
576d55d6 2108EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 2109
5bae7f73
CH
2110int __init nvme_core_init(void)
2111{
2112 int result;
2113
f3ca80fc
CH
2114 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2115 &nvme_dev_fops);
2116 if (result < 0)
b09dcf58 2117 return result;
f3ca80fc
CH
2118 else if (result > 0)
2119 nvme_char_major = result;
2120
2121 nvme_class = class_create(THIS_MODULE, "nvme");
2122 if (IS_ERR(nvme_class)) {
2123 result = PTR_ERR(nvme_class);
2124 goto unregister_chrdev;
2125 }
2126
5bae7f73 2127 return 0;
f3ca80fc
CH
2128
2129 unregister_chrdev:
2130 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
f3ca80fc 2131 return result;
5bae7f73
CH
2132}
2133
2134void nvme_core_exit(void)
2135{
f3ca80fc
CH
2136 class_destroy(nvme_class);
2137 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
5bae7f73 2138}
576d55d6
ML
2139
2140MODULE_LICENSE("GPL");
2141MODULE_VERSION("1.0");
2142module_init(nvme_core_init);
2143module_exit(nvme_core_exit);