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blk-mq: Introduce blk_mq_reinit_tagset
[mirror_ubuntu-artful-kernel.git] / drivers / nvme / host / core.c
CommitLineData
21d34711
CH		 1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH		 21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH		 23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH		 25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH		 31
32#include "nvme.h"
038bd4cb 33#include "fabrics.h"
21d34711 34
f3ca80fc
CH		 35#define NVME_MINORS (1U << MINORBITS)
36
ba0ba7d3
ML		 37unsigned char admin_timeout = 60;
38module_param(admin_timeout, byte, 0644);
39MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 40EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML		 41
42unsigned char nvme_io_timeout = 30;
43module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
44MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 45EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML		 46
47unsigned char shutdown_timeout = 5;
48module_param(shutdown_timeout, byte, 0644);
49MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
5bae7f73
CH		 51static int nvme_major;
52module_param(nvme_major, int, 0);
53
f3ca80fc
CH		 54static int nvme_char_major;
55module_param(nvme_char_major, int, 0);
56
57static LIST_HEAD(nvme_ctrl_list);
9f2482b9 58static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 59
f3ca80fc
CH		 60static struct class *nvme_class;
61
c55a2fd4
ML		 62void nvme_cancel_request(struct request *req, void *data, bool reserved)
63{
64 int status;
65
66 if (!blk_mq_request_started(req))
67 return;
68
69 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
70 "Cancelling I/O %d", req->tag);
71
72 status = NVME_SC_ABORT_REQ;
73 if (blk_queue_dying(req->q))
74 status |= NVME_SC_DNR;
75 blk_mq_complete_request(req, status);
76}
77EXPORT_SYMBOL_GPL(nvme_cancel_request);
78
bb8d261e
CH		 79bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
80 enum nvme_ctrl_state new_state)
81{
82 enum nvme_ctrl_state old_state = ctrl->state;
83 bool changed = false;
84
85 spin_lock_irq(&ctrl->lock);
86 switch (new_state) {
87 case NVME_CTRL_LIVE:
88 switch (old_state) {
7d2e8008 89 case NVME_CTRL_NEW:
bb8d261e
CH		 90 case NVME_CTRL_RESETTING:
91 changed = true;
92 /* FALLTHRU */
93 default:
94 break;
95 }
96 break;
97 case NVME_CTRL_RESETTING:
98 switch (old_state) {
99 case NVME_CTRL_NEW:
100 case NVME_CTRL_LIVE:
101 changed = true;
102 /* FALLTHRU */
103 default:
104 break;
105 }
106 break;
107 case NVME_CTRL_DELETING:
108 switch (old_state) {
109 case NVME_CTRL_LIVE:
110 case NVME_CTRL_RESETTING:
111 changed = true;
112 /* FALLTHRU */
113 default:
114 break;
115 }
116 break;
0ff9d4e1
KB		 117 case NVME_CTRL_DEAD:
118 switch (old_state) {
119 case NVME_CTRL_DELETING:
120 changed = true;
121 /* FALLTHRU */
122 default:
123 break;
124 }
125 break;
bb8d261e
CH		 126 default:
127 break;
128 }
129 spin_unlock_irq(&ctrl->lock);
130
131 if (changed)
132 ctrl->state = new_state;
133
134 return changed;
135}
136EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
137
1673f1f0
CH		 138static void nvme_free_ns(struct kref *kref)
139{
140 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
141
142 if (ns->type == NVME_NS_LIGHTNVM)
143 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
144
145 spin_lock(&dev_list_lock);
146 ns->disk->private_data = NULL;
147 spin_unlock(&dev_list_lock);
148
1673f1f0 149 put_disk(ns->disk);
075790eb
KB		 150 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
151 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH		 152 kfree(ns);
153}
154
5bae7f73 155static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH		 156{
157 kref_put(&ns->kref, nvme_free_ns);
158}
159
160static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
161{
162 struct nvme_ns *ns;
163
164 spin_lock(&dev_list_lock);
165 ns = disk->private_data;
e439bb12
SG		 166 if (ns) {
167 if (!kref_get_unless_zero(&ns->kref))
168 goto fail;
169 if (!try_module_get(ns->ctrl->ops->module))
170 goto fail_put_ns;
171 }
1673f1f0
CH		 172 spin_unlock(&dev_list_lock);
173
174 return ns;
e439bb12
SG		 175
176fail_put_ns:
177 kref_put(&ns->kref, nvme_free_ns);
178fail:
179 spin_unlock(&dev_list_lock);
180 return NULL;
1673f1f0
CH		 181}
182
7688faa6
CH		 183void nvme_requeue_req(struct request *req)
184{
185 unsigned long flags;
186
187 blk_mq_requeue_request(req);
188 spin_lock_irqsave(req->q->queue_lock, flags);
189 if (!blk_queue_stopped(req->q))
190 blk_mq_kick_requeue_list(req->q);
191 spin_unlock_irqrestore(req->q->queue_lock, flags);
192}
576d55d6 193EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 194
4160982e 195struct request *nvme_alloc_request(struct request_queue *q,
eb71f435 196 struct nvme_command *cmd, unsigned int flags, int qid)
21d34711 197{
21d34711 198 struct request *req;
21d34711 199
eb71f435
CH		 200 if (qid == NVME_QID_ANY) {
201 req = blk_mq_alloc_request(q, nvme_is_write(cmd), flags);
202 } else {
203 req = blk_mq_alloc_request_hctx(q, nvme_is_write(cmd), flags,
204 qid ? qid - 1 : 0);
205 }
21d34711 206 if (IS_ERR(req))
4160982e 207 return req;
21d34711
CH		 208
209 req->cmd_type = REQ_TYPE_DRV_PRIV;
210 req->cmd_flags |= REQ_FAILFAST_DRIVER;
211 req->__data_len = 0;
212 req->__sector = (sector_t) -1;
213 req->bio = req->biotail = NULL;
214
21d34711
CH		 215 req->cmd = (unsigned char *)cmd;
216 req->cmd_len = sizeof(struct nvme_command);
21d34711 217
4160982e
CH		 218 return req;
219}
576d55d6 220EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 221
8093f7ca
ML		 222static inline void nvme_setup_flush(struct nvme_ns *ns,
223 struct nvme_command *cmnd)
224{
225 memset(cmnd, 0, sizeof(*cmnd));
226 cmnd->common.opcode = nvme_cmd_flush;
227 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
228}
229
230static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
231 struct nvme_command *cmnd)
232{
233 struct nvme_dsm_range *range;
234 struct page *page;
235 int offset;
236 unsigned int nr_bytes = blk_rq_bytes(req);
237
238 range = kmalloc(sizeof(*range), GFP_ATOMIC);
239 if (!range)
240 return BLK_MQ_RQ_QUEUE_BUSY;
241
242 range->cattr = cpu_to_le32(0);
243 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
244 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
245
246 memset(cmnd, 0, sizeof(*cmnd));
247 cmnd->dsm.opcode = nvme_cmd_dsm;
248 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
249 cmnd->dsm.nr = 0;
250 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
251
252 req->completion_data = range;
253 page = virt_to_page(range);
254 offset = offset_in_page(range);
255 blk_add_request_payload(req, page, offset, sizeof(*range));
256
257 /*
258 * we set __data_len back to the size of the area to be discarded
259 * on disk. This allows us to report completion on the full amount
260 * of blocks described by the request.
261 */
262 req->__data_len = nr_bytes;
263
264 return 0;
265}
266
267static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
268 struct nvme_command *cmnd)
269{
270 u16 control = 0;
271 u32 dsmgmt = 0;
272
273 if (req->cmd_flags & REQ_FUA)
274 control |= NVME_RW_FUA;
275 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
276 control |= NVME_RW_LR;
277
278 if (req->cmd_flags & REQ_RAHEAD)
279 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
280
281 memset(cmnd, 0, sizeof(*cmnd));
282 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
283 cmnd->rw.command_id = req->tag;
284 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
285 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
286 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
287
288 if (ns->ms) {
289 switch (ns->pi_type) {
290 case NVME_NS_DPS_PI_TYPE3:
291 control |= NVME_RW_PRINFO_PRCHK_GUARD;
292 break;
293 case NVME_NS_DPS_PI_TYPE1:
294 case NVME_NS_DPS_PI_TYPE2:
295 control |= NVME_RW_PRINFO_PRCHK_GUARD |
296 NVME_RW_PRINFO_PRCHK_REF;
297 cmnd->rw.reftag = cpu_to_le32(
298 nvme_block_nr(ns, blk_rq_pos(req)));
299 break;
300 }
301 if (!blk_integrity_rq(req))
302 control |= NVME_RW_PRINFO_PRACT;
303 }
304
305 cmnd->rw.control = cpu_to_le16(control);
306 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
307}
308
309int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
310 struct nvme_command *cmd)
311{
312 int ret = 0;
313
314 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
315 memcpy(cmd, req->cmd, sizeof(*cmd));
3a5e02ce 316 else if (req_op(req) == REQ_OP_FLUSH)
8093f7ca 317 nvme_setup_flush(ns, cmd);
c2df40df 318 else if (req_op(req) == REQ_OP_DISCARD)
8093f7ca
ML		 319 ret = nvme_setup_discard(ns, req, cmd);
320 else
321 nvme_setup_rw(ns, req, cmd);
322
323 return ret;
324}
325EXPORT_SYMBOL_GPL(nvme_setup_cmd);
326
4160982e
CH		 327/*
328 * Returns 0 on success. If the result is negative, it's a Linux error code;
329 * if the result is positive, it's an NVM Express status code
330 */
331int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5 332 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
eb71f435 333 unsigned timeout, int qid, int at_head, int flags)
4160982e
CH		 334{
335 struct request *req;
336 int ret;
337
eb71f435 338 req = nvme_alloc_request(q, cmd, flags, qid);
4160982e
CH		 339 if (IS_ERR(req))
340 return PTR_ERR(req);
341
342 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 343 req->special = cqe;
4160982e 344
21d34711
CH		 345 if (buffer && bufflen) {
346 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
347 if (ret)
348 goto out;
4160982e
CH		 349 }
350
eb71f435 351 blk_execute_rq(req->q, NULL, req, at_head);
4160982e
CH		 352 ret = req->errors;
353 out:
354 blk_mq_free_request(req);
355 return ret;
356}
eb71f435 357EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
4160982e
CH		 358
359int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
360 void *buffer, unsigned bufflen)
361{
eb71f435
CH		 362 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
363 NVME_QID_ANY, 0, 0);
4160982e 364}
576d55d6 365EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 366
0b7f1f26
KB		 367int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
368 void __user *ubuffer, unsigned bufflen,
369 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
370 u32 *result, unsigned timeout)
4160982e 371{
7a5abb4b 372 bool write = nvme_is_write(cmd);
1cb3cce5 373 struct nvme_completion cqe;
0b7f1f26
KB		 374 struct nvme_ns *ns = q->queuedata;
375 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 376 struct request *req;
0b7f1f26
KB		 377 struct bio *bio = NULL;
378 void *meta = NULL;
4160982e
CH		 379 int ret;
380
eb71f435 381 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
4160982e
CH		 382 if (IS_ERR(req))
383 return PTR_ERR(req);
384
385 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 386 req->special = &cqe;
4160982e
CH		 387
388 if (ubuffer && bufflen) {
21d34711
CH		 389 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
390 GFP_KERNEL);
391 if (ret)
392 goto out;
393 bio = req->bio;
21d34711 394
0b7f1f26
KB		 395 if (!disk)
396 goto submit;
397 bio->bi_bdev = bdget_disk(disk, 0);
398 if (!bio->bi_bdev) {
399 ret = -ENODEV;
400 goto out_unmap;
401 }
402
e9fc63d6 403 if (meta_buffer && meta_len) {
0b7f1f26
KB		 404 struct bio_integrity_payload *bip;
405
406 meta = kmalloc(meta_len, GFP_KERNEL);
407 if (!meta) {
408 ret = -ENOMEM;
409 goto out_unmap;
410 }
411
412 if (write) {
413 if (copy_from_user(meta, meta_buffer,
414 meta_len)) {
415 ret = -EFAULT;
416 goto out_free_meta;
417 }
418 }
419
420 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB		 421 if (IS_ERR(bip)) {
422 ret = PTR_ERR(bip);
0b7f1f26
KB		 423 goto out_free_meta;
424 }
425
426 bip->bip_iter.bi_size = meta_len;
427 bip->bip_iter.bi_sector = meta_seed;
428
429 ret = bio_integrity_add_page(bio, virt_to_page(meta),
430 meta_len, offset_in_page(meta));
431 if (ret != meta_len) {
432 ret = -ENOMEM;
433 goto out_free_meta;
434 }
435 }
436 }
437 submit:
438 blk_execute_rq(req->q, disk, req, 0);
439 ret = req->errors;
21d34711 440 if (result)
1cb3cce5 441 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB		 442 if (meta && !ret && !write) {
443 if (copy_to_user(meta_buffer, meta, meta_len))
444 ret = -EFAULT;
445 }
446 out_free_meta:
447 kfree(meta);
448 out_unmap:
449 if (bio) {
450 if (disk && bio->bi_bdev)
451 bdput(bio->bi_bdev);
452 blk_rq_unmap_user(bio);
453 }
21d34711
CH		 454 out:
455 blk_mq_free_request(req);
456 return ret;
457}
458
0b7f1f26
KB		 459int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
460 void __user *ubuffer, unsigned bufflen, u32 *result,
461 unsigned timeout)
462{
463 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
464 result, timeout);
465}
466
038bd4cb
SG		 467static void nvme_keep_alive_end_io(struct request *rq, int error)
468{
469 struct nvme_ctrl *ctrl = rq->end_io_data;
470
471 blk_mq_free_request(rq);
472
473 if (error) {
474 dev_err(ctrl->device,
475 "failed nvme_keep_alive_end_io error=%d\n", error);
476 return;
477 }
478
479 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
480}
481
482static int nvme_keep_alive(struct nvme_ctrl *ctrl)
483{
484 struct nvme_command c;
485 struct request *rq;
486
487 memset(&c, 0, sizeof(c));
488 c.common.opcode = nvme_admin_keep_alive;
489
490 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
491 NVME_QID_ANY);
492 if (IS_ERR(rq))
493 return PTR_ERR(rq);
494
495 rq->timeout = ctrl->kato * HZ;
496 rq->end_io_data = ctrl;
497
498 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
499
500 return 0;
501}
502
503static void nvme_keep_alive_work(struct work_struct *work)
504{
505 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
506 struct nvme_ctrl, ka_work);
507
508 if (nvme_keep_alive(ctrl)) {
509 /* allocation failure, reset the controller */
510 dev_err(ctrl->device, "keep-alive failed\n");
511 ctrl->ops->reset_ctrl(ctrl);
512 return;
513 }
514}
515
516void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
517{
518 if (unlikely(ctrl->kato == 0))
519 return;
520
521 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
522 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
523}
524EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
525
526void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
527{
528 if (unlikely(ctrl->kato == 0))
529 return;
530
531 cancel_delayed_work_sync(&ctrl->ka_work);
532}
533EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
534
1c63dc66 535int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH		 536{
537 struct nvme_command c = { };
538 int error;
539
540 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
541 c.identify.opcode = nvme_admin_identify;
542 c.identify.cns = cpu_to_le32(1);
543
544 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
545 if (!*id)
546 return -ENOMEM;
547
548 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
549 sizeof(struct nvme_id_ctrl));
550 if (error)
551 kfree(*id);
552 return error;
553}
554
540c801c
KB		 555static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
556{
557 struct nvme_command c = { };
558
559 c.identify.opcode = nvme_admin_identify;
560 c.identify.cns = cpu_to_le32(2);
561 c.identify.nsid = cpu_to_le32(nsid);
562 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
563}
564
1c63dc66 565int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH		 566 struct nvme_id_ns **id)
567{
568 struct nvme_command c = { };
569 int error;
570
571 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
572 c.identify.opcode = nvme_admin_identify,
573 c.identify.nsid = cpu_to_le32(nsid),
574
575 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
576 if (!*id)
577 return -ENOMEM;
578
579 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
580 sizeof(struct nvme_id_ns));
581 if (error)
582 kfree(*id);
583 return error;
584}
585
1c63dc66 586int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
21d34711
CH		 587 dma_addr_t dma_addr, u32 *result)
588{
589 struct nvme_command c;
1cb3cce5
CH		 590 struct nvme_completion cqe;
591 int ret;
21d34711
CH		 592
593 memset(&c, 0, sizeof(c));
594 c.features.opcode = nvme_admin_get_features;
595 c.features.nsid = cpu_to_le32(nsid);
eb793e2c 596 c.features.dptr.prp1 = cpu_to_le64(dma_addr);
21d34711
CH		 597 c.features.fid = cpu_to_le32(fid);
598
eb71f435
CH		 599 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0,
600 NVME_QID_ANY, 0, 0);
1cb3cce5
CH		 601 if (ret >= 0)
602 *result = le32_to_cpu(cqe.result);
603 return ret;
21d34711
CH		 604}
605
1c63dc66 606int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
21d34711
CH		 607 dma_addr_t dma_addr, u32 *result)
608{
609 struct nvme_command c;
1cb3cce5
CH		 610 struct nvme_completion cqe;
611 int ret;
21d34711
CH		 612
613 memset(&c, 0, sizeof(c));
614 c.features.opcode = nvme_admin_set_features;
eb793e2c 615 c.features.dptr.prp1 = cpu_to_le64(dma_addr);
21d34711
CH		 616 c.features.fid = cpu_to_le32(fid);
617 c.features.dword11 = cpu_to_le32(dword11);
618
eb71f435
CH		 619 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0,
620 NVME_QID_ANY, 0, 0);
1cb3cce5
CH		 621 if (ret >= 0)
622 *result = le32_to_cpu(cqe.result);
623 return ret;
21d34711
CH		 624}
625
1c63dc66 626int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH		 627{
628 struct nvme_command c = { };
629 int error;
630
631 c.common.opcode = nvme_admin_get_log_page,
632 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
633 c.common.cdw10[0] = cpu_to_le32(
634 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
635 NVME_LOG_SMART),
636
637 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
638 if (!*log)
639 return -ENOMEM;
640
641 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
642 sizeof(struct nvme_smart_log));
643 if (error)
644 kfree(*log);
645 return error;
646}
1673f1f0 647
9a0be7ab
CH		 648int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
649{
650 u32 q_count = (*count - 1) | ((*count - 1) << 16);
651 u32 result;
652 int status, nr_io_queues;
653
654 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0,
655 &result);
f5fa90dc 656 if (status < 0)
9a0be7ab
CH		 657 return status;
658
f5fa90dc
CH		 659 /*
660 * Degraded controllers might return an error when setting the queue
661 * count. We still want to be able to bring them online and offer
662 * access to the admin queue, as that might be only way to fix them up.
663 */
664 if (status > 0) {
665 dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
666 *count = 0;
667 } else {
668 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
669 *count = min(*count, nr_io_queues);
670 }
671
9a0be7ab
CH		 672 return 0;
673}
576d55d6 674EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 675
1673f1f0
CH		 676static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
677{
678 struct nvme_user_io io;
679 struct nvme_command c;
680 unsigned length, meta_len;
681 void __user *metadata;
682
683 if (copy_from_user(&io, uio, sizeof(io)))
684 return -EFAULT;
63088ec7
KB		 685 if (io.flags)
686 return -EINVAL;
1673f1f0
CH		 687
688 switch (io.opcode) {
689 case nvme_cmd_write:
690 case nvme_cmd_read:
691 case nvme_cmd_compare:
692 break;
693 default:
694 return -EINVAL;
695 }
696
697 length = (io.nblocks + 1) << ns->lba_shift;
698 meta_len = (io.nblocks + 1) * ns->ms;
699 metadata = (void __user *)(uintptr_t)io.metadata;
700
701 if (ns->ext) {
702 length += meta_len;
703 meta_len = 0;
704 } else if (meta_len) {
705 if ((io.metadata & 3) || !io.metadata)
706 return -EINVAL;
707 }
708
709 memset(&c, 0, sizeof(c));
710 c.rw.opcode = io.opcode;
711 c.rw.flags = io.flags;
712 c.rw.nsid = cpu_to_le32(ns->ns_id);
713 c.rw.slba = cpu_to_le64(io.slba);
714 c.rw.length = cpu_to_le16(io.nblocks);
715 c.rw.control = cpu_to_le16(io.control);
716 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
717 c.rw.reftag = cpu_to_le32(io.reftag);
718 c.rw.apptag = cpu_to_le16(io.apptag);
719 c.rw.appmask = cpu_to_le16(io.appmask);
720
721 return __nvme_submit_user_cmd(ns->queue, &c,
722 (void __user *)(uintptr_t)io.addr, length,
723 metadata, meta_len, io.slba, NULL, 0);
724}
725
f3ca80fc 726static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH		 727 struct nvme_passthru_cmd __user *ucmd)
728{
729 struct nvme_passthru_cmd cmd;
730 struct nvme_command c;
731 unsigned timeout = 0;
732 int status;
733
734 if (!capable(CAP_SYS_ADMIN))
735 return -EACCES;
736 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
737 return -EFAULT;
63088ec7
KB		 738 if (cmd.flags)
739 return -EINVAL;
1673f1f0
CH		 740
741 memset(&c, 0, sizeof(c));
742 c.common.opcode = cmd.opcode;
743 c.common.flags = cmd.flags;
744 c.common.nsid = cpu_to_le32(cmd.nsid);
745 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
746 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
747 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
748 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
749 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
750 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
751 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
752 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
753
754 if (cmd.timeout_ms)
755 timeout = msecs_to_jiffies(cmd.timeout_ms);
756
757 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 758 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH		 759 &cmd.result, timeout);
760 if (status >= 0) {
761 if (put_user(cmd.result, &ucmd->result))
762 return -EFAULT;
763 }
764
765 return status;
766}
767
768static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
769 unsigned int cmd, unsigned long arg)
770{
771 struct nvme_ns *ns = bdev->bd_disk->private_data;
772
773 switch (cmd) {
774 case NVME_IOCTL_ID:
775 force_successful_syscall_return();
776 return ns->ns_id;
777 case NVME_IOCTL_ADMIN_CMD:
778 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
779 case NVME_IOCTL_IO_CMD:
780 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
781 case NVME_IOCTL_SUBMIT_IO:
782 return nvme_submit_io(ns, (void __user *)arg);
44907332 783#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH		 784 case SG_GET_VERSION_NUM:
785 return nvme_sg_get_version_num((void __user *)arg);
786 case SG_IO:
787 return nvme_sg_io(ns, (void __user *)arg);
44907332 788#endif
1673f1f0
CH		 789 default:
790 return -ENOTTY;
791 }
792}
793
794#ifdef CONFIG_COMPAT
795static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
796 unsigned int cmd, unsigned long arg)
797{
798 switch (cmd) {
799 case SG_IO:
800 return -ENOIOCTLCMD;
801 }
802 return nvme_ioctl(bdev, mode, cmd, arg);
803}
804#else
805#define nvme_compat_ioctl NULL
806#endif
807
808static int nvme_open(struct block_device *bdev, fmode_t mode)
809{
810 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
811}
812
813static void nvme_release(struct gendisk *disk, fmode_t mode)
814{
e439bb12
SG		 815 struct nvme_ns *ns = disk->private_data;
816
817 module_put(ns->ctrl->ops->module);
818 nvme_put_ns(ns);
1673f1f0
CH		 819}
820
821static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
822{
823 /* some standard values */
824 geo->heads = 1 << 6;
825 geo->sectors = 1 << 5;
826 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
827 return 0;
828}
829
830#ifdef CONFIG_BLK_DEV_INTEGRITY
831static void nvme_init_integrity(struct nvme_ns *ns)
832{
833 struct blk_integrity integrity;
834
835 switch (ns->pi_type) {
836 case NVME_NS_DPS_PI_TYPE3:
837 integrity.profile = &t10_pi_type3_crc;
ba36c21b
NB		 838 integrity.tag_size = sizeof(u16) + sizeof(u32);
839 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 840 break;
841 case NVME_NS_DPS_PI_TYPE1:
842 case NVME_NS_DPS_PI_TYPE2:
843 integrity.profile = &t10_pi_type1_crc;
ba36c21b
NB		 844 integrity.tag_size = sizeof(u16);
845 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 846 break;
847 default:
848 integrity.profile = NULL;
849 break;
850 }
851 integrity.tuple_size = ns->ms;
852 blk_integrity_register(ns->disk, &integrity);
853 blk_queue_max_integrity_segments(ns->queue, 1);
854}
855#else
856static void nvme_init_integrity(struct nvme_ns *ns)
857{
858}
859#endif /* CONFIG_BLK_DEV_INTEGRITY */
860
861static void nvme_config_discard(struct nvme_ns *ns)
862{
08095e70 863 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 864 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB		 865
866 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
867 ns->queue->limits.discard_zeroes_data = 1;
868 else
869 ns->queue->limits.discard_zeroes_data = 0;
870
1673f1f0
CH		 871 ns->queue->limits.discard_alignment = logical_block_size;
872 ns->queue->limits.discard_granularity = logical_block_size;
bd0fc288 873 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1673f1f0
CH		 874 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
875}
876
5bae7f73 877static int nvme_revalidate_disk(struct gendisk *disk)
1673f1f0
CH		 878{
879 struct nvme_ns *ns = disk->private_data;
880 struct nvme_id_ns *id;
881 u8 lbaf, pi_type;
882 u16 old_ms;
883 unsigned short bs;
884
69d9a99c
KB		 885 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
886 set_capacity(disk, 0);
887 return -ENODEV;
888 }
1673f1f0 889 if (nvme_identify_ns(ns->ctrl, ns->ns_id, &id)) {
1b3c47c1
SG		 890 dev_warn(disk_to_dev(ns->disk), "%s: Identify failure\n",
891 __func__);
1673f1f0
CH		 892 return -ENODEV;
893 }
894 if (id->ncap == 0) {
895 kfree(id);
896 return -ENODEV;
897 }
898
899 if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
900 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
1b3c47c1 901 dev_warn(disk_to_dev(ns->disk),
1673f1f0
CH		 902 "%s: LightNVM init failure\n", __func__);
903 kfree(id);
904 return -ENODEV;
905 }
906 ns->type = NVME_NS_LIGHTNVM;
907 }
908
2b9b6e86
KB		 909 if (ns->ctrl->vs >= NVME_VS(1, 1))
910 memcpy(ns->eui, id->eui64, sizeof(ns->eui));
911 if (ns->ctrl->vs >= NVME_VS(1, 2))
912 memcpy(ns->uuid, id->nguid, sizeof(ns->uuid));
913
1673f1f0
CH		 914 old_ms = ns->ms;
915 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
916 ns->lba_shift = id->lbaf[lbaf].ds;
917 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
918 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
919
920 /*
921 * If identify namespace failed, use default 512 byte block size so
922 * block layer can use before failing read/write for 0 capacity.
923 */
924 if (ns->lba_shift == 0)
925 ns->lba_shift = 9;
926 bs = 1 << ns->lba_shift;
1673f1f0
CH		 927 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
928 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
929 id->dps & NVME_NS_DPS_PI_MASK : 0;
930
931 blk_mq_freeze_queue(disk->queue);
932 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
933 ns->ms != old_ms ||
934 bs != queue_logical_block_size(disk->queue) ||
935 (ns->ms && ns->ext)))
936 blk_integrity_unregister(disk);
937
938 ns->pi_type = pi_type;
939 blk_queue_logical_block_size(ns->queue, bs);
940
4b9d5b15 941 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 942 nvme_init_integrity(ns);
1673f1f0
CH		 943 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
944 set_capacity(disk, 0);
945 else
946 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
947
948 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
949 nvme_config_discard(ns);
950 blk_mq_unfreeze_queue(disk->queue);
951
952 kfree(id);
953 return 0;
954}
955
956static char nvme_pr_type(enum pr_type type)
957{
958 switch (type) {
959 case PR_WRITE_EXCLUSIVE:
960 return 1;
961 case PR_EXCLUSIVE_ACCESS:
962 return 2;
963 case PR_WRITE_EXCLUSIVE_REG_ONLY:
964 return 3;
965 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
966 return 4;
967 case PR_WRITE_EXCLUSIVE_ALL_REGS:
968 return 5;
969 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
970 return 6;
971 default:
972 return 0;
973 }
974};
975
976static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
977 u64 key, u64 sa_key, u8 op)
978{
979 struct nvme_ns *ns = bdev->bd_disk->private_data;
980 struct nvme_command c;
981 u8 data[16] = { 0, };
982
983 put_unaligned_le64(key, &data[0]);
984 put_unaligned_le64(sa_key, &data[8]);
985
986 memset(&c, 0, sizeof(c));
987 c.common.opcode = op;
988 c.common.nsid = cpu_to_le32(ns->ns_id);
989 c.common.cdw10[0] = cpu_to_le32(cdw10);
990
991 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
992}
993
994static int nvme_pr_register(struct block_device *bdev, u64 old,
995 u64 new, unsigned flags)
996{
997 u32 cdw10;
998
999 if (flags & ~PR_FL_IGNORE_KEY)
1000 return -EOPNOTSUPP;
1001
1002 cdw10 = old ? 2 : 0;
1003 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1004 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1005 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1006}
1007
1008static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1009 enum pr_type type, unsigned flags)
1010{
1011 u32 cdw10;
1012
1013 if (flags & ~PR_FL_IGNORE_KEY)
1014 return -EOPNOTSUPP;
1015
1016 cdw10 = nvme_pr_type(type) << 8;
1017 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1018 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1019}
1020
1021static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1022 enum pr_type type, bool abort)
1023{
1024 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1025 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1026}
1027
1028static int nvme_pr_clear(struct block_device *bdev, u64 key)
1029{
8c0b3915 1030 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH		 1031 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1032}
1033
1034static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1035{
1036 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1037 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1038}
1039
1040static const struct pr_ops nvme_pr_ops = {
1041 .pr_register = nvme_pr_register,
1042 .pr_reserve = nvme_pr_reserve,
1043 .pr_release = nvme_pr_release,
1044 .pr_preempt = nvme_pr_preempt,
1045 .pr_clear = nvme_pr_clear,
1046};
1047
5bae7f73 1048static const struct block_device_operations nvme_fops = {
1673f1f0
CH		 1049 .owner = THIS_MODULE,
1050 .ioctl = nvme_ioctl,
1051 .compat_ioctl = nvme_compat_ioctl,
1052 .open = nvme_open,
1053 .release = nvme_release,
1054 .getgeo = nvme_getgeo,
1055 .revalidate_disk= nvme_revalidate_disk,
1056 .pr_ops = &nvme_pr_ops,
1057};
1058
5fd4ce1b
CH		 1059static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1060{
1061 unsigned long timeout =
1062 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1063 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1064 int ret;
1065
1066 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1067 if ((csts & NVME_CSTS_RDY) == bit)
1068 break;
1069
1070 msleep(100);
1071 if (fatal_signal_pending(current))
1072 return -EINTR;
1073 if (time_after(jiffies, timeout)) {
1b3c47c1 1074 dev_err(ctrl->device,
5fd4ce1b
CH		 1075 "Device not ready; aborting %s\n", enabled ?
1076 "initialisation" : "reset");
1077 return -ENODEV;
1078 }
1079 }
1080
1081 return ret;
1082}
1083
1084/*
1085 * If the device has been passed off to us in an enabled state, just clear
1086 * the enabled bit. The spec says we should set the 'shutdown notification
1087 * bits', but doing so may cause the device to complete commands to the
1088 * admin queue ... and we don't know what memory that might be pointing at!
1089 */
1090int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1091{
1092 int ret;
1093
1094 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1095 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1096
1097 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1098 if (ret)
1099 return ret;
1100 return nvme_wait_ready(ctrl, cap, false);
1101}
576d55d6 1102EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH		 1103
1104int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1105{
1106 /*
1107 * Default to a 4K page size, with the intention to update this
1108 * path in the future to accomodate architectures with differing
1109 * kernel and IO page sizes.
1110 */
1111 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1112 int ret;
1113
1114 if (page_shift < dev_page_min) {
1b3c47c1 1115 dev_err(ctrl->device,
5fd4ce1b
CH		 1116 "Minimum device page size %u too large for host (%u)\n",
1117 1 << dev_page_min, 1 << page_shift);
1118 return -ENODEV;
1119 }
1120
1121 ctrl->page_size = 1 << page_shift;
1122
1123 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1124 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1125 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1126 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1127 ctrl->ctrl_config |= NVME_CC_ENABLE;
1128
1129 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1130 if (ret)
1131 return ret;
1132 return nvme_wait_ready(ctrl, cap, true);
1133}
576d55d6 1134EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH		 1135
1136int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1137{
1138 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1139 u32 csts;
1140 int ret;
1141
1142 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1143 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1144
1145 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1146 if (ret)
1147 return ret;
1148
1149 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1150 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1151 break;
1152
1153 msleep(100);
1154 if (fatal_signal_pending(current))
1155 return -EINTR;
1156 if (time_after(jiffies, timeout)) {
1b3c47c1 1157 dev_err(ctrl->device,
5fd4ce1b
CH		 1158 "Device shutdown incomplete; abort shutdown\n");
1159 return -ENODEV;
1160 }
1161 }
1162
1163 return ret;
1164}
576d55d6 1165EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1166
da35825d
CH		 1167static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1168 struct request_queue *q)
1169{
7c88cb00
JA		 1170 bool vwc = false;
1171
da35825d 1172 if (ctrl->max_hw_sectors) {
45686b61
CH		 1173 u32 max_segments =
1174 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1175
da35825d 1176 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1177 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH		 1178 }
1179 if (ctrl->stripe_size)
1180 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1181 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA		 1182 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1183 vwc = true;
1184 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH		 1185}
1186
7fd8930f
CH		 1187/*
1188 * Initialize the cached copies of the Identify data and various controller
1189 * register in our nvme_ctrl structure. This should be called as soon as
1190 * the admin queue is fully up and running.
1191 */
1192int nvme_init_identify(struct nvme_ctrl *ctrl)
1193{
1194 struct nvme_id_ctrl *id;
1195 u64 cap;
1196 int ret, page_shift;
a229dbf6 1197 u32 max_hw_sectors;
7fd8930f 1198
f3ca80fc
CH		 1199 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1200 if (ret) {
1b3c47c1 1201 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH		 1202 return ret;
1203 }
1204
7fd8930f
CH		 1205 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1206 if (ret) {
1b3c47c1 1207 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH		 1208 return ret;
1209 }
1210 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1211
f3ca80fc
CH		 1212 if (ctrl->vs >= NVME_VS(1, 1))
1213 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1214
7fd8930f
CH		 1215 ret = nvme_identify_ctrl(ctrl, &id);
1216 if (ret) {
1b3c47c1 1217 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH		 1218 return -EIO;
1219 }
1220
118472ab 1221 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1222 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1223 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1224 ctrl->vwc = id->vwc;
931e1c22 1225 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH		 1226 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1227 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1228 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1229 if (id->mdts)
a229dbf6 1230 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
7fd8930f 1231 else
a229dbf6
CH		 1232 max_hw_sectors = UINT_MAX;
1233 ctrl->max_hw_sectors =
1234 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
7fd8930f
CH		 1235
1236 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1237 unsigned int max_hw_sectors;
1238
1239 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1240 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1241 if (ctrl->max_hw_sectors) {
1242 ctrl->max_hw_sectors = min(max_hw_sectors,
1243 ctrl->max_hw_sectors);
1244 } else {
1245 ctrl->max_hw_sectors = max_hw_sectors;
1246 }
1247 }
1248
da35825d 1249 nvme_set_queue_limits(ctrl, ctrl->admin_q);
07bfcd09 1250 ctrl->sgls = le32_to_cpu(id->sgls);
038bd4cb 1251 ctrl->kas = le16_to_cpu(id->kas);
07bfcd09
CH		 1252
1253 if (ctrl->ops->is_fabrics) {
1254 ctrl->icdoff = le16_to_cpu(id->icdoff);
1255 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1256 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1257 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1258
1259 /*
1260 * In fabrics we need to verify the cntlid matches the
1261 * admin connect
1262 */
1263 if (ctrl->cntlid != le16_to_cpu(id->cntlid))
1264 ret = -EINVAL;
038bd4cb
SG		 1265
1266 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
1267 dev_err(ctrl->dev,
1268 "keep-alive support is mandatory for fabrics\n");
1269 ret = -EINVAL;
1270 }
07bfcd09
CH		 1271 } else {
1272 ctrl->cntlid = le16_to_cpu(id->cntlid);
1273 }
da35825d 1274
7fd8930f 1275 kfree(id);
07bfcd09 1276 return ret;
7fd8930f 1277}
576d55d6 1278EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1279
f3ca80fc 1280static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1281{
f3ca80fc
CH		 1282 struct nvme_ctrl *ctrl;
1283 int instance = iminor(inode);
1284 int ret = -ENODEV;
1673f1f0 1285
f3ca80fc
CH		 1286 spin_lock(&dev_list_lock);
1287 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1288 if (ctrl->instance != instance)
1289 continue;
1290
1291 if (!ctrl->admin_q) {
1292 ret = -EWOULDBLOCK;
1293 break;
1294 }
1295 if (!kref_get_unless_zero(&ctrl->kref))
1296 break;
1297 file->private_data = ctrl;
1298 ret = 0;
1299 break;
1300 }
1301 spin_unlock(&dev_list_lock);
1302
1303 return ret;
1673f1f0
CH		 1304}
1305
f3ca80fc 1306static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1307{
f3ca80fc
CH		 1308 nvme_put_ctrl(file->private_data);
1309 return 0;
1310}
1311
bfd89471
CH		 1312static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1313{
1314 struct nvme_ns *ns;
1315 int ret;
1316
1317 mutex_lock(&ctrl->namespaces_mutex);
1318 if (list_empty(&ctrl->namespaces)) {
1319 ret = -ENOTTY;
1320 goto out_unlock;
1321 }
1322
1323 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1324 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1325 dev_warn(ctrl->device,
bfd89471
CH		 1326 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1327 ret = -EINVAL;
1328 goto out_unlock;
1329 }
1330
1b3c47c1 1331 dev_warn(ctrl->device,
bfd89471
CH		 1332 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1333 kref_get(&ns->kref);
1334 mutex_unlock(&ctrl->namespaces_mutex);
1335
1336 ret = nvme_user_cmd(ctrl, ns, argp);
1337 nvme_put_ns(ns);
1338 return ret;
1339
1340out_unlock:
1341 mutex_unlock(&ctrl->namespaces_mutex);
1342 return ret;
1343}
1344
f3ca80fc
CH		 1345static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1346 unsigned long arg)
1347{
1348 struct nvme_ctrl *ctrl = file->private_data;
1349 void __user *argp = (void __user *)arg;
f3ca80fc
CH		 1350
1351 switch (cmd) {
1352 case NVME_IOCTL_ADMIN_CMD:
1353 return nvme_user_cmd(ctrl, NULL, argp);
1354 case NVME_IOCTL_IO_CMD:
bfd89471 1355 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1356 case NVME_IOCTL_RESET:
1b3c47c1 1357 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH		 1358 return ctrl->ops->reset_ctrl(ctrl);
1359 case NVME_IOCTL_SUBSYS_RESET:
1360 return nvme_reset_subsystem(ctrl);
9ec3bb2f
KB		 1361 case NVME_IOCTL_RESCAN:
1362 nvme_queue_scan(ctrl);
1363 return 0;
f3ca80fc
CH		 1364 default:
1365 return -ENOTTY;
1366 }
1367}
1368
1369static const struct file_operations nvme_dev_fops = {
1370 .owner = THIS_MODULE,
1371 .open = nvme_dev_open,
1372 .release = nvme_dev_release,
1373 .unlocked_ioctl = nvme_dev_ioctl,
1374 .compat_ioctl = nvme_dev_ioctl,
1375};
1376
1377static ssize_t nvme_sysfs_reset(struct device *dev,
1378 struct device_attribute *attr, const char *buf,
1379 size_t count)
1380{
1381 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1382 int ret;
1383
1384 ret = ctrl->ops->reset_ctrl(ctrl);
1385 if (ret < 0)
1386 return ret;
1387 return count;
1673f1f0 1388}
f3ca80fc 1389static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1390
9ec3bb2f
KB		 1391static ssize_t nvme_sysfs_rescan(struct device *dev,
1392 struct device_attribute *attr, const char *buf,
1393 size_t count)
1394{
1395 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1396
1397 nvme_queue_scan(ctrl);
1398 return count;
1399}
1400static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
1401
118472ab
KB		 1402static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1403 char *buf)
1404{
1405 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1406 struct nvme_ctrl *ctrl = ns->ctrl;
1407 int serial_len = sizeof(ctrl->serial);
1408 int model_len = sizeof(ctrl->model);
1409
1410 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1411 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1412
1413 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1414 return sprintf(buf, "eui.%8phN\n", ns->eui);
1415
1416 while (ctrl->serial[serial_len - 1] == ' ')
1417 serial_len--;
1418 while (ctrl->model[model_len - 1] == ' ')
1419 model_len--;
1420
1421 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1422 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1423}
1424static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1425
2b9b6e86
KB		 1426static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1427 char *buf)
1428{
1429 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1430 return sprintf(buf, "%pU\n", ns->uuid);
1431}
1432static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1433
1434static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1435 char *buf)
1436{
1437 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1438 return sprintf(buf, "%8phd\n", ns->eui);
1439}
1440static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1441
1442static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1443 char *buf)
1444{
1445 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1446 return sprintf(buf, "%d\n", ns->ns_id);
1447}
1448static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1449
1450static struct attribute *nvme_ns_attrs[] = {
118472ab 1451 &dev_attr_wwid.attr,
2b9b6e86
KB		 1452 &dev_attr_uuid.attr,
1453 &dev_attr_eui.attr,
1454 &dev_attr_nsid.attr,
1455 NULL,
1456};
1457
1a353d85 1458static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
2b9b6e86
KB		 1459 struct attribute *a, int n)
1460{
1461 struct device *dev = container_of(kobj, struct device, kobj);
1462 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1463
1464 if (a == &dev_attr_uuid.attr) {
1465 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1466 return 0;
1467 }
1468 if (a == &dev_attr_eui.attr) {
1469 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1470 return 0;
1471 }
1472 return a->mode;
1473}
1474
1475static const struct attribute_group nvme_ns_attr_group = {
1476 .attrs = nvme_ns_attrs,
1a353d85 1477 .is_visible = nvme_ns_attrs_are_visible,
2b9b6e86
KB		 1478};
1479
931e1c22 1480#define nvme_show_str_function(field) \
779ff756
KB		 1481static ssize_t field##_show(struct device *dev, \
1482 struct device_attribute *attr, char *buf) \
1483{ \
1484 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1485 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1486} \
1487static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1488
931e1c22
ML		 1489#define nvme_show_int_function(field) \
1490static ssize_t field##_show(struct device *dev, \
1491 struct device_attribute *attr, char *buf) \
1492{ \
1493 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1494 return sprintf(buf, "%d\n", ctrl->field); \
1495} \
1496static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1497
1498nvme_show_str_function(model);
1499nvme_show_str_function(serial);
1500nvme_show_str_function(firmware_rev);
1501nvme_show_int_function(cntlid);
779ff756 1502
1a353d85
ML		 1503static ssize_t nvme_sysfs_delete(struct device *dev,
1504 struct device_attribute *attr, const char *buf,
1505 size_t count)
1506{
1507 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1508
1509 if (device_remove_file_self(dev, attr))
1510 ctrl->ops->delete_ctrl(ctrl);
1511 return count;
1512}
1513static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
1514
1515static ssize_t nvme_sysfs_show_transport(struct device *dev,
1516 struct device_attribute *attr,
1517 char *buf)
1518{
1519 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1520
1521 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
1522}
1523static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
1524
1525static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
1526 struct device_attribute *attr,
1527 char *buf)
1528{
1529 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1530
1531 return snprintf(buf, PAGE_SIZE, "%s\n",
1532 ctrl->ops->get_subsysnqn(ctrl));
1533}
1534static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
1535
1536static ssize_t nvme_sysfs_show_address(struct device *dev,
1537 struct device_attribute *attr,
1538 char *buf)
1539{
1540 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1541
1542 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
1543}
1544static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
1545
779ff756
KB		 1546static struct attribute *nvme_dev_attrs[] = {
1547 &dev_attr_reset_controller.attr,
9ec3bb2f 1548 &dev_attr_rescan_controller.attr,
779ff756
KB		 1549 &dev_attr_model.attr,
1550 &dev_attr_serial.attr,
1551 &dev_attr_firmware_rev.attr,
931e1c22 1552 &dev_attr_cntlid.attr,
1a353d85
ML		 1553 &dev_attr_delete_controller.attr,
1554 &dev_attr_transport.attr,
1555 &dev_attr_subsysnqn.attr,
1556 &dev_attr_address.attr,
779ff756
KB		 1557 NULL
1558};
1559
1a353d85
ML		 1560#define CHECK_ATTR(ctrl, a, name) \
1561 if ((a) == &dev_attr_##name.attr && \
1562 !(ctrl)->ops->get_##name) \
1563 return 0
1564
1565static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
1566 struct attribute *a, int n)
1567{
1568 struct device *dev = container_of(kobj, struct device, kobj);
1569 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1570
1571 if (a == &dev_attr_delete_controller.attr) {
1572 if (!ctrl->ops->delete_ctrl)
1573 return 0;
1574 }
1575
1576 CHECK_ATTR(ctrl, a, subsysnqn);
1577 CHECK_ATTR(ctrl, a, address);
1578
1579 return a->mode;
1580}
1581
779ff756 1582static struct attribute_group nvme_dev_attrs_group = {
1a353d85
ML		 1583 .attrs = nvme_dev_attrs,
1584 .is_visible = nvme_dev_attrs_are_visible,
779ff756
KB		 1585};
1586
1587static const struct attribute_group *nvme_dev_attr_groups[] = {
1588 &nvme_dev_attrs_group,
1589 NULL,
1590};
1591
5bae7f73
CH		 1592static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1593{
1594 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1595 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1596
1597 return nsa->ns_id - nsb->ns_id;
1598}
1599
1600static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1601{
1602 struct nvme_ns *ns;
1603
69d3b8ac
CH		 1604 lockdep_assert_held(&ctrl->namespaces_mutex);
1605
5bae7f73
CH		 1606 list_for_each_entry(ns, &ctrl->namespaces, list) {
1607 if (ns->ns_id == nsid)
1608 return ns;
1609 if (ns->ns_id > nsid)
1610 break;
1611 }
1612 return NULL;
1613}
1614
1615static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1616{
1617 struct nvme_ns *ns;
1618 struct gendisk *disk;
1619 int node = dev_to_node(ctrl->dev);
1620
69d3b8ac
CH		 1621 lockdep_assert_held(&ctrl->namespaces_mutex);
1622
5bae7f73
CH		 1623 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1624 if (!ns)
1625 return;
1626
075790eb
KB		 1627 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1628 if (ns->instance < 0)
1629 goto out_free_ns;
1630
5bae7f73
CH		 1631 ns->queue = blk_mq_init_queue(ctrl->tagset);
1632 if (IS_ERR(ns->queue))
075790eb 1633 goto out_release_instance;
5bae7f73
CH		 1634 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1635 ns->queue->queuedata = ns;
1636 ns->ctrl = ctrl;
1637
1638 disk = alloc_disk_node(0, node);
1639 if (!disk)
1640 goto out_free_queue;
1641
1642 kref_init(&ns->kref);
1643 ns->ns_id = nsid;
1644 ns->disk = disk;
1645 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73 1646
da35825d 1647
5bae7f73 1648 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1649 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73
CH		 1650
1651 disk->major = nvme_major;
1652 disk->first_minor = 0;
1653 disk->fops = &nvme_fops;
1654 disk->private_data = ns;
1655 disk->queue = ns->queue;
1656 disk->driverfs_dev = ctrl->device;
1657 disk->flags = GENHD_FL_EXT_DEVT;
075790eb 1658 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1659
5bae7f73
CH		 1660 if (nvme_revalidate_disk(ns->disk))
1661 goto out_free_disk;
1662
0bf77e9d 1663 list_add_tail_rcu(&ns->list, &ctrl->namespaces);
5bae7f73 1664 kref_get(&ctrl->kref);
2b9b6e86
KB		 1665 if (ns->type == NVME_NS_LIGHTNVM)
1666 return;
5bae7f73 1667
2b9b6e86
KB		 1668 add_disk(ns->disk);
1669 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1670 &nvme_ns_attr_group))
1671 pr_warn("%s: failed to create sysfs group for identification\n",
1672 ns->disk->disk_name);
5bae7f73
CH		 1673 return;
1674 out_free_disk:
1675 kfree(disk);
5bae7f73
CH		 1676 out_free_queue:
1677 blk_cleanup_queue(ns->queue);
075790eb
KB		 1678 out_release_instance:
1679 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH		 1680 out_free_ns:
1681 kfree(ns);
1682}
1683
1684static void nvme_ns_remove(struct nvme_ns *ns)
1685{
b7b9c227
ML		 1686 lockdep_assert_held(&ns->ctrl->namespaces_mutex);
1687
646017a6
KB		 1688 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1689 return;
69d3b8ac 1690
5bae7f73
CH		 1691 if (ns->disk->flags & GENHD_FL_UP) {
1692 if (blk_get_integrity(ns->disk))
1693 blk_integrity_unregister(ns->disk);
2b9b6e86
KB		 1694 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1695 &nvme_ns_attr_group);
5bae7f73 1696 del_gendisk(ns->disk);
5bae7f73
CH		 1697 blk_mq_abort_requeue_list(ns->queue);
1698 blk_cleanup_queue(ns->queue);
1699 }
1700 list_del_init(&ns->list);
0bf77e9d 1701 synchronize_rcu();
5bae7f73
CH		 1702 nvme_put_ns(ns);
1703}
1704
540c801c
KB		 1705static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1706{
1707 struct nvme_ns *ns;
1708
1709 ns = nvme_find_ns(ctrl, nsid);
1710 if (ns) {
1711 if (revalidate_disk(ns->disk))
1712 nvme_ns_remove(ns);
1713 } else
1714 nvme_alloc_ns(ctrl, nsid);
1715}
1716
47b0e50a
SB		 1717static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
1718 unsigned nsid)
1719{
1720 struct nvme_ns *ns, *next;
1721
1722 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1723 if (ns->ns_id > nsid)
1724 nvme_ns_remove(ns);
1725 }
1726}
1727
540c801c
KB		 1728static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1729{
1730 struct nvme_ns *ns;
1731 __le32 *ns_list;
1732 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1733 int ret = 0;
1734
1735 ns_list = kzalloc(0x1000, GFP_KERNEL);
1736 if (!ns_list)
1737 return -ENOMEM;
1738
1739 for (i = 0; i < num_lists; i++) {
1740 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1741 if (ret)
47b0e50a 1742 goto free;
540c801c
KB		 1743
1744 for (j = 0; j < min(nn, 1024U); j++) {
1745 nsid = le32_to_cpu(ns_list[j]);
1746 if (!nsid)
1747 goto out;
1748
1749 nvme_validate_ns(ctrl, nsid);
1750
1751 while (++prev < nsid) {
1752 ns = nvme_find_ns(ctrl, prev);
1753 if (ns)
1754 nvme_ns_remove(ns);
1755 }
1756 }
1757 nn -= j;
1758 }
1759 out:
47b0e50a
SB		 1760 nvme_remove_invalid_namespaces(ctrl, prev);
1761 free:
540c801c
KB		 1762 kfree(ns_list);
1763 return ret;
1764}
1765
5955be21 1766static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73 1767{
5bae7f73
CH		 1768 unsigned i;
1769
69d3b8ac
CH		 1770 lockdep_assert_held(&ctrl->namespaces_mutex);
1771
540c801c
KB		 1772 for (i = 1; i <= nn; i++)
1773 nvme_validate_ns(ctrl, i);
1774
47b0e50a 1775 nvme_remove_invalid_namespaces(ctrl, nn);
5bae7f73
CH		 1776}
1777
5955be21 1778static void nvme_scan_work(struct work_struct *work)
5bae7f73 1779{
5955be21
CH		 1780 struct nvme_ctrl *ctrl =
1781 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1782 struct nvme_id_ctrl *id;
540c801c 1783 unsigned nn;
5bae7f73 1784
5955be21
CH		 1785 if (ctrl->state != NVME_CTRL_LIVE)
1786 return;
1787
5bae7f73
CH		 1788 if (nvme_identify_ctrl(ctrl, &id))
1789 return;
540c801c 1790
69d3b8ac 1791 mutex_lock(&ctrl->namespaces_mutex);
540c801c
KB		 1792 nn = le32_to_cpu(id->nn);
1793 if (ctrl->vs >= NVME_VS(1, 1) &&
1794 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1795 if (!nvme_scan_ns_list(ctrl, nn))
1796 goto done;
1797 }
5955be21 1798 nvme_scan_ns_sequential(ctrl, nn);
540c801c
KB		 1799 done:
1800 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1801 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1802 kfree(id);
5955be21
CH		 1803
1804 if (ctrl->ops->post_scan)
1805 ctrl->ops->post_scan(ctrl);
5bae7f73 1806}
5955be21
CH		 1807
1808void nvme_queue_scan(struct nvme_ctrl *ctrl)
1809{
1810 /*
1811 * Do not queue new scan work when a controller is reset during
1812 * removal.
1813 */
1814 if (ctrl->state == NVME_CTRL_LIVE)
1815 schedule_work(&ctrl->scan_work);
1816}
1817EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73
CH		 1818
1819void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1820{
1821 struct nvme_ns *ns, *next;
1822
0ff9d4e1
KB		 1823 /*
1824 * The dead states indicates the controller was not gracefully
1825 * disconnected. In that case, we won't be able to flush any data while
1826 * removing the namespaces' disks; fail all the queues now to avoid
1827 * potentially having to clean up the failed sync later.
1828 */
1829 if (ctrl->state == NVME_CTRL_DEAD)
1830 nvme_kill_queues(ctrl);
1831
b7b9c227 1832 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73
CH		 1833 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1834 nvme_ns_remove(ns);
b7b9c227 1835 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1836}
576d55d6 1837EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1838
f866fc42
CH		 1839static void nvme_async_event_work(struct work_struct *work)
1840{
1841 struct nvme_ctrl *ctrl =
1842 container_of(work, struct nvme_ctrl, async_event_work);
1843
1844 spin_lock_irq(&ctrl->lock);
1845 while (ctrl->event_limit > 0) {
1846 int aer_idx = --ctrl->event_limit;
1847
1848 spin_unlock_irq(&ctrl->lock);
1849 ctrl->ops->submit_async_event(ctrl, aer_idx);
1850 spin_lock_irq(&ctrl->lock);
1851 }
1852 spin_unlock_irq(&ctrl->lock);
1853}
1854
1855void nvme_complete_async_event(struct nvme_ctrl *ctrl,
1856 struct nvme_completion *cqe)
1857{
1858 u16 status = le16_to_cpu(cqe->status) >> 1;
1859 u32 result = le32_to_cpu(cqe->result);
1860
1861 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) {
1862 ++ctrl->event_limit;
1863 schedule_work(&ctrl->async_event_work);
1864 }
1865
1866 if (status != NVME_SC_SUCCESS)
1867 return;
1868
1869 switch (result & 0xff07) {
1870 case NVME_AER_NOTICE_NS_CHANGED:
1871 dev_info(ctrl->device, "rescanning\n");
1872 nvme_queue_scan(ctrl);
1873 break;
1874 default:
1875 dev_warn(ctrl->device, "async event result %08x\n", result);
1876 }
1877}
1878EXPORT_SYMBOL_GPL(nvme_complete_async_event);
1879
1880void nvme_queue_async_events(struct nvme_ctrl *ctrl)
1881{
1882 ctrl->event_limit = NVME_NR_AERS;
1883 schedule_work(&ctrl->async_event_work);
1884}
1885EXPORT_SYMBOL_GPL(nvme_queue_async_events);
1886
f3ca80fc
CH		 1887static DEFINE_IDA(nvme_instance_ida);
1888
1889static int nvme_set_instance(struct nvme_ctrl *ctrl)
1890{
1891 int instance, error;
1892
1893 do {
1894 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1895 return -ENODEV;
1896
1897 spin_lock(&dev_list_lock);
1898 error = ida_get_new(&nvme_instance_ida, &instance);
1899 spin_unlock(&dev_list_lock);
1900 } while (error == -EAGAIN);
1901
1902 if (error)
1903 return -ENODEV;
1904
1905 ctrl->instance = instance;
1906 return 0;
1907}
1908
1909static void nvme_release_instance(struct nvme_ctrl *ctrl)
1910{
1911 spin_lock(&dev_list_lock);
1912 ida_remove(&nvme_instance_ida, ctrl->instance);
1913 spin_unlock(&dev_list_lock);
1914}
1915
53029b04 1916void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1917{
f866fc42 1918 flush_work(&ctrl->async_event_work);
5955be21
CH		 1919 flush_work(&ctrl->scan_work);
1920 nvme_remove_namespaces(ctrl);
1921
53029b04 1922 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH		 1923
1924 spin_lock(&dev_list_lock);
1925 list_del(&ctrl->node);
1926 spin_unlock(&dev_list_lock);
53029b04 1927}
576d55d6 1928EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB		 1929
1930static void nvme_free_ctrl(struct kref *kref)
1931{
1932 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH		 1933
1934 put_device(ctrl->device);
1935 nvme_release_instance(ctrl);
075790eb 1936 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH		 1937
1938 ctrl->ops->free_ctrl(ctrl);
1939}
1940
1941void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1942{
1943 kref_put(&ctrl->kref, nvme_free_ctrl);
1944}
576d55d6 1945EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH		 1946
1947/*
1948 * Initialize a NVMe controller structures. This needs to be called during
1949 * earliest initialization so that we have the initialized structured around
1950 * during probing.
1951 */
1952int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
1953 const struct nvme_ctrl_ops *ops, unsigned long quirks)
1954{
1955 int ret;
1956
bb8d261e
CH		 1957 ctrl->state = NVME_CTRL_NEW;
1958 spin_lock_init(&ctrl->lock);
f3ca80fc 1959 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 1960 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH		 1961 kref_init(&ctrl->kref);
1962 ctrl->dev = dev;
1963 ctrl->ops = ops;
1964 ctrl->quirks = quirks;
5955be21 1965 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f866fc42 1966 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
f3ca80fc
CH		 1967
1968 ret = nvme_set_instance(ctrl);
1969 if (ret)
1970 goto out;
1971
779ff756 1972 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 1973 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 1974 ctrl, nvme_dev_attr_groups,
779ff756 1975 "nvme%d", ctrl->instance);
f3ca80fc
CH		 1976 if (IS_ERR(ctrl->device)) {
1977 ret = PTR_ERR(ctrl->device);
1978 goto out_release_instance;
1979 }
1980 get_device(ctrl->device);
075790eb 1981 ida_init(&ctrl->ns_ida);
f3ca80fc 1982
f3ca80fc
CH		 1983 spin_lock(&dev_list_lock);
1984 list_add_tail(&ctrl->node, &nvme_ctrl_list);
1985 spin_unlock(&dev_list_lock);
1986
1987 return 0;
f3ca80fc
CH		 1988out_release_instance:
1989 nvme_release_instance(ctrl);
1990out:
1991 return ret;
1992}
576d55d6 1993EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 1994
69d9a99c
KB		 1995/**
1996 * nvme_kill_queues(): Ends all namespace queues
1997 * @ctrl: the dead controller that needs to end
1998 *
1999 * Call this function when the driver determines it is unable to get the
2000 * controller in a state capable of servicing IO.
2001 */
2002void nvme_kill_queues(struct nvme_ctrl *ctrl)
2003{
2004 struct nvme_ns *ns;
2005
0bf77e9d
ML		 2006 rcu_read_lock();
2007 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
69d9a99c
KB		 2008 if (!kref_get_unless_zero(&ns->kref))
2009 continue;
2010
2011 /*
2012 * Revalidating a dead namespace sets capacity to 0. This will
2013 * end buffered writers dirtying pages that can't be synced.
2014 */
2015 if (!test_and_set_bit(NVME_NS_DEAD, &ns->flags))
2016 revalidate_disk(ns->disk);
2017
2018 blk_set_queue_dying(ns->queue);
2019 blk_mq_abort_requeue_list(ns->queue);
2020 blk_mq_start_stopped_hw_queues(ns->queue, true);
2021
2022 nvme_put_ns(ns);
2023 }
0bf77e9d 2024 rcu_read_unlock();
69d9a99c 2025}
237045fc 2026EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 2027
25646264 2028void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 2029{
2030 struct nvme_ns *ns;
2031
0bf77e9d
ML		 2032 rcu_read_lock();
2033 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
363c9aac
SG		 2034 spin_lock_irq(ns->queue->queue_lock);
2035 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2036 spin_unlock_irq(ns->queue->queue_lock);
2037
2038 blk_mq_cancel_requeue_work(ns->queue);
2039 blk_mq_stop_hw_queues(ns->queue);
2040 }
0bf77e9d 2041 rcu_read_unlock();
363c9aac 2042}
576d55d6 2043EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 2044
25646264 2045void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 2046{
2047 struct nvme_ns *ns;
2048
0bf77e9d
ML		 2049 rcu_read_lock();
2050 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
363c9aac 2051 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG		 2052 blk_mq_start_stopped_hw_queues(ns->queue, true);
2053 blk_mq_kick_requeue_list(ns->queue);
2054 }
0bf77e9d 2055 rcu_read_unlock();
363c9aac 2056}
576d55d6 2057EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 2058
5bae7f73
CH		 2059int __init nvme_core_init(void)
2060{
2061 int result;
2062
2063 result = register_blkdev(nvme_major, "nvme");
2064 if (result < 0)
2065 return result;
2066 else if (result > 0)
2067 nvme_major = result;
2068
f3ca80fc
CH		 2069 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2070 &nvme_dev_fops);
2071 if (result < 0)
2072 goto unregister_blkdev;
2073 else if (result > 0)
2074 nvme_char_major = result;
2075
2076 nvme_class = class_create(THIS_MODULE, "nvme");
2077 if (IS_ERR(nvme_class)) {
2078 result = PTR_ERR(nvme_class);
2079 goto unregister_chrdev;
2080 }
2081
5bae7f73 2082 return 0;
f3ca80fc
CH		 2083
2084 unregister_chrdev:
2085 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
2086 unregister_blkdev:
2087 unregister_blkdev(nvme_major, "nvme");
2088 return result;
5bae7f73
CH		 2089}
2090
2091void nvme_core_exit(void)
2092{
f3ca80fc
CH		 2093 class_destroy(nvme_class);
2094 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
23bd63ce 2095 unregister_blkdev(nvme_major, "nvme");
5bae7f73 2096}
576d55d6
ML		 2097
2098MODULE_LICENSE("GPL");
2099MODULE_VERSION("1.0");
2100module_init(nvme_core_init);
2101module_exit(nvme_core_exit);
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