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CommitLineData
21d34711
CH		 1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH		 21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH		 23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH		 25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH		 31
32#include "nvme.h"
038bd4cb 33#include "fabrics.h"
21d34711 34
f3ca80fc
CH		 35#define NVME_MINORS (1U << MINORBITS)
36
ba0ba7d3
ML		 37unsigned char admin_timeout = 60;
38module_param(admin_timeout, byte, 0644);
39MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 40EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML		 41
42unsigned char nvme_io_timeout = 30;
43module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
44MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 45EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML		 46
47unsigned char shutdown_timeout = 5;
48module_param(shutdown_timeout, byte, 0644);
49MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
5bae7f73
CH		 51static int nvme_major;
52module_param(nvme_major, int, 0);
53
f3ca80fc
CH		 54static int nvme_char_major;
55module_param(nvme_char_major, int, 0);
56
57static LIST_HEAD(nvme_ctrl_list);
9f2482b9 58static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 59
f3ca80fc
CH		 60static struct class *nvme_class;
61
c55a2fd4
ML		 62void nvme_cancel_request(struct request *req, void *data, bool reserved)
63{
64 int status;
65
66 if (!blk_mq_request_started(req))
67 return;
68
69 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
70 "Cancelling I/O %d", req->tag);
71
72 status = NVME_SC_ABORT_REQ;
73 if (blk_queue_dying(req->q))
74 status |= NVME_SC_DNR;
75 blk_mq_complete_request(req, status);
76}
77EXPORT_SYMBOL_GPL(nvme_cancel_request);
78
bb8d261e
CH		 79bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
80 enum nvme_ctrl_state new_state)
81{
82 enum nvme_ctrl_state old_state = ctrl->state;
83 bool changed = false;
84
85 spin_lock_irq(&ctrl->lock);
86 switch (new_state) {
87 case NVME_CTRL_LIVE:
88 switch (old_state) {
7d2e8008 89 case NVME_CTRL_NEW:
bb8d261e 90 case NVME_CTRL_RESETTING:
def61eca 91 case NVME_CTRL_RECONNECTING:
bb8d261e
CH		 92 changed = true;
93 /* FALLTHRU */
94 default:
95 break;
96 }
97 break;
98 case NVME_CTRL_RESETTING:
99 switch (old_state) {
100 case NVME_CTRL_NEW:
def61eca
CH		 101 case NVME_CTRL_LIVE:
102 case NVME_CTRL_RECONNECTING:
103 changed = true;
104 /* FALLTHRU */
105 default:
106 break;
107 }
108 break;
109 case NVME_CTRL_RECONNECTING:
110 switch (old_state) {
bb8d261e
CH		 111 case NVME_CTRL_LIVE:
112 changed = true;
113 /* FALLTHRU */
114 default:
115 break;
116 }
117 break;
118 case NVME_CTRL_DELETING:
119 switch (old_state) {
120 case NVME_CTRL_LIVE:
121 case NVME_CTRL_RESETTING:
def61eca 122 case NVME_CTRL_RECONNECTING:
bb8d261e
CH		 123 changed = true;
124 /* FALLTHRU */
125 default:
126 break;
127 }
128 break;
0ff9d4e1
KB		 129 case NVME_CTRL_DEAD:
130 switch (old_state) {
131 case NVME_CTRL_DELETING:
132 changed = true;
133 /* FALLTHRU */
134 default:
135 break;
136 }
137 break;
bb8d261e
CH		 138 default:
139 break;
140 }
141 spin_unlock_irq(&ctrl->lock);
142
143 if (changed)
144 ctrl->state = new_state;
145
146 return changed;
147}
148EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
149
1673f1f0
CH		 150static void nvme_free_ns(struct kref *kref)
151{
152 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
153
154 if (ns->type == NVME_NS_LIGHTNVM)
155 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
156
157 spin_lock(&dev_list_lock);
158 ns->disk->private_data = NULL;
159 spin_unlock(&dev_list_lock);
160
1673f1f0 161 put_disk(ns->disk);
075790eb
KB		 162 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
163 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH		 164 kfree(ns);
165}
166
5bae7f73 167static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH		 168{
169 kref_put(&ns->kref, nvme_free_ns);
170}
171
172static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
173{
174 struct nvme_ns *ns;
175
176 spin_lock(&dev_list_lock);
177 ns = disk->private_data;
e439bb12
SG		 178 if (ns) {
179 if (!kref_get_unless_zero(&ns->kref))
180 goto fail;
181 if (!try_module_get(ns->ctrl->ops->module))
182 goto fail_put_ns;
183 }
1673f1f0
CH		 184 spin_unlock(&dev_list_lock);
185
186 return ns;
e439bb12
SG		 187
188fail_put_ns:
189 kref_put(&ns->kref, nvme_free_ns);
190fail:
191 spin_unlock(&dev_list_lock);
192 return NULL;
1673f1f0
CH		 193}
194
7688faa6
CH		 195void nvme_requeue_req(struct request *req)
196{
197 unsigned long flags;
198
199 blk_mq_requeue_request(req);
200 spin_lock_irqsave(req->q->queue_lock, flags);
201 if (!blk_queue_stopped(req->q))
202 blk_mq_kick_requeue_list(req->q);
203 spin_unlock_irqrestore(req->q->queue_lock, flags);
204}
576d55d6 205EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 206
4160982e 207struct request *nvme_alloc_request(struct request_queue *q,
eb71f435 208 struct nvme_command *cmd, unsigned int flags, int qid)
21d34711 209{
21d34711 210 struct request *req;
21d34711 211
eb71f435
CH		 212 if (qid == NVME_QID_ANY) {
213 req = blk_mq_alloc_request(q, nvme_is_write(cmd), flags);
214 } else {
215 req = blk_mq_alloc_request_hctx(q, nvme_is_write(cmd), flags,
216 qid ? qid - 1 : 0);
217 }
21d34711 218 if (IS_ERR(req))
4160982e 219 return req;
21d34711
CH		 220
221 req->cmd_type = REQ_TYPE_DRV_PRIV;
222 req->cmd_flags |= REQ_FAILFAST_DRIVER;
223 req->__data_len = 0;
224 req->__sector = (sector_t) -1;
225 req->bio = req->biotail = NULL;
226
21d34711
CH		 227 req->cmd = (unsigned char *)cmd;
228 req->cmd_len = sizeof(struct nvme_command);
21d34711 229
4160982e
CH		 230 return req;
231}
576d55d6 232EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 233
8093f7ca
ML		 234static inline void nvme_setup_flush(struct nvme_ns *ns,
235 struct nvme_command *cmnd)
236{
237 memset(cmnd, 0, sizeof(*cmnd));
238 cmnd->common.opcode = nvme_cmd_flush;
239 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
240}
241
242static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
243 struct nvme_command *cmnd)
244{
245 struct nvme_dsm_range *range;
246 struct page *page;
247 int offset;
248 unsigned int nr_bytes = blk_rq_bytes(req);
249
250 range = kmalloc(sizeof(*range), GFP_ATOMIC);
251 if (!range)
252 return BLK_MQ_RQ_QUEUE_BUSY;
253
254 range->cattr = cpu_to_le32(0);
255 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
256 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
257
258 memset(cmnd, 0, sizeof(*cmnd));
259 cmnd->dsm.opcode = nvme_cmd_dsm;
260 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
261 cmnd->dsm.nr = 0;
262 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
263
264 req->completion_data = range;
265 page = virt_to_page(range);
266 offset = offset_in_page(range);
267 blk_add_request_payload(req, page, offset, sizeof(*range));
268
269 /*
270 * we set __data_len back to the size of the area to be discarded
271 * on disk. This allows us to report completion on the full amount
272 * of blocks described by the request.
273 */
274 req->__data_len = nr_bytes;
275
276 return 0;
277}
278
279static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
280 struct nvme_command *cmnd)
281{
282 u16 control = 0;
283 u32 dsmgmt = 0;
284
285 if (req->cmd_flags & REQ_FUA)
286 control |= NVME_RW_FUA;
287 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
288 control |= NVME_RW_LR;
289
290 if (req->cmd_flags & REQ_RAHEAD)
291 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
292
293 memset(cmnd, 0, sizeof(*cmnd));
294 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
295 cmnd->rw.command_id = req->tag;
296 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
297 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
298 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
299
300 if (ns->ms) {
301 switch (ns->pi_type) {
302 case NVME_NS_DPS_PI_TYPE3:
303 control |= NVME_RW_PRINFO_PRCHK_GUARD;
304 break;
305 case NVME_NS_DPS_PI_TYPE1:
306 case NVME_NS_DPS_PI_TYPE2:
307 control |= NVME_RW_PRINFO_PRCHK_GUARD |
308 NVME_RW_PRINFO_PRCHK_REF;
309 cmnd->rw.reftag = cpu_to_le32(
310 nvme_block_nr(ns, blk_rq_pos(req)));
311 break;
312 }
313 if (!blk_integrity_rq(req))
314 control |= NVME_RW_PRINFO_PRACT;
315 }
316
317 cmnd->rw.control = cpu_to_le16(control);
318 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
319}
320
321int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
322 struct nvme_command *cmd)
323{
324 int ret = 0;
325
326 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
327 memcpy(cmd, req->cmd, sizeof(*cmd));
3a5e02ce 328 else if (req_op(req) == REQ_OP_FLUSH)
8093f7ca 329 nvme_setup_flush(ns, cmd);
c2df40df 330 else if (req_op(req) == REQ_OP_DISCARD)
8093f7ca
ML		 331 ret = nvme_setup_discard(ns, req, cmd);
332 else
333 nvme_setup_rw(ns, req, cmd);
334
335 return ret;
336}
337EXPORT_SYMBOL_GPL(nvme_setup_cmd);
338
4160982e
CH		 339/*
340 * Returns 0 on success. If the result is negative, it's a Linux error code;
341 * if the result is positive, it's an NVM Express status code
342 */
343int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5 344 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
eb71f435 345 unsigned timeout, int qid, int at_head, int flags)
4160982e
CH		 346{
347 struct request *req;
348 int ret;
349
eb71f435 350 req = nvme_alloc_request(q, cmd, flags, qid);
4160982e
CH		 351 if (IS_ERR(req))
352 return PTR_ERR(req);
353
354 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 355 req->special = cqe;
4160982e 356
21d34711
CH		 357 if (buffer && bufflen) {
358 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
359 if (ret)
360 goto out;
4160982e
CH		 361 }
362
eb71f435 363 blk_execute_rq(req->q, NULL, req, at_head);
4160982e
CH		 364 ret = req->errors;
365 out:
366 blk_mq_free_request(req);
367 return ret;
368}
eb71f435 369EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
4160982e
CH		 370
371int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
372 void *buffer, unsigned bufflen)
373{
eb71f435
CH		 374 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
375 NVME_QID_ANY, 0, 0);
4160982e 376}
576d55d6 377EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 378
0b7f1f26
KB		 379int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
380 void __user *ubuffer, unsigned bufflen,
381 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
382 u32 *result, unsigned timeout)
4160982e 383{
7a5abb4b 384 bool write = nvme_is_write(cmd);
1cb3cce5 385 struct nvme_completion cqe;
0b7f1f26
KB		 386 struct nvme_ns *ns = q->queuedata;
387 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 388 struct request *req;
0b7f1f26
KB		 389 struct bio *bio = NULL;
390 void *meta = NULL;
4160982e
CH		 391 int ret;
392
eb71f435 393 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
4160982e
CH		 394 if (IS_ERR(req))
395 return PTR_ERR(req);
396
397 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 398 req->special = &cqe;
4160982e
CH		 399
400 if (ubuffer && bufflen) {
21d34711
CH		 401 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
402 GFP_KERNEL);
403 if (ret)
404 goto out;
405 bio = req->bio;
21d34711 406
0b7f1f26
KB		 407 if (!disk)
408 goto submit;
409 bio->bi_bdev = bdget_disk(disk, 0);
410 if (!bio->bi_bdev) {
411 ret = -ENODEV;
412 goto out_unmap;
413 }
414
e9fc63d6 415 if (meta_buffer && meta_len) {
0b7f1f26
KB		 416 struct bio_integrity_payload *bip;
417
418 meta = kmalloc(meta_len, GFP_KERNEL);
419 if (!meta) {
420 ret = -ENOMEM;
421 goto out_unmap;
422 }
423
424 if (write) {
425 if (copy_from_user(meta, meta_buffer,
426 meta_len)) {
427 ret = -EFAULT;
428 goto out_free_meta;
429 }
430 }
431
432 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB		 433 if (IS_ERR(bip)) {
434 ret = PTR_ERR(bip);
0b7f1f26
KB		 435 goto out_free_meta;
436 }
437
438 bip->bip_iter.bi_size = meta_len;
439 bip->bip_iter.bi_sector = meta_seed;
440
441 ret = bio_integrity_add_page(bio, virt_to_page(meta),
442 meta_len, offset_in_page(meta));
443 if (ret != meta_len) {
444 ret = -ENOMEM;
445 goto out_free_meta;
446 }
447 }
448 }
449 submit:
450 blk_execute_rq(req->q, disk, req, 0);
451 ret = req->errors;
21d34711 452 if (result)
1cb3cce5 453 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB		 454 if (meta && !ret && !write) {
455 if (copy_to_user(meta_buffer, meta, meta_len))
456 ret = -EFAULT;
457 }
458 out_free_meta:
459 kfree(meta);
460 out_unmap:
461 if (bio) {
462 if (disk && bio->bi_bdev)
463 bdput(bio->bi_bdev);
464 blk_rq_unmap_user(bio);
465 }
21d34711
CH		 466 out:
467 blk_mq_free_request(req);
468 return ret;
469}
470
0b7f1f26
KB		 471int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
472 void __user *ubuffer, unsigned bufflen, u32 *result,
473 unsigned timeout)
474{
475 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
476 result, timeout);
477}
478
038bd4cb
SG		 479static void nvme_keep_alive_end_io(struct request *rq, int error)
480{
481 struct nvme_ctrl *ctrl = rq->end_io_data;
482
483 blk_mq_free_request(rq);
484
485 if (error) {
486 dev_err(ctrl->device,
487 "failed nvme_keep_alive_end_io error=%d\n", error);
488 return;
489 }
490
491 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
492}
493
494static int nvme_keep_alive(struct nvme_ctrl *ctrl)
495{
496 struct nvme_command c;
497 struct request *rq;
498
499 memset(&c, 0, sizeof(c));
500 c.common.opcode = nvme_admin_keep_alive;
501
502 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
503 NVME_QID_ANY);
504 if (IS_ERR(rq))
505 return PTR_ERR(rq);
506
507 rq->timeout = ctrl->kato * HZ;
508 rq->end_io_data = ctrl;
509
510 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
511
512 return 0;
513}
514
515static void nvme_keep_alive_work(struct work_struct *work)
516{
517 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
518 struct nvme_ctrl, ka_work);
519
520 if (nvme_keep_alive(ctrl)) {
521 /* allocation failure, reset the controller */
522 dev_err(ctrl->device, "keep-alive failed\n");
523 ctrl->ops->reset_ctrl(ctrl);
524 return;
525 }
526}
527
528void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
529{
530 if (unlikely(ctrl->kato == 0))
531 return;
532
533 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
534 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
535}
536EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
537
538void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
539{
540 if (unlikely(ctrl->kato == 0))
541 return;
542
543 cancel_delayed_work_sync(&ctrl->ka_work);
544}
545EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
546
1c63dc66 547int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH		 548{
549 struct nvme_command c = { };
550 int error;
551
552 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
553 c.identify.opcode = nvme_admin_identify;
554 c.identify.cns = cpu_to_le32(1);
555
556 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
557 if (!*id)
558 return -ENOMEM;
559
560 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
561 sizeof(struct nvme_id_ctrl));
562 if (error)
563 kfree(*id);
564 return error;
565}
566
540c801c
KB		 567static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
568{
569 struct nvme_command c = { };
570
571 c.identify.opcode = nvme_admin_identify;
572 c.identify.cns = cpu_to_le32(2);
573 c.identify.nsid = cpu_to_le32(nsid);
574 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
575}
576
1c63dc66 577int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH		 578 struct nvme_id_ns **id)
579{
580 struct nvme_command c = { };
581 int error;
582
583 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
584 c.identify.opcode = nvme_admin_identify,
585 c.identify.nsid = cpu_to_le32(nsid),
586
587 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
588 if (!*id)
589 return -ENOMEM;
590
591 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
592 sizeof(struct nvme_id_ns));
593 if (error)
594 kfree(*id);
595 return error;
596}
597
1c63dc66 598int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
21d34711
CH		 599 dma_addr_t dma_addr, u32 *result)
600{
601 struct nvme_command c;
1cb3cce5
CH		 602 struct nvme_completion cqe;
603 int ret;
21d34711
CH		 604
605 memset(&c, 0, sizeof(c));
606 c.features.opcode = nvme_admin_get_features;
607 c.features.nsid = cpu_to_le32(nsid);
eb793e2c 608 c.features.dptr.prp1 = cpu_to_le64(dma_addr);
21d34711
CH		 609 c.features.fid = cpu_to_le32(fid);
610
eb71f435
CH		 611 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0,
612 NVME_QID_ANY, 0, 0);
1cb3cce5
CH		 613 if (ret >= 0)
614 *result = le32_to_cpu(cqe.result);
615 return ret;
21d34711
CH		 616}
617
1c63dc66 618int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
21d34711
CH		 619 dma_addr_t dma_addr, u32 *result)
620{
621 struct nvme_command c;
1cb3cce5
CH		 622 struct nvme_completion cqe;
623 int ret;
21d34711
CH		 624
625 memset(&c, 0, sizeof(c));
626 c.features.opcode = nvme_admin_set_features;
eb793e2c 627 c.features.dptr.prp1 = cpu_to_le64(dma_addr);
21d34711
CH		 628 c.features.fid = cpu_to_le32(fid);
629 c.features.dword11 = cpu_to_le32(dword11);
630
eb71f435
CH		 631 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0,
632 NVME_QID_ANY, 0, 0);
1cb3cce5
CH		 633 if (ret >= 0)
634 *result = le32_to_cpu(cqe.result);
635 return ret;
21d34711
CH		 636}
637
1c63dc66 638int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH		 639{
640 struct nvme_command c = { };
641 int error;
642
643 c.common.opcode = nvme_admin_get_log_page,
644 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
645 c.common.cdw10[0] = cpu_to_le32(
646 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
647 NVME_LOG_SMART),
648
649 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
650 if (!*log)
651 return -ENOMEM;
652
653 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
654 sizeof(struct nvme_smart_log));
655 if (error)
656 kfree(*log);
657 return error;
658}
1673f1f0 659
9a0be7ab
CH		 660int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
661{
662 u32 q_count = (*count - 1) | ((*count - 1) << 16);
663 u32 result;
664 int status, nr_io_queues;
665
666 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0,
667 &result);
f5fa90dc 668 if (status < 0)
9a0be7ab
CH		 669 return status;
670
f5fa90dc
CH		 671 /*
672 * Degraded controllers might return an error when setting the queue
673 * count. We still want to be able to bring them online and offer
674 * access to the admin queue, as that might be only way to fix them up.
675 */
676 if (status > 0) {
677 dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
678 *count = 0;
679 } else {
680 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
681 *count = min(*count, nr_io_queues);
682 }
683
9a0be7ab
CH		 684 return 0;
685}
576d55d6 686EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 687
1673f1f0
CH		 688static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
689{
690 struct nvme_user_io io;
691 struct nvme_command c;
692 unsigned length, meta_len;
693 void __user *metadata;
694
695 if (copy_from_user(&io, uio, sizeof(io)))
696 return -EFAULT;
63088ec7
KB		 697 if (io.flags)
698 return -EINVAL;
1673f1f0
CH		 699
700 switch (io.opcode) {
701 case nvme_cmd_write:
702 case nvme_cmd_read:
703 case nvme_cmd_compare:
704 break;
705 default:
706 return -EINVAL;
707 }
708
709 length = (io.nblocks + 1) << ns->lba_shift;
710 meta_len = (io.nblocks + 1) * ns->ms;
711 metadata = (void __user *)(uintptr_t)io.metadata;
712
713 if (ns->ext) {
714 length += meta_len;
715 meta_len = 0;
716 } else if (meta_len) {
717 if ((io.metadata & 3) || !io.metadata)
718 return -EINVAL;
719 }
720
721 memset(&c, 0, sizeof(c));
722 c.rw.opcode = io.opcode;
723 c.rw.flags = io.flags;
724 c.rw.nsid = cpu_to_le32(ns->ns_id);
725 c.rw.slba = cpu_to_le64(io.slba);
726 c.rw.length = cpu_to_le16(io.nblocks);
727 c.rw.control = cpu_to_le16(io.control);
728 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
729 c.rw.reftag = cpu_to_le32(io.reftag);
730 c.rw.apptag = cpu_to_le16(io.apptag);
731 c.rw.appmask = cpu_to_le16(io.appmask);
732
733 return __nvme_submit_user_cmd(ns->queue, &c,
734 (void __user *)(uintptr_t)io.addr, length,
735 metadata, meta_len, io.slba, NULL, 0);
736}
737
f3ca80fc 738static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH		 739 struct nvme_passthru_cmd __user *ucmd)
740{
741 struct nvme_passthru_cmd cmd;
742 struct nvme_command c;
743 unsigned timeout = 0;
744 int status;
745
746 if (!capable(CAP_SYS_ADMIN))
747 return -EACCES;
748 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
749 return -EFAULT;
63088ec7
KB		 750 if (cmd.flags)
751 return -EINVAL;
1673f1f0
CH		 752
753 memset(&c, 0, sizeof(c));
754 c.common.opcode = cmd.opcode;
755 c.common.flags = cmd.flags;
756 c.common.nsid = cpu_to_le32(cmd.nsid);
757 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
758 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
759 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
760 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
761 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
762 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
763 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
764 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
765
766 if (cmd.timeout_ms)
767 timeout = msecs_to_jiffies(cmd.timeout_ms);
768
769 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 770 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH		 771 &cmd.result, timeout);
772 if (status >= 0) {
773 if (put_user(cmd.result, &ucmd->result))
774 return -EFAULT;
775 }
776
777 return status;
778}
779
780static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
781 unsigned int cmd, unsigned long arg)
782{
783 struct nvme_ns *ns = bdev->bd_disk->private_data;
784
785 switch (cmd) {
786 case NVME_IOCTL_ID:
787 force_successful_syscall_return();
788 return ns->ns_id;
789 case NVME_IOCTL_ADMIN_CMD:
790 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
791 case NVME_IOCTL_IO_CMD:
792 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
793 case NVME_IOCTL_SUBMIT_IO:
794 return nvme_submit_io(ns, (void __user *)arg);
44907332 795#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH		 796 case SG_GET_VERSION_NUM:
797 return nvme_sg_get_version_num((void __user *)arg);
798 case SG_IO:
799 return nvme_sg_io(ns, (void __user *)arg);
44907332 800#endif
1673f1f0
CH		 801 default:
802 return -ENOTTY;
803 }
804}
805
806#ifdef CONFIG_COMPAT
807static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
808 unsigned int cmd, unsigned long arg)
809{
810 switch (cmd) {
811 case SG_IO:
812 return -ENOIOCTLCMD;
813 }
814 return nvme_ioctl(bdev, mode, cmd, arg);
815}
816#else
817#define nvme_compat_ioctl NULL
818#endif
819
820static int nvme_open(struct block_device *bdev, fmode_t mode)
821{
822 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
823}
824
825static void nvme_release(struct gendisk *disk, fmode_t mode)
826{
e439bb12
SG		 827 struct nvme_ns *ns = disk->private_data;
828
829 module_put(ns->ctrl->ops->module);
830 nvme_put_ns(ns);
1673f1f0
CH		 831}
832
833static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
834{
835 /* some standard values */
836 geo->heads = 1 << 6;
837 geo->sectors = 1 << 5;
838 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
839 return 0;
840}
841
842#ifdef CONFIG_BLK_DEV_INTEGRITY
843static void nvme_init_integrity(struct nvme_ns *ns)
844{
845 struct blk_integrity integrity;
846
847 switch (ns->pi_type) {
848 case NVME_NS_DPS_PI_TYPE3:
849 integrity.profile = &t10_pi_type3_crc;
ba36c21b
NB		 850 integrity.tag_size = sizeof(u16) + sizeof(u32);
851 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 852 break;
853 case NVME_NS_DPS_PI_TYPE1:
854 case NVME_NS_DPS_PI_TYPE2:
855 integrity.profile = &t10_pi_type1_crc;
ba36c21b
NB		 856 integrity.tag_size = sizeof(u16);
857 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 858 break;
859 default:
860 integrity.profile = NULL;
861 break;
862 }
863 integrity.tuple_size = ns->ms;
864 blk_integrity_register(ns->disk, &integrity);
865 blk_queue_max_integrity_segments(ns->queue, 1);
866}
867#else
868static void nvme_init_integrity(struct nvme_ns *ns)
869{
870}
871#endif /* CONFIG_BLK_DEV_INTEGRITY */
872
873static void nvme_config_discard(struct nvme_ns *ns)
874{
08095e70 875 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 876 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB		 877
878 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
879 ns->queue->limits.discard_zeroes_data = 1;
880 else
881 ns->queue->limits.discard_zeroes_data = 0;
882
1673f1f0
CH		 883 ns->queue->limits.discard_alignment = logical_block_size;
884 ns->queue->limits.discard_granularity = logical_block_size;
bd0fc288 885 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1673f1f0
CH		 886 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
887}
888
5bae7f73 889static int nvme_revalidate_disk(struct gendisk *disk)
1673f1f0
CH		 890{
891 struct nvme_ns *ns = disk->private_data;
892 struct nvme_id_ns *id;
893 u8 lbaf, pi_type;
894 u16 old_ms;
895 unsigned short bs;
896
69d9a99c
KB		 897 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
898 set_capacity(disk, 0);
899 return -ENODEV;
900 }
1673f1f0 901 if (nvme_identify_ns(ns->ctrl, ns->ns_id, &id)) {
1b3c47c1
SG		 902 dev_warn(disk_to_dev(ns->disk), "%s: Identify failure\n",
903 __func__);
1673f1f0
CH		 904 return -ENODEV;
905 }
906 if (id->ncap == 0) {
907 kfree(id);
908 return -ENODEV;
909 }
910
911 if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
912 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
1b3c47c1 913 dev_warn(disk_to_dev(ns->disk),
1673f1f0
CH		 914 "%s: LightNVM init failure\n", __func__);
915 kfree(id);
916 return -ENODEV;
917 }
918 ns->type = NVME_NS_LIGHTNVM;
919 }
920
2b9b6e86
KB		 921 if (ns->ctrl->vs >= NVME_VS(1, 1))
922 memcpy(ns->eui, id->eui64, sizeof(ns->eui));
923 if (ns->ctrl->vs >= NVME_VS(1, 2))
924 memcpy(ns->uuid, id->nguid, sizeof(ns->uuid));
925
1673f1f0
CH		 926 old_ms = ns->ms;
927 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
928 ns->lba_shift = id->lbaf[lbaf].ds;
929 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
930 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
931
932 /*
933 * If identify namespace failed, use default 512 byte block size so
934 * block layer can use before failing read/write for 0 capacity.
935 */
936 if (ns->lba_shift == 0)
937 ns->lba_shift = 9;
938 bs = 1 << ns->lba_shift;
1673f1f0
CH		 939 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
940 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
941 id->dps & NVME_NS_DPS_PI_MASK : 0;
942
943 blk_mq_freeze_queue(disk->queue);
944 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
945 ns->ms != old_ms ||
946 bs != queue_logical_block_size(disk->queue) ||
947 (ns->ms && ns->ext)))
948 blk_integrity_unregister(disk);
949
950 ns->pi_type = pi_type;
951 blk_queue_logical_block_size(ns->queue, bs);
952
4b9d5b15 953 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 954 nvme_init_integrity(ns);
1673f1f0
CH		 955 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
956 set_capacity(disk, 0);
957 else
958 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
959
960 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
961 nvme_config_discard(ns);
962 blk_mq_unfreeze_queue(disk->queue);
963
964 kfree(id);
965 return 0;
966}
967
968static char nvme_pr_type(enum pr_type type)
969{
970 switch (type) {
971 case PR_WRITE_EXCLUSIVE:
972 return 1;
973 case PR_EXCLUSIVE_ACCESS:
974 return 2;
975 case PR_WRITE_EXCLUSIVE_REG_ONLY:
976 return 3;
977 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
978 return 4;
979 case PR_WRITE_EXCLUSIVE_ALL_REGS:
980 return 5;
981 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
982 return 6;
983 default:
984 return 0;
985 }
986};
987
988static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
989 u64 key, u64 sa_key, u8 op)
990{
991 struct nvme_ns *ns = bdev->bd_disk->private_data;
992 struct nvme_command c;
993 u8 data[16] = { 0, };
994
995 put_unaligned_le64(key, &data[0]);
996 put_unaligned_le64(sa_key, &data[8]);
997
998 memset(&c, 0, sizeof(c));
999 c.common.opcode = op;
1000 c.common.nsid = cpu_to_le32(ns->ns_id);
1001 c.common.cdw10[0] = cpu_to_le32(cdw10);
1002
1003 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
1004}
1005
1006static int nvme_pr_register(struct block_device *bdev, u64 old,
1007 u64 new, unsigned flags)
1008{
1009 u32 cdw10;
1010
1011 if (flags & ~PR_FL_IGNORE_KEY)
1012 return -EOPNOTSUPP;
1013
1014 cdw10 = old ? 2 : 0;
1015 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1016 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1017 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1018}
1019
1020static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1021 enum pr_type type, unsigned flags)
1022{
1023 u32 cdw10;
1024
1025 if (flags & ~PR_FL_IGNORE_KEY)
1026 return -EOPNOTSUPP;
1027
1028 cdw10 = nvme_pr_type(type) << 8;
1029 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1030 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1031}
1032
1033static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1034 enum pr_type type, bool abort)
1035{
1036 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1037 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1038}
1039
1040static int nvme_pr_clear(struct block_device *bdev, u64 key)
1041{
8c0b3915 1042 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH		 1043 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1044}
1045
1046static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1047{
1048 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1049 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1050}
1051
1052static const struct pr_ops nvme_pr_ops = {
1053 .pr_register = nvme_pr_register,
1054 .pr_reserve = nvme_pr_reserve,
1055 .pr_release = nvme_pr_release,
1056 .pr_preempt = nvme_pr_preempt,
1057 .pr_clear = nvme_pr_clear,
1058};
1059
5bae7f73 1060static const struct block_device_operations nvme_fops = {
1673f1f0
CH		 1061 .owner = THIS_MODULE,
1062 .ioctl = nvme_ioctl,
1063 .compat_ioctl = nvme_compat_ioctl,
1064 .open = nvme_open,
1065 .release = nvme_release,
1066 .getgeo = nvme_getgeo,
1067 .revalidate_disk= nvme_revalidate_disk,
1068 .pr_ops = &nvme_pr_ops,
1069};
1070
5fd4ce1b
CH		 1071static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1072{
1073 unsigned long timeout =
1074 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1075 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1076 int ret;
1077
1078 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1079 if ((csts & NVME_CSTS_RDY) == bit)
1080 break;
1081
1082 msleep(100);
1083 if (fatal_signal_pending(current))
1084 return -EINTR;
1085 if (time_after(jiffies, timeout)) {
1b3c47c1 1086 dev_err(ctrl->device,
5fd4ce1b
CH		 1087 "Device not ready; aborting %s\n", enabled ?
1088 "initialisation" : "reset");
1089 return -ENODEV;
1090 }
1091 }
1092
1093 return ret;
1094}
1095
1096/*
1097 * If the device has been passed off to us in an enabled state, just clear
1098 * the enabled bit. The spec says we should set the 'shutdown notification
1099 * bits', but doing so may cause the device to complete commands to the
1100 * admin queue ... and we don't know what memory that might be pointing at!
1101 */
1102int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1103{
1104 int ret;
1105
1106 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1107 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1108
1109 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1110 if (ret)
1111 return ret;
54adc010
GP		 1112
1113 /* Checking for ctrl->tagset is a trick to avoid sleeping on module
1114 * load, since we only need the quirk on reset_controller. Notice
1115 * that the HGST device needs this delay only in firmware activation
1116 * procedure; unfortunately we have no (easy) way to verify this.
1117 */
1118 if ((ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) && ctrl->tagset)
1119 msleep(NVME_QUIRK_DELAY_AMOUNT);
1120
5fd4ce1b
CH		 1121 return nvme_wait_ready(ctrl, cap, false);
1122}
576d55d6 1123EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH		 1124
1125int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1126{
1127 /*
1128 * Default to a 4K page size, with the intention to update this
1129 * path in the future to accomodate architectures with differing
1130 * kernel and IO page sizes.
1131 */
1132 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1133 int ret;
1134
1135 if (page_shift < dev_page_min) {
1b3c47c1 1136 dev_err(ctrl->device,
5fd4ce1b
CH		 1137 "Minimum device page size %u too large for host (%u)\n",
1138 1 << dev_page_min, 1 << page_shift);
1139 return -ENODEV;
1140 }
1141
1142 ctrl->page_size = 1 << page_shift;
1143
1144 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1145 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1146 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1147 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1148 ctrl->ctrl_config |= NVME_CC_ENABLE;
1149
1150 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1151 if (ret)
1152 return ret;
1153 return nvme_wait_ready(ctrl, cap, true);
1154}
576d55d6 1155EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH		 1156
1157int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1158{
1159 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1160 u32 csts;
1161 int ret;
1162
1163 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1164 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1165
1166 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1167 if (ret)
1168 return ret;
1169
1170 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1171 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1172 break;
1173
1174 msleep(100);
1175 if (fatal_signal_pending(current))
1176 return -EINTR;
1177 if (time_after(jiffies, timeout)) {
1b3c47c1 1178 dev_err(ctrl->device,
5fd4ce1b
CH		 1179 "Device shutdown incomplete; abort shutdown\n");
1180 return -ENODEV;
1181 }
1182 }
1183
1184 return ret;
1185}
576d55d6 1186EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1187
da35825d
CH		 1188static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1189 struct request_queue *q)
1190{
7c88cb00
JA		 1191 bool vwc = false;
1192
da35825d 1193 if (ctrl->max_hw_sectors) {
45686b61
CH		 1194 u32 max_segments =
1195 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1196
da35825d 1197 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1198 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH		 1199 }
1200 if (ctrl->stripe_size)
1201 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1202 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA		 1203 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1204 vwc = true;
1205 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH		 1206}
1207
7fd8930f
CH		 1208/*
1209 * Initialize the cached copies of the Identify data and various controller
1210 * register in our nvme_ctrl structure. This should be called as soon as
1211 * the admin queue is fully up and running.
1212 */
1213int nvme_init_identify(struct nvme_ctrl *ctrl)
1214{
1215 struct nvme_id_ctrl *id;
1216 u64 cap;
1217 int ret, page_shift;
a229dbf6 1218 u32 max_hw_sectors;
7fd8930f 1219
f3ca80fc
CH		 1220 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1221 if (ret) {
1b3c47c1 1222 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH		 1223 return ret;
1224 }
1225
7fd8930f
CH		 1226 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1227 if (ret) {
1b3c47c1 1228 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH		 1229 return ret;
1230 }
1231 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1232
f3ca80fc
CH		 1233 if (ctrl->vs >= NVME_VS(1, 1))
1234 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1235
7fd8930f
CH		 1236 ret = nvme_identify_ctrl(ctrl, &id);
1237 if (ret) {
1b3c47c1 1238 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH		 1239 return -EIO;
1240 }
1241
118472ab 1242 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1243 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1244 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1245 ctrl->vwc = id->vwc;
931e1c22 1246 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH		 1247 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1248 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1249 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1250 if (id->mdts)
a229dbf6 1251 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
7fd8930f 1252 else
a229dbf6
CH		 1253 max_hw_sectors = UINT_MAX;
1254 ctrl->max_hw_sectors =
1255 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
7fd8930f
CH		 1256
1257 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1258 unsigned int max_hw_sectors;
1259
1260 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1261 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1262 if (ctrl->max_hw_sectors) {
1263 ctrl->max_hw_sectors = min(max_hw_sectors,
1264 ctrl->max_hw_sectors);
1265 } else {
1266 ctrl->max_hw_sectors = max_hw_sectors;
1267 }
1268 }
1269
da35825d 1270 nvme_set_queue_limits(ctrl, ctrl->admin_q);
07bfcd09 1271 ctrl->sgls = le32_to_cpu(id->sgls);
038bd4cb 1272 ctrl->kas = le16_to_cpu(id->kas);
07bfcd09
CH		 1273
1274 if (ctrl->ops->is_fabrics) {
1275 ctrl->icdoff = le16_to_cpu(id->icdoff);
1276 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1277 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1278 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1279
1280 /*
1281 * In fabrics we need to verify the cntlid matches the
1282 * admin connect
1283 */
1284 if (ctrl->cntlid != le16_to_cpu(id->cntlid))
1285 ret = -EINVAL;
038bd4cb
SG		 1286
1287 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
1288 dev_err(ctrl->dev,
1289 "keep-alive support is mandatory for fabrics\n");
1290 ret = -EINVAL;
1291 }
07bfcd09
CH		 1292 } else {
1293 ctrl->cntlid = le16_to_cpu(id->cntlid);
1294 }
da35825d 1295
7fd8930f 1296 kfree(id);
07bfcd09 1297 return ret;
7fd8930f 1298}
576d55d6 1299EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1300
f3ca80fc 1301static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1302{
f3ca80fc
CH		 1303 struct nvme_ctrl *ctrl;
1304 int instance = iminor(inode);
1305 int ret = -ENODEV;
1673f1f0 1306
f3ca80fc
CH		 1307 spin_lock(&dev_list_lock);
1308 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1309 if (ctrl->instance != instance)
1310 continue;
1311
1312 if (!ctrl->admin_q) {
1313 ret = -EWOULDBLOCK;
1314 break;
1315 }
1316 if (!kref_get_unless_zero(&ctrl->kref))
1317 break;
1318 file->private_data = ctrl;
1319 ret = 0;
1320 break;
1321 }
1322 spin_unlock(&dev_list_lock);
1323
1324 return ret;
1673f1f0
CH		 1325}
1326
f3ca80fc 1327static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1328{
f3ca80fc
CH		 1329 nvme_put_ctrl(file->private_data);
1330 return 0;
1331}
1332
bfd89471
CH		 1333static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1334{
1335 struct nvme_ns *ns;
1336 int ret;
1337
1338 mutex_lock(&ctrl->namespaces_mutex);
1339 if (list_empty(&ctrl->namespaces)) {
1340 ret = -ENOTTY;
1341 goto out_unlock;
1342 }
1343
1344 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1345 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1346 dev_warn(ctrl->device,
bfd89471
CH		 1347 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1348 ret = -EINVAL;
1349 goto out_unlock;
1350 }
1351
1b3c47c1 1352 dev_warn(ctrl->device,
bfd89471
CH		 1353 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1354 kref_get(&ns->kref);
1355 mutex_unlock(&ctrl->namespaces_mutex);
1356
1357 ret = nvme_user_cmd(ctrl, ns, argp);
1358 nvme_put_ns(ns);
1359 return ret;
1360
1361out_unlock:
1362 mutex_unlock(&ctrl->namespaces_mutex);
1363 return ret;
1364}
1365
f3ca80fc
CH		 1366static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1367 unsigned long arg)
1368{
1369 struct nvme_ctrl *ctrl = file->private_data;
1370 void __user *argp = (void __user *)arg;
f3ca80fc
CH		 1371
1372 switch (cmd) {
1373 case NVME_IOCTL_ADMIN_CMD:
1374 return nvme_user_cmd(ctrl, NULL, argp);
1375 case NVME_IOCTL_IO_CMD:
bfd89471 1376 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1377 case NVME_IOCTL_RESET:
1b3c47c1 1378 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH		 1379 return ctrl->ops->reset_ctrl(ctrl);
1380 case NVME_IOCTL_SUBSYS_RESET:
1381 return nvme_reset_subsystem(ctrl);
9ec3bb2f
KB		 1382 case NVME_IOCTL_RESCAN:
1383 nvme_queue_scan(ctrl);
1384 return 0;
f3ca80fc
CH		 1385 default:
1386 return -ENOTTY;
1387 }
1388}
1389
1390static const struct file_operations nvme_dev_fops = {
1391 .owner = THIS_MODULE,
1392 .open = nvme_dev_open,
1393 .release = nvme_dev_release,
1394 .unlocked_ioctl = nvme_dev_ioctl,
1395 .compat_ioctl = nvme_dev_ioctl,
1396};
1397
1398static ssize_t nvme_sysfs_reset(struct device *dev,
1399 struct device_attribute *attr, const char *buf,
1400 size_t count)
1401{
1402 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1403 int ret;
1404
1405 ret = ctrl->ops->reset_ctrl(ctrl);
1406 if (ret < 0)
1407 return ret;
1408 return count;
1673f1f0 1409}
f3ca80fc 1410static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1411
9ec3bb2f
KB		 1412static ssize_t nvme_sysfs_rescan(struct device *dev,
1413 struct device_attribute *attr, const char *buf,
1414 size_t count)
1415{
1416 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1417
1418 nvme_queue_scan(ctrl);
1419 return count;
1420}
1421static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
1422
118472ab
KB		 1423static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1424 char *buf)
1425{
1426 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1427 struct nvme_ctrl *ctrl = ns->ctrl;
1428 int serial_len = sizeof(ctrl->serial);
1429 int model_len = sizeof(ctrl->model);
1430
1431 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1432 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1433
1434 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1435 return sprintf(buf, "eui.%8phN\n", ns->eui);
1436
1437 while (ctrl->serial[serial_len - 1] == ' ')
1438 serial_len--;
1439 while (ctrl->model[model_len - 1] == ' ')
1440 model_len--;
1441
1442 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1443 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1444}
1445static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1446
2b9b6e86
KB		 1447static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1448 char *buf)
1449{
1450 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1451 return sprintf(buf, "%pU\n", ns->uuid);
1452}
1453static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1454
1455static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1456 char *buf)
1457{
1458 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1459 return sprintf(buf, "%8phd\n", ns->eui);
1460}
1461static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1462
1463static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1464 char *buf)
1465{
1466 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1467 return sprintf(buf, "%d\n", ns->ns_id);
1468}
1469static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1470
1471static struct attribute *nvme_ns_attrs[] = {
118472ab 1472 &dev_attr_wwid.attr,
2b9b6e86
KB		 1473 &dev_attr_uuid.attr,
1474 &dev_attr_eui.attr,
1475 &dev_attr_nsid.attr,
1476 NULL,
1477};
1478
1a353d85 1479static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
2b9b6e86
KB		 1480 struct attribute *a, int n)
1481{
1482 struct device *dev = container_of(kobj, struct device, kobj);
1483 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1484
1485 if (a == &dev_attr_uuid.attr) {
1486 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1487 return 0;
1488 }
1489 if (a == &dev_attr_eui.attr) {
1490 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1491 return 0;
1492 }
1493 return a->mode;
1494}
1495
1496static const struct attribute_group nvme_ns_attr_group = {
1497 .attrs = nvme_ns_attrs,
1a353d85 1498 .is_visible = nvme_ns_attrs_are_visible,
2b9b6e86
KB		 1499};
1500
931e1c22 1501#define nvme_show_str_function(field) \
779ff756
KB		 1502static ssize_t field##_show(struct device *dev, \
1503 struct device_attribute *attr, char *buf) \
1504{ \
1505 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1506 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1507} \
1508static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1509
931e1c22
ML		 1510#define nvme_show_int_function(field) \
1511static ssize_t field##_show(struct device *dev, \
1512 struct device_attribute *attr, char *buf) \
1513{ \
1514 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1515 return sprintf(buf, "%d\n", ctrl->field); \
1516} \
1517static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1518
1519nvme_show_str_function(model);
1520nvme_show_str_function(serial);
1521nvme_show_str_function(firmware_rev);
1522nvme_show_int_function(cntlid);
779ff756 1523
1a353d85
ML		 1524static ssize_t nvme_sysfs_delete(struct device *dev,
1525 struct device_attribute *attr, const char *buf,
1526 size_t count)
1527{
1528 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1529
1530 if (device_remove_file_self(dev, attr))
1531 ctrl->ops->delete_ctrl(ctrl);
1532 return count;
1533}
1534static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
1535
1536static ssize_t nvme_sysfs_show_transport(struct device *dev,
1537 struct device_attribute *attr,
1538 char *buf)
1539{
1540 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1541
1542 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
1543}
1544static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
1545
1546static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
1547 struct device_attribute *attr,
1548 char *buf)
1549{
1550 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1551
1552 return snprintf(buf, PAGE_SIZE, "%s\n",
1553 ctrl->ops->get_subsysnqn(ctrl));
1554}
1555static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
1556
1557static ssize_t nvme_sysfs_show_address(struct device *dev,
1558 struct device_attribute *attr,
1559 char *buf)
1560{
1561 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1562
1563 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
1564}
1565static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
1566
779ff756
KB		 1567static struct attribute *nvme_dev_attrs[] = {
1568 &dev_attr_reset_controller.attr,
9ec3bb2f 1569 &dev_attr_rescan_controller.attr,
779ff756
KB		 1570 &dev_attr_model.attr,
1571 &dev_attr_serial.attr,
1572 &dev_attr_firmware_rev.attr,
931e1c22 1573 &dev_attr_cntlid.attr,
1a353d85
ML		 1574 &dev_attr_delete_controller.attr,
1575 &dev_attr_transport.attr,
1576 &dev_attr_subsysnqn.attr,
1577 &dev_attr_address.attr,
779ff756
KB		 1578 NULL
1579};
1580
1a353d85
ML		 1581#define CHECK_ATTR(ctrl, a, name) \
1582 if ((a) == &dev_attr_##name.attr && \
1583 !(ctrl)->ops->get_##name) \
1584 return 0
1585
1586static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
1587 struct attribute *a, int n)
1588{
1589 struct device *dev = container_of(kobj, struct device, kobj);
1590 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1591
1592 if (a == &dev_attr_delete_controller.attr) {
1593 if (!ctrl->ops->delete_ctrl)
1594 return 0;
1595 }
1596
1597 CHECK_ATTR(ctrl, a, subsysnqn);
1598 CHECK_ATTR(ctrl, a, address);
1599
1600 return a->mode;
1601}
1602
779ff756 1603static struct attribute_group nvme_dev_attrs_group = {
1a353d85
ML		 1604 .attrs = nvme_dev_attrs,
1605 .is_visible = nvme_dev_attrs_are_visible,
779ff756
KB		 1606};
1607
1608static const struct attribute_group *nvme_dev_attr_groups[] = {
1609 &nvme_dev_attrs_group,
1610 NULL,
1611};
1612
5bae7f73
CH		 1613static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1614{
1615 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1616 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1617
1618 return nsa->ns_id - nsb->ns_id;
1619}
1620
1621static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1622{
1623 struct nvme_ns *ns;
1624
69d3b8ac
CH		 1625 lockdep_assert_held(&ctrl->namespaces_mutex);
1626
5bae7f73
CH		 1627 list_for_each_entry(ns, &ctrl->namespaces, list) {
1628 if (ns->ns_id == nsid)
1629 return ns;
1630 if (ns->ns_id > nsid)
1631 break;
1632 }
1633 return NULL;
1634}
1635
1636static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1637{
1638 struct nvme_ns *ns;
1639 struct gendisk *disk;
1640 int node = dev_to_node(ctrl->dev);
1641
69d3b8ac
CH		 1642 lockdep_assert_held(&ctrl->namespaces_mutex);
1643
5bae7f73
CH		 1644 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1645 if (!ns)
1646 return;
1647
075790eb
KB		 1648 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1649 if (ns->instance < 0)
1650 goto out_free_ns;
1651
5bae7f73
CH		 1652 ns->queue = blk_mq_init_queue(ctrl->tagset);
1653 if (IS_ERR(ns->queue))
075790eb 1654 goto out_release_instance;
5bae7f73
CH		 1655 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1656 ns->queue->queuedata = ns;
1657 ns->ctrl = ctrl;
1658
1659 disk = alloc_disk_node(0, node);
1660 if (!disk)
1661 goto out_free_queue;
1662
1663 kref_init(&ns->kref);
1664 ns->ns_id = nsid;
1665 ns->disk = disk;
1666 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73 1667
da35825d 1668
5bae7f73 1669 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1670 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73
CH		 1671
1672 disk->major = nvme_major;
1673 disk->first_minor = 0;
1674 disk->fops = &nvme_fops;
1675 disk->private_data = ns;
1676 disk->queue = ns->queue;
5bae7f73 1677 disk->flags = GENHD_FL_EXT_DEVT;
075790eb 1678 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1679
5bae7f73
CH		 1680 if (nvme_revalidate_disk(ns->disk))
1681 goto out_free_disk;
1682
0bf77e9d 1683 list_add_tail_rcu(&ns->list, &ctrl->namespaces);
5bae7f73 1684 kref_get(&ctrl->kref);
2b9b6e86
KB		 1685 if (ns->type == NVME_NS_LIGHTNVM)
1686 return;
5bae7f73 1687
0d52c756 1688 device_add_disk(ctrl->device, ns->disk);
2b9b6e86
KB		 1689 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1690 &nvme_ns_attr_group))
1691 pr_warn("%s: failed to create sysfs group for identification\n",
1692 ns->disk->disk_name);
5bae7f73
CH		 1693 return;
1694 out_free_disk:
1695 kfree(disk);
5bae7f73
CH		 1696 out_free_queue:
1697 blk_cleanup_queue(ns->queue);
075790eb
KB		 1698 out_release_instance:
1699 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH		 1700 out_free_ns:
1701 kfree(ns);
1702}
1703
1704static void nvme_ns_remove(struct nvme_ns *ns)
1705{
b7b9c227
ML		 1706 lockdep_assert_held(&ns->ctrl->namespaces_mutex);
1707
646017a6
KB		 1708 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1709 return;
69d3b8ac 1710
5bae7f73
CH		 1711 if (ns->disk->flags & GENHD_FL_UP) {
1712 if (blk_get_integrity(ns->disk))
1713 blk_integrity_unregister(ns->disk);
2b9b6e86
KB		 1714 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1715 &nvme_ns_attr_group);
5bae7f73 1716 del_gendisk(ns->disk);
5bae7f73
CH		 1717 blk_mq_abort_requeue_list(ns->queue);
1718 blk_cleanup_queue(ns->queue);
1719 }
1720 list_del_init(&ns->list);
0bf77e9d 1721 synchronize_rcu();
5bae7f73
CH		 1722 nvme_put_ns(ns);
1723}
1724
540c801c
KB		 1725static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1726{
1727 struct nvme_ns *ns;
1728
1729 ns = nvme_find_ns(ctrl, nsid);
1730 if (ns) {
1731 if (revalidate_disk(ns->disk))
1732 nvme_ns_remove(ns);
1733 } else
1734 nvme_alloc_ns(ctrl, nsid);
1735}
1736
47b0e50a
SB		 1737static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
1738 unsigned nsid)
1739{
1740 struct nvme_ns *ns, *next;
1741
1742 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1743 if (ns->ns_id > nsid)
1744 nvme_ns_remove(ns);
1745 }
1746}
1747
540c801c
KB		 1748static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1749{
1750 struct nvme_ns *ns;
1751 __le32 *ns_list;
1752 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1753 int ret = 0;
1754
1755 ns_list = kzalloc(0x1000, GFP_KERNEL);
1756 if (!ns_list)
1757 return -ENOMEM;
1758
1759 for (i = 0; i < num_lists; i++) {
1760 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1761 if (ret)
47b0e50a 1762 goto free;
540c801c
KB		 1763
1764 for (j = 0; j < min(nn, 1024U); j++) {
1765 nsid = le32_to_cpu(ns_list[j]);
1766 if (!nsid)
1767 goto out;
1768
1769 nvme_validate_ns(ctrl, nsid);
1770
1771 while (++prev < nsid) {
1772 ns = nvme_find_ns(ctrl, prev);
1773 if (ns)
1774 nvme_ns_remove(ns);
1775 }
1776 }
1777 nn -= j;
1778 }
1779 out:
47b0e50a
SB		 1780 nvme_remove_invalid_namespaces(ctrl, prev);
1781 free:
540c801c
KB		 1782 kfree(ns_list);
1783 return ret;
1784}
1785
5955be21 1786static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73 1787{
5bae7f73
CH		 1788 unsigned i;
1789
69d3b8ac
CH		 1790 lockdep_assert_held(&ctrl->namespaces_mutex);
1791
540c801c
KB		 1792 for (i = 1; i <= nn; i++)
1793 nvme_validate_ns(ctrl, i);
1794
47b0e50a 1795 nvme_remove_invalid_namespaces(ctrl, nn);
5bae7f73
CH		 1796}
1797
5955be21 1798static void nvme_scan_work(struct work_struct *work)
5bae7f73 1799{
5955be21
CH		 1800 struct nvme_ctrl *ctrl =
1801 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1802 struct nvme_id_ctrl *id;
540c801c 1803 unsigned nn;
5bae7f73 1804
5955be21
CH		 1805 if (ctrl->state != NVME_CTRL_LIVE)
1806 return;
1807
5bae7f73
CH		 1808 if (nvme_identify_ctrl(ctrl, &id))
1809 return;
540c801c 1810
69d3b8ac 1811 mutex_lock(&ctrl->namespaces_mutex);
540c801c
KB		 1812 nn = le32_to_cpu(id->nn);
1813 if (ctrl->vs >= NVME_VS(1, 1) &&
1814 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1815 if (!nvme_scan_ns_list(ctrl, nn))
1816 goto done;
1817 }
5955be21 1818 nvme_scan_ns_sequential(ctrl, nn);
540c801c
KB		 1819 done:
1820 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1821 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1822 kfree(id);
5955be21
CH		 1823
1824 if (ctrl->ops->post_scan)
1825 ctrl->ops->post_scan(ctrl);
5bae7f73 1826}
5955be21
CH		 1827
1828void nvme_queue_scan(struct nvme_ctrl *ctrl)
1829{
1830 /*
1831 * Do not queue new scan work when a controller is reset during
1832 * removal.
1833 */
1834 if (ctrl->state == NVME_CTRL_LIVE)
1835 schedule_work(&ctrl->scan_work);
1836}
1837EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73
CH		 1838
1839void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1840{
1841 struct nvme_ns *ns, *next;
1842
0ff9d4e1
KB		 1843 /*
1844 * The dead states indicates the controller was not gracefully
1845 * disconnected. In that case, we won't be able to flush any data while
1846 * removing the namespaces' disks; fail all the queues now to avoid
1847 * potentially having to clean up the failed sync later.
1848 */
1849 if (ctrl->state == NVME_CTRL_DEAD)
1850 nvme_kill_queues(ctrl);
1851
b7b9c227 1852 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73
CH		 1853 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1854 nvme_ns_remove(ns);
b7b9c227 1855 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1856}
576d55d6 1857EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1858
f866fc42
CH		 1859static void nvme_async_event_work(struct work_struct *work)
1860{
1861 struct nvme_ctrl *ctrl =
1862 container_of(work, struct nvme_ctrl, async_event_work);
1863
1864 spin_lock_irq(&ctrl->lock);
1865 while (ctrl->event_limit > 0) {
1866 int aer_idx = --ctrl->event_limit;
1867
1868 spin_unlock_irq(&ctrl->lock);
1869 ctrl->ops->submit_async_event(ctrl, aer_idx);
1870 spin_lock_irq(&ctrl->lock);
1871 }
1872 spin_unlock_irq(&ctrl->lock);
1873}
1874
1875void nvme_complete_async_event(struct nvme_ctrl *ctrl,
1876 struct nvme_completion *cqe)
1877{
1878 u16 status = le16_to_cpu(cqe->status) >> 1;
1879 u32 result = le32_to_cpu(cqe->result);
1880
1881 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) {
1882 ++ctrl->event_limit;
1883 schedule_work(&ctrl->async_event_work);
1884 }
1885
1886 if (status != NVME_SC_SUCCESS)
1887 return;
1888
1889 switch (result & 0xff07) {
1890 case NVME_AER_NOTICE_NS_CHANGED:
1891 dev_info(ctrl->device, "rescanning\n");
1892 nvme_queue_scan(ctrl);
1893 break;
1894 default:
1895 dev_warn(ctrl->device, "async event result %08x\n", result);
1896 }
1897}
1898EXPORT_SYMBOL_GPL(nvme_complete_async_event);
1899
1900void nvme_queue_async_events(struct nvme_ctrl *ctrl)
1901{
1902 ctrl->event_limit = NVME_NR_AERS;
1903 schedule_work(&ctrl->async_event_work);
1904}
1905EXPORT_SYMBOL_GPL(nvme_queue_async_events);
1906
f3ca80fc
CH		 1907static DEFINE_IDA(nvme_instance_ida);
1908
1909static int nvme_set_instance(struct nvme_ctrl *ctrl)
1910{
1911 int instance, error;
1912
1913 do {
1914 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1915 return -ENODEV;
1916
1917 spin_lock(&dev_list_lock);
1918 error = ida_get_new(&nvme_instance_ida, &instance);
1919 spin_unlock(&dev_list_lock);
1920 } while (error == -EAGAIN);
1921
1922 if (error)
1923 return -ENODEV;
1924
1925 ctrl->instance = instance;
1926 return 0;
1927}
1928
1929static void nvme_release_instance(struct nvme_ctrl *ctrl)
1930{
1931 spin_lock(&dev_list_lock);
1932 ida_remove(&nvme_instance_ida, ctrl->instance);
1933 spin_unlock(&dev_list_lock);
1934}
1935
53029b04 1936void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1937{
f866fc42 1938 flush_work(&ctrl->async_event_work);
5955be21
CH		 1939 flush_work(&ctrl->scan_work);
1940 nvme_remove_namespaces(ctrl);
1941
53029b04 1942 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH		 1943
1944 spin_lock(&dev_list_lock);
1945 list_del(&ctrl->node);
1946 spin_unlock(&dev_list_lock);
53029b04 1947}
576d55d6 1948EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB		 1949
1950static void nvme_free_ctrl(struct kref *kref)
1951{
1952 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH		 1953
1954 put_device(ctrl->device);
1955 nvme_release_instance(ctrl);
075790eb 1956 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH		 1957
1958 ctrl->ops->free_ctrl(ctrl);
1959}
1960
1961void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1962{
1963 kref_put(&ctrl->kref, nvme_free_ctrl);
1964}
576d55d6 1965EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH		 1966
1967/*
1968 * Initialize a NVMe controller structures. This needs to be called during
1969 * earliest initialization so that we have the initialized structured around
1970 * during probing.
1971 */
1972int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
1973 const struct nvme_ctrl_ops *ops, unsigned long quirks)
1974{
1975 int ret;
1976
bb8d261e
CH		 1977 ctrl->state = NVME_CTRL_NEW;
1978 spin_lock_init(&ctrl->lock);
f3ca80fc 1979 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 1980 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH		 1981 kref_init(&ctrl->kref);
1982 ctrl->dev = dev;
1983 ctrl->ops = ops;
1984 ctrl->quirks = quirks;
5955be21 1985 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f866fc42 1986 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
f3ca80fc
CH		 1987
1988 ret = nvme_set_instance(ctrl);
1989 if (ret)
1990 goto out;
1991
779ff756 1992 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 1993 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 1994 ctrl, nvme_dev_attr_groups,
779ff756 1995 "nvme%d", ctrl->instance);
f3ca80fc
CH		 1996 if (IS_ERR(ctrl->device)) {
1997 ret = PTR_ERR(ctrl->device);
1998 goto out_release_instance;
1999 }
2000 get_device(ctrl->device);
075790eb 2001 ida_init(&ctrl->ns_ida);
f3ca80fc 2002
f3ca80fc
CH		 2003 spin_lock(&dev_list_lock);
2004 list_add_tail(&ctrl->node, &nvme_ctrl_list);
2005 spin_unlock(&dev_list_lock);
2006
2007 return 0;
f3ca80fc
CH		 2008out_release_instance:
2009 nvme_release_instance(ctrl);
2010out:
2011 return ret;
2012}
576d55d6 2013EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 2014
69d9a99c
KB		 2015/**
2016 * nvme_kill_queues(): Ends all namespace queues
2017 * @ctrl: the dead controller that needs to end
2018 *
2019 * Call this function when the driver determines it is unable to get the
2020 * controller in a state capable of servicing IO.
2021 */
2022void nvme_kill_queues(struct nvme_ctrl *ctrl)
2023{
2024 struct nvme_ns *ns;
2025
0bf77e9d
ML		 2026 rcu_read_lock();
2027 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
69d9a99c
KB		 2028 if (!kref_get_unless_zero(&ns->kref))
2029 continue;
2030
2031 /*
2032 * Revalidating a dead namespace sets capacity to 0. This will
2033 * end buffered writers dirtying pages that can't be synced.
2034 */
2035 if (!test_and_set_bit(NVME_NS_DEAD, &ns->flags))
2036 revalidate_disk(ns->disk);
2037
2038 blk_set_queue_dying(ns->queue);
2039 blk_mq_abort_requeue_list(ns->queue);
2040 blk_mq_start_stopped_hw_queues(ns->queue, true);
2041
2042 nvme_put_ns(ns);
2043 }
0bf77e9d 2044 rcu_read_unlock();
69d9a99c 2045}
237045fc 2046EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 2047
25646264 2048void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 2049{
2050 struct nvme_ns *ns;
2051
0bf77e9d
ML		 2052 rcu_read_lock();
2053 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
363c9aac
SG		 2054 spin_lock_irq(ns->queue->queue_lock);
2055 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2056 spin_unlock_irq(ns->queue->queue_lock);
2057
2058 blk_mq_cancel_requeue_work(ns->queue);
2059 blk_mq_stop_hw_queues(ns->queue);
2060 }
0bf77e9d 2061 rcu_read_unlock();
363c9aac 2062}
576d55d6 2063EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 2064
25646264 2065void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 2066{
2067 struct nvme_ns *ns;
2068
0bf77e9d
ML		 2069 rcu_read_lock();
2070 list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
363c9aac 2071 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG		 2072 blk_mq_start_stopped_hw_queues(ns->queue, true);
2073 blk_mq_kick_requeue_list(ns->queue);
2074 }
0bf77e9d 2075 rcu_read_unlock();
363c9aac 2076}
576d55d6 2077EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 2078
5bae7f73
CH		 2079int __init nvme_core_init(void)
2080{
2081 int result;
2082
2083 result = register_blkdev(nvme_major, "nvme");
2084 if (result < 0)
2085 return result;
2086 else if (result > 0)
2087 nvme_major = result;
2088
f3ca80fc
CH		 2089 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2090 &nvme_dev_fops);
2091 if (result < 0)
2092 goto unregister_blkdev;
2093 else if (result > 0)
2094 nvme_char_major = result;
2095
2096 nvme_class = class_create(THIS_MODULE, "nvme");
2097 if (IS_ERR(nvme_class)) {
2098 result = PTR_ERR(nvme_class);
2099 goto unregister_chrdev;
2100 }
2101
5bae7f73 2102 return 0;
f3ca80fc
CH		 2103
2104 unregister_chrdev:
2105 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
2106 unregister_blkdev:
2107 unregister_blkdev(nvme_major, "nvme");
2108 return result;
5bae7f73
CH		 2109}
2110
2111void nvme_core_exit(void)
2112{
f3ca80fc
CH		 2113 class_destroy(nvme_class);
2114 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
23bd63ce 2115 unregister_blkdev(nvme_major, "nvme");
5bae7f73 2116}
576d55d6
ML		 2117
2118MODULE_LICENSE("GPL");
2119MODULE_VERSION("1.0");
2120module_init(nvme_core_init);
2121module_exit(nvme_core_exit);
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