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CommitLineData
21d34711
CH
1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH
21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH
23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH
25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH
31
32#include "nvme.h"
038bd4cb 33#include "fabrics.h"
21d34711 34
f3ca80fc
CH
35#define NVME_MINORS (1U << MINORBITS)
36
ba0ba7d3
ML
37unsigned char admin_timeout = 60;
38module_param(admin_timeout, byte, 0644);
39MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 40EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML
41
42unsigned char nvme_io_timeout = 30;
43module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
44MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 45EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML
46
47unsigned char shutdown_timeout = 5;
48module_param(shutdown_timeout, byte, 0644);
49MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
f80ec966
KB
51unsigned int nvme_max_retries = 5;
52module_param_named(max_retries, nvme_max_retries, uint, 0644);
53MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
54EXPORT_SYMBOL_GPL(nvme_max_retries);
5bae7f73 55
f3ca80fc
CH
56static int nvme_char_major;
57module_param(nvme_char_major, int, 0);
58
59static LIST_HEAD(nvme_ctrl_list);
9f2482b9 60static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 61
f3ca80fc
CH
62static struct class *nvme_class;
63
c55a2fd4
ML
64void nvme_cancel_request(struct request *req, void *data, bool reserved)
65{
66 int status;
67
68 if (!blk_mq_request_started(req))
69 return;
70
71 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
72 "Cancelling I/O %d", req->tag);
73
74 status = NVME_SC_ABORT_REQ;
75 if (blk_queue_dying(req->q))
76 status |= NVME_SC_DNR;
77 blk_mq_complete_request(req, status);
78}
79EXPORT_SYMBOL_GPL(nvme_cancel_request);
80
bb8d261e
CH
81bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
82 enum nvme_ctrl_state new_state)
83{
f6b6a28e 84 enum nvme_ctrl_state old_state;
bb8d261e
CH
85 bool changed = false;
86
87 spin_lock_irq(&ctrl->lock);
f6b6a28e
GKB
88
89 old_state = ctrl->state;
bb8d261e
CH
90 switch (new_state) {
91 case NVME_CTRL_LIVE:
92 switch (old_state) {
7d2e8008 93 case NVME_CTRL_NEW:
bb8d261e 94 case NVME_CTRL_RESETTING:
def61eca 95 case NVME_CTRL_RECONNECTING:
bb8d261e
CH
96 changed = true;
97 /* FALLTHRU */
98 default:
99 break;
100 }
101 break;
102 case NVME_CTRL_RESETTING:
103 switch (old_state) {
104 case NVME_CTRL_NEW:
def61eca
CH
105 case NVME_CTRL_LIVE:
106 case NVME_CTRL_RECONNECTING:
107 changed = true;
108 /* FALLTHRU */
109 default:
110 break;
111 }
112 break;
113 case NVME_CTRL_RECONNECTING:
114 switch (old_state) {
bb8d261e
CH
115 case NVME_CTRL_LIVE:
116 changed = true;
117 /* FALLTHRU */
118 default:
119 break;
120 }
121 break;
122 case NVME_CTRL_DELETING:
123 switch (old_state) {
124 case NVME_CTRL_LIVE:
125 case NVME_CTRL_RESETTING:
def61eca 126 case NVME_CTRL_RECONNECTING:
bb8d261e
CH
127 changed = true;
128 /* FALLTHRU */
129 default:
130 break;
131 }
132 break;
0ff9d4e1
KB
133 case NVME_CTRL_DEAD:
134 switch (old_state) {
135 case NVME_CTRL_DELETING:
136 changed = true;
137 /* FALLTHRU */
138 default:
139 break;
140 }
141 break;
bb8d261e
CH
142 default:
143 break;
144 }
bb8d261e
CH
145
146 if (changed)
147 ctrl->state = new_state;
148
f6b6a28e
GKB
149 spin_unlock_irq(&ctrl->lock);
150
bb8d261e
CH
151 return changed;
152}
153EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
154
1673f1f0
CH
155static void nvme_free_ns(struct kref *kref)
156{
157 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
158
b0b4e09c
MB
159 if (ns->ndev)
160 nvme_nvm_unregister(ns);
1673f1f0 161
b0b4e09c
MB
162 if (ns->disk) {
163 spin_lock(&dev_list_lock);
164 ns->disk->private_data = NULL;
165 spin_unlock(&dev_list_lock);
166 }
1673f1f0 167
1673f1f0 168 put_disk(ns->disk);
075790eb
KB
169 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
170 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH
171 kfree(ns);
172}
173
5bae7f73 174static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH
175{
176 kref_put(&ns->kref, nvme_free_ns);
177}
178
179static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
180{
181 struct nvme_ns *ns;
182
183 spin_lock(&dev_list_lock);
184 ns = disk->private_data;
e439bb12
SG
185 if (ns) {
186 if (!kref_get_unless_zero(&ns->kref))
187 goto fail;
188 if (!try_module_get(ns->ctrl->ops->module))
189 goto fail_put_ns;
190 }
1673f1f0
CH
191 spin_unlock(&dev_list_lock);
192
193 return ns;
e439bb12
SG
194
195fail_put_ns:
196 kref_put(&ns->kref, nvme_free_ns);
197fail:
198 spin_unlock(&dev_list_lock);
199 return NULL;
1673f1f0
CH
200}
201
7688faa6
CH
202void nvme_requeue_req(struct request *req)
203{
a6eaa884 204 blk_mq_requeue_request(req, !blk_mq_queue_stopped(req->q));
7688faa6 205}
576d55d6 206EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 207
4160982e 208struct request *nvme_alloc_request(struct request_queue *q,
eb71f435 209 struct nvme_command *cmd, unsigned int flags, int qid)
21d34711 210{
21d34711 211 struct request *req;
21d34711 212
eb71f435
CH
213 if (qid == NVME_QID_ANY) {
214 req = blk_mq_alloc_request(q, nvme_is_write(cmd), flags);
215 } else {
216 req = blk_mq_alloc_request_hctx(q, nvme_is_write(cmd), flags,
217 qid ? qid - 1 : 0);
218 }
21d34711 219 if (IS_ERR(req))
4160982e 220 return req;
21d34711
CH
221
222 req->cmd_type = REQ_TYPE_DRV_PRIV;
223 req->cmd_flags |= REQ_FAILFAST_DRIVER;
d49187e9 224 nvme_req(req)->cmd = cmd;
21d34711 225
4160982e
CH
226 return req;
227}
576d55d6 228EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 229
8093f7ca
ML
230static inline void nvme_setup_flush(struct nvme_ns *ns,
231 struct nvme_command *cmnd)
232{
233 memset(cmnd, 0, sizeof(*cmnd));
234 cmnd->common.opcode = nvme_cmd_flush;
235 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
236}
237
238static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
239 struct nvme_command *cmnd)
240{
241 struct nvme_dsm_range *range;
8093f7ca
ML
242 unsigned int nr_bytes = blk_rq_bytes(req);
243
244 range = kmalloc(sizeof(*range), GFP_ATOMIC);
245 if (!range)
246 return BLK_MQ_RQ_QUEUE_BUSY;
247
248 range->cattr = cpu_to_le32(0);
249 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
250 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
251
252 memset(cmnd, 0, sizeof(*cmnd));
253 cmnd->dsm.opcode = nvme_cmd_dsm;
254 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
255 cmnd->dsm.nr = 0;
256 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
257
f9d03f96
CH
258 req->special_vec.bv_page = virt_to_page(range);
259 req->special_vec.bv_offset = offset_in_page(range);
260 req->special_vec.bv_len = sizeof(*range);
261 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
8093f7ca 262
bac0000a 263 return BLK_MQ_RQ_QUEUE_OK;
8093f7ca 264}
8093f7ca 265
8093f7ca
ML
266static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
267 struct nvme_command *cmnd)
268{
269 u16 control = 0;
270 u32 dsmgmt = 0;
271
272 if (req->cmd_flags & REQ_FUA)
273 control |= NVME_RW_FUA;
274 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
275 control |= NVME_RW_LR;
276
277 if (req->cmd_flags & REQ_RAHEAD)
278 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
279
280 memset(cmnd, 0, sizeof(*cmnd));
281 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
8093f7ca
ML
282 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
283 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
284 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
285
286 if (ns->ms) {
287 switch (ns->pi_type) {
288 case NVME_NS_DPS_PI_TYPE3:
289 control |= NVME_RW_PRINFO_PRCHK_GUARD;
290 break;
291 case NVME_NS_DPS_PI_TYPE1:
292 case NVME_NS_DPS_PI_TYPE2:
293 control |= NVME_RW_PRINFO_PRCHK_GUARD |
294 NVME_RW_PRINFO_PRCHK_REF;
295 cmnd->rw.reftag = cpu_to_le32(
296 nvme_block_nr(ns, blk_rq_pos(req)));
297 break;
298 }
299 if (!blk_integrity_rq(req))
300 control |= NVME_RW_PRINFO_PRACT;
301 }
302
303 cmnd->rw.control = cpu_to_le16(control);
304 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
305}
306
307int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
308 struct nvme_command *cmd)
309{
bac0000a 310 int ret = BLK_MQ_RQ_QUEUE_OK;
8093f7ca
ML
311
312 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
d49187e9 313 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
3a5e02ce 314 else if (req_op(req) == REQ_OP_FLUSH)
8093f7ca 315 nvme_setup_flush(ns, cmd);
c2df40df 316 else if (req_op(req) == REQ_OP_DISCARD)
8093f7ca
ML
317 ret = nvme_setup_discard(ns, req, cmd);
318 else
319 nvme_setup_rw(ns, req, cmd);
320
721b3917
JS
321 cmd->common.command_id = req->tag;
322
8093f7ca
ML
323 return ret;
324}
325EXPORT_SYMBOL_GPL(nvme_setup_cmd);
326
4160982e
CH
327/*
328 * Returns 0 on success. If the result is negative, it's a Linux error code;
329 * if the result is positive, it's an NVM Express status code
330 */
331int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
d49187e9 332 union nvme_result *result, void *buffer, unsigned bufflen,
eb71f435 333 unsigned timeout, int qid, int at_head, int flags)
4160982e
CH
334{
335 struct request *req;
336 int ret;
337
eb71f435 338 req = nvme_alloc_request(q, cmd, flags, qid);
4160982e
CH
339 if (IS_ERR(req))
340 return PTR_ERR(req);
341
342 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
343
21d34711
CH
344 if (buffer && bufflen) {
345 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
346 if (ret)
347 goto out;
4160982e
CH
348 }
349
eb71f435 350 blk_execute_rq(req->q, NULL, req, at_head);
d49187e9
CH
351 if (result)
352 *result = nvme_req(req)->result;
4160982e
CH
353 ret = req->errors;
354 out:
355 blk_mq_free_request(req);
356 return ret;
357}
eb71f435 358EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
4160982e
CH
359
360int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
361 void *buffer, unsigned bufflen)
362{
eb71f435
CH
363 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
364 NVME_QID_ANY, 0, 0);
4160982e 365}
576d55d6 366EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 367
0b7f1f26
KB
368int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
369 void __user *ubuffer, unsigned bufflen,
370 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
371 u32 *result, unsigned timeout)
4160982e 372{
7a5abb4b 373 bool write = nvme_is_write(cmd);
0b7f1f26
KB
374 struct nvme_ns *ns = q->queuedata;
375 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 376 struct request *req;
0b7f1f26
KB
377 struct bio *bio = NULL;
378 void *meta = NULL;
4160982e
CH
379 int ret;
380
eb71f435 381 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
4160982e
CH
382 if (IS_ERR(req))
383 return PTR_ERR(req);
384
385 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
386
387 if (ubuffer && bufflen) {
21d34711
CH
388 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
389 GFP_KERNEL);
390 if (ret)
391 goto out;
392 bio = req->bio;
21d34711 393
0b7f1f26
KB
394 if (!disk)
395 goto submit;
396 bio->bi_bdev = bdget_disk(disk, 0);
397 if (!bio->bi_bdev) {
398 ret = -ENODEV;
399 goto out_unmap;
400 }
401
e9fc63d6 402 if (meta_buffer && meta_len) {
0b7f1f26
KB
403 struct bio_integrity_payload *bip;
404
405 meta = kmalloc(meta_len, GFP_KERNEL);
406 if (!meta) {
407 ret = -ENOMEM;
408 goto out_unmap;
409 }
410
411 if (write) {
412 if (copy_from_user(meta, meta_buffer,
413 meta_len)) {
414 ret = -EFAULT;
415 goto out_free_meta;
416 }
417 }
418
419 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB
420 if (IS_ERR(bip)) {
421 ret = PTR_ERR(bip);
0b7f1f26
KB
422 goto out_free_meta;
423 }
424
425 bip->bip_iter.bi_size = meta_len;
426 bip->bip_iter.bi_sector = meta_seed;
427
428 ret = bio_integrity_add_page(bio, virt_to_page(meta),
429 meta_len, offset_in_page(meta));
430 if (ret != meta_len) {
431 ret = -ENOMEM;
432 goto out_free_meta;
433 }
434 }
435 }
436 submit:
437 blk_execute_rq(req->q, disk, req, 0);
438 ret = req->errors;
21d34711 439 if (result)
d49187e9 440 *result = le32_to_cpu(nvme_req(req)->result.u32);
0b7f1f26
KB
441 if (meta && !ret && !write) {
442 if (copy_to_user(meta_buffer, meta, meta_len))
443 ret = -EFAULT;
444 }
445 out_free_meta:
446 kfree(meta);
447 out_unmap:
448 if (bio) {
449 if (disk && bio->bi_bdev)
450 bdput(bio->bi_bdev);
451 blk_rq_unmap_user(bio);
452 }
21d34711
CH
453 out:
454 blk_mq_free_request(req);
455 return ret;
456}
457
0b7f1f26
KB
458int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
459 void __user *ubuffer, unsigned bufflen, u32 *result,
460 unsigned timeout)
461{
462 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
463 result, timeout);
464}
465
038bd4cb
SG
466static void nvme_keep_alive_end_io(struct request *rq, int error)
467{
468 struct nvme_ctrl *ctrl = rq->end_io_data;
469
470 blk_mq_free_request(rq);
471
472 if (error) {
473 dev_err(ctrl->device,
474 "failed nvme_keep_alive_end_io error=%d\n", error);
475 return;
476 }
477
478 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
479}
480
481static int nvme_keep_alive(struct nvme_ctrl *ctrl)
482{
483 struct nvme_command c;
484 struct request *rq;
485
486 memset(&c, 0, sizeof(c));
487 c.common.opcode = nvme_admin_keep_alive;
488
489 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
490 NVME_QID_ANY);
491 if (IS_ERR(rq))
492 return PTR_ERR(rq);
493
494 rq->timeout = ctrl->kato * HZ;
495 rq->end_io_data = ctrl;
496
497 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
498
499 return 0;
500}
501
502static void nvme_keep_alive_work(struct work_struct *work)
503{
504 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
505 struct nvme_ctrl, ka_work);
506
507 if (nvme_keep_alive(ctrl)) {
508 /* allocation failure, reset the controller */
509 dev_err(ctrl->device, "keep-alive failed\n");
510 ctrl->ops->reset_ctrl(ctrl);
511 return;
512 }
513}
514
515void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
516{
517 if (unlikely(ctrl->kato == 0))
518 return;
519
520 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
521 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
522}
523EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
524
525void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
526{
527 if (unlikely(ctrl->kato == 0))
528 return;
529
530 cancel_delayed_work_sync(&ctrl->ka_work);
531}
532EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
533
1c63dc66 534int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH
535{
536 struct nvme_command c = { };
537 int error;
538
539 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
540 c.identify.opcode = nvme_admin_identify;
fa606826 541 c.identify.cns = cpu_to_le32(NVME_ID_CNS_CTRL);
21d34711
CH
542
543 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
544 if (!*id)
545 return -ENOMEM;
546
547 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
548 sizeof(struct nvme_id_ctrl));
549 if (error)
550 kfree(*id);
551 return error;
552}
553
540c801c
KB
554static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
555{
556 struct nvme_command c = { };
557
558 c.identify.opcode = nvme_admin_identify;
fa606826 559 c.identify.cns = cpu_to_le32(NVME_ID_CNS_NS_ACTIVE_LIST);
540c801c
KB
560 c.identify.nsid = cpu_to_le32(nsid);
561 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
562}
563
1c63dc66 564int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH
565 struct nvme_id_ns **id)
566{
567 struct nvme_command c = { };
568 int error;
569
570 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
571 c.identify.opcode = nvme_admin_identify,
572 c.identify.nsid = cpu_to_le32(nsid),
573
574 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
575 if (!*id)
576 return -ENOMEM;
577
578 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
579 sizeof(struct nvme_id_ns));
580 if (error)
581 kfree(*id);
582 return error;
583}
584
1c63dc66 585int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
1a6fe74d 586 void *buffer, size_t buflen, u32 *result)
21d34711
CH
587{
588 struct nvme_command c;
d49187e9 589 union nvme_result res;
1cb3cce5 590 int ret;
21d34711
CH
591
592 memset(&c, 0, sizeof(c));
593 c.features.opcode = nvme_admin_get_features;
594 c.features.nsid = cpu_to_le32(nsid);
21d34711
CH
595 c.features.fid = cpu_to_le32(fid);
596
d49187e9 597 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, buffer, buflen, 0,
eb71f435 598 NVME_QID_ANY, 0, 0);
9b47f77a 599 if (ret >= 0 && result)
d49187e9 600 *result = le32_to_cpu(res.u32);
1cb3cce5 601 return ret;
21d34711
CH
602}
603
1c63dc66 604int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
1a6fe74d 605 void *buffer, size_t buflen, u32 *result)
21d34711
CH
606{
607 struct nvme_command c;
d49187e9 608 union nvme_result res;
1cb3cce5 609 int ret;
21d34711
CH
610
611 memset(&c, 0, sizeof(c));
612 c.features.opcode = nvme_admin_set_features;
21d34711
CH
613 c.features.fid = cpu_to_le32(fid);
614 c.features.dword11 = cpu_to_le32(dword11);
615
d49187e9 616 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1a6fe74d 617 buffer, buflen, 0, NVME_QID_ANY, 0, 0);
9b47f77a 618 if (ret >= 0 && result)
d49187e9 619 *result = le32_to_cpu(res.u32);
1cb3cce5 620 return ret;
21d34711
CH
621}
622
1c63dc66 623int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH
624{
625 struct nvme_command c = { };
626 int error;
627
628 c.common.opcode = nvme_admin_get_log_page,
629 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
630 c.common.cdw10[0] = cpu_to_le32(
631 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
632 NVME_LOG_SMART),
633
634 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
635 if (!*log)
636 return -ENOMEM;
637
638 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
639 sizeof(struct nvme_smart_log));
640 if (error)
641 kfree(*log);
642 return error;
643}
1673f1f0 644
9a0be7ab
CH
645int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
646{
647 u32 q_count = (*count - 1) | ((*count - 1) << 16);
648 u32 result;
649 int status, nr_io_queues;
650
1a6fe74d 651 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
9a0be7ab 652 &result);
f5fa90dc 653 if (status < 0)
9a0be7ab
CH
654 return status;
655
f5fa90dc
CH
656 /*
657 * Degraded controllers might return an error when setting the queue
658 * count. We still want to be able to bring them online and offer
659 * access to the admin queue, as that might be only way to fix them up.
660 */
661 if (status > 0) {
662 dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
663 *count = 0;
664 } else {
665 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
666 *count = min(*count, nr_io_queues);
667 }
668
9a0be7ab
CH
669 return 0;
670}
576d55d6 671EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 672
1673f1f0
CH
673static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
674{
675 struct nvme_user_io io;
676 struct nvme_command c;
677 unsigned length, meta_len;
678 void __user *metadata;
679
680 if (copy_from_user(&io, uio, sizeof(io)))
681 return -EFAULT;
63088ec7
KB
682 if (io.flags)
683 return -EINVAL;
1673f1f0
CH
684
685 switch (io.opcode) {
686 case nvme_cmd_write:
687 case nvme_cmd_read:
688 case nvme_cmd_compare:
689 break;
690 default:
691 return -EINVAL;
692 }
693
694 length = (io.nblocks + 1) << ns->lba_shift;
695 meta_len = (io.nblocks + 1) * ns->ms;
696 metadata = (void __user *)(uintptr_t)io.metadata;
697
698 if (ns->ext) {
699 length += meta_len;
700 meta_len = 0;
701 } else if (meta_len) {
702 if ((io.metadata & 3) || !io.metadata)
703 return -EINVAL;
704 }
705
706 memset(&c, 0, sizeof(c));
707 c.rw.opcode = io.opcode;
708 c.rw.flags = io.flags;
709 c.rw.nsid = cpu_to_le32(ns->ns_id);
710 c.rw.slba = cpu_to_le64(io.slba);
711 c.rw.length = cpu_to_le16(io.nblocks);
712 c.rw.control = cpu_to_le16(io.control);
713 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
714 c.rw.reftag = cpu_to_le32(io.reftag);
715 c.rw.apptag = cpu_to_le16(io.apptag);
716 c.rw.appmask = cpu_to_le16(io.appmask);
717
718 return __nvme_submit_user_cmd(ns->queue, &c,
719 (void __user *)(uintptr_t)io.addr, length,
720 metadata, meta_len, io.slba, NULL, 0);
721}
722
f3ca80fc 723static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH
724 struct nvme_passthru_cmd __user *ucmd)
725{
726 struct nvme_passthru_cmd cmd;
727 struct nvme_command c;
728 unsigned timeout = 0;
729 int status;
730
731 if (!capable(CAP_SYS_ADMIN))
732 return -EACCES;
733 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
734 return -EFAULT;
63088ec7
KB
735 if (cmd.flags)
736 return -EINVAL;
1673f1f0
CH
737
738 memset(&c, 0, sizeof(c));
739 c.common.opcode = cmd.opcode;
740 c.common.flags = cmd.flags;
741 c.common.nsid = cpu_to_le32(cmd.nsid);
742 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
743 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
744 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
745 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
746 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
747 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
748 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
749 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
750
751 if (cmd.timeout_ms)
752 timeout = msecs_to_jiffies(cmd.timeout_ms);
753
754 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 755 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH
756 &cmd.result, timeout);
757 if (status >= 0) {
758 if (put_user(cmd.result, &ucmd->result))
759 return -EFAULT;
760 }
761
762 return status;
763}
764
765static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
766 unsigned int cmd, unsigned long arg)
767{
768 struct nvme_ns *ns = bdev->bd_disk->private_data;
769
770 switch (cmd) {
771 case NVME_IOCTL_ID:
772 force_successful_syscall_return();
773 return ns->ns_id;
774 case NVME_IOCTL_ADMIN_CMD:
775 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
776 case NVME_IOCTL_IO_CMD:
777 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
778 case NVME_IOCTL_SUBMIT_IO:
779 return nvme_submit_io(ns, (void __user *)arg);
44907332 780#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH
781 case SG_GET_VERSION_NUM:
782 return nvme_sg_get_version_num((void __user *)arg);
783 case SG_IO:
784 return nvme_sg_io(ns, (void __user *)arg);
44907332 785#endif
1673f1f0
CH
786 default:
787 return -ENOTTY;
788 }
789}
790
791#ifdef CONFIG_COMPAT
792static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
793 unsigned int cmd, unsigned long arg)
794{
795 switch (cmd) {
796 case SG_IO:
797 return -ENOIOCTLCMD;
798 }
799 return nvme_ioctl(bdev, mode, cmd, arg);
800}
801#else
802#define nvme_compat_ioctl NULL
803#endif
804
805static int nvme_open(struct block_device *bdev, fmode_t mode)
806{
807 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
808}
809
810static void nvme_release(struct gendisk *disk, fmode_t mode)
811{
e439bb12
SG
812 struct nvme_ns *ns = disk->private_data;
813
814 module_put(ns->ctrl->ops->module);
815 nvme_put_ns(ns);
1673f1f0
CH
816}
817
818static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
819{
820 /* some standard values */
821 geo->heads = 1 << 6;
822 geo->sectors = 1 << 5;
823 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
824 return 0;
825}
826
827#ifdef CONFIG_BLK_DEV_INTEGRITY
828static void nvme_init_integrity(struct nvme_ns *ns)
829{
830 struct blk_integrity integrity;
831
fa9a89fc 832 memset(&integrity, 0, sizeof(integrity));
1673f1f0
CH
833 switch (ns->pi_type) {
834 case NVME_NS_DPS_PI_TYPE3:
835 integrity.profile = &t10_pi_type3_crc;
ba36c21b
NB
836 integrity.tag_size = sizeof(u16) + sizeof(u32);
837 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH
838 break;
839 case NVME_NS_DPS_PI_TYPE1:
840 case NVME_NS_DPS_PI_TYPE2:
841 integrity.profile = &t10_pi_type1_crc;
ba36c21b
NB
842 integrity.tag_size = sizeof(u16);
843 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH
844 break;
845 default:
846 integrity.profile = NULL;
847 break;
848 }
849 integrity.tuple_size = ns->ms;
850 blk_integrity_register(ns->disk, &integrity);
851 blk_queue_max_integrity_segments(ns->queue, 1);
852}
853#else
854static void nvme_init_integrity(struct nvme_ns *ns)
855{
856}
857#endif /* CONFIG_BLK_DEV_INTEGRITY */
858
859static void nvme_config_discard(struct nvme_ns *ns)
860{
08095e70 861 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 862 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB
863
864 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
865 ns->queue->limits.discard_zeroes_data = 1;
866 else
867 ns->queue->limits.discard_zeroes_data = 0;
868
1673f1f0
CH
869 ns->queue->limits.discard_alignment = logical_block_size;
870 ns->queue->limits.discard_granularity = logical_block_size;
bd0fc288 871 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1673f1f0
CH
872 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
873}
874
ac81bfa9 875static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
1673f1f0 876{
ac81bfa9 877 if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
b0b4e09c 878 dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
1673f1f0
CH
879 return -ENODEV;
880 }
1673f1f0 881
ac81bfa9
MB
882 if ((*id)->ncap == 0) {
883 kfree(*id);
884 return -ENODEV;
1673f1f0
CH
885 }
886
8ef2074d 887 if (ns->ctrl->vs >= NVME_VS(1, 1, 0))
ac81bfa9 888 memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
8ef2074d 889 if (ns->ctrl->vs >= NVME_VS(1, 2, 0))
ac81bfa9
MB
890 memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid));
891
892 return 0;
893}
894
895static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
896{
897 struct nvme_ns *ns = disk->private_data;
898 u8 lbaf, pi_type;
899 u16 old_ms;
900 unsigned short bs;
2b9b6e86 901
1673f1f0
CH
902 old_ms = ns->ms;
903 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
904 ns->lba_shift = id->lbaf[lbaf].ds;
905 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
906 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
907
908 /*
909 * If identify namespace failed, use default 512 byte block size so
910 * block layer can use before failing read/write for 0 capacity.
911 */
912 if (ns->lba_shift == 0)
913 ns->lba_shift = 9;
914 bs = 1 << ns->lba_shift;
1673f1f0
CH
915 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
916 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
917 id->dps & NVME_NS_DPS_PI_MASK : 0;
918
919 blk_mq_freeze_queue(disk->queue);
920 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
921 ns->ms != old_ms ||
922 bs != queue_logical_block_size(disk->queue) ||
923 (ns->ms && ns->ext)))
924 blk_integrity_unregister(disk);
925
926 ns->pi_type = pi_type;
927 blk_queue_logical_block_size(ns->queue, bs);
928
4b9d5b15 929 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 930 nvme_init_integrity(ns);
1673f1f0
CH
931 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
932 set_capacity(disk, 0);
933 else
934 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
935
936 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
937 nvme_config_discard(ns);
938 blk_mq_unfreeze_queue(disk->queue);
ac81bfa9 939}
1673f1f0 940
ac81bfa9
MB
941static int nvme_revalidate_disk(struct gendisk *disk)
942{
943 struct nvme_ns *ns = disk->private_data;
944 struct nvme_id_ns *id = NULL;
945 int ret;
946
947 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
948 set_capacity(disk, 0);
949 return -ENODEV;
950 }
951
952 ret = nvme_revalidate_ns(ns, &id);
953 if (ret)
954 return ret;
955
956 __nvme_revalidate_disk(disk, id);
1673f1f0 957 kfree(id);
ac81bfa9 958
1673f1f0
CH
959 return 0;
960}
961
962static char nvme_pr_type(enum pr_type type)
963{
964 switch (type) {
965 case PR_WRITE_EXCLUSIVE:
966 return 1;
967 case PR_EXCLUSIVE_ACCESS:
968 return 2;
969 case PR_WRITE_EXCLUSIVE_REG_ONLY:
970 return 3;
971 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
972 return 4;
973 case PR_WRITE_EXCLUSIVE_ALL_REGS:
974 return 5;
975 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
976 return 6;
977 default:
978 return 0;
979 }
980};
981
982static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
983 u64 key, u64 sa_key, u8 op)
984{
985 struct nvme_ns *ns = bdev->bd_disk->private_data;
986 struct nvme_command c;
987 u8 data[16] = { 0, };
988
989 put_unaligned_le64(key, &data[0]);
990 put_unaligned_le64(sa_key, &data[8]);
991
992 memset(&c, 0, sizeof(c));
993 c.common.opcode = op;
994 c.common.nsid = cpu_to_le32(ns->ns_id);
995 c.common.cdw10[0] = cpu_to_le32(cdw10);
996
997 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
998}
999
1000static int nvme_pr_register(struct block_device *bdev, u64 old,
1001 u64 new, unsigned flags)
1002{
1003 u32 cdw10;
1004
1005 if (flags & ~PR_FL_IGNORE_KEY)
1006 return -EOPNOTSUPP;
1007
1008 cdw10 = old ? 2 : 0;
1009 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1010 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1011 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1012}
1013
1014static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1015 enum pr_type type, unsigned flags)
1016{
1017 u32 cdw10;
1018
1019 if (flags & ~PR_FL_IGNORE_KEY)
1020 return -EOPNOTSUPP;
1021
1022 cdw10 = nvme_pr_type(type) << 8;
1023 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1024 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1025}
1026
1027static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1028 enum pr_type type, bool abort)
1029{
1030 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1031 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1032}
1033
1034static int nvme_pr_clear(struct block_device *bdev, u64 key)
1035{
8c0b3915 1036 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH
1037 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1038}
1039
1040static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1041{
1042 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1043 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1044}
1045
1046static const struct pr_ops nvme_pr_ops = {
1047 .pr_register = nvme_pr_register,
1048 .pr_reserve = nvme_pr_reserve,
1049 .pr_release = nvme_pr_release,
1050 .pr_preempt = nvme_pr_preempt,
1051 .pr_clear = nvme_pr_clear,
1052};
1053
5bae7f73 1054static const struct block_device_operations nvme_fops = {
1673f1f0
CH
1055 .owner = THIS_MODULE,
1056 .ioctl = nvme_ioctl,
1057 .compat_ioctl = nvme_compat_ioctl,
1058 .open = nvme_open,
1059 .release = nvme_release,
1060 .getgeo = nvme_getgeo,
1061 .revalidate_disk= nvme_revalidate_disk,
1062 .pr_ops = &nvme_pr_ops,
1063};
1064
5fd4ce1b
CH
1065static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1066{
1067 unsigned long timeout =
1068 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1069 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1070 int ret;
1071
1072 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
0df1e4f5
KB
1073 if (csts == ~0)
1074 return -ENODEV;
5fd4ce1b
CH
1075 if ((csts & NVME_CSTS_RDY) == bit)
1076 break;
1077
1078 msleep(100);
1079 if (fatal_signal_pending(current))
1080 return -EINTR;
1081 if (time_after(jiffies, timeout)) {
1b3c47c1 1082 dev_err(ctrl->device,
5fd4ce1b
CH
1083 "Device not ready; aborting %s\n", enabled ?
1084 "initialisation" : "reset");
1085 return -ENODEV;
1086 }
1087 }
1088
1089 return ret;
1090}
1091
1092/*
1093 * If the device has been passed off to us in an enabled state, just clear
1094 * the enabled bit. The spec says we should set the 'shutdown notification
1095 * bits', but doing so may cause the device to complete commands to the
1096 * admin queue ... and we don't know what memory that might be pointing at!
1097 */
1098int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1099{
1100 int ret;
1101
1102 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1103 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1104
1105 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1106 if (ret)
1107 return ret;
54adc010
GP
1108
1109 /* Checking for ctrl->tagset is a trick to avoid sleeping on module
1110 * load, since we only need the quirk on reset_controller. Notice
1111 * that the HGST device needs this delay only in firmware activation
1112 * procedure; unfortunately we have no (easy) way to verify this.
1113 */
1114 if ((ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) && ctrl->tagset)
1115 msleep(NVME_QUIRK_DELAY_AMOUNT);
1116
5fd4ce1b
CH
1117 return nvme_wait_ready(ctrl, cap, false);
1118}
576d55d6 1119EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH
1120
1121int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1122{
1123 /*
1124 * Default to a 4K page size, with the intention to update this
1125 * path in the future to accomodate architectures with differing
1126 * kernel and IO page sizes.
1127 */
1128 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1129 int ret;
1130
1131 if (page_shift < dev_page_min) {
1b3c47c1 1132 dev_err(ctrl->device,
5fd4ce1b
CH
1133 "Minimum device page size %u too large for host (%u)\n",
1134 1 << dev_page_min, 1 << page_shift);
1135 return -ENODEV;
1136 }
1137
1138 ctrl->page_size = 1 << page_shift;
1139
1140 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1141 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1142 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1143 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1144 ctrl->ctrl_config |= NVME_CC_ENABLE;
1145
1146 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1147 if (ret)
1148 return ret;
1149 return nvme_wait_ready(ctrl, cap, true);
1150}
576d55d6 1151EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH
1152
1153int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1154{
1155 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1156 u32 csts;
1157 int ret;
1158
1159 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1160 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1161
1162 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1163 if (ret)
1164 return ret;
1165
1166 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1167 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1168 break;
1169
1170 msleep(100);
1171 if (fatal_signal_pending(current))
1172 return -EINTR;
1173 if (time_after(jiffies, timeout)) {
1b3c47c1 1174 dev_err(ctrl->device,
5fd4ce1b
CH
1175 "Device shutdown incomplete; abort shutdown\n");
1176 return -ENODEV;
1177 }
1178 }
1179
1180 return ret;
1181}
576d55d6 1182EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1183
da35825d
CH
1184static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1185 struct request_queue *q)
1186{
7c88cb00
JA
1187 bool vwc = false;
1188
da35825d 1189 if (ctrl->max_hw_sectors) {
45686b61
CH
1190 u32 max_segments =
1191 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1192
da35825d 1193 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1194 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH
1195 }
1196 if (ctrl->stripe_size)
1197 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1198 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA
1199 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1200 vwc = true;
1201 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH
1202}
1203
7fd8930f
CH
1204/*
1205 * Initialize the cached copies of the Identify data and various controller
1206 * register in our nvme_ctrl structure. This should be called as soon as
1207 * the admin queue is fully up and running.
1208 */
1209int nvme_init_identify(struct nvme_ctrl *ctrl)
1210{
1211 struct nvme_id_ctrl *id;
1212 u64 cap;
1213 int ret, page_shift;
a229dbf6 1214 u32 max_hw_sectors;
7fd8930f 1215
f3ca80fc
CH
1216 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1217 if (ret) {
1b3c47c1 1218 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH
1219 return ret;
1220 }
1221
7fd8930f
CH
1222 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1223 if (ret) {
1b3c47c1 1224 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH
1225 return ret;
1226 }
1227 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1228
8ef2074d 1229 if (ctrl->vs >= NVME_VS(1, 1, 0))
f3ca80fc
CH
1230 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1231
7fd8930f
CH
1232 ret = nvme_identify_ctrl(ctrl, &id);
1233 if (ret) {
1b3c47c1 1234 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH
1235 return -EIO;
1236 }
1237
118472ab 1238 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1239 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1240 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1241 ctrl->vwc = id->vwc;
931e1c22 1242 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH
1243 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1244 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1245 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1246 if (id->mdts)
a229dbf6 1247 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
7fd8930f 1248 else
a229dbf6
CH
1249 max_hw_sectors = UINT_MAX;
1250 ctrl->max_hw_sectors =
1251 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
7fd8930f
CH
1252
1253 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1254 unsigned int max_hw_sectors;
1255
1256 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1257 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1258 if (ctrl->max_hw_sectors) {
1259 ctrl->max_hw_sectors = min(max_hw_sectors,
1260 ctrl->max_hw_sectors);
1261 } else {
1262 ctrl->max_hw_sectors = max_hw_sectors;
1263 }
1264 }
1265
da35825d 1266 nvme_set_queue_limits(ctrl, ctrl->admin_q);
07bfcd09 1267 ctrl->sgls = le32_to_cpu(id->sgls);
038bd4cb 1268 ctrl->kas = le16_to_cpu(id->kas);
07bfcd09
CH
1269
1270 if (ctrl->ops->is_fabrics) {
1271 ctrl->icdoff = le16_to_cpu(id->icdoff);
1272 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1273 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1274 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1275
1276 /*
1277 * In fabrics we need to verify the cntlid matches the
1278 * admin connect
1279 */
1280 if (ctrl->cntlid != le16_to_cpu(id->cntlid))
1281 ret = -EINVAL;
038bd4cb
SG
1282
1283 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
1284 dev_err(ctrl->dev,
1285 "keep-alive support is mandatory for fabrics\n");
1286 ret = -EINVAL;
1287 }
07bfcd09
CH
1288 } else {
1289 ctrl->cntlid = le16_to_cpu(id->cntlid);
1290 }
da35825d 1291
7fd8930f 1292 kfree(id);
07bfcd09 1293 return ret;
7fd8930f 1294}
576d55d6 1295EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1296
f3ca80fc 1297static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1298{
f3ca80fc
CH
1299 struct nvme_ctrl *ctrl;
1300 int instance = iminor(inode);
1301 int ret = -ENODEV;
1673f1f0 1302
f3ca80fc
CH
1303 spin_lock(&dev_list_lock);
1304 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1305 if (ctrl->instance != instance)
1306 continue;
1307
1308 if (!ctrl->admin_q) {
1309 ret = -EWOULDBLOCK;
1310 break;
1311 }
1312 if (!kref_get_unless_zero(&ctrl->kref))
1313 break;
1314 file->private_data = ctrl;
1315 ret = 0;
1316 break;
1317 }
1318 spin_unlock(&dev_list_lock);
1319
1320 return ret;
1673f1f0
CH
1321}
1322
f3ca80fc 1323static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1324{
f3ca80fc
CH
1325 nvme_put_ctrl(file->private_data);
1326 return 0;
1327}
1328
bfd89471
CH
1329static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1330{
1331 struct nvme_ns *ns;
1332 int ret;
1333
1334 mutex_lock(&ctrl->namespaces_mutex);
1335 if (list_empty(&ctrl->namespaces)) {
1336 ret = -ENOTTY;
1337 goto out_unlock;
1338 }
1339
1340 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1341 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1342 dev_warn(ctrl->device,
bfd89471
CH
1343 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1344 ret = -EINVAL;
1345 goto out_unlock;
1346 }
1347
1b3c47c1 1348 dev_warn(ctrl->device,
bfd89471
CH
1349 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1350 kref_get(&ns->kref);
1351 mutex_unlock(&ctrl->namespaces_mutex);
1352
1353 ret = nvme_user_cmd(ctrl, ns, argp);
1354 nvme_put_ns(ns);
1355 return ret;
1356
1357out_unlock:
1358 mutex_unlock(&ctrl->namespaces_mutex);
1359 return ret;
1360}
1361
f3ca80fc
CH
1362static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1363 unsigned long arg)
1364{
1365 struct nvme_ctrl *ctrl = file->private_data;
1366 void __user *argp = (void __user *)arg;
f3ca80fc
CH
1367
1368 switch (cmd) {
1369 case NVME_IOCTL_ADMIN_CMD:
1370 return nvme_user_cmd(ctrl, NULL, argp);
1371 case NVME_IOCTL_IO_CMD:
bfd89471 1372 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1373 case NVME_IOCTL_RESET:
1b3c47c1 1374 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH
1375 return ctrl->ops->reset_ctrl(ctrl);
1376 case NVME_IOCTL_SUBSYS_RESET:
1377 return nvme_reset_subsystem(ctrl);
9ec3bb2f
KB
1378 case NVME_IOCTL_RESCAN:
1379 nvme_queue_scan(ctrl);
1380 return 0;
f3ca80fc
CH
1381 default:
1382 return -ENOTTY;
1383 }
1384}
1385
1386static const struct file_operations nvme_dev_fops = {
1387 .owner = THIS_MODULE,
1388 .open = nvme_dev_open,
1389 .release = nvme_dev_release,
1390 .unlocked_ioctl = nvme_dev_ioctl,
1391 .compat_ioctl = nvme_dev_ioctl,
1392};
1393
1394static ssize_t nvme_sysfs_reset(struct device *dev,
1395 struct device_attribute *attr, const char *buf,
1396 size_t count)
1397{
1398 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1399 int ret;
1400
1401 ret = ctrl->ops->reset_ctrl(ctrl);
1402 if (ret < 0)
1403 return ret;
1404 return count;
1673f1f0 1405}
f3ca80fc 1406static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1407
9ec3bb2f
KB
1408static ssize_t nvme_sysfs_rescan(struct device *dev,
1409 struct device_attribute *attr, const char *buf,
1410 size_t count)
1411{
1412 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1413
1414 nvme_queue_scan(ctrl);
1415 return count;
1416}
1417static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
1418
118472ab
KB
1419static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1420 char *buf)
1421{
40267efd 1422 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
118472ab
KB
1423 struct nvme_ctrl *ctrl = ns->ctrl;
1424 int serial_len = sizeof(ctrl->serial);
1425 int model_len = sizeof(ctrl->model);
1426
1427 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1428 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1429
1430 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1431 return sprintf(buf, "eui.%8phN\n", ns->eui);
1432
1433 while (ctrl->serial[serial_len - 1] == ' ')
1434 serial_len--;
1435 while (ctrl->model[model_len - 1] == ' ')
1436 model_len--;
1437
1438 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1439 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1440}
1441static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1442
2b9b6e86
KB
1443static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1444 char *buf)
1445{
40267efd 1446 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1447 return sprintf(buf, "%pU\n", ns->uuid);
1448}
1449static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1450
1451static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1452 char *buf)
1453{
40267efd 1454 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1455 return sprintf(buf, "%8phd\n", ns->eui);
1456}
1457static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1458
1459static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1460 char *buf)
1461{
40267efd 1462 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1463 return sprintf(buf, "%d\n", ns->ns_id);
1464}
1465static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1466
1467static struct attribute *nvme_ns_attrs[] = {
118472ab 1468 &dev_attr_wwid.attr,
2b9b6e86
KB
1469 &dev_attr_uuid.attr,
1470 &dev_attr_eui.attr,
1471 &dev_attr_nsid.attr,
1472 NULL,
1473};
1474
1a353d85 1475static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
2b9b6e86
KB
1476 struct attribute *a, int n)
1477{
1478 struct device *dev = container_of(kobj, struct device, kobj);
40267efd 1479 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB
1480
1481 if (a == &dev_attr_uuid.attr) {
1482 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1483 return 0;
1484 }
1485 if (a == &dev_attr_eui.attr) {
1486 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1487 return 0;
1488 }
1489 return a->mode;
1490}
1491
1492static const struct attribute_group nvme_ns_attr_group = {
1493 .attrs = nvme_ns_attrs,
1a353d85 1494 .is_visible = nvme_ns_attrs_are_visible,
2b9b6e86
KB
1495};
1496
931e1c22 1497#define nvme_show_str_function(field) \
779ff756
KB
1498static ssize_t field##_show(struct device *dev, \
1499 struct device_attribute *attr, char *buf) \
1500{ \
1501 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1502 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1503} \
1504static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1505
931e1c22
ML
1506#define nvme_show_int_function(field) \
1507static ssize_t field##_show(struct device *dev, \
1508 struct device_attribute *attr, char *buf) \
1509{ \
1510 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1511 return sprintf(buf, "%d\n", ctrl->field); \
1512} \
1513static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1514
1515nvme_show_str_function(model);
1516nvme_show_str_function(serial);
1517nvme_show_str_function(firmware_rev);
1518nvme_show_int_function(cntlid);
779ff756 1519
1a353d85
ML
1520static ssize_t nvme_sysfs_delete(struct device *dev,
1521 struct device_attribute *attr, const char *buf,
1522 size_t count)
1523{
1524 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1525
1526 if (device_remove_file_self(dev, attr))
1527 ctrl->ops->delete_ctrl(ctrl);
1528 return count;
1529}
1530static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
1531
1532static ssize_t nvme_sysfs_show_transport(struct device *dev,
1533 struct device_attribute *attr,
1534 char *buf)
1535{
1536 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1537
1538 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
1539}
1540static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
1541
1542static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
1543 struct device_attribute *attr,
1544 char *buf)
1545{
1546 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1547
1548 return snprintf(buf, PAGE_SIZE, "%s\n",
1549 ctrl->ops->get_subsysnqn(ctrl));
1550}
1551static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
1552
1553static ssize_t nvme_sysfs_show_address(struct device *dev,
1554 struct device_attribute *attr,
1555 char *buf)
1556{
1557 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1558
1559 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
1560}
1561static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
1562
779ff756
KB
1563static struct attribute *nvme_dev_attrs[] = {
1564 &dev_attr_reset_controller.attr,
9ec3bb2f 1565 &dev_attr_rescan_controller.attr,
779ff756
KB
1566 &dev_attr_model.attr,
1567 &dev_attr_serial.attr,
1568 &dev_attr_firmware_rev.attr,
931e1c22 1569 &dev_attr_cntlid.attr,
1a353d85
ML
1570 &dev_attr_delete_controller.attr,
1571 &dev_attr_transport.attr,
1572 &dev_attr_subsysnqn.attr,
1573 &dev_attr_address.attr,
779ff756
KB
1574 NULL
1575};
1576
1a353d85
ML
1577#define CHECK_ATTR(ctrl, a, name) \
1578 if ((a) == &dev_attr_##name.attr && \
1579 !(ctrl)->ops->get_##name) \
1580 return 0
1581
1582static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
1583 struct attribute *a, int n)
1584{
1585 struct device *dev = container_of(kobj, struct device, kobj);
1586 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1587
1588 if (a == &dev_attr_delete_controller.attr) {
1589 if (!ctrl->ops->delete_ctrl)
1590 return 0;
1591 }
1592
1593 CHECK_ATTR(ctrl, a, subsysnqn);
1594 CHECK_ATTR(ctrl, a, address);
1595
1596 return a->mode;
1597}
1598
779ff756 1599static struct attribute_group nvme_dev_attrs_group = {
1a353d85
ML
1600 .attrs = nvme_dev_attrs,
1601 .is_visible = nvme_dev_attrs_are_visible,
779ff756
KB
1602};
1603
1604static const struct attribute_group *nvme_dev_attr_groups[] = {
1605 &nvme_dev_attrs_group,
1606 NULL,
1607};
1608
5bae7f73
CH
1609static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1610{
1611 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1612 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1613
1614 return nsa->ns_id - nsb->ns_id;
1615}
1616
32f0c4af 1617static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
5bae7f73 1618{
32f0c4af 1619 struct nvme_ns *ns, *ret = NULL;
69d3b8ac 1620
32f0c4af 1621 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73 1622 list_for_each_entry(ns, &ctrl->namespaces, list) {
32f0c4af
KB
1623 if (ns->ns_id == nsid) {
1624 kref_get(&ns->kref);
1625 ret = ns;
1626 break;
1627 }
5bae7f73
CH
1628 if (ns->ns_id > nsid)
1629 break;
1630 }
32f0c4af
KB
1631 mutex_unlock(&ctrl->namespaces_mutex);
1632 return ret;
5bae7f73
CH
1633}
1634
1635static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1636{
1637 struct nvme_ns *ns;
1638 struct gendisk *disk;
ac81bfa9
MB
1639 struct nvme_id_ns *id;
1640 char disk_name[DISK_NAME_LEN];
5bae7f73
CH
1641 int node = dev_to_node(ctrl->dev);
1642
1643 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1644 if (!ns)
1645 return;
1646
075790eb
KB
1647 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1648 if (ns->instance < 0)
1649 goto out_free_ns;
1650
5bae7f73
CH
1651 ns->queue = blk_mq_init_queue(ctrl->tagset);
1652 if (IS_ERR(ns->queue))
075790eb 1653 goto out_release_instance;
5bae7f73
CH
1654 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1655 ns->queue->queuedata = ns;
1656 ns->ctrl = ctrl;
1657
5bae7f73
CH
1658 kref_init(&ns->kref);
1659 ns->ns_id = nsid;
5bae7f73 1660 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73
CH
1661
1662 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1663 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73 1664
ac81bfa9 1665 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1666
ac81bfa9
MB
1667 if (nvme_revalidate_ns(ns, &id))
1668 goto out_free_queue;
1669
3dc87dd0
MB
1670 if (nvme_nvm_ns_supported(ns, id) &&
1671 nvme_nvm_register(ns, disk_name, node)) {
1672 dev_warn(ctrl->dev, "%s: LightNVM init failure\n", __func__);
1673 goto out_free_id;
1674 }
ac81bfa9 1675
3dc87dd0
MB
1676 disk = alloc_disk_node(0, node);
1677 if (!disk)
1678 goto out_free_id;
ac81bfa9 1679
3dc87dd0
MB
1680 disk->fops = &nvme_fops;
1681 disk->private_data = ns;
1682 disk->queue = ns->queue;
1683 disk->flags = GENHD_FL_EXT_DEVT;
1684 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
1685 ns->disk = disk;
1686
1687 __nvme_revalidate_disk(disk, id);
5bae7f73 1688
32f0c4af
KB
1689 mutex_lock(&ctrl->namespaces_mutex);
1690 list_add_tail(&ns->list, &ctrl->namespaces);
1691 mutex_unlock(&ctrl->namespaces_mutex);
1692
5bae7f73 1693 kref_get(&ctrl->kref);
ac81bfa9
MB
1694
1695 kfree(id);
1696
0d52c756 1697 device_add_disk(ctrl->device, ns->disk);
2b9b6e86
KB
1698 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1699 &nvme_ns_attr_group))
1700 pr_warn("%s: failed to create sysfs group for identification\n",
1701 ns->disk->disk_name);
3dc87dd0
MB
1702 if (ns->ndev && nvme_nvm_register_sysfs(ns))
1703 pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
1704 ns->disk->disk_name);
5bae7f73 1705 return;
ac81bfa9
MB
1706 out_free_id:
1707 kfree(id);
5bae7f73
CH
1708 out_free_queue:
1709 blk_cleanup_queue(ns->queue);
075790eb
KB
1710 out_release_instance:
1711 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH
1712 out_free_ns:
1713 kfree(ns);
1714}
1715
1716static void nvme_ns_remove(struct nvme_ns *ns)
1717{
646017a6
KB
1718 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1719 return;
69d3b8ac 1720
b0b4e09c 1721 if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
5bae7f73
CH
1722 if (blk_get_integrity(ns->disk))
1723 blk_integrity_unregister(ns->disk);
2b9b6e86
KB
1724 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1725 &nvme_ns_attr_group);
3dc87dd0
MB
1726 if (ns->ndev)
1727 nvme_nvm_unregister_sysfs(ns);
5bae7f73 1728 del_gendisk(ns->disk);
5bae7f73
CH
1729 blk_mq_abort_requeue_list(ns->queue);
1730 blk_cleanup_queue(ns->queue);
1731 }
32f0c4af
KB
1732
1733 mutex_lock(&ns->ctrl->namespaces_mutex);
5bae7f73 1734 list_del_init(&ns->list);
32f0c4af
KB
1735 mutex_unlock(&ns->ctrl->namespaces_mutex);
1736
5bae7f73
CH
1737 nvme_put_ns(ns);
1738}
1739
540c801c
KB
1740static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1741{
1742 struct nvme_ns *ns;
1743
32f0c4af 1744 ns = nvme_find_get_ns(ctrl, nsid);
540c801c 1745 if (ns) {
b0b4e09c 1746 if (ns->disk && revalidate_disk(ns->disk))
540c801c 1747 nvme_ns_remove(ns);
32f0c4af 1748 nvme_put_ns(ns);
540c801c
KB
1749 } else
1750 nvme_alloc_ns(ctrl, nsid);
1751}
1752
47b0e50a
SB
1753static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
1754 unsigned nsid)
1755{
1756 struct nvme_ns *ns, *next;
1757
1758 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1759 if (ns->ns_id > nsid)
1760 nvme_ns_remove(ns);
1761 }
1762}
1763
540c801c
KB
1764static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1765{
1766 struct nvme_ns *ns;
1767 __le32 *ns_list;
1768 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1769 int ret = 0;
1770
1771 ns_list = kzalloc(0x1000, GFP_KERNEL);
1772 if (!ns_list)
1773 return -ENOMEM;
1774
1775 for (i = 0; i < num_lists; i++) {
1776 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1777 if (ret)
47b0e50a 1778 goto free;
540c801c
KB
1779
1780 for (j = 0; j < min(nn, 1024U); j++) {
1781 nsid = le32_to_cpu(ns_list[j]);
1782 if (!nsid)
1783 goto out;
1784
1785 nvme_validate_ns(ctrl, nsid);
1786
1787 while (++prev < nsid) {
32f0c4af
KB
1788 ns = nvme_find_get_ns(ctrl, prev);
1789 if (ns) {
540c801c 1790 nvme_ns_remove(ns);
32f0c4af
KB
1791 nvme_put_ns(ns);
1792 }
540c801c
KB
1793 }
1794 }
1795 nn -= j;
1796 }
1797 out:
47b0e50a
SB
1798 nvme_remove_invalid_namespaces(ctrl, prev);
1799 free:
540c801c
KB
1800 kfree(ns_list);
1801 return ret;
1802}
1803
5955be21 1804static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73 1805{
5bae7f73
CH
1806 unsigned i;
1807
540c801c
KB
1808 for (i = 1; i <= nn; i++)
1809 nvme_validate_ns(ctrl, i);
1810
47b0e50a 1811 nvme_remove_invalid_namespaces(ctrl, nn);
5bae7f73
CH
1812}
1813
5955be21 1814static void nvme_scan_work(struct work_struct *work)
5bae7f73 1815{
5955be21
CH
1816 struct nvme_ctrl *ctrl =
1817 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1818 struct nvme_id_ctrl *id;
540c801c 1819 unsigned nn;
5bae7f73 1820
5955be21
CH
1821 if (ctrl->state != NVME_CTRL_LIVE)
1822 return;
1823
5bae7f73
CH
1824 if (nvme_identify_ctrl(ctrl, &id))
1825 return;
540c801c
KB
1826
1827 nn = le32_to_cpu(id->nn);
8ef2074d 1828 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
540c801c
KB
1829 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1830 if (!nvme_scan_ns_list(ctrl, nn))
1831 goto done;
1832 }
5955be21 1833 nvme_scan_ns_sequential(ctrl, nn);
540c801c 1834 done:
32f0c4af 1835 mutex_lock(&ctrl->namespaces_mutex);
540c801c 1836 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1837 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73
CH
1838 kfree(id);
1839}
5955be21
CH
1840
1841void nvme_queue_scan(struct nvme_ctrl *ctrl)
1842{
1843 /*
1844 * Do not queue new scan work when a controller is reset during
1845 * removal.
1846 */
1847 if (ctrl->state == NVME_CTRL_LIVE)
1848 schedule_work(&ctrl->scan_work);
1849}
1850EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73 1851
32f0c4af
KB
1852/*
1853 * This function iterates the namespace list unlocked to allow recovery from
1854 * controller failure. It is up to the caller to ensure the namespace list is
1855 * not modified by scan work while this function is executing.
1856 */
5bae7f73
CH
1857void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1858{
1859 struct nvme_ns *ns, *next;
1860
0ff9d4e1
KB
1861 /*
1862 * The dead states indicates the controller was not gracefully
1863 * disconnected. In that case, we won't be able to flush any data while
1864 * removing the namespaces' disks; fail all the queues now to avoid
1865 * potentially having to clean up the failed sync later.
1866 */
1867 if (ctrl->state == NVME_CTRL_DEAD)
1868 nvme_kill_queues(ctrl);
1869
5bae7f73
CH
1870 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1871 nvme_ns_remove(ns);
1872}
576d55d6 1873EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1874
f866fc42
CH
1875static void nvme_async_event_work(struct work_struct *work)
1876{
1877 struct nvme_ctrl *ctrl =
1878 container_of(work, struct nvme_ctrl, async_event_work);
1879
1880 spin_lock_irq(&ctrl->lock);
1881 while (ctrl->event_limit > 0) {
1882 int aer_idx = --ctrl->event_limit;
1883
1884 spin_unlock_irq(&ctrl->lock);
1885 ctrl->ops->submit_async_event(ctrl, aer_idx);
1886 spin_lock_irq(&ctrl->lock);
1887 }
1888 spin_unlock_irq(&ctrl->lock);
1889}
1890
7bf58533
CH
1891void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
1892 union nvme_result *res)
f866fc42 1893{
7bf58533
CH
1894 u32 result = le32_to_cpu(res->u32);
1895 bool done = true;
f866fc42 1896
7bf58533
CH
1897 switch (le16_to_cpu(status) >> 1) {
1898 case NVME_SC_SUCCESS:
1899 done = false;
1900 /*FALLTHRU*/
1901 case NVME_SC_ABORT_REQ:
f866fc42
CH
1902 ++ctrl->event_limit;
1903 schedule_work(&ctrl->async_event_work);
7bf58533
CH
1904 break;
1905 default:
1906 break;
f866fc42
CH
1907 }
1908
7bf58533 1909 if (done)
f866fc42
CH
1910 return;
1911
1912 switch (result & 0xff07) {
1913 case NVME_AER_NOTICE_NS_CHANGED:
1914 dev_info(ctrl->device, "rescanning\n");
1915 nvme_queue_scan(ctrl);
1916 break;
1917 default:
1918 dev_warn(ctrl->device, "async event result %08x\n", result);
1919 }
1920}
1921EXPORT_SYMBOL_GPL(nvme_complete_async_event);
1922
1923void nvme_queue_async_events(struct nvme_ctrl *ctrl)
1924{
1925 ctrl->event_limit = NVME_NR_AERS;
1926 schedule_work(&ctrl->async_event_work);
1927}
1928EXPORT_SYMBOL_GPL(nvme_queue_async_events);
1929
f3ca80fc
CH
1930static DEFINE_IDA(nvme_instance_ida);
1931
1932static int nvme_set_instance(struct nvme_ctrl *ctrl)
1933{
1934 int instance, error;
1935
1936 do {
1937 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1938 return -ENODEV;
1939
1940 spin_lock(&dev_list_lock);
1941 error = ida_get_new(&nvme_instance_ida, &instance);
1942 spin_unlock(&dev_list_lock);
1943 } while (error == -EAGAIN);
1944
1945 if (error)
1946 return -ENODEV;
1947
1948 ctrl->instance = instance;
1949 return 0;
1950}
1951
1952static void nvme_release_instance(struct nvme_ctrl *ctrl)
1953{
1954 spin_lock(&dev_list_lock);
1955 ida_remove(&nvme_instance_ida, ctrl->instance);
1956 spin_unlock(&dev_list_lock);
1957}
1958
53029b04 1959void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1960{
f866fc42 1961 flush_work(&ctrl->async_event_work);
5955be21
CH
1962 flush_work(&ctrl->scan_work);
1963 nvme_remove_namespaces(ctrl);
1964
53029b04 1965 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH
1966
1967 spin_lock(&dev_list_lock);
1968 list_del(&ctrl->node);
1969 spin_unlock(&dev_list_lock);
53029b04 1970}
576d55d6 1971EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB
1972
1973static void nvme_free_ctrl(struct kref *kref)
1974{
1975 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH
1976
1977 put_device(ctrl->device);
1978 nvme_release_instance(ctrl);
075790eb 1979 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH
1980
1981 ctrl->ops->free_ctrl(ctrl);
1982}
1983
1984void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1985{
1986 kref_put(&ctrl->kref, nvme_free_ctrl);
1987}
576d55d6 1988EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH
1989
1990/*
1991 * Initialize a NVMe controller structures. This needs to be called during
1992 * earliest initialization so that we have the initialized structured around
1993 * during probing.
1994 */
1995int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
1996 const struct nvme_ctrl_ops *ops, unsigned long quirks)
1997{
1998 int ret;
1999
bb8d261e
CH
2000 ctrl->state = NVME_CTRL_NEW;
2001 spin_lock_init(&ctrl->lock);
f3ca80fc 2002 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 2003 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH
2004 kref_init(&ctrl->kref);
2005 ctrl->dev = dev;
2006 ctrl->ops = ops;
2007 ctrl->quirks = quirks;
5955be21 2008 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f866fc42 2009 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
f3ca80fc
CH
2010
2011 ret = nvme_set_instance(ctrl);
2012 if (ret)
2013 goto out;
2014
779ff756 2015 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 2016 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 2017 ctrl, nvme_dev_attr_groups,
779ff756 2018 "nvme%d", ctrl->instance);
f3ca80fc
CH
2019 if (IS_ERR(ctrl->device)) {
2020 ret = PTR_ERR(ctrl->device);
2021 goto out_release_instance;
2022 }
2023 get_device(ctrl->device);
075790eb 2024 ida_init(&ctrl->ns_ida);
f3ca80fc 2025
f3ca80fc
CH
2026 spin_lock(&dev_list_lock);
2027 list_add_tail(&ctrl->node, &nvme_ctrl_list);
2028 spin_unlock(&dev_list_lock);
2029
2030 return 0;
f3ca80fc
CH
2031out_release_instance:
2032 nvme_release_instance(ctrl);
2033out:
2034 return ret;
2035}
576d55d6 2036EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 2037
69d9a99c
KB
2038/**
2039 * nvme_kill_queues(): Ends all namespace queues
2040 * @ctrl: the dead controller that needs to end
2041 *
2042 * Call this function when the driver determines it is unable to get the
2043 * controller in a state capable of servicing IO.
2044 */
2045void nvme_kill_queues(struct nvme_ctrl *ctrl)
2046{
2047 struct nvme_ns *ns;
2048
32f0c4af
KB
2049 mutex_lock(&ctrl->namespaces_mutex);
2050 list_for_each_entry(ns, &ctrl->namespaces, list) {
69d9a99c
KB
2051 /*
2052 * Revalidating a dead namespace sets capacity to 0. This will
2053 * end buffered writers dirtying pages that can't be synced.
2054 */
b0b4e09c 2055 if (ns->disk && !test_and_set_bit(NVME_NS_DEAD, &ns->flags))
69d9a99c
KB
2056 revalidate_disk(ns->disk);
2057
2058 blk_set_queue_dying(ns->queue);
2059 blk_mq_abort_requeue_list(ns->queue);
2060 blk_mq_start_stopped_hw_queues(ns->queue, true);
69d9a99c 2061 }
32f0c4af 2062 mutex_unlock(&ctrl->namespaces_mutex);
69d9a99c 2063}
237045fc 2064EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 2065
25646264 2066void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
2067{
2068 struct nvme_ns *ns;
2069
32f0c4af 2070 mutex_lock(&ctrl->namespaces_mutex);
a6eaa884 2071 list_for_each_entry(ns, &ctrl->namespaces, list)
3174dd33 2072 blk_mq_quiesce_queue(ns->queue);
32f0c4af 2073 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 2074}
576d55d6 2075EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 2076
25646264 2077void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
2078{
2079 struct nvme_ns *ns;
2080
32f0c4af
KB
2081 mutex_lock(&ctrl->namespaces_mutex);
2082 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac
SG
2083 blk_mq_start_stopped_hw_queues(ns->queue, true);
2084 blk_mq_kick_requeue_list(ns->queue);
2085 }
32f0c4af 2086 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 2087}
576d55d6 2088EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 2089
5bae7f73
CH
2090int __init nvme_core_init(void)
2091{
2092 int result;
2093
f3ca80fc
CH
2094 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2095 &nvme_dev_fops);
2096 if (result < 0)
b09dcf58 2097 return result;
f3ca80fc
CH
2098 else if (result > 0)
2099 nvme_char_major = result;
2100
2101 nvme_class = class_create(THIS_MODULE, "nvme");
2102 if (IS_ERR(nvme_class)) {
2103 result = PTR_ERR(nvme_class);
2104 goto unregister_chrdev;
2105 }
2106
5bae7f73 2107 return 0;
f3ca80fc
CH
2108
2109 unregister_chrdev:
2110 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
f3ca80fc 2111 return result;
5bae7f73
CH
2112}
2113
2114void nvme_core_exit(void)
2115{
f3ca80fc
CH
2116 class_destroy(nvme_class);
2117 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
5bae7f73 2118}
576d55d6
ML
2119
2120MODULE_LICENSE("GPL");
2121MODULE_VERSION("1.0");
2122module_init(nvme_core_init);
2123module_exit(nvme_core_exit);