]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/nvme/host/lightnvm.c
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[mirror_ubuntu-artful-kernel.git] / drivers / nvme / host / lightnvm.c
CommitLineData
ca064085
MB
1/*
2 * nvme-lightnvm.c - LightNVM NVMe device
3 *
4 * Copyright (C) 2014-2015 IT University of Copenhagen
5 * Initial release: Matias Bjorling <mb@lightnvm.io>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139,
19 * USA.
20 *
21 */
22
23#include "nvme.h"
24
ca064085
MB
25#include <linux/nvme.h>
26#include <linux/bitops.h>
27#include <linux/lightnvm.h>
28#include <linux/vmalloc.h>
84d4add7
MB
29#include <linux/sched/sysctl.h>
30#include <uapi/linux/lightnvm.h>
ca064085
MB
31
32enum nvme_nvm_admin_opcode {
33 nvme_nvm_admin_identity = 0xe2,
34 nvme_nvm_admin_get_l2p_tbl = 0xea,
35 nvme_nvm_admin_get_bb_tbl = 0xf2,
36 nvme_nvm_admin_set_bb_tbl = 0xf1,
37};
38
39struct nvme_nvm_hb_rw {
40 __u8 opcode;
41 __u8 flags;
42 __u16 command_id;
43 __le32 nsid;
44 __u64 rsvd2;
45 __le64 metadata;
46 __le64 prp1;
47 __le64 prp2;
48 __le64 spba;
49 __le16 length;
50 __le16 control;
51 __le32 dsmgmt;
52 __le64 slba;
53};
54
55struct nvme_nvm_ph_rw {
56 __u8 opcode;
57 __u8 flags;
58 __u16 command_id;
59 __le32 nsid;
60 __u64 rsvd2;
61 __le64 metadata;
62 __le64 prp1;
63 __le64 prp2;
64 __le64 spba;
65 __le16 length;
66 __le16 control;
67 __le32 dsmgmt;
68 __le64 resv;
69};
70
71struct nvme_nvm_identity {
72 __u8 opcode;
73 __u8 flags;
74 __u16 command_id;
75 __le32 nsid;
76 __u64 rsvd[2];
77 __le64 prp1;
78 __le64 prp2;
79 __le32 chnl_off;
80 __u32 rsvd11[5];
81};
82
83struct nvme_nvm_l2ptbl {
84 __u8 opcode;
85 __u8 flags;
86 __u16 command_id;
87 __le32 nsid;
88 __le32 cdw2[4];
89 __le64 prp1;
90 __le64 prp2;
91 __le64 slba;
92 __le32 nlb;
93 __le16 cdw14[6];
94};
95
11450469 96struct nvme_nvm_getbbtbl {
ca064085
MB
97 __u8 opcode;
98 __u8 flags;
99 __u16 command_id;
100 __le32 nsid;
101 __u64 rsvd[2];
102 __le64 prp1;
103 __le64 prp2;
11450469
MB
104 __le64 spba;
105 __u32 rsvd4[4];
106};
107
108struct nvme_nvm_setbbtbl {
109 __u8 opcode;
110 __u8 flags;
111 __u16 command_id;
112 __le32 nsid;
113 __le64 rsvd[2];
114 __le64 prp1;
115 __le64 prp2;
116 __le64 spba;
117 __le16 nlb;
118 __u8 value;
119 __u8 rsvd3;
120 __u32 rsvd4[3];
ca064085
MB
121};
122
123struct nvme_nvm_erase_blk {
124 __u8 opcode;
125 __u8 flags;
126 __u16 command_id;
127 __le32 nsid;
128 __u64 rsvd[2];
129 __le64 prp1;
130 __le64 prp2;
131 __le64 spba;
132 __le16 length;
133 __le16 control;
134 __le32 dsmgmt;
135 __le64 resv;
136};
137
138struct nvme_nvm_command {
139 union {
140 struct nvme_common_command common;
141 struct nvme_nvm_identity identity;
142 struct nvme_nvm_hb_rw hb_rw;
143 struct nvme_nvm_ph_rw ph_rw;
144 struct nvme_nvm_l2ptbl l2p;
11450469
MB
145 struct nvme_nvm_getbbtbl get_bb;
146 struct nvme_nvm_setbbtbl set_bb;
ca064085
MB
147 struct nvme_nvm_erase_blk erase;
148 };
149};
150
6dde1d6c 151#define NVME_NVM_LP_MLC_PAIRS 886
ca5927e7 152struct nvme_nvm_lp_mlc {
6f929702 153 __le16 num_pairs;
6dde1d6c 154 __u8 pairs[NVME_NVM_LP_MLC_PAIRS];
ca5927e7
MB
155};
156
157struct nvme_nvm_lp_tbl {
158 __u8 id[8];
159 struct nvme_nvm_lp_mlc mlc;
160};
161
ca064085
MB
162struct nvme_nvm_id_group {
163 __u8 mtype;
164 __u8 fmtype;
165 __le16 res16;
166 __u8 num_ch;
167 __u8 num_lun;
168 __u8 num_pln;
36d5dbc6 169 __u8 rsvd1;
ca064085
MB
170 __le16 num_blk;
171 __le16 num_pg;
172 __le16 fpg_sz;
173 __le16 csecs;
174 __le16 sos;
36d5dbc6 175 __le16 rsvd2;
ca064085
MB
176 __le32 trdt;
177 __le32 trdm;
178 __le32 tprt;
179 __le32 tprm;
180 __le32 tbet;
181 __le32 tbem;
182 __le32 mpos;
12be5edf 183 __le32 mccap;
ca064085 184 __le16 cpar;
ca5927e7
MB
185 __u8 reserved[10];
186 struct nvme_nvm_lp_tbl lptbl;
ca064085
MB
187} __packed;
188
189struct nvme_nvm_addr_format {
190 __u8 ch_offset;
191 __u8 ch_len;
192 __u8 lun_offset;
193 __u8 lun_len;
194 __u8 pln_offset;
195 __u8 pln_len;
196 __u8 blk_offset;
197 __u8 blk_len;
198 __u8 pg_offset;
199 __u8 pg_len;
200 __u8 sect_offset;
201 __u8 sect_len;
202 __u8 res[4];
203} __packed;
204
205struct nvme_nvm_id {
206 __u8 ver_id;
207 __u8 vmnt;
208 __u8 cgrps;
dad1b009 209 __u8 res;
ca064085
MB
210 __le32 cap;
211 __le32 dom;
212 struct nvme_nvm_addr_format ppaf;
dad1b009 213 __u8 resv[228];
ca064085
MB
214 struct nvme_nvm_id_group groups[4];
215} __packed;
216
11450469
MB
217struct nvme_nvm_bb_tbl {
218 __u8 tblid[4];
219 __le16 verid;
220 __le16 revid;
221 __le32 rvsd1;
222 __le32 tblks;
223 __le32 tfact;
224 __le32 tgrown;
225 __le32 tdresv;
226 __le32 thresv;
227 __le32 rsvd2[8];
228 __u8 blk[0];
229};
230
ca064085
MB
231/*
232 * Check we didn't inadvertently grow the command struct
233 */
234static inline void _nvme_nvm_check_size(void)
235{
236 BUILD_BUG_ON(sizeof(struct nvme_nvm_identity) != 64);
237 BUILD_BUG_ON(sizeof(struct nvme_nvm_hb_rw) != 64);
238 BUILD_BUG_ON(sizeof(struct nvme_nvm_ph_rw) != 64);
11450469
MB
239 BUILD_BUG_ON(sizeof(struct nvme_nvm_getbbtbl) != 64);
240 BUILD_BUG_ON(sizeof(struct nvme_nvm_setbbtbl) != 64);
ca064085
MB
241 BUILD_BUG_ON(sizeof(struct nvme_nvm_l2ptbl) != 64);
242 BUILD_BUG_ON(sizeof(struct nvme_nvm_erase_blk) != 64);
243 BUILD_BUG_ON(sizeof(struct nvme_nvm_id_group) != 960);
48d663a3 244 BUILD_BUG_ON(sizeof(struct nvme_nvm_addr_format) != 16);
0add5e8e 245 BUILD_BUG_ON(sizeof(struct nvme_nvm_id) != NVME_IDENTIFY_DATA_SIZE);
48d663a3 246 BUILD_BUG_ON(sizeof(struct nvme_nvm_bb_tbl) != 64);
ca064085
MB
247}
248
249static int init_grps(struct nvm_id *nvm_id, struct nvme_nvm_id *nvme_nvm_id)
250{
251 struct nvme_nvm_id_group *src;
252 struct nvm_id_group *dst;
19bd6fe7
MB
253
254 if (nvme_nvm_id->cgrps != 1)
255 return -EINVAL;
256
257 src = &nvme_nvm_id->groups[0];
258 dst = &nvm_id->grp;
259
260 dst->mtype = src->mtype;
261 dst->fmtype = src->fmtype;
262 dst->num_ch = src->num_ch;
263 dst->num_lun = src->num_lun;
264 dst->num_pln = src->num_pln;
265
266 dst->num_pg = le16_to_cpu(src->num_pg);
267 dst->num_blk = le16_to_cpu(src->num_blk);
268 dst->fpg_sz = le16_to_cpu(src->fpg_sz);
269 dst->csecs = le16_to_cpu(src->csecs);
270 dst->sos = le16_to_cpu(src->sos);
271
272 dst->trdt = le32_to_cpu(src->trdt);
273 dst->trdm = le32_to_cpu(src->trdm);
274 dst->tprt = le32_to_cpu(src->tprt);
275 dst->tprm = le32_to_cpu(src->tprm);
276 dst->tbet = le32_to_cpu(src->tbet);
277 dst->tbem = le32_to_cpu(src->tbem);
278 dst->mpos = le32_to_cpu(src->mpos);
279 dst->mccap = le32_to_cpu(src->mccap);
280
281 dst->cpar = le16_to_cpu(src->cpar);
282
283 if (dst->fmtype == NVM_ID_FMTYPE_MLC) {
284 memcpy(dst->lptbl.id, src->lptbl.id, 8);
285 dst->lptbl.mlc.num_pairs =
286 le16_to_cpu(src->lptbl.mlc.num_pairs);
287
288 if (dst->lptbl.mlc.num_pairs > NVME_NVM_LP_MLC_PAIRS) {
289 pr_err("nvm: number of MLC pairs not supported\n");
290 return -EINVAL;
ca5927e7 291 }
19bd6fe7
MB
292
293 memcpy(dst->lptbl.mlc.pairs, src->lptbl.mlc.pairs,
294 dst->lptbl.mlc.num_pairs);
ca064085
MB
295 }
296
297 return 0;
298}
299
16f26c3a 300static int nvme_nvm_identity(struct nvm_dev *nvmdev, struct nvm_id *nvm_id)
ca064085 301{
16f26c3a 302 struct nvme_ns *ns = nvmdev->q->queuedata;
ca064085
MB
303 struct nvme_nvm_id *nvme_nvm_id;
304 struct nvme_nvm_command c = {};
305 int ret;
306
307 c.identity.opcode = nvme_nvm_admin_identity;
308 c.identity.nsid = cpu_to_le32(ns->ns_id);
309 c.identity.chnl_off = 0;
310
311 nvme_nvm_id = kmalloc(sizeof(struct nvme_nvm_id), GFP_KERNEL);
312 if (!nvme_nvm_id)
313 return -ENOMEM;
314
ac02ddde 315 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, (struct nvme_command *)&c,
47b3115a 316 nvme_nvm_id, sizeof(struct nvme_nvm_id));
ca064085
MB
317 if (ret) {
318 ret = -EIO;
319 goto out;
320 }
321
322 nvm_id->ver_id = nvme_nvm_id->ver_id;
323 nvm_id->vmnt = nvme_nvm_id->vmnt;
ca064085
MB
324 nvm_id->cap = le32_to_cpu(nvme_nvm_id->cap);
325 nvm_id->dom = le32_to_cpu(nvme_nvm_id->dom);
2393bd39 326 memcpy(&nvm_id->ppaf, &nvme_nvm_id->ppaf,
2849a7be 327 sizeof(struct nvm_addr_format));
ca064085
MB
328
329 ret = init_grps(nvm_id, nvme_nvm_id);
330out:
331 kfree(nvme_nvm_id);
332 return ret;
333}
334
16f26c3a 335static int nvme_nvm_get_l2p_tbl(struct nvm_dev *nvmdev, u64 slba, u32 nlb,
ca064085
MB
336 nvm_l2p_update_fn *update_l2p, void *priv)
337{
16f26c3a 338 struct nvme_ns *ns = nvmdev->q->queuedata;
ca064085 339 struct nvme_nvm_command c = {};
ac02ddde 340 u32 len = queue_max_hw_sectors(ns->ctrl->admin_q) << 9;
5f436e5e 341 u32 nlb_pr_rq = len / sizeof(u64);
ca064085
MB
342 u64 cmd_slba = slba;
343 void *entries;
344 int ret = 0;
345
346 c.l2p.opcode = nvme_nvm_admin_get_l2p_tbl;
347 c.l2p.nsid = cpu_to_le32(ns->ns_id);
348 entries = kmalloc(len, GFP_KERNEL);
349 if (!entries)
350 return -ENOMEM;
351
352 while (nlb) {
5f436e5e 353 u32 cmd_nlb = min(nlb_pr_rq, nlb);
8e79b5cb 354 u64 elba = slba + cmd_nlb;
ca064085
MB
355
356 c.l2p.slba = cpu_to_le64(cmd_slba);
357 c.l2p.nlb = cpu_to_le32(cmd_nlb);
358
ac02ddde 359 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q,
47b3115a 360 (struct nvme_command *)&c, entries, len);
ca064085 361 if (ret) {
b86d8d36
SG
362 dev_err(ns->ctrl->device,
363 "L2P table transfer failed (%d)\n", ret);
ca064085
MB
364 ret = -EIO;
365 goto out;
366 }
367
8e79b5cb
JG
368 if (unlikely(elba > nvmdev->total_secs)) {
369 pr_err("nvm: L2P data from device is out of bounds!\n");
fba704b4
RP
370 ret = -EINVAL;
371 goto out;
8e79b5cb
JG
372 }
373
8e53624d 374 /* Transform physical address to target address space */
ade69e24 375 nvm_part_to_tgt(nvmdev, entries, cmd_nlb);
8e53624d 376
ca064085
MB
377 if (update_l2p(cmd_slba, cmd_nlb, entries, priv)) {
378 ret = -EINTR;
379 goto out;
380 }
381
382 cmd_slba += cmd_nlb;
383 nlb -= cmd_nlb;
384 }
385
386out:
387 kfree(entries);
388 return ret;
389}
390
08236c6b 391static int nvme_nvm_get_bb_tbl(struct nvm_dev *nvmdev, struct ppa_addr ppa,
e11903f5 392 u8 *blks)
ca064085 393{
08236c6b 394 struct request_queue *q = nvmdev->q;
8e79b5cb 395 struct nvm_geo *geo = &nvmdev->geo;
ca064085 396 struct nvme_ns *ns = q->queuedata;
ac02ddde 397 struct nvme_ctrl *ctrl = ns->ctrl;
ca064085 398 struct nvme_nvm_command c = {};
11450469 399 struct nvme_nvm_bb_tbl *bb_tbl;
8e79b5cb 400 int nr_blks = geo->blks_per_lun * geo->plane_mode;
22e8c976 401 int tblsz = sizeof(struct nvme_nvm_bb_tbl) + nr_blks;
ca064085
MB
402 int ret = 0;
403
404 c.get_bb.opcode = nvme_nvm_admin_get_bb_tbl;
405 c.get_bb.nsid = cpu_to_le32(ns->ns_id);
11450469 406 c.get_bb.spba = cpu_to_le64(ppa.ppa);
ca064085 407
11450469
MB
408 bb_tbl = kzalloc(tblsz, GFP_KERNEL);
409 if (!bb_tbl)
410 return -ENOMEM;
ca064085 411
ac02ddde 412 ret = nvme_submit_sync_cmd(ctrl->admin_q, (struct nvme_command *)&c,
47b3115a 413 bb_tbl, tblsz);
ca064085 414 if (ret) {
b86d8d36 415 dev_err(ctrl->device, "get bad block table failed (%d)\n", ret);
ca064085
MB
416 ret = -EIO;
417 goto out;
418 }
419
11450469
MB
420 if (bb_tbl->tblid[0] != 'B' || bb_tbl->tblid[1] != 'B' ||
421 bb_tbl->tblid[2] != 'L' || bb_tbl->tblid[3] != 'T') {
b86d8d36 422 dev_err(ctrl->device, "bbt format mismatch\n");
11450469
MB
423 ret = -EINVAL;
424 goto out;
425 }
426
427 if (le16_to_cpu(bb_tbl->verid) != 1) {
428 ret = -EINVAL;
b86d8d36 429 dev_err(ctrl->device, "bbt version not supported\n");
11450469
MB
430 goto out;
431 }
432
22e8c976 433 if (le32_to_cpu(bb_tbl->tblks) != nr_blks) {
11450469 434 ret = -EINVAL;
b86d8d36
SG
435 dev_err(ctrl->device,
436 "bbt unsuspected blocks returned (%u!=%u)",
22e8c976 437 le32_to_cpu(bb_tbl->tblks), nr_blks);
11450469
MB
438 goto out;
439 }
440
8e79b5cb 441 memcpy(blks, bb_tbl->blk, geo->blks_per_lun * geo->plane_mode);
ca064085 442out:
11450469
MB
443 kfree(bb_tbl);
444 return ret;
445}
446
00ee6cc3
MB
447static int nvme_nvm_set_bb_tbl(struct nvm_dev *nvmdev, struct ppa_addr *ppas,
448 int nr_ppas, int type)
11450469 449{
16f26c3a 450 struct nvme_ns *ns = nvmdev->q->queuedata;
11450469
MB
451 struct nvme_nvm_command c = {};
452 int ret = 0;
453
454 c.set_bb.opcode = nvme_nvm_admin_set_bb_tbl;
455 c.set_bb.nsid = cpu_to_le32(ns->ns_id);
00ee6cc3
MB
456 c.set_bb.spba = cpu_to_le64(ppas->ppa);
457 c.set_bb.nlb = cpu_to_le16(nr_ppas - 1);
11450469
MB
458 c.set_bb.value = type;
459
ac02ddde 460 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, (struct nvme_command *)&c,
47b3115a 461 NULL, 0);
11450469 462 if (ret)
b86d8d36
SG
463 dev_err(ns->ctrl->device, "set bad block table failed (%d)\n",
464 ret);
ca064085
MB
465 return ret;
466}
467
629b1b2e
GU
468static inline void nvme_nvm_rqtocmd(struct nvm_rq *rqd, struct nvme_ns *ns,
469 struct nvme_nvm_command *c)
ca064085
MB
470{
471 c->ph_rw.opcode = rqd->opcode;
472 c->ph_rw.nsid = cpu_to_le32(ns->ns_id);
473 c->ph_rw.spba = cpu_to_le64(rqd->ppa_addr.ppa);
45bbd052 474 c->ph_rw.metadata = cpu_to_le64(rqd->dma_meta_list);
ca064085 475 c->ph_rw.control = cpu_to_le16(rqd->flags);
6d5be959 476 c->ph_rw.length = cpu_to_le16(rqd->nr_ppas - 1);
ca064085
MB
477
478 if (rqd->opcode == NVM_OP_HBWRITE || rqd->opcode == NVM_OP_HBREAD)
b0b4e09c
MB
479 c->hb_rw.slba = cpu_to_le64(nvme_block_nr(ns,
480 rqd->bio->bi_iter.bi_sector));
ca064085
MB
481}
482
2a842aca 483static void nvme_nvm_end_io(struct request *rq, blk_status_t status)
ca064085
MB
484{
485 struct nvm_rq *rqd = rq->end_io_data;
ca064085 486
25d9baa4 487 rqd->ppa_status = le64_to_cpu(nvme_req(rq)->result.u64);
27fa9bc5 488 rqd->error = nvme_req(rq)->status;
06894efe 489 nvm_end_io(rqd);
ca064085 490
7498e99f 491 kfree(nvme_req(rq)->cmd);
ca064085
MB
492 blk_mq_free_request(rq);
493}
494
16f26c3a 495static int nvme_nvm_submit_io(struct nvm_dev *dev, struct nvm_rq *rqd)
ca064085 496{
16f26c3a 497 struct request_queue *q = dev->q;
ca064085
MB
498 struct nvme_ns *ns = q->queuedata;
499 struct request *rq;
500 struct bio *bio = rqd->bio;
501 struct nvme_nvm_command *cmd;
502
d49187e9
CH
503 cmd = kzalloc(sizeof(struct nvme_nvm_command), GFP_KERNEL);
504 if (!cmd)
ca064085
MB
505 return -ENOMEM;
506
629b1b2e 507 nvme_nvm_rqtocmd(rqd, ns, cmd);
2e13f33a 508
d49187e9
CH
509 rq = nvme_alloc_request(q, (struct nvme_command *)cmd, 0, NVME_QID_ANY);
510 if (IS_ERR(rq)) {
511 kfree(cmd);
613fa267 512 return PTR_ERR(rq);
ca064085 513 }
d49187e9 514 rq->cmd_flags &= ~REQ_FAILFAST_DRIVER;
ca064085 515
17912c49 516 if (bio) {
9460e280 517 blk_init_request_from_bio(rq, bio);
17912c49
JG
518 } else {
519 rq->ioprio = IOPRIO_PRIO_VALUE(IOPRIO_CLASS_BE, IOPRIO_NORM);
520 rq->__data_len = 0;
521 }
ca064085 522
ca064085
MB
523 rq->end_io_data = rqd;
524
525 blk_execute_rq_nowait(q, NULL, rq, 0, nvme_nvm_end_io);
526
527 return 0;
528}
529
16f26c3a 530static void *nvme_nvm_create_dma_pool(struct nvm_dev *nvmdev, char *name)
ca064085 531{
16f26c3a 532 struct nvme_ns *ns = nvmdev->q->queuedata;
ca064085 533
ac02ddde 534 return dma_pool_create(name, ns->ctrl->dev, PAGE_SIZE, PAGE_SIZE, 0);
ca064085
MB
535}
536
537static void nvme_nvm_destroy_dma_pool(void *pool)
538{
539 struct dma_pool *dma_pool = pool;
540
541 dma_pool_destroy(dma_pool);
542}
543
16f26c3a 544static void *nvme_nvm_dev_dma_alloc(struct nvm_dev *dev, void *pool,
ca064085
MB
545 gfp_t mem_flags, dma_addr_t *dma_handler)
546{
547 return dma_pool_alloc(pool, mem_flags, dma_handler);
548}
549
75b85649 550static void nvme_nvm_dev_dma_free(void *pool, void *addr,
ca064085
MB
551 dma_addr_t dma_handler)
552{
75b85649 553 dma_pool_free(pool, addr, dma_handler);
ca064085
MB
554}
555
556static struct nvm_dev_ops nvme_nvm_dev_ops = {
557 .identity = nvme_nvm_identity,
558
559 .get_l2p_tbl = nvme_nvm_get_l2p_tbl,
560
561 .get_bb_tbl = nvme_nvm_get_bb_tbl,
11450469 562 .set_bb_tbl = nvme_nvm_set_bb_tbl,
ca064085
MB
563
564 .submit_io = nvme_nvm_submit_io,
ca064085
MB
565
566 .create_dma_pool = nvme_nvm_create_dma_pool,
567 .destroy_dma_pool = nvme_nvm_destroy_dma_pool,
568 .dev_dma_alloc = nvme_nvm_dev_dma_alloc,
569 .dev_dma_free = nvme_nvm_dev_dma_free,
570
571 .max_phys_sect = 64,
572};
573
84d4add7
MB
574static int nvme_nvm_submit_user_cmd(struct request_queue *q,
575 struct nvme_ns *ns,
576 struct nvme_nvm_command *vcmd,
577 void __user *ubuf, unsigned int bufflen,
578 void __user *meta_buf, unsigned int meta_len,
579 void __user *ppa_buf, unsigned int ppa_len,
580 u32 *result, u64 *status, unsigned int timeout)
581{
582 bool write = nvme_is_write((struct nvme_command *)vcmd);
583 struct nvm_dev *dev = ns->ndev;
584 struct gendisk *disk = ns->disk;
585 struct request *rq;
586 struct bio *bio = NULL;
587 __le64 *ppa_list = NULL;
588 dma_addr_t ppa_dma;
589 __le64 *metadata = NULL;
590 dma_addr_t metadata_dma;
591 DECLARE_COMPLETION_ONSTACK(wait);
65ba6b54 592 int ret = 0;
84d4add7
MB
593
594 rq = nvme_alloc_request(q, (struct nvme_command *)vcmd, 0,
595 NVME_QID_ANY);
596 if (IS_ERR(rq)) {
597 ret = -ENOMEM;
598 goto err_cmd;
599 }
600
601 rq->timeout = timeout ? timeout : ADMIN_TIMEOUT;
602
603 rq->cmd_flags &= ~REQ_FAILFAST_DRIVER;
84d4add7
MB
604
605 if (ppa_buf && ppa_len) {
606 ppa_list = dma_pool_alloc(dev->dma_pool, GFP_KERNEL, &ppa_dma);
607 if (!ppa_list) {
608 ret = -ENOMEM;
609 goto err_rq;
610 }
611 if (copy_from_user(ppa_list, (void __user *)ppa_buf,
612 sizeof(u64) * (ppa_len + 1))) {
613 ret = -EFAULT;
614 goto err_ppa;
615 }
616 vcmd->ph_rw.spba = cpu_to_le64(ppa_dma);
617 } else {
618 vcmd->ph_rw.spba = cpu_to_le64((uintptr_t)ppa_buf);
619 }
620
621 if (ubuf && bufflen) {
622 ret = blk_rq_map_user(q, rq, NULL, ubuf, bufflen, GFP_KERNEL);
623 if (ret)
624 goto err_ppa;
625 bio = rq->bio;
626
627 if (meta_buf && meta_len) {
628 metadata = dma_pool_alloc(dev->dma_pool, GFP_KERNEL,
629 &metadata_dma);
630 if (!metadata) {
631 ret = -ENOMEM;
632 goto err_map;
633 }
634
635 if (write) {
636 if (copy_from_user(metadata,
637 (void __user *)meta_buf,
638 meta_len)) {
639 ret = -EFAULT;
640 goto err_meta;
641 }
642 }
643 vcmd->ph_rw.metadata = cpu_to_le64(metadata_dma);
644 }
645
646 if (!disk)
647 goto submit;
648
649 bio->bi_bdev = bdget_disk(disk, 0);
650 if (!bio->bi_bdev) {
651 ret = -ENODEV;
652 goto err_meta;
653 }
654 }
655
656submit:
40174154 657 blk_execute_rq(q, NULL, rq, 0);
84d4add7 658
27fa9bc5
CH
659 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
660 ret = -EINTR;
65ba6b54
CH
661 else if (nvme_req(rq)->status & 0x7ff)
662 ret = -EIO;
84d4add7 663 if (result)
27fa9bc5 664 *result = nvme_req(rq)->status & 0x7ff;
84d4add7
MB
665 if (status)
666 *status = le64_to_cpu(nvme_req(rq)->result.u64);
667
668 if (metadata && !ret && !write) {
669 if (copy_to_user(meta_buf, (void *)metadata, meta_len))
670 ret = -EFAULT;
671 }
672err_meta:
673 if (meta_buf && meta_len)
674 dma_pool_free(dev->dma_pool, metadata, metadata_dma);
675err_map:
676 if (bio) {
677 if (disk && bio->bi_bdev)
678 bdput(bio->bi_bdev);
679 blk_rq_unmap_user(bio);
680 }
681err_ppa:
682 if (ppa_buf && ppa_len)
683 dma_pool_free(dev->dma_pool, ppa_list, ppa_dma);
684err_rq:
685 blk_mq_free_request(rq);
686err_cmd:
687 return ret;
688}
689
690static int nvme_nvm_submit_vio(struct nvme_ns *ns,
691 struct nvm_user_vio __user *uvio)
692{
693 struct nvm_user_vio vio;
694 struct nvme_nvm_command c;
695 unsigned int length;
696 int ret;
697
698 if (copy_from_user(&vio, uvio, sizeof(vio)))
699 return -EFAULT;
700 if (vio.flags)
701 return -EINVAL;
702
703 memset(&c, 0, sizeof(c));
704 c.ph_rw.opcode = vio.opcode;
705 c.ph_rw.nsid = cpu_to_le32(ns->ns_id);
706 c.ph_rw.control = cpu_to_le16(vio.control);
707 c.ph_rw.length = cpu_to_le16(vio.nppas);
708
709 length = (vio.nppas + 1) << ns->lba_shift;
710
711 ret = nvme_nvm_submit_user_cmd(ns->queue, ns, &c,
712 (void __user *)(uintptr_t)vio.addr, length,
713 (void __user *)(uintptr_t)vio.metadata,
714 vio.metadata_len,
715 (void __user *)(uintptr_t)vio.ppa_list, vio.nppas,
716 &vio.result, &vio.status, 0);
717
718 if (ret && copy_to_user(uvio, &vio, sizeof(vio)))
719 return -EFAULT;
720
721 return ret;
722}
723
724static int nvme_nvm_user_vcmd(struct nvme_ns *ns, int admin,
725 struct nvm_passthru_vio __user *uvcmd)
726{
727 struct nvm_passthru_vio vcmd;
728 struct nvme_nvm_command c;
729 struct request_queue *q;
730 unsigned int timeout = 0;
731 int ret;
732
733 if (copy_from_user(&vcmd, uvcmd, sizeof(vcmd)))
734 return -EFAULT;
735 if ((vcmd.opcode != 0xF2) && (!capable(CAP_SYS_ADMIN)))
736 return -EACCES;
737 if (vcmd.flags)
738 return -EINVAL;
739
740 memset(&c, 0, sizeof(c));
741 c.common.opcode = vcmd.opcode;
742 c.common.nsid = cpu_to_le32(ns->ns_id);
743 c.common.cdw2[0] = cpu_to_le32(vcmd.cdw2);
744 c.common.cdw2[1] = cpu_to_le32(vcmd.cdw3);
745 /* cdw11-12 */
746 c.ph_rw.length = cpu_to_le16(vcmd.nppas);
e85292fe 747 c.ph_rw.control = cpu_to_le16(vcmd.control);
84d4add7
MB
748 c.common.cdw10[3] = cpu_to_le32(vcmd.cdw13);
749 c.common.cdw10[4] = cpu_to_le32(vcmd.cdw14);
750 c.common.cdw10[5] = cpu_to_le32(vcmd.cdw15);
751
752 if (vcmd.timeout_ms)
753 timeout = msecs_to_jiffies(vcmd.timeout_ms);
754
755 q = admin ? ns->ctrl->admin_q : ns->queue;
756
757 ret = nvme_nvm_submit_user_cmd(q, ns,
758 (struct nvme_nvm_command *)&c,
759 (void __user *)(uintptr_t)vcmd.addr, vcmd.data_len,
760 (void __user *)(uintptr_t)vcmd.metadata,
761 vcmd.metadata_len,
762 (void __user *)(uintptr_t)vcmd.ppa_list, vcmd.nppas,
763 &vcmd.result, &vcmd.status, timeout);
764
765 if (ret && copy_to_user(uvcmd, &vcmd, sizeof(vcmd)))
766 return -EFAULT;
767
768 return ret;
769}
770
771int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg)
772{
773 switch (cmd) {
774 case NVME_NVM_IOCTL_ADMIN_VIO:
775 return nvme_nvm_user_vcmd(ns, 1, (void __user *)arg);
776 case NVME_NVM_IOCTL_IO_VIO:
777 return nvme_nvm_user_vcmd(ns, 0, (void __user *)arg);
778 case NVME_NVM_IOCTL_SUBMIT_VIO:
779 return nvme_nvm_submit_vio(ns, (void __user *)arg);
780 default:
781 return -ENOTTY;
782 }
783}
784
3dc87dd0 785int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node)
ca064085 786{
b0b4e09c
MB
787 struct request_queue *q = ns->queue;
788 struct nvm_dev *dev;
b0b4e09c 789
48d663a3
MB
790 _nvme_nvm_check_size();
791
b0b4e09c
MB
792 dev = nvm_alloc_dev(node);
793 if (!dev)
794 return -ENOMEM;
795
796 dev->q = q;
797 memcpy(dev->name, disk_name, DISK_NAME_LEN);
798 dev->ops = &nvme_nvm_dev_ops;
40267efd 799 dev->private_data = ns;
b0b4e09c
MB
800 ns->ndev = dev;
801
3dc87dd0 802 return nvm_register(dev);
ca064085
MB
803}
804
b0b4e09c 805void nvme_nvm_unregister(struct nvme_ns *ns)
ca064085 806{
b0b4e09c 807 nvm_unregister(ns->ndev);
ca064085
MB
808}
809
3dc87dd0
MB
810static ssize_t nvm_dev_attr_show(struct device *dev,
811 struct device_attribute *dattr, char *page)
812{
813 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
814 struct nvm_dev *ndev = ns->ndev;
815 struct nvm_id *id;
816 struct nvm_id_group *grp;
817 struct attribute *attr;
818
819 if (!ndev)
820 return 0;
821
822 id = &ndev->identity;
19bd6fe7 823 grp = &id->grp;
3dc87dd0
MB
824 attr = &dattr->attr;
825
826 if (strcmp(attr->name, "version") == 0) {
827 return scnprintf(page, PAGE_SIZE, "%u\n", id->ver_id);
828 } else if (strcmp(attr->name, "vendor_opcode") == 0) {
829 return scnprintf(page, PAGE_SIZE, "%u\n", id->vmnt);
830 } else if (strcmp(attr->name, "capabilities") == 0) {
831 return scnprintf(page, PAGE_SIZE, "%u\n", id->cap);
832 } else if (strcmp(attr->name, "device_mode") == 0) {
833 return scnprintf(page, PAGE_SIZE, "%u\n", id->dom);
ade69e24 834 /* kept for compatibility */
3dc87dd0 835 } else if (strcmp(attr->name, "media_manager") == 0) {
ade69e24 836 return scnprintf(page, PAGE_SIZE, "%s\n", "gennvm");
3dc87dd0
MB
837 } else if (strcmp(attr->name, "ppa_format") == 0) {
838 return scnprintf(page, PAGE_SIZE,
839 "0x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
840 id->ppaf.ch_offset, id->ppaf.ch_len,
841 id->ppaf.lun_offset, id->ppaf.lun_len,
842 id->ppaf.pln_offset, id->ppaf.pln_len,
843 id->ppaf.blk_offset, id->ppaf.blk_len,
844 id->ppaf.pg_offset, id->ppaf.pg_len,
845 id->ppaf.sect_offset, id->ppaf.sect_len);
846 } else if (strcmp(attr->name, "media_type") == 0) { /* u8 */
847 return scnprintf(page, PAGE_SIZE, "%u\n", grp->mtype);
848 } else if (strcmp(attr->name, "flash_media_type") == 0) {
849 return scnprintf(page, PAGE_SIZE, "%u\n", grp->fmtype);
850 } else if (strcmp(attr->name, "num_channels") == 0) {
851 return scnprintf(page, PAGE_SIZE, "%u\n", grp->num_ch);
852 } else if (strcmp(attr->name, "num_luns") == 0) {
853 return scnprintf(page, PAGE_SIZE, "%u\n", grp->num_lun);
854 } else if (strcmp(attr->name, "num_planes") == 0) {
855 return scnprintf(page, PAGE_SIZE, "%u\n", grp->num_pln);
856 } else if (strcmp(attr->name, "num_blocks") == 0) { /* u16 */
857 return scnprintf(page, PAGE_SIZE, "%u\n", grp->num_blk);
858 } else if (strcmp(attr->name, "num_pages") == 0) {
859 return scnprintf(page, PAGE_SIZE, "%u\n", grp->num_pg);
860 } else if (strcmp(attr->name, "page_size") == 0) {
861 return scnprintf(page, PAGE_SIZE, "%u\n", grp->fpg_sz);
862 } else if (strcmp(attr->name, "hw_sector_size") == 0) {
863 return scnprintf(page, PAGE_SIZE, "%u\n", grp->csecs);
864 } else if (strcmp(attr->name, "oob_sector_size") == 0) {/* u32 */
865 return scnprintf(page, PAGE_SIZE, "%u\n", grp->sos);
866 } else if (strcmp(attr->name, "read_typ") == 0) {
867 return scnprintf(page, PAGE_SIZE, "%u\n", grp->trdt);
868 } else if (strcmp(attr->name, "read_max") == 0) {
869 return scnprintf(page, PAGE_SIZE, "%u\n", grp->trdm);
870 } else if (strcmp(attr->name, "prog_typ") == 0) {
871 return scnprintf(page, PAGE_SIZE, "%u\n", grp->tprt);
872 } else if (strcmp(attr->name, "prog_max") == 0) {
873 return scnprintf(page, PAGE_SIZE, "%u\n", grp->tprm);
874 } else if (strcmp(attr->name, "erase_typ") == 0) {
875 return scnprintf(page, PAGE_SIZE, "%u\n", grp->tbet);
876 } else if (strcmp(attr->name, "erase_max") == 0) {
877 return scnprintf(page, PAGE_SIZE, "%u\n", grp->tbem);
878 } else if (strcmp(attr->name, "multiplane_modes") == 0) {
879 return scnprintf(page, PAGE_SIZE, "0x%08x\n", grp->mpos);
880 } else if (strcmp(attr->name, "media_capabilities") == 0) {
881 return scnprintf(page, PAGE_SIZE, "0x%08x\n", grp->mccap);
882 } else if (strcmp(attr->name, "max_phys_secs") == 0) {
883 return scnprintf(page, PAGE_SIZE, "%u\n",
884 ndev->ops->max_phys_sect);
885 } else {
886 return scnprintf(page,
887 PAGE_SIZE,
888 "Unhandled attr(%s) in `nvm_dev_attr_show`\n",
889 attr->name);
890 }
891}
892
893#define NVM_DEV_ATTR_RO(_name) \
894 DEVICE_ATTR(_name, S_IRUGO, nvm_dev_attr_show, NULL)
895
896static NVM_DEV_ATTR_RO(version);
897static NVM_DEV_ATTR_RO(vendor_opcode);
898static NVM_DEV_ATTR_RO(capabilities);
899static NVM_DEV_ATTR_RO(device_mode);
900static NVM_DEV_ATTR_RO(ppa_format);
901static NVM_DEV_ATTR_RO(media_manager);
902
903static NVM_DEV_ATTR_RO(media_type);
904static NVM_DEV_ATTR_RO(flash_media_type);
905static NVM_DEV_ATTR_RO(num_channels);
906static NVM_DEV_ATTR_RO(num_luns);
907static NVM_DEV_ATTR_RO(num_planes);
908static NVM_DEV_ATTR_RO(num_blocks);
909static NVM_DEV_ATTR_RO(num_pages);
910static NVM_DEV_ATTR_RO(page_size);
911static NVM_DEV_ATTR_RO(hw_sector_size);
912static NVM_DEV_ATTR_RO(oob_sector_size);
913static NVM_DEV_ATTR_RO(read_typ);
914static NVM_DEV_ATTR_RO(read_max);
915static NVM_DEV_ATTR_RO(prog_typ);
916static NVM_DEV_ATTR_RO(prog_max);
917static NVM_DEV_ATTR_RO(erase_typ);
918static NVM_DEV_ATTR_RO(erase_max);
919static NVM_DEV_ATTR_RO(multiplane_modes);
920static NVM_DEV_ATTR_RO(media_capabilities);
921static NVM_DEV_ATTR_RO(max_phys_secs);
922
923static struct attribute *nvm_dev_attrs[] = {
924 &dev_attr_version.attr,
925 &dev_attr_vendor_opcode.attr,
926 &dev_attr_capabilities.attr,
927 &dev_attr_device_mode.attr,
928 &dev_attr_media_manager.attr,
929
930 &dev_attr_ppa_format.attr,
931 &dev_attr_media_type.attr,
932 &dev_attr_flash_media_type.attr,
933 &dev_attr_num_channels.attr,
934 &dev_attr_num_luns.attr,
935 &dev_attr_num_planes.attr,
936 &dev_attr_num_blocks.attr,
937 &dev_attr_num_pages.attr,
938 &dev_attr_page_size.attr,
939 &dev_attr_hw_sector_size.attr,
940 &dev_attr_oob_sector_size.attr,
941 &dev_attr_read_typ.attr,
942 &dev_attr_read_max.attr,
943 &dev_attr_prog_typ.attr,
944 &dev_attr_prog_max.attr,
945 &dev_attr_erase_typ.attr,
946 &dev_attr_erase_max.attr,
947 &dev_attr_multiplane_modes.attr,
948 &dev_attr_media_capabilities.attr,
949 &dev_attr_max_phys_secs.attr,
950 NULL,
951};
952
953static const struct attribute_group nvm_dev_attr_group = {
954 .name = "lightnvm",
955 .attrs = nvm_dev_attrs,
956};
957
958int nvme_nvm_register_sysfs(struct nvme_ns *ns)
959{
960 return sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
961 &nvm_dev_attr_group);
962}
963
964void nvme_nvm_unregister_sysfs(struct nvme_ns *ns)
965{
966 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
967 &nvm_dev_attr_group);
968}
969
09f2e716
MB
970/* move to shared place when used in multiple places. */
971#define PCI_VENDOR_ID_CNEX 0x1d1d
972#define PCI_DEVICE_ID_CNEX_WL 0x2807
973#define PCI_DEVICE_ID_CNEX_QEMU 0x1f1f
974
ca064085
MB
975int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
976{
ac02ddde
CH
977 struct nvme_ctrl *ctrl = ns->ctrl;
978 /* XXX: this is poking into PCI structures from generic code! */
979 struct pci_dev *pdev = to_pci_dev(ctrl->dev);
ca064085
MB
980
981 /* QEMU NVMe simulator - PCI ID + Vendor specific bit */
09f2e716
MB
982 if (pdev->vendor == PCI_VENDOR_ID_CNEX &&
983 pdev->device == PCI_DEVICE_ID_CNEX_QEMU &&
ca064085
MB
984 id->vs[0] == 0x1)
985 return 1;
986
987 /* CNEX Labs - PCI ID + Vendor specific bit */
09f2e716
MB
988 if (pdev->vendor == PCI_VENDOR_ID_CNEX &&
989 pdev->device == PCI_DEVICE_ID_CNEX_WL &&
ca064085
MB
990 id->vs[0] == 0x1)
991 return 1;
992
993 return 0;
994}