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Commit | Line | Data |
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f11bb3e2 CH |
1 | /* |
2 | * Copyright (c) 2011-2014, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | */ | |
13 | ||
14 | #ifndef _NVME_H | |
15 | #define _NVME_H | |
16 | ||
17 | #include <linux/nvme.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kref.h> | |
20 | #include <linux/blk-mq.h> | |
b0b4e09c | 21 | #include <linux/lightnvm.h> |
a98e58e5 | 22 | #include <linux/sed-opal.h> |
f11bb3e2 | 23 | |
297465c8 CH |
24 | enum { |
25 | /* | |
26 | * Driver internal status code for commands that were cancelled due | |
27 | * to timeouts or controller shutdown. The value is negative so | |
28 | * that it a) doesn't overlap with the unsigned hardware error codes, | |
29 | * and b) can easily be tested for. | |
30 | */ | |
31 | NVME_SC_CANCELLED = -EINTR, | |
32 | }; | |
33 | ||
f11bb3e2 CH |
34 | extern unsigned char nvme_io_timeout; |
35 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) | |
36 | ||
21d34711 CH |
37 | extern unsigned char admin_timeout; |
38 | #define ADMIN_TIMEOUT (admin_timeout * HZ) | |
39 | ||
5fd4ce1b CH |
40 | extern unsigned char shutdown_timeout; |
41 | #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) | |
42 | ||
038bd4cb SG |
43 | #define NVME_DEFAULT_KATO 5 |
44 | #define NVME_KATO_GRACE 10 | |
45 | ||
f80ec966 KB |
46 | extern unsigned int nvme_max_retries; |
47 | ||
ca064085 MB |
48 | enum { |
49 | NVME_NS_LBA = 0, | |
50 | NVME_NS_LIGHTNVM = 1, | |
51 | }; | |
52 | ||
f11bb3e2 | 53 | /* |
106198ed CH |
54 | * List of workarounds for devices that required behavior not specified in |
55 | * the standard. | |
f11bb3e2 | 56 | */ |
106198ed CH |
57 | enum nvme_quirks { |
58 | /* | |
59 | * Prefers I/O aligned to a stripe size specified in a vendor | |
60 | * specific Identify field. | |
61 | */ | |
62 | NVME_QUIRK_STRIPE_SIZE = (1 << 0), | |
540c801c KB |
63 | |
64 | /* | |
65 | * The controller doesn't handle Identify value others than 0 or 1 | |
66 | * correctly. | |
67 | */ | |
68 | NVME_QUIRK_IDENTIFY_CNS = (1 << 1), | |
08095e70 KB |
69 | |
70 | /* | |
71 | * The controller deterministically returns O's on reads to discarded | |
72 | * logical blocks. | |
73 | */ | |
74 | NVME_QUIRK_DISCARD_ZEROES = (1 << 2), | |
54adc010 GP |
75 | |
76 | /* | |
77 | * The controller needs a delay before starts checking the device | |
78 | * readiness, which is done by reading the NVME_CSTS_RDY bit. | |
79 | */ | |
80 | NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), | |
c5552fde AL |
81 | |
82 | /* | |
83 | * APST should not be used. | |
84 | */ | |
85 | NVME_QUIRK_NO_APST = (1 << 4), | |
106198ed CH |
86 | }; |
87 | ||
d49187e9 CH |
88 | /* |
89 | * Common request structure for NVMe passthrough. All drivers must have | |
90 | * this structure as the first member of their request-private data. | |
91 | */ | |
92 | struct nvme_request { | |
93 | struct nvme_command *cmd; | |
94 | union nvme_result result; | |
95 | }; | |
96 | ||
97 | static inline struct nvme_request *nvme_req(struct request *req) | |
98 | { | |
99 | return blk_mq_rq_to_pdu(req); | |
100 | } | |
101 | ||
54adc010 GP |
102 | /* The below value is the specific amount of delay needed before checking |
103 | * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the | |
104 | * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was | |
105 | * found empirically. | |
106 | */ | |
107 | #define NVME_QUIRK_DELAY_AMOUNT 2000 | |
108 | ||
bb8d261e CH |
109 | enum nvme_ctrl_state { |
110 | NVME_CTRL_NEW, | |
111 | NVME_CTRL_LIVE, | |
112 | NVME_CTRL_RESETTING, | |
def61eca | 113 | NVME_CTRL_RECONNECTING, |
bb8d261e | 114 | NVME_CTRL_DELETING, |
0ff9d4e1 | 115 | NVME_CTRL_DEAD, |
bb8d261e CH |
116 | }; |
117 | ||
1c63dc66 | 118 | struct nvme_ctrl { |
bb8d261e | 119 | enum nvme_ctrl_state state; |
bd4da3ab | 120 | bool identified; |
bb8d261e | 121 | spinlock_t lock; |
1c63dc66 | 122 | const struct nvme_ctrl_ops *ops; |
f11bb3e2 | 123 | struct request_queue *admin_q; |
07bfcd09 | 124 | struct request_queue *connect_q; |
f11bb3e2 | 125 | struct device *dev; |
1673f1f0 | 126 | struct kref kref; |
f11bb3e2 | 127 | int instance; |
5bae7f73 | 128 | struct blk_mq_tag_set *tagset; |
f11bb3e2 | 129 | struct list_head namespaces; |
69d3b8ac | 130 | struct mutex namespaces_mutex; |
5bae7f73 | 131 | struct device *device; /* char device */ |
f3ca80fc | 132 | struct list_head node; |
075790eb | 133 | struct ida ns_ida; |
1c63dc66 | 134 | |
4f1244c8 | 135 | struct opal_dev *opal_dev; |
a98e58e5 | 136 | |
f11bb3e2 CH |
137 | char name[12]; |
138 | char serial[20]; | |
139 | char model[40]; | |
140 | char firmware_rev[8]; | |
76e3914a | 141 | u16 cntlid; |
5fd4ce1b CH |
142 | |
143 | u32 ctrl_config; | |
144 | ||
145 | u32 page_size; | |
f11bb3e2 | 146 | u32 max_hw_sectors; |
f11bb3e2 | 147 | u16 oncs; |
118472ab | 148 | u16 vid; |
8a9ae523 | 149 | u16 oacs; |
6bf25d16 | 150 | atomic_t abort_limit; |
f11bb3e2 CH |
151 | u8 event_limit; |
152 | u8 vwc; | |
f3ca80fc | 153 | u32 vs; |
07bfcd09 | 154 | u32 sgls; |
038bd4cb | 155 | u16 kas; |
c5552fde AL |
156 | u8 npss; |
157 | u8 apsta; | |
038bd4cb | 158 | unsigned int kato; |
f3ca80fc | 159 | bool subsystem; |
106198ed | 160 | unsigned long quirks; |
c5552fde | 161 | struct nvme_id_power_state psd[32]; |
5955be21 | 162 | struct work_struct scan_work; |
f866fc42 | 163 | struct work_struct async_event_work; |
038bd4cb | 164 | struct delayed_work ka_work; |
07bfcd09 | 165 | |
c5552fde AL |
166 | /* Power saving configuration */ |
167 | u64 ps_max_latency_us; | |
168 | ||
07bfcd09 CH |
169 | /* Fabrics only */ |
170 | u16 sqsize; | |
171 | u32 ioccsz; | |
172 | u32 iorcsz; | |
173 | u16 icdoff; | |
174 | u16 maxcmd; | |
175 | struct nvmf_ctrl_options *opts; | |
f11bb3e2 CH |
176 | }; |
177 | ||
178 | /* | |
179 | * An NVM Express namespace is equivalent to a SCSI LUN | |
180 | */ | |
181 | struct nvme_ns { | |
182 | struct list_head list; | |
183 | ||
1c63dc66 | 184 | struct nvme_ctrl *ctrl; |
f11bb3e2 CH |
185 | struct request_queue *queue; |
186 | struct gendisk *disk; | |
b0b4e09c | 187 | struct nvm_dev *ndev; |
f11bb3e2 | 188 | struct kref kref; |
075790eb | 189 | int instance; |
f11bb3e2 | 190 | |
2b9b6e86 KB |
191 | u8 eui[8]; |
192 | u8 uuid[16]; | |
193 | ||
f11bb3e2 CH |
194 | unsigned ns_id; |
195 | int lba_shift; | |
196 | u16 ms; | |
197 | bool ext; | |
198 | u8 pi_type; | |
646017a6 KB |
199 | unsigned long flags; |
200 | ||
201 | #define NVME_NS_REMOVING 0 | |
69d9a99c | 202 | #define NVME_NS_DEAD 1 |
646017a6 | 203 | |
f11bb3e2 CH |
204 | u64 mode_select_num_blocks; |
205 | u32 mode_select_block_len; | |
206 | }; | |
207 | ||
1c63dc66 | 208 | struct nvme_ctrl_ops { |
1a353d85 | 209 | const char *name; |
e439bb12 | 210 | struct module *module; |
07bfcd09 | 211 | bool is_fabrics; |
1c63dc66 | 212 | int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); |
5fd4ce1b | 213 | int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); |
7fd8930f | 214 | int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); |
f3ca80fc | 215 | int (*reset_ctrl)(struct nvme_ctrl *ctrl); |
1673f1f0 | 216 | void (*free_ctrl)(struct nvme_ctrl *ctrl); |
f866fc42 | 217 | void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); |
1a353d85 ML |
218 | int (*delete_ctrl)(struct nvme_ctrl *ctrl); |
219 | const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl); | |
220 | int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); | |
f11bb3e2 CH |
221 | }; |
222 | ||
1c63dc66 CH |
223 | static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) |
224 | { | |
225 | u32 val = 0; | |
226 | ||
227 | if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) | |
228 | return false; | |
229 | return val & NVME_CSTS_RDY; | |
230 | } | |
231 | ||
f3ca80fc CH |
232 | static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) |
233 | { | |
234 | if (!ctrl->subsystem) | |
235 | return -ENOTTY; | |
236 | return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); | |
237 | } | |
238 | ||
f11bb3e2 CH |
239 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
240 | { | |
241 | return (sector >> (ns->lba_shift - 9)); | |
242 | } | |
243 | ||
6904242d ML |
244 | static inline void nvme_cleanup_cmd(struct request *req) |
245 | { | |
f9d03f96 CH |
246 | if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { |
247 | kfree(page_address(req->special_vec.bv_page) + | |
248 | req->special_vec.bv_offset); | |
249 | } | |
6904242d ML |
250 | } |
251 | ||
15a190f7 CH |
252 | static inline int nvme_error_status(u16 status) |
253 | { | |
254 | switch (status & 0x7ff) { | |
255 | case NVME_SC_SUCCESS: | |
256 | return 0; | |
257 | case NVME_SC_CAP_EXCEEDED: | |
258 | return -ENOSPC; | |
259 | default: | |
260 | return -EIO; | |
261 | } | |
262 | } | |
263 | ||
7688faa6 CH |
264 | static inline bool nvme_req_needs_retry(struct request *req, u16 status) |
265 | { | |
266 | return !(status & NVME_SC_DNR || blk_noretry_request(req)) && | |
f80ec966 KB |
267 | (jiffies - req->start_time) < req->timeout && |
268 | req->retries < nvme_max_retries; | |
7688faa6 CH |
269 | } |
270 | ||
c55a2fd4 | 271 | void nvme_cancel_request(struct request *req, void *data, bool reserved); |
bb8d261e CH |
272 | bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, |
273 | enum nvme_ctrl_state new_state); | |
5fd4ce1b CH |
274 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); |
275 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); | |
276 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); | |
f3ca80fc CH |
277 | int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, |
278 | const struct nvme_ctrl_ops *ops, unsigned long quirks); | |
53029b04 | 279 | void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); |
1673f1f0 | 280 | void nvme_put_ctrl(struct nvme_ctrl *ctrl); |
7fd8930f | 281 | int nvme_init_identify(struct nvme_ctrl *ctrl); |
5bae7f73 | 282 | |
5955be21 | 283 | void nvme_queue_scan(struct nvme_ctrl *ctrl); |
5bae7f73 | 284 | void nvme_remove_namespaces(struct nvme_ctrl *ctrl); |
1673f1f0 | 285 | |
4f1244c8 CH |
286 | int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, |
287 | bool send); | |
a98e58e5 | 288 | |
f866fc42 | 289 | #define NVME_NR_AERS 1 |
7bf58533 CH |
290 | void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, |
291 | union nvme_result *res); | |
f866fc42 CH |
292 | void nvme_queue_async_events(struct nvme_ctrl *ctrl); |
293 | ||
25646264 KB |
294 | void nvme_stop_queues(struct nvme_ctrl *ctrl); |
295 | void nvme_start_queues(struct nvme_ctrl *ctrl); | |
69d9a99c | 296 | void nvme_kill_queues(struct nvme_ctrl *ctrl); |
302ad8cc KB |
297 | void nvme_unfreeze(struct nvme_ctrl *ctrl); |
298 | void nvme_wait_freeze(struct nvme_ctrl *ctrl); | |
299 | void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); | |
300 | void nvme_start_freeze(struct nvme_ctrl *ctrl); | |
363c9aac | 301 | |
eb71f435 | 302 | #define NVME_QID_ANY -1 |
4160982e | 303 | struct request *nvme_alloc_request(struct request_queue *q, |
eb71f435 | 304 | struct nvme_command *cmd, unsigned int flags, int qid); |
7688faa6 | 305 | void nvme_requeue_req(struct request *req); |
8093f7ca ML |
306 | int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, |
307 | struct nvme_command *cmd); | |
f11bb3e2 CH |
308 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
309 | void *buf, unsigned bufflen); | |
310 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
d49187e9 | 311 | union nvme_result *result, void *buffer, unsigned bufflen, |
eb71f435 | 312 | unsigned timeout, int qid, int at_head, int flags); |
4160982e CH |
313 | int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
314 | void __user *ubuffer, unsigned bufflen, u32 *result, | |
315 | unsigned timeout); | |
0b7f1f26 KB |
316 | int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
317 | void __user *ubuffer, unsigned bufflen, | |
318 | void __user *meta_buffer, unsigned meta_len, u32 meta_seed, | |
f11bb3e2 | 319 | u32 *result, unsigned timeout); |
1c63dc66 CH |
320 | int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); |
321 | int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, | |
f11bb3e2 | 322 | struct nvme_id_ns **id); |
1c63dc66 CH |
323 | int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); |
324 | int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, | |
1a6fe74d | 325 | void *buffer, size_t buflen, u32 *result); |
1c63dc66 | 326 | int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, |
1a6fe74d | 327 | void *buffer, size_t buflen, u32 *result); |
9a0be7ab | 328 | int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); |
038bd4cb SG |
329 | void nvme_start_keep_alive(struct nvme_ctrl *ctrl); |
330 | void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); | |
f11bb3e2 CH |
331 | |
332 | struct sg_io_hdr; | |
333 | ||
334 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); | |
335 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); | |
336 | int nvme_sg_get_version_num(int __user *ip); | |
337 | ||
c4699e70 | 338 | #ifdef CONFIG_NVM |
ca064085 | 339 | int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); |
3dc87dd0 | 340 | int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node); |
b0b4e09c | 341 | void nvme_nvm_unregister(struct nvme_ns *ns); |
3dc87dd0 MB |
342 | int nvme_nvm_register_sysfs(struct nvme_ns *ns); |
343 | void nvme_nvm_unregister_sysfs(struct nvme_ns *ns); | |
84d4add7 | 344 | int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg); |
c4699e70 | 345 | #else |
b0b4e09c | 346 | static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, |
3dc87dd0 | 347 | int node) |
c4699e70 KB |
348 | { |
349 | return 0; | |
350 | } | |
351 | ||
b0b4e09c | 352 | static inline void nvme_nvm_unregister(struct nvme_ns *ns) {}; |
3dc87dd0 MB |
353 | static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns) |
354 | { | |
355 | return 0; | |
356 | } | |
357 | static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {}; | |
c4699e70 KB |
358 | static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) |
359 | { | |
360 | return 0; | |
361 | } | |
84d4add7 MB |
362 | static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, |
363 | unsigned long arg) | |
364 | { | |
365 | return -ENOTTY; | |
366 | } | |
3dc87dd0 MB |
367 | #endif /* CONFIG_NVM */ |
368 | ||
40267efd SL |
369 | static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) |
370 | { | |
371 | return dev_to_disk(dev)->private_data; | |
372 | } | |
ca064085 | 373 | |
5bae7f73 CH |
374 | int __init nvme_core_init(void); |
375 | void nvme_core_exit(void); | |
376 | ||
f11bb3e2 | 377 | #endif /* _NVME_H */ |