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f11bb3e2 CH |
1 | /* |
2 | * Copyright (c) 2011-2014, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | */ | |
13 | ||
14 | #ifndef _NVME_H | |
15 | #define _NVME_H | |
16 | ||
17 | #include <linux/nvme.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kref.h> | |
20 | #include <linux/blk-mq.h> | |
21 | ||
1673f1f0 CH |
22 | struct nvme_passthru_cmd; |
23 | ||
f11bb3e2 CH |
24 | extern unsigned char nvme_io_timeout; |
25 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) | |
26 | ||
21d34711 CH |
27 | extern unsigned char admin_timeout; |
28 | #define ADMIN_TIMEOUT (admin_timeout * HZ) | |
29 | ||
5fd4ce1b CH |
30 | extern unsigned char shutdown_timeout; |
31 | #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) | |
32 | ||
ca064085 MB |
33 | enum { |
34 | NVME_NS_LBA = 0, | |
35 | NVME_NS_LIGHTNVM = 1, | |
36 | }; | |
37 | ||
106198ed CH |
38 | /* |
39 | * List of workarounds for devices that required behavior not specified in | |
40 | * the standard. | |
41 | */ | |
42 | enum nvme_quirks { | |
43 | /* | |
44 | * Prefers I/O aligned to a stripe size specified in a vendor | |
45 | * specific Identify field. | |
46 | */ | |
47 | NVME_QUIRK_STRIPE_SIZE = (1 << 0), | |
48 | }; | |
49 | ||
1c63dc66 CH |
50 | struct nvme_ctrl { |
51 | const struct nvme_ctrl_ops *ops; | |
f11bb3e2 | 52 | struct request_queue *admin_q; |
f11bb3e2 | 53 | struct device *dev; |
1673f1f0 | 54 | struct kref kref; |
f11bb3e2 | 55 | int instance; |
1c63dc66 | 56 | |
f11bb3e2 CH |
57 | char name[12]; |
58 | char serial[20]; | |
59 | char model[40]; | |
60 | char firmware_rev[8]; | |
5fd4ce1b CH |
61 | |
62 | u32 ctrl_config; | |
63 | ||
64 | u32 page_size; | |
7fd8930f CH |
65 | u32 max_hw_sectors; |
66 | u32 stripe_size; | |
f11bb3e2 CH |
67 | u16 oncs; |
68 | u16 abort_limit; | |
69 | u8 event_limit; | |
70 | u8 vwc; | |
106198ed | 71 | unsigned long quirks; |
f11bb3e2 CH |
72 | }; |
73 | ||
74 | /* | |
75 | * An NVM Express namespace is equivalent to a SCSI LUN | |
76 | */ | |
77 | struct nvme_ns { | |
78 | struct list_head list; | |
79 | ||
1c63dc66 | 80 | struct nvme_ctrl *ctrl; |
f11bb3e2 CH |
81 | struct request_queue *queue; |
82 | struct gendisk *disk; | |
83 | struct kref kref; | |
84 | ||
85 | unsigned ns_id; | |
86 | int lba_shift; | |
87 | u16 ms; | |
88 | bool ext; | |
89 | u8 pi_type; | |
ca064085 | 90 | int type; |
f11bb3e2 CH |
91 | u64 mode_select_num_blocks; |
92 | u32 mode_select_block_len; | |
93 | }; | |
94 | ||
1c63dc66 CH |
95 | struct nvme_ctrl_ops { |
96 | int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); | |
5fd4ce1b | 97 | int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); |
7fd8930f | 98 | int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); |
1673f1f0 | 99 | void (*free_ctrl)(struct nvme_ctrl *ctrl); |
1c63dc66 CH |
100 | }; |
101 | ||
102 | static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) | |
103 | { | |
104 | u32 val = 0; | |
105 | ||
106 | if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) | |
107 | return false; | |
108 | return val & NVME_CSTS_RDY; | |
109 | } | |
110 | ||
f11bb3e2 CH |
111 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
112 | { | |
113 | return (sector >> (ns->lba_shift - 9)); | |
114 | } | |
115 | ||
22944e99 CH |
116 | static inline void nvme_setup_flush(struct nvme_ns *ns, |
117 | struct nvme_command *cmnd) | |
118 | { | |
119 | memset(cmnd, 0, sizeof(*cmnd)); | |
120 | cmnd->common.opcode = nvme_cmd_flush; | |
121 | cmnd->common.nsid = cpu_to_le32(ns->ns_id); | |
122 | } | |
123 | ||
124 | static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req, | |
125 | struct nvme_command *cmnd) | |
126 | { | |
127 | u16 control = 0; | |
128 | u32 dsmgmt = 0; | |
129 | ||
130 | if (req->cmd_flags & REQ_FUA) | |
131 | control |= NVME_RW_FUA; | |
132 | if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) | |
133 | control |= NVME_RW_LR; | |
134 | ||
135 | if (req->cmd_flags & REQ_RAHEAD) | |
136 | dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; | |
137 | ||
138 | memset(cmnd, 0, sizeof(*cmnd)); | |
139 | cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); | |
140 | cmnd->rw.command_id = req->tag; | |
141 | cmnd->rw.nsid = cpu_to_le32(ns->ns_id); | |
142 | cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); | |
143 | cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); | |
144 | ||
145 | if (ns->ms) { | |
146 | switch (ns->pi_type) { | |
147 | case NVME_NS_DPS_PI_TYPE3: | |
148 | control |= NVME_RW_PRINFO_PRCHK_GUARD; | |
149 | break; | |
150 | case NVME_NS_DPS_PI_TYPE1: | |
151 | case NVME_NS_DPS_PI_TYPE2: | |
152 | control |= NVME_RW_PRINFO_PRCHK_GUARD | | |
153 | NVME_RW_PRINFO_PRCHK_REF; | |
154 | cmnd->rw.reftag = cpu_to_le32( | |
155 | nvme_block_nr(ns, blk_rq_pos(req))); | |
156 | break; | |
157 | } | |
158 | if (!blk_integrity_rq(req)) | |
159 | control |= NVME_RW_PRINFO_PRACT; | |
160 | } | |
161 | ||
162 | cmnd->rw.control = cpu_to_le16(control); | |
163 | cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); | |
164 | } | |
165 | ||
166 | ||
15a190f7 CH |
167 | static inline int nvme_error_status(u16 status) |
168 | { | |
169 | switch (status & 0x7ff) { | |
170 | case NVME_SC_SUCCESS: | |
171 | return 0; | |
172 | case NVME_SC_CAP_EXCEEDED: | |
173 | return -ENOSPC; | |
174 | default: | |
175 | return -EIO; | |
176 | } | |
177 | } | |
178 | ||
5fd4ce1b CH |
179 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); |
180 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); | |
181 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); | |
1673f1f0 | 182 | void nvme_put_ctrl(struct nvme_ctrl *ctrl); |
7fd8930f | 183 | int nvme_init_identify(struct nvme_ctrl *ctrl); |
1673f1f0 CH |
184 | void nvme_put_ns(struct nvme_ns *ns); |
185 | ||
4160982e CH |
186 | struct request *nvme_alloc_request(struct request_queue *q, |
187 | struct nvme_command *cmd, unsigned int flags); | |
f11bb3e2 CH |
188 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
189 | void *buf, unsigned bufflen); | |
190 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
4160982e CH |
191 | void *buffer, unsigned bufflen, u32 *result, unsigned timeout); |
192 | int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, | |
193 | void __user *ubuffer, unsigned bufflen, u32 *result, | |
194 | unsigned timeout); | |
0b7f1f26 KB |
195 | int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
196 | void __user *ubuffer, unsigned bufflen, | |
197 | void __user *meta_buffer, unsigned meta_len, u32 meta_seed, | |
198 | u32 *result, unsigned timeout); | |
1c63dc66 CH |
199 | int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); |
200 | int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, | |
f11bb3e2 | 201 | struct nvme_id_ns **id); |
1c63dc66 CH |
202 | int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); |
203 | int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, | |
f11bb3e2 | 204 | dma_addr_t dma_addr, u32 *result); |
1c63dc66 | 205 | int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, |
f11bb3e2 CH |
206 | dma_addr_t dma_addr, u32 *result); |
207 | ||
1673f1f0 CH |
208 | extern const struct block_device_operations nvme_fops; |
209 | extern spinlock_t dev_list_lock; | |
210 | ||
211 | int nvme_revalidate_disk(struct gendisk *disk); | |
212 | int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, | |
213 | struct nvme_passthru_cmd __user *ucmd); | |
214 | ||
f11bb3e2 CH |
215 | struct sg_io_hdr; |
216 | ||
217 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); | |
218 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); | |
219 | int nvme_sg_get_version_num(int __user *ip); | |
220 | ||
ca064085 MB |
221 | int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); |
222 | int nvme_nvm_register(struct request_queue *q, char *disk_name); | |
223 | void nvme_nvm_unregister(struct request_queue *q, char *disk_name); | |
224 | ||
f11bb3e2 | 225 | #endif /* _NVME_H */ |