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1/*
2 * Copyright (c) 2011-2014, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#ifndef _NVME_H
15#define _NVME_H
16
17#include <linux/nvme.h>
a6a5149b 18#include <linux/cdev.h>
f11bb3e2
CH
19#include <linux/pci.h>
20#include <linux/kref.h>
21#include <linux/blk-mq.h>
b0b4e09c 22#include <linux/lightnvm.h>
a98e58e5 23#include <linux/sed-opal.h>
f11bb3e2 24
8ae4e447 25extern unsigned int nvme_io_timeout;
f11bb3e2
CH
26#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
27
8ae4e447 28extern unsigned int admin_timeout;
21d34711
CH
29#define ADMIN_TIMEOUT (admin_timeout * HZ)
30
038bd4cb
SG
31#define NVME_DEFAULT_KATO 5
32#define NVME_KATO_GRACE 10
33
9a6327d2
SG
34extern struct workqueue_struct *nvme_wq;
35
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36enum {
37 NVME_NS_LBA = 0,
38 NVME_NS_LIGHTNVM = 1,
39};
40
f11bb3e2 41/*
106198ed
CH
42 * List of workarounds for devices that required behavior not specified in
43 * the standard.
f11bb3e2 44 */
106198ed
CH
45enum nvme_quirks {
46 /*
47 * Prefers I/O aligned to a stripe size specified in a vendor
48 * specific Identify field.
49 */
50 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
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KB
51
52 /*
53 * The controller doesn't handle Identify value others than 0 or 1
54 * correctly.
55 */
56 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
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57
58 /*
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59 * The controller deterministically returns O's on reads to
60 * logical blocks that deallocate was called on.
08095e70 61 */
e850fd16 62 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
54adc010
GP
63
64 /*
65 * The controller needs a delay before starts checking the device
66 * readiness, which is done by reading the NVME_CSTS_RDY bit.
67 */
68 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
c5552fde
AL
69
70 /*
71 * APST should not be used.
72 */
73 NVME_QUIRK_NO_APST = (1 << 4),
ff5350a8
AL
74
75 /*
76 * The deepest sleep state should not be used.
77 */
78 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
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79
80 /*
81 * Supports the LighNVM command set if indicated in vs[1].
82 */
83 NVME_QUIRK_LIGHTNVM = (1 << 6),
5750cb1c
JA
84
85 /*
86 * Set MEDIUM priority on SQ creation
87 */
88 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
1a862bc8 89
a676e05d
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90 /*
91 * Ignore device provided subnqn.
92 */
93 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
106198ed
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94};
95
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96/*
97 * Common request structure for NVMe passthrough. All drivers must have
98 * this structure as the first member of their request-private data.
99 */
100struct nvme_request {
101 struct nvme_command *cmd;
102 union nvme_result result;
44e44b29 103 u8 retries;
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104 u8 flags;
105 u16 status;
106};
107
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108/*
109 * Mark a bio as coming in through the mpath node.
110 */
111#define REQ_NVME_MPATH REQ_DRV
112
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113enum {
114 NVME_REQ_CANCELLED = (1 << 0),
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115};
116
117static inline struct nvme_request *nvme_req(struct request *req)
118{
119 return blk_mq_rq_to_pdu(req);
120}
121
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122/* The below value is the specific amount of delay needed before checking
123 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
124 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
125 * found empirically.
126 */
8c97eecc 127#define NVME_QUIRK_DELAY_AMOUNT 2300
54adc010 128
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CH
129enum nvme_ctrl_state {
130 NVME_CTRL_NEW,
131 NVME_CTRL_LIVE,
132 NVME_CTRL_RESETTING,
def61eca 133 NVME_CTRL_RECONNECTING,
bb8d261e 134 NVME_CTRL_DELETING,
0ff9d4e1 135 NVME_CTRL_DEAD,
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CH
136};
137
1c63dc66 138struct nvme_ctrl {
bb8d261e 139 enum nvme_ctrl_state state;
bd4da3ab 140 bool identified;
bb8d261e 141 spinlock_t lock;
1c63dc66 142 const struct nvme_ctrl_ops *ops;
f11bb3e2 143 struct request_queue *admin_q;
07bfcd09 144 struct request_queue *connect_q;
f11bb3e2 145 struct device *dev;
f11bb3e2 146 int instance;
5bae7f73 147 struct blk_mq_tag_set *tagset;
34b6c231 148 struct blk_mq_tag_set *admin_tagset;
f11bb3e2 149 struct list_head namespaces;
69d3b8ac 150 struct mutex namespaces_mutex;
d22524a4 151 struct device ctrl_device;
5bae7f73 152 struct device *device; /* char device */
a6a5149b 153 struct cdev cdev;
d86c4d8e 154 struct work_struct reset_work;
c5017e85 155 struct work_struct delete_work;
1c63dc66 156
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157 struct nvme_subsystem *subsys;
158 struct list_head subsys_entry;
159
4f1244c8 160 struct opal_dev *opal_dev;
a98e58e5 161
f11bb3e2 162 char name[12];
76e3914a 163 u16 cntlid;
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CH
164
165 u32 ctrl_config;
b6dccf7f 166 u16 mtfa;
d858e5f0 167 u32 queue_count;
5fd4ce1b 168
20d0dfe6 169 u64 cap;
5fd4ce1b 170 u32 page_size;
f11bb3e2 171 u32 max_hw_sectors;
f11bb3e2 172 u16 oncs;
8a9ae523 173 u16 oacs;
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174 u16 nssa;
175 u16 nr_streams;
6bf25d16 176 atomic_t abort_limit;
f11bb3e2 177 u8 vwc;
f3ca80fc 178 u32 vs;
07bfcd09 179 u32 sgls;
038bd4cb 180 u16 kas;
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AL
181 u8 npss;
182 u8 apsta;
e3d7874d 183 u32 aen_result;
07fbd32a 184 unsigned int shutdown_timeout;
038bd4cb 185 unsigned int kato;
f3ca80fc 186 bool subsystem;
106198ed 187 unsigned long quirks;
c5552fde 188 struct nvme_id_power_state psd[32];
84fef62d 189 struct nvme_effects_log *effects;
5955be21 190 struct work_struct scan_work;
f866fc42 191 struct work_struct async_event_work;
038bd4cb 192 struct delayed_work ka_work;
b6dccf7f 193 struct work_struct fw_act_work;
07bfcd09 194
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195 /* Power saving configuration */
196 u64 ps_max_latency_us;
76a5af84 197 bool apst_enabled;
c5552fde 198
044a9df1 199 /* PCIe only: */
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200 u32 hmpre;
201 u32 hmmin;
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202 u32 hmminds;
203 u16 hmmaxd;
fe6d53c9 204
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205 /* Fabrics only */
206 u16 sqsize;
207 u32 ioccsz;
208 u32 iorcsz;
209 u16 icdoff;
210 u16 maxcmd;
fdf9dfa8 211 int nr_reconnects;
07bfcd09 212 struct nvmf_ctrl_options *opts;
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213};
214
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215struct nvme_subsystem {
216 int instance;
217 struct device dev;
218 /*
219 * Because we unregister the device on the last put we need
220 * a separate refcount.
221 */
222 struct kref ref;
223 struct list_head entry;
224 struct mutex lock;
225 struct list_head ctrls;
ed754e5d 226 struct list_head nsheads;
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CH
227 char subnqn[NVMF_NQN_SIZE];
228 char serial[20];
229 char model[40];
230 char firmware_rev[8];
231 u8 cmic;
232 u16 vendor_id;
ed754e5d 233 struct ida ns_ida;
ab9e00cc
CH
234};
235
002fab04
CH
236/*
237 * Container structure for uniqueue namespace identifiers.
238 */
239struct nvme_ns_ids {
240 u8 eui64[8];
241 u8 nguid[16];
242 uuid_t uuid;
243};
244
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245/*
246 * Anchor structure for namespaces. There is one for each namespace in a
247 * NVMe subsystem that any of our controllers can see, and the namespace
248 * structure for each controller is chained of it. For private namespaces
249 * there is a 1:1 relation to our namespace structures, that is ->list
250 * only ever has a single entry for private namespaces.
251 */
252struct nvme_ns_head {
32acab31
CH
253#ifdef CONFIG_NVME_MULTIPATH
254 struct gendisk *disk;
255 struct nvme_ns __rcu *current_path;
256 struct bio_list requeue_list;
257 spinlock_t requeue_lock;
258 struct work_struct requeue_work;
259#endif
ed754e5d
CH
260 struct list_head list;
261 struct srcu_struct srcu;
262 struct nvme_subsystem *subsys;
263 unsigned ns_id;
264 struct nvme_ns_ids ids;
265 struct list_head entry;
266 struct kref ref;
267 int instance;
268};
269
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270struct nvme_ns {
271 struct list_head list;
272
1c63dc66 273 struct nvme_ctrl *ctrl;
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CH
274 struct request_queue *queue;
275 struct gendisk *disk;
ed754e5d 276 struct list_head siblings;
b0b4e09c 277 struct nvm_dev *ndev;
f11bb3e2 278 struct kref kref;
ed754e5d 279 struct nvme_ns_head *head;
f11bb3e2 280
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281 int lba_shift;
282 u16 ms;
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283 u16 sgs;
284 u32 sws;
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285 bool ext;
286 u8 pi_type;
646017a6 287 unsigned long flags;
646017a6 288#define NVME_NS_REMOVING 0
69d9a99c 289#define NVME_NS_DEAD 1
57eeaf8e 290 u16 noiob;
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291};
292
1c63dc66 293struct nvme_ctrl_ops {
1a353d85 294 const char *name;
e439bb12 295 struct module *module;
d3d5b87d
CH
296 unsigned int flags;
297#define NVME_F_FABRICS (1 << 0)
c81bfba9 298#define NVME_F_METADATA_SUPPORTED (1 << 1)
1c63dc66 299 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
5fd4ce1b 300 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
7fd8930f 301 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
1673f1f0 302 void (*free_ctrl)(struct nvme_ctrl *ctrl);
ad22c355 303 void (*submit_async_event)(struct nvme_ctrl *ctrl);
c5017e85 304 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
1a353d85 305 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
31b84460 306 int (*reinit_request)(void *data, struct request *rq);
f11bb3e2
CH
307};
308
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CH
309static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
310{
311 u32 val = 0;
312
313 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
314 return false;
315 return val & NVME_CSTS_RDY;
316}
317
f3ca80fc
CH
318static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
319{
320 if (!ctrl->subsystem)
321 return -ENOTTY;
322 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
323}
324
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325static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
326{
327 return (sector >> (ns->lba_shift - 9));
328}
329
6904242d
ML
330static inline void nvme_cleanup_cmd(struct request *req)
331{
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CH
332 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
333 kfree(page_address(req->special_vec.bv_page) +
334 req->special_vec.bv_offset);
335 }
6904242d
ML
336}
337
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338static inline void nvme_end_request(struct request *req, __le16 status,
339 union nvme_result result)
15a190f7 340{
27fa9bc5 341 struct nvme_request *rq = nvme_req(req);
15a190f7 342
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CH
343 rq->status = le16_to_cpu(status) >> 1;
344 rq->result = result;
08e0029a 345 blk_mq_complete_request(req);
7688faa6
CH
346}
347
d22524a4
CH
348static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
349{
350 get_device(ctrl->device);
351}
352
353static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
354{
355 put_device(ctrl->device);
356}
357
77f02a7a 358void nvme_complete_rq(struct request *req);
c55a2fd4 359void nvme_cancel_request(struct request *req, void *data, bool reserved);
bb8d261e
CH
360bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
361 enum nvme_ctrl_state new_state);
5fd4ce1b
CH
362int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
363int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
364int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
f3ca80fc
CH
365int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
366 const struct nvme_ctrl_ops *ops, unsigned long quirks);
53029b04 367void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
d09f2b45
SG
368void nvme_start_ctrl(struct nvme_ctrl *ctrl);
369void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
1673f1f0 370void nvme_put_ctrl(struct nvme_ctrl *ctrl);
7fd8930f 371int nvme_init_identify(struct nvme_ctrl *ctrl);
5bae7f73 372
5955be21 373void nvme_queue_scan(struct nvme_ctrl *ctrl);
5bae7f73 374void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
1673f1f0 375
4f1244c8
CH
376int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
377 bool send);
a98e58e5 378
7bf58533
CH
379void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
380 union nvme_result *res);
f866fc42 381
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382void nvme_stop_queues(struct nvme_ctrl *ctrl);
383void nvme_start_queues(struct nvme_ctrl *ctrl);
69d9a99c 384void nvme_kill_queues(struct nvme_ctrl *ctrl);
80bc535d 385void nvme_sync_queues(struct nvme_ctrl *ctrl);
302ad8cc
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386void nvme_unfreeze(struct nvme_ctrl *ctrl);
387void nvme_wait_freeze(struct nvme_ctrl *ctrl);
388void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
389void nvme_start_freeze(struct nvme_ctrl *ctrl);
31b84460 390int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set);
363c9aac 391
eb71f435 392#define NVME_QID_ANY -1
4160982e 393struct request *nvme_alloc_request(struct request_queue *q,
9a95e4ef 394 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
fc17b653 395blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
8093f7ca 396 struct nvme_command *cmd);
f11bb3e2
CH
397int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
398 void *buf, unsigned bufflen);
399int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
d49187e9 400 union nvme_result *result, void *buffer, unsigned bufflen,
9a95e4ef
BVA
401 unsigned timeout, int qid, int at_head,
402 blk_mq_req_flags_t flags);
e8f55d43
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403int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
404 unsigned int dword11, void *buffer, size_t buflen,
405 u32 *result);
406int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
407 unsigned int dword11, void *buffer, size_t buflen,
408 u32 *result);
9a0be7ab 409int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
038bd4cb
SG
410void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
411void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
d86c4d8e 412int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
c5017e85
CH
413int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
414int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
f11bb3e2 415
5b85b826 416extern const struct attribute_group nvme_ns_id_attr_group;
32acab31
CH
417extern const struct block_device_operations nvme_ns_head_ops;
418
419#ifdef CONFIG_NVME_MULTIPATH
e4b107a7
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420void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
421 struct nvme_ctrl *ctrl, int *flags);
32acab31
CH
422void nvme_failover_req(struct request *req);
423bool nvme_req_needs_failover(struct request *req);
424void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
425int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
426void nvme_mpath_add_disk(struct nvme_ns_head *head);
427void nvme_mpath_remove_disk(struct nvme_ns_head *head);
428
429static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
430{
431 struct nvme_ns_head *head = ns->head;
432
433 if (head && ns == srcu_dereference(head->current_path, &head->srcu))
434 rcu_assign_pointer(head->current_path, NULL);
435}
436struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
479a322f
SG
437
438static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
439{
440 struct nvme_ns_head *head = ns->head;
441
442 if (head->disk && list_empty(&head->list))
443 kblockd_schedule_work(&head->requeue_work);
444}
445
32acab31 446#else
e4b107a7
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447/*
448 * Without the multipath code enabled, multiple controller per subsystems are
449 * visible as devices and thus we cannot use the subsystem instance.
450 */
451static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
452 struct nvme_ctrl *ctrl, int *flags)
453{
454 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
455}
456
32acab31
CH
457static inline void nvme_failover_req(struct request *req)
458{
459}
460static inline bool nvme_req_needs_failover(struct request *req)
461{
462 return false;
463}
464static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
465{
466}
467static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
468 struct nvme_ns_head *head)
469{
470 return 0;
471}
472static inline void nvme_mpath_add_disk(struct nvme_ns_head *head)
473{
474}
475static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
476{
477}
478static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
479a322f
SG
479{
480}
481static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
32acab31
CH
482{
483}
484#endif /* CONFIG_NVME_MULTIPATH */
485
c4699e70 486#ifdef CONFIG_NVM
3dc87dd0 487int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
b0b4e09c 488void nvme_nvm_unregister(struct nvme_ns *ns);
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489int nvme_nvm_register_sysfs(struct nvme_ns *ns);
490void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
84d4add7 491int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
c4699e70 492#else
b0b4e09c 493static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
3dc87dd0 494 int node)
c4699e70
KB
495{
496 return 0;
497}
498
b0b4e09c 499static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
3dc87dd0
MB
500static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
501{
502 return 0;
503}
504static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
84d4add7
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505static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
506 unsigned long arg)
507{
508 return -ENOTTY;
509}
3dc87dd0
MB
510#endif /* CONFIG_NVM */
511
40267efd
SL
512static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
513{
514 return dev_to_disk(dev)->private_data;
515}
ca064085 516
5bae7f73
CH
517int __init nvme_core_init(void);
518void nvme_core_exit(void);
519
f11bb3e2 520#endif /* _NVME_H */