]>
Commit | Line | Data |
---|---|---|
71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/string.h> | |
71102307 CH |
20 | #include <linux/atomic.h> |
21 | #include <linux/blk-mq.h> | |
0b36658c | 22 | #include <linux/blk-mq-rdma.h> |
71102307 CH |
23 | #include <linux/types.h> |
24 | #include <linux/list.h> | |
25 | #include <linux/mutex.h> | |
26 | #include <linux/scatterlist.h> | |
27 | #include <linux/nvme.h> | |
71102307 CH |
28 | #include <asm/unaligned.h> |
29 | ||
30 | #include <rdma/ib_verbs.h> | |
31 | #include <rdma/rdma_cm.h> | |
71102307 CH |
32 | #include <linux/nvme-rdma.h> |
33 | ||
34 | #include "nvme.h" | |
35 | #include "fabrics.h" | |
36 | ||
37 | ||
782d820c | 38 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 | 39 | |
71102307 CH |
40 | #define NVME_RDMA_MAX_SEGMENTS 256 |
41 | ||
42 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
43 | ||
71102307 CH |
44 | /* |
45 | * We handle AEN commands ourselves and don't even let the | |
46 | * block layer know about them. | |
47 | */ | |
48 | #define NVME_RDMA_NR_AEN_COMMANDS 1 | |
49 | #define NVME_RDMA_AQ_BLKMQ_DEPTH \ | |
7aa1f427 | 50 | (NVME_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS) |
71102307 CH |
51 | |
52 | struct nvme_rdma_device { | |
53 | struct ib_device *dev; | |
54 | struct ib_pd *pd; | |
71102307 CH |
55 | struct kref ref; |
56 | struct list_head entry; | |
57 | }; | |
58 | ||
59 | struct nvme_rdma_qe { | |
60 | struct ib_cqe cqe; | |
61 | void *data; | |
62 | u64 dma; | |
63 | }; | |
64 | ||
65 | struct nvme_rdma_queue; | |
66 | struct nvme_rdma_request { | |
d49187e9 | 67 | struct nvme_request req; |
71102307 CH |
68 | struct ib_mr *mr; |
69 | struct nvme_rdma_qe sqe; | |
70 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; | |
71 | u32 num_sge; | |
72 | int nents; | |
73 | bool inline_data; | |
71102307 CH |
74 | struct ib_reg_wr reg_wr; |
75 | struct ib_cqe reg_cqe; | |
76 | struct nvme_rdma_queue *queue; | |
77 | struct sg_table sg_table; | |
78 | struct scatterlist first_sgl[]; | |
79 | }; | |
80 | ||
81 | enum nvme_rdma_queue_flags { | |
b282a88d | 82 | NVME_RDMA_Q_LIVE = 0, |
abf87d5e | 83 | NVME_RDMA_Q_DELETING = 1, |
71102307 CH |
84 | }; |
85 | ||
86 | struct nvme_rdma_queue { | |
87 | struct nvme_rdma_qe *rsp_ring; | |
5e599d73 | 88 | atomic_t sig_count; |
71102307 CH |
89 | int queue_size; |
90 | size_t cmnd_capsule_len; | |
91 | struct nvme_rdma_ctrl *ctrl; | |
92 | struct nvme_rdma_device *device; | |
93 | struct ib_cq *ib_cq; | |
94 | struct ib_qp *qp; | |
95 | ||
96 | unsigned long flags; | |
97 | struct rdma_cm_id *cm_id; | |
98 | int cm_error; | |
99 | struct completion cm_done; | |
100 | }; | |
101 | ||
102 | struct nvme_rdma_ctrl { | |
71102307 CH |
103 | /* read only in the hot path */ |
104 | struct nvme_rdma_queue *queues; | |
71102307 CH |
105 | |
106 | /* other member variables */ | |
71102307 CH |
107 | struct blk_mq_tag_set tag_set; |
108 | struct work_struct delete_work; | |
71102307 CH |
109 | struct work_struct err_work; |
110 | ||
111 | struct nvme_rdma_qe async_event_sqe; | |
112 | ||
71102307 CH |
113 | struct delayed_work reconnect_work; |
114 | ||
115 | struct list_head list; | |
116 | ||
117 | struct blk_mq_tag_set admin_tag_set; | |
118 | struct nvme_rdma_device *device; | |
119 | ||
71102307 CH |
120 | u32 max_fr_pages; |
121 | ||
0928f9b4 SG |
122 | struct sockaddr_storage addr; |
123 | struct sockaddr_storage src_addr; | |
71102307 CH |
124 | |
125 | struct nvme_ctrl ctrl; | |
126 | }; | |
127 | ||
128 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
129 | { | |
130 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
131 | } | |
132 | ||
133 | static LIST_HEAD(device_list); | |
134 | static DEFINE_MUTEX(device_list_mutex); | |
135 | ||
136 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
137 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
138 | ||
71102307 CH |
139 | /* |
140 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
141 | * unsafe. With it turned off we will have to register a global rkey that | |
142 | * allows read and write access to all physical memory. | |
143 | */ | |
144 | static bool register_always = true; | |
145 | module_param(register_always, bool, 0444); | |
146 | MODULE_PARM_DESC(register_always, | |
147 | "Use memory registration even for contiguous memory regions"); | |
148 | ||
149 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
150 | struct rdma_cm_event *event); | |
151 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 | 152 | |
90af3512 SG |
153 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
154 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; | |
155 | ||
71102307 CH |
156 | /* XXX: really should move to a generic header sooner or later.. */ |
157 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
158 | { | |
159 | *p++ = val; | |
160 | *p++ = val >> 8; | |
161 | *p++ = val >> 16; | |
162 | } | |
163 | ||
164 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
165 | { | |
166 | return queue - queue->ctrl->queues; | |
167 | } | |
168 | ||
169 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
170 | { | |
171 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
172 | } | |
173 | ||
174 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
175 | size_t capsule_size, enum dma_data_direction dir) | |
176 | { | |
177 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
178 | kfree(qe->data); | |
179 | } | |
180 | ||
181 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
182 | size_t capsule_size, enum dma_data_direction dir) | |
183 | { | |
184 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
185 | if (!qe->data) | |
186 | return -ENOMEM; | |
187 | ||
188 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
189 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
190 | kfree(qe->data); | |
191 | return -ENOMEM; | |
192 | } | |
193 | ||
194 | return 0; | |
195 | } | |
196 | ||
197 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
198 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
199 | size_t capsule_size, enum dma_data_direction dir) | |
200 | { | |
201 | int i; | |
202 | ||
203 | for (i = 0; i < ib_queue_size; i++) | |
204 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
205 | kfree(ring); | |
206 | } | |
207 | ||
208 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
209 | size_t ib_queue_size, size_t capsule_size, | |
210 | enum dma_data_direction dir) | |
211 | { | |
212 | struct nvme_rdma_qe *ring; | |
213 | int i; | |
214 | ||
215 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
216 | if (!ring) | |
217 | return NULL; | |
218 | ||
219 | for (i = 0; i < ib_queue_size; i++) { | |
220 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
221 | goto out_free_ring; | |
222 | } | |
223 | ||
224 | return ring; | |
225 | ||
226 | out_free_ring: | |
227 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
228 | return NULL; | |
229 | } | |
230 | ||
231 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
232 | { | |
27a4beef MG |
233 | pr_debug("QP event %s (%d)\n", |
234 | ib_event_msg(event->event), event->event); | |
235 | ||
71102307 CH |
236 | } |
237 | ||
238 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
239 | { | |
240 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
241 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
242 | return queue->cm_error; | |
243 | } | |
244 | ||
245 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
246 | { | |
247 | struct nvme_rdma_device *dev = queue->device; | |
248 | struct ib_qp_init_attr init_attr; | |
249 | int ret; | |
250 | ||
251 | memset(&init_attr, 0, sizeof(init_attr)); | |
252 | init_attr.event_handler = nvme_rdma_qp_event; | |
253 | /* +1 for drain */ | |
254 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
255 | /* +1 for drain */ | |
256 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
257 | init_attr.cap.max_recv_sge = 1; | |
258 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
259 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
260 | init_attr.qp_type = IB_QPT_RC; | |
261 | init_attr.send_cq = queue->ib_cq; | |
262 | init_attr.recv_cq = queue->ib_cq; | |
263 | ||
264 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
265 | ||
266 | queue->qp = queue->cm_id->qp; | |
267 | return ret; | |
268 | } | |
269 | ||
270 | static int nvme_rdma_reinit_request(void *data, struct request *rq) | |
271 | { | |
272 | struct nvme_rdma_ctrl *ctrl = data; | |
273 | struct nvme_rdma_device *dev = ctrl->device; | |
274 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
275 | int ret = 0; | |
276 | ||
71102307 CH |
277 | ib_dereg_mr(req->mr); |
278 | ||
279 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
280 | ctrl->max_fr_pages); | |
281 | if (IS_ERR(req->mr)) { | |
71102307 | 282 | ret = PTR_ERR(req->mr); |
458a9632 | 283 | req->mr = NULL; |
1bda18de | 284 | goto out; |
71102307 CH |
285 | } |
286 | ||
f5b7b559 | 287 | req->mr->need_inval = false; |
71102307 CH |
288 | |
289 | out: | |
290 | return ret; | |
291 | } | |
292 | ||
385475ee CH |
293 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
294 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 295 | { |
385475ee | 296 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 297 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 298 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
299 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
300 | struct nvme_rdma_device *dev = queue->device; | |
301 | ||
302 | if (req->mr) | |
303 | ib_dereg_mr(req->mr); | |
304 | ||
305 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
306 | DMA_TO_DEVICE); | |
307 | } | |
308 | ||
385475ee CH |
309 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
310 | struct request *rq, unsigned int hctx_idx, | |
311 | unsigned int numa_node) | |
71102307 | 312 | { |
385475ee | 313 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 314 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 315 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
316 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
317 | struct nvme_rdma_device *dev = queue->device; | |
318 | struct ib_device *ibdev = dev->dev; | |
319 | int ret; | |
320 | ||
71102307 CH |
321 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
322 | DMA_TO_DEVICE); | |
323 | if (ret) | |
324 | return ret; | |
325 | ||
326 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
327 | ctrl->max_fr_pages); | |
328 | if (IS_ERR(req->mr)) { | |
329 | ret = PTR_ERR(req->mr); | |
330 | goto out_free_qe; | |
331 | } | |
332 | ||
333 | req->queue = queue; | |
334 | ||
335 | return 0; | |
336 | ||
337 | out_free_qe: | |
338 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
339 | DMA_TO_DEVICE); | |
340 | return -ENOMEM; | |
341 | } | |
342 | ||
71102307 CH |
343 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
344 | unsigned int hctx_idx) | |
345 | { | |
346 | struct nvme_rdma_ctrl *ctrl = data; | |
347 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
348 | ||
d858e5f0 | 349 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
71102307 CH |
350 | |
351 | hctx->driver_data = queue; | |
352 | return 0; | |
353 | } | |
354 | ||
355 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
356 | unsigned int hctx_idx) | |
357 | { | |
358 | struct nvme_rdma_ctrl *ctrl = data; | |
359 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
360 | ||
361 | BUG_ON(hctx_idx != 0); | |
362 | ||
363 | hctx->driver_data = queue; | |
364 | return 0; | |
365 | } | |
366 | ||
367 | static void nvme_rdma_free_dev(struct kref *ref) | |
368 | { | |
369 | struct nvme_rdma_device *ndev = | |
370 | container_of(ref, struct nvme_rdma_device, ref); | |
371 | ||
372 | mutex_lock(&device_list_mutex); | |
373 | list_del(&ndev->entry); | |
374 | mutex_unlock(&device_list_mutex); | |
375 | ||
71102307 | 376 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
377 | kfree(ndev); |
378 | } | |
379 | ||
380 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
381 | { | |
382 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
383 | } | |
384 | ||
385 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
386 | { | |
387 | return kref_get_unless_zero(&dev->ref); | |
388 | } | |
389 | ||
390 | static struct nvme_rdma_device * | |
391 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
392 | { | |
393 | struct nvme_rdma_device *ndev; | |
394 | ||
395 | mutex_lock(&device_list_mutex); | |
396 | list_for_each_entry(ndev, &device_list, entry) { | |
397 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
398 | nvme_rdma_dev_get(ndev)) | |
399 | goto out_unlock; | |
400 | } | |
401 | ||
402 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
403 | if (!ndev) | |
404 | goto out_err; | |
405 | ||
406 | ndev->dev = cm_id->device; | |
407 | kref_init(&ndev->ref); | |
408 | ||
11975e01 CH |
409 | ndev->pd = ib_alloc_pd(ndev->dev, |
410 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
411 | if (IS_ERR(ndev->pd)) |
412 | goto out_free_dev; | |
413 | ||
71102307 CH |
414 | if (!(ndev->dev->attrs.device_cap_flags & |
415 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
416 | dev_err(&ndev->dev->dev, | |
417 | "Memory registrations not supported.\n"); | |
11975e01 | 418 | goto out_free_pd; |
71102307 CH |
419 | } |
420 | ||
421 | list_add(&ndev->entry, &device_list); | |
422 | out_unlock: | |
423 | mutex_unlock(&device_list_mutex); | |
424 | return ndev; | |
425 | ||
71102307 CH |
426 | out_free_pd: |
427 | ib_dealloc_pd(ndev->pd); | |
428 | out_free_dev: | |
429 | kfree(ndev); | |
430 | out_err: | |
431 | mutex_unlock(&device_list_mutex); | |
432 | return NULL; | |
433 | } | |
434 | ||
435 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
436 | { | |
f361e5a0 SW |
437 | struct nvme_rdma_device *dev; |
438 | struct ib_device *ibdev; | |
71102307 | 439 | |
f361e5a0 SW |
440 | dev = queue->device; |
441 | ibdev = dev->dev; | |
71102307 CH |
442 | rdma_destroy_qp(queue->cm_id); |
443 | ib_free_cq(queue->ib_cq); | |
444 | ||
445 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
446 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
447 | ||
448 | nvme_rdma_dev_put(dev); | |
449 | } | |
450 | ||
ca6e95bb | 451 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 452 | { |
ca6e95bb | 453 | struct ib_device *ibdev; |
71102307 CH |
454 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
455 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
456 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
457 | int ret; |
458 | ||
ca6e95bb SG |
459 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
460 | if (!queue->device) { | |
461 | dev_err(queue->cm_id->device->dev.parent, | |
462 | "no client data found!\n"); | |
463 | return -ECONNREFUSED; | |
464 | } | |
465 | ibdev = queue->device->dev; | |
71102307 CH |
466 | |
467 | /* | |
0b36658c SG |
468 | * Spread I/O queues completion vectors according their queue index. |
469 | * Admin queues can always go on completion vector 0. | |
71102307 | 470 | */ |
0b36658c | 471 | comp_vector = idx == 0 ? idx : idx - 1; |
71102307 CH |
472 | |
473 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
474 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
475 | cq_factor * queue->queue_size + 1, | |
476 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
477 | if (IS_ERR(queue->ib_cq)) { |
478 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 479 | goto out_put_dev; |
71102307 CH |
480 | } |
481 | ||
482 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
483 | if (ret) | |
484 | goto out_destroy_ib_cq; | |
485 | ||
486 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
487 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
488 | if (!queue->rsp_ring) { | |
489 | ret = -ENOMEM; | |
490 | goto out_destroy_qp; | |
491 | } | |
492 | ||
493 | return 0; | |
494 | ||
495 | out_destroy_qp: | |
496 | ib_destroy_qp(queue->qp); | |
497 | out_destroy_ib_cq: | |
498 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
499 | out_put_dev: |
500 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
501 | return ret; |
502 | } | |
503 | ||
41e8cfa1 | 504 | static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, |
71102307 CH |
505 | int idx, size_t queue_size) |
506 | { | |
507 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 508 | struct sockaddr *src_addr = NULL; |
71102307 CH |
509 | int ret; |
510 | ||
511 | queue = &ctrl->queues[idx]; | |
512 | queue->ctrl = ctrl; | |
513 | init_completion(&queue->cm_done); | |
514 | ||
515 | if (idx > 0) | |
516 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
517 | else | |
518 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
519 | ||
520 | queue->queue_size = queue_size; | |
5e599d73 | 521 | atomic_set(&queue->sig_count, 0); |
71102307 CH |
522 | |
523 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
524 | RDMA_PS_TCP, IB_QPT_RC); | |
525 | if (IS_ERR(queue->cm_id)) { | |
526 | dev_info(ctrl->ctrl.device, | |
527 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
528 | return PTR_ERR(queue->cm_id); | |
529 | } | |
530 | ||
8f4e8dac | 531 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 532 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 533 | |
0928f9b4 SG |
534 | queue->cm_error = -ETIMEDOUT; |
535 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
536 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
537 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
538 | if (ret) { | |
539 | dev_info(ctrl->ctrl.device, | |
540 | "rdma_resolve_addr failed (%d).\n", ret); | |
541 | goto out_destroy_cm_id; | |
542 | } | |
543 | ||
544 | ret = nvme_rdma_wait_for_cm(queue); | |
545 | if (ret) { | |
546 | dev_info(ctrl->ctrl.device, | |
547 | "rdma_resolve_addr wait failed (%d).\n", ret); | |
548 | goto out_destroy_cm_id; | |
549 | } | |
550 | ||
3b4ac786 | 551 | clear_bit(NVME_RDMA_Q_DELETING, &queue->flags); |
71102307 CH |
552 | |
553 | return 0; | |
554 | ||
555 | out_destroy_cm_id: | |
556 | rdma_destroy_id(queue->cm_id); | |
557 | return ret; | |
558 | } | |
559 | ||
560 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
561 | { | |
a57bd541 SG |
562 | if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) |
563 | return; | |
564 | ||
71102307 CH |
565 | rdma_disconnect(queue->cm_id); |
566 | ib_drain_qp(queue->qp); | |
567 | } | |
568 | ||
569 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
570 | { | |
a57bd541 SG |
571 | if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags)) |
572 | return; | |
573 | ||
71102307 CH |
574 | nvme_rdma_destroy_queue_ib(queue); |
575 | rdma_destroy_id(queue->cm_id); | |
576 | } | |
577 | ||
a57bd541 | 578 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 | 579 | { |
a57bd541 SG |
580 | int i; |
581 | ||
582 | for (i = 1; i < ctrl->ctrl.queue_count; i++) | |
583 | nvme_rdma_free_queue(&ctrl->queues[i]); | |
71102307 CH |
584 | } |
585 | ||
a57bd541 | 586 | static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 CH |
587 | { |
588 | int i; | |
589 | ||
d858e5f0 | 590 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
a57bd541 | 591 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
71102307 CH |
592 | } |
593 | ||
68e16fcf SG |
594 | static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) |
595 | { | |
596 | int ret; | |
597 | ||
598 | if (idx) | |
599 | ret = nvmf_connect_io_queue(&ctrl->ctrl, idx); | |
600 | else | |
601 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); | |
602 | ||
603 | if (!ret) | |
604 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[idx].flags); | |
605 | else | |
606 | dev_info(ctrl->ctrl.device, | |
607 | "failed to connect queue: %d ret=%d\n", idx, ret); | |
608 | return ret; | |
609 | } | |
610 | ||
611 | static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) | |
71102307 CH |
612 | { |
613 | int i, ret = 0; | |
614 | ||
d858e5f0 | 615 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
68e16fcf SG |
616 | ret = nvme_rdma_start_queue(ctrl, i); |
617 | if (ret) | |
a57bd541 | 618 | goto out_stop_queues; |
71102307 CH |
619 | } |
620 | ||
c8dbc37c SW |
621 | return 0; |
622 | ||
a57bd541 | 623 | out_stop_queues: |
68e16fcf SG |
624 | for (i--; i >= 1; i--) |
625 | nvme_rdma_stop_queue(&ctrl->queues[i]); | |
71102307 CH |
626 | return ret; |
627 | } | |
628 | ||
41e8cfa1 | 629 | static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 | 630 | { |
c248c643 | 631 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
0b36658c | 632 | struct ib_device *ibdev = ctrl->device->dev; |
c248c643 | 633 | unsigned int nr_io_queues; |
71102307 CH |
634 | int i, ret; |
635 | ||
c248c643 | 636 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
0b36658c SG |
637 | |
638 | /* | |
639 | * we map queues according to the device irq vectors for | |
640 | * optimal locality so we don't need more queues than | |
641 | * completion vectors. | |
642 | */ | |
643 | nr_io_queues = min_t(unsigned int, nr_io_queues, | |
644 | ibdev->num_comp_vectors); | |
645 | ||
c248c643 SG |
646 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); |
647 | if (ret) | |
648 | return ret; | |
649 | ||
d858e5f0 SG |
650 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
651 | if (ctrl->ctrl.queue_count < 2) | |
c248c643 SG |
652 | return 0; |
653 | ||
654 | dev_info(ctrl->ctrl.device, | |
655 | "creating %d I/O queues.\n", nr_io_queues); | |
656 | ||
d858e5f0 | 657 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
41e8cfa1 SG |
658 | ret = nvme_rdma_alloc_queue(ctrl, i, |
659 | ctrl->ctrl.sqsize + 1); | |
660 | if (ret) | |
71102307 | 661 | goto out_free_queues; |
71102307 CH |
662 | } |
663 | ||
664 | return 0; | |
665 | ||
666 | out_free_queues: | |
f361e5a0 | 667 | for (i--; i >= 1; i--) |
a57bd541 | 668 | nvme_rdma_free_queue(&ctrl->queues[i]); |
71102307 CH |
669 | |
670 | return ret; | |
671 | } | |
672 | ||
b28a308e SG |
673 | static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl, bool admin) |
674 | { | |
675 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
676 | struct blk_mq_tag_set *set = admin ? | |
677 | &ctrl->admin_tag_set : &ctrl->tag_set; | |
678 | ||
679 | blk_mq_free_tag_set(set); | |
680 | nvme_rdma_dev_put(ctrl->device); | |
681 | } | |
682 | ||
683 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, | |
684 | bool admin) | |
685 | { | |
686 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
687 | struct blk_mq_tag_set *set; | |
688 | int ret; | |
689 | ||
690 | if (admin) { | |
691 | set = &ctrl->admin_tag_set; | |
692 | memset(set, 0, sizeof(*set)); | |
693 | set->ops = &nvme_rdma_admin_mq_ops; | |
694 | set->queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
695 | set->reserved_tags = 2; /* connect + keep-alive */ | |
696 | set->numa_node = NUMA_NO_NODE; | |
697 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
698 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
699 | set->driver_data = ctrl; | |
700 | set->nr_hw_queues = 1; | |
701 | set->timeout = ADMIN_TIMEOUT; | |
702 | } else { | |
703 | set = &ctrl->tag_set; | |
704 | memset(set, 0, sizeof(*set)); | |
705 | set->ops = &nvme_rdma_mq_ops; | |
706 | set->queue_depth = nctrl->opts->queue_size; | |
707 | set->reserved_tags = 1; /* fabric connect */ | |
708 | set->numa_node = NUMA_NO_NODE; | |
709 | set->flags = BLK_MQ_F_SHOULD_MERGE; | |
710 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
711 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
712 | set->driver_data = ctrl; | |
713 | set->nr_hw_queues = nctrl->queue_count - 1; | |
714 | set->timeout = NVME_IO_TIMEOUT; | |
715 | } | |
716 | ||
717 | ret = blk_mq_alloc_tag_set(set); | |
718 | if (ret) | |
719 | goto out; | |
720 | ||
721 | /* | |
722 | * We need a reference on the device as long as the tag_set is alive, | |
723 | * as the MRs in the request structures need a valid ib_device. | |
724 | */ | |
725 | ret = nvme_rdma_dev_get(ctrl->device); | |
726 | if (!ret) { | |
727 | ret = -EINVAL; | |
728 | goto out_free_tagset; | |
729 | } | |
730 | ||
731 | return set; | |
732 | ||
733 | out_free_tagset: | |
734 | blk_mq_free_tag_set(set); | |
735 | out: | |
736 | return ERR_PTR(ret); | |
737 | } | |
738 | ||
3f02fffb SG |
739 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, |
740 | bool remove) | |
71102307 CH |
741 | { |
742 | nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe, | |
743 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
a57bd541 | 744 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
3f02fffb SG |
745 | if (remove) { |
746 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
747 | nvme_rdma_free_tagset(&ctrl->ctrl, true); | |
748 | } | |
a57bd541 | 749 | nvme_rdma_free_queue(&ctrl->queues[0]); |
71102307 CH |
750 | } |
751 | ||
3f02fffb SG |
752 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, |
753 | bool new) | |
90af3512 SG |
754 | { |
755 | int error; | |
756 | ||
41e8cfa1 | 757 | error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); |
90af3512 SG |
758 | if (error) |
759 | return error; | |
760 | ||
761 | ctrl->device = ctrl->queues[0].device; | |
762 | ||
90af3512 SG |
763 | ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS, |
764 | ctrl->device->dev->attrs.max_fast_reg_page_list_len); | |
765 | ||
3f02fffb SG |
766 | if (new) { |
767 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); | |
768 | if (IS_ERR(ctrl->ctrl.admin_tagset)) | |
769 | goto out_free_queue; | |
90af3512 | 770 | |
3f02fffb SG |
771 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
772 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
773 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
774 | goto out_free_tagset; | |
775 | } | |
776 | } else { | |
777 | error = blk_mq_reinit_tagset(&ctrl->admin_tag_set, | |
778 | nvme_rdma_reinit_request); | |
779 | if (error) | |
780 | goto out_free_queue; | |
90af3512 SG |
781 | } |
782 | ||
68e16fcf | 783 | error = nvme_rdma_start_queue(ctrl, 0); |
90af3512 SG |
784 | if (error) |
785 | goto out_cleanup_queue; | |
786 | ||
09fdc23b | 787 | error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP, |
90af3512 SG |
788 | &ctrl->ctrl.cap); |
789 | if (error) { | |
790 | dev_err(ctrl->ctrl.device, | |
791 | "prop_get NVME_REG_CAP failed\n"); | |
792 | goto out_cleanup_queue; | |
793 | } | |
794 | ||
795 | ctrl->ctrl.sqsize = | |
796 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); | |
797 | ||
798 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
799 | if (error) | |
800 | goto out_cleanup_queue; | |
801 | ||
802 | ctrl->ctrl.max_hw_sectors = | |
126e76ff | 803 | (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9); |
90af3512 SG |
804 | |
805 | error = nvme_init_identify(&ctrl->ctrl); | |
806 | if (error) | |
807 | goto out_cleanup_queue; | |
808 | ||
809 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
810 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
811 | DMA_TO_DEVICE); | |
812 | if (error) | |
813 | goto out_cleanup_queue; | |
814 | ||
815 | return 0; | |
816 | ||
817 | out_cleanup_queue: | |
3f02fffb SG |
818 | if (new) |
819 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
90af3512 | 820 | out_free_tagset: |
3f02fffb SG |
821 | if (new) |
822 | nvme_rdma_free_tagset(&ctrl->ctrl, true); | |
90af3512 SG |
823 | out_free_queue: |
824 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
825 | return error; | |
826 | } | |
827 | ||
a57bd541 SG |
828 | static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, |
829 | bool remove) | |
830 | { | |
831 | nvme_rdma_stop_io_queues(ctrl); | |
832 | if (remove) { | |
833 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
834 | nvme_rdma_free_tagset(&ctrl->ctrl, false); | |
835 | } | |
836 | nvme_rdma_free_io_queues(ctrl); | |
837 | } | |
838 | ||
839 | static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) | |
840 | { | |
841 | int ret; | |
842 | ||
41e8cfa1 | 843 | ret = nvme_rdma_alloc_io_queues(ctrl); |
a57bd541 SG |
844 | if (ret) |
845 | return ret; | |
846 | ||
847 | if (new) { | |
848 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); | |
849 | if (IS_ERR(ctrl->ctrl.tagset)) | |
850 | goto out_free_io_queues; | |
851 | ||
852 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
853 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
854 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
855 | goto out_free_tag_set; | |
856 | } | |
857 | } else { | |
858 | ret = blk_mq_reinit_tagset(&ctrl->tag_set, | |
859 | nvme_rdma_reinit_request); | |
860 | if (ret) | |
861 | goto out_free_io_queues; | |
862 | ||
863 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
864 | ctrl->ctrl.queue_count - 1); | |
865 | } | |
866 | ||
68e16fcf | 867 | ret = nvme_rdma_start_io_queues(ctrl); |
a57bd541 SG |
868 | if (ret) |
869 | goto out_cleanup_connect_q; | |
870 | ||
871 | return 0; | |
872 | ||
873 | out_cleanup_connect_q: | |
874 | if (new) | |
875 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
876 | out_free_tag_set: | |
877 | if (new) | |
878 | nvme_rdma_free_tagset(&ctrl->ctrl, false); | |
879 | out_free_io_queues: | |
880 | nvme_rdma_free_io_queues(ctrl); | |
881 | return ret; | |
71102307 CH |
882 | } |
883 | ||
884 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) | |
885 | { | |
886 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
887 | ||
888 | if (list_empty(&ctrl->list)) | |
889 | goto free_ctrl; | |
890 | ||
891 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
892 | list_del(&ctrl->list); | |
893 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
894 | ||
71102307 CH |
895 | kfree(ctrl->queues); |
896 | nvmf_free_options(nctrl->opts); | |
897 | free_ctrl: | |
898 | kfree(ctrl); | |
899 | } | |
900 | ||
fd8563ce SG |
901 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
902 | { | |
903 | /* If we are resetting/deleting then do nothing */ | |
904 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
905 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
906 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
907 | return; | |
908 | } | |
909 | ||
910 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
911 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
912 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 913 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
914 | ctrl->ctrl.opts->reconnect_delay * HZ); |
915 | } else { | |
916 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
9a6327d2 | 917 | queue_work(nvme_wq, &ctrl->delete_work); |
fd8563ce SG |
918 | } |
919 | } | |
920 | ||
71102307 CH |
921 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
922 | { | |
923 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
924 | struct nvme_rdma_ctrl, reconnect_work); | |
925 | bool changed; | |
926 | int ret; | |
927 | ||
fdf9dfa8 | 928 | ++ctrl->ctrl.nr_reconnects; |
fd8563ce | 929 | |
a57bd541 SG |
930 | if (ctrl->ctrl.queue_count > 1) |
931 | nvme_rdma_destroy_io_queues(ctrl, false); | |
553cd9ef | 932 | |
31fdf184 SG |
933 | nvme_rdma_destroy_admin_queue(ctrl, false); |
934 | ret = nvme_rdma_configure_admin_queue(ctrl, false); | |
71102307 | 935 | if (ret) |
e818a5b4 | 936 | goto requeue; |
71102307 | 937 | |
d858e5f0 | 938 | if (ctrl->ctrl.queue_count > 1) { |
a57bd541 | 939 | ret = nvme_rdma_configure_io_queues(ctrl, false); |
71102307 | 940 | if (ret) |
e818a5b4 | 941 | goto requeue; |
71102307 CH |
942 | } |
943 | ||
944 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
945 | WARN_ON_ONCE(!changed); | |
fdf9dfa8 | 946 | ctrl->ctrl.nr_reconnects = 0; |
71102307 | 947 | |
d09f2b45 | 948 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
949 | |
950 | dev_info(ctrl->ctrl.device, "Successfully reconnected\n"); | |
951 | ||
952 | return; | |
953 | ||
71102307 | 954 | requeue: |
fd8563ce | 955 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 956 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 957 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
958 | } |
959 | ||
960 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
961 | { | |
962 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
963 | struct nvme_rdma_ctrl, err_work); | |
964 | ||
d09f2b45 | 965 | nvme_stop_ctrl(&ctrl->ctrl); |
e89ca58f | 966 | |
148b4e7f | 967 | if (ctrl->ctrl.queue_count > 1) { |
71102307 | 968 | nvme_stop_queues(&ctrl->ctrl); |
148b4e7f SG |
969 | nvme_rdma_stop_io_queues(ctrl); |
970 | } | |
fb051339 | 971 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
148b4e7f | 972 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
71102307 CH |
973 | |
974 | /* We must take care of fastfail/requeue all our inflight requests */ | |
d858e5f0 | 975 | if (ctrl->ctrl.queue_count > 1) |
71102307 CH |
976 | blk_mq_tagset_busy_iter(&ctrl->tag_set, |
977 | nvme_cancel_request, &ctrl->ctrl); | |
978 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
979 | nvme_cancel_request, &ctrl->ctrl); | |
980 | ||
e818a5b4 SG |
981 | /* |
982 | * queues are not a live anymore, so restart the queues to fail fast | |
983 | * new IO | |
984 | */ | |
fb051339 | 985 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
e818a5b4 SG |
986 | nvme_start_queues(&ctrl->ctrl); |
987 | ||
fd8563ce | 988 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
989 | } |
990 | ||
991 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
992 | { | |
993 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
994 | return; | |
995 | ||
9a6327d2 | 996 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
997 | } |
998 | ||
999 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
1000 | const char *op) | |
1001 | { | |
1002 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1003 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1004 | ||
1005 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
1006 | dev_info(ctrl->ctrl.device, | |
1007 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
1008 | op, wc->wr_cqe, | |
1009 | ib_wc_status_msg(wc->status), wc->status); | |
1010 | nvme_rdma_error_recovery(ctrl); | |
1011 | } | |
1012 | ||
1013 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
1014 | { | |
1015 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1016 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
1017 | } | |
1018 | ||
1019 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
1020 | { | |
1021 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1022 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); | |
1023 | } | |
1024 | ||
1025 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
1026 | struct nvme_rdma_request *req) | |
1027 | { | |
1028 | struct ib_send_wr *bad_wr; | |
1029 | struct ib_send_wr wr = { | |
1030 | .opcode = IB_WR_LOCAL_INV, | |
1031 | .next = NULL, | |
1032 | .num_sge = 0, | |
1033 | .send_flags = 0, | |
1034 | .ex.invalidate_rkey = req->mr->rkey, | |
1035 | }; | |
1036 | ||
1037 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
1038 | wr.wr_cqe = &req->reg_cqe; | |
1039 | ||
1040 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
1041 | } | |
1042 | ||
1043 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
1044 | struct request *rq) | |
1045 | { | |
1046 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1047 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1048 | struct nvme_rdma_device *dev = queue->device; | |
1049 | struct ib_device *ibdev = dev->dev; | |
1050 | int res; | |
1051 | ||
1052 | if (!blk_rq_bytes(rq)) | |
1053 | return; | |
1054 | ||
f5b7b559 | 1055 | if (req->mr->need_inval) { |
71102307 | 1056 | res = nvme_rdma_inv_rkey(queue, req); |
a7b7c7a1 | 1057 | if (unlikely(res < 0)) { |
71102307 CH |
1058 | dev_err(ctrl->ctrl.device, |
1059 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
1060 | req->mr->rkey, res); | |
1061 | nvme_rdma_error_recovery(queue->ctrl); | |
1062 | } | |
1063 | } | |
1064 | ||
1065 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
1066 | req->nents, rq_data_dir(rq) == | |
1067 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
1068 | ||
1069 | nvme_cleanup_cmd(rq); | |
1070 | sg_free_table_chained(&req->sg_table, true); | |
1071 | } | |
1072 | ||
1073 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
1074 | { | |
1075 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1076 | ||
1077 | sg->addr = 0; | |
1078 | put_unaligned_le24(0, sg->length); | |
1079 | put_unaligned_le32(0, sg->key); | |
1080 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
1081 | return 0; | |
1082 | } | |
1083 | ||
1084 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
1085 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1086 | { | |
1087 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
1088 | ||
1089 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
1090 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
1091 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
1092 | ||
1093 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
1094 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
1095 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
1096 | ||
1097 | req->inline_data = true; | |
1098 | req->num_sge++; | |
1099 | return 0; | |
1100 | } | |
1101 | ||
1102 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
1103 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1104 | { | |
1105 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1106 | ||
1107 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
1108 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 1109 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
1110 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
1111 | return 0; | |
1112 | } | |
1113 | ||
1114 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
1115 | struct nvme_rdma_request *req, struct nvme_command *c, | |
1116 | int count) | |
1117 | { | |
1118 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1119 | int nr; | |
1120 | ||
b925a2dc MG |
1121 | /* |
1122 | * Align the MR to a 4K page size to match the ctrl page size and | |
1123 | * the block virtual boundary. | |
1124 | */ | |
1125 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K); | |
a7b7c7a1 | 1126 | if (unlikely(nr < count)) { |
71102307 CH |
1127 | if (nr < 0) |
1128 | return nr; | |
1129 | return -EINVAL; | |
1130 | } | |
1131 | ||
1132 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
1133 | ||
1134 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
1135 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
1136 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
1137 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
1138 | req->reg_wr.wr.num_sge = 0; | |
1139 | req->reg_wr.mr = req->mr; | |
1140 | req->reg_wr.key = req->mr->rkey; | |
1141 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
1142 | IB_ACCESS_REMOTE_READ | | |
1143 | IB_ACCESS_REMOTE_WRITE; | |
1144 | ||
f5b7b559 | 1145 | req->mr->need_inval = true; |
71102307 CH |
1146 | |
1147 | sg->addr = cpu_to_le64(req->mr->iova); | |
1148 | put_unaligned_le24(req->mr->length, sg->length); | |
1149 | put_unaligned_le32(req->mr->rkey, sg->key); | |
1150 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
1151 | NVME_SGL_FMT_INVALIDATE; | |
1152 | ||
1153 | return 0; | |
1154 | } | |
1155 | ||
1156 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 1157 | struct request *rq, struct nvme_command *c) |
71102307 CH |
1158 | { |
1159 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1160 | struct nvme_rdma_device *dev = queue->device; | |
1161 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 1162 | int count, ret; |
71102307 CH |
1163 | |
1164 | req->num_sge = 1; | |
1165 | req->inline_data = false; | |
f5b7b559 | 1166 | req->mr->need_inval = false; |
71102307 CH |
1167 | |
1168 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
1169 | ||
1170 | if (!blk_rq_bytes(rq)) | |
1171 | return nvme_rdma_set_sg_null(c); | |
1172 | ||
1173 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
1174 | ret = sg_alloc_table_chained(&req->sg_table, |
1175 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
1176 | if (ret) |
1177 | return -ENOMEM; | |
1178 | ||
f9d03f96 | 1179 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 1180 | |
f9d03f96 | 1181 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
1182 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
1183 | if (unlikely(count <= 0)) { | |
1184 | sg_free_table_chained(&req->sg_table, true); | |
1185 | return -EIO; | |
1186 | } | |
1187 | ||
1188 | if (count == 1) { | |
b131c61d CH |
1189 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
1190 | blk_rq_payload_bytes(rq) <= | |
1191 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
1192 | return nvme_rdma_map_sg_inline(queue, req, c); |
1193 | ||
11975e01 | 1194 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
1195 | return nvme_rdma_map_sg_single(queue, req, c); |
1196 | } | |
1197 | ||
1198 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
1199 | } | |
1200 | ||
1201 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1202 | { | |
1203 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1204 | nvme_rdma_wr_error(cq, wc, "SEND"); | |
1205 | } | |
1206 | ||
5e599d73 MR |
1207 | /* |
1208 | * We want to signal completion at least every queue depth/2. This returns the | |
1209 | * largest power of two that is not above half of (queue size + 1) to optimize | |
1210 | * (avoid divisions). | |
1211 | */ | |
1212 | static inline bool nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue) | |
0544f549 | 1213 | { |
5e599d73 | 1214 | int limit = 1 << ilog2((queue->queue_size + 1) / 2); |
0544f549 | 1215 | |
5e599d73 | 1216 | return (atomic_inc_return(&queue->sig_count) & (limit - 1)) == 0; |
0544f549 MR |
1217 | } |
1218 | ||
71102307 CH |
1219 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
1220 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
1221 | struct ib_send_wr *first, bool flush) | |
1222 | { | |
1223 | struct ib_send_wr wr, *bad_wr; | |
1224 | int ret; | |
1225 | ||
1226 | sge->addr = qe->dma; | |
1227 | sge->length = sizeof(struct nvme_command), | |
1228 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1229 | ||
1230 | qe->cqe.done = nvme_rdma_send_done; | |
1231 | ||
1232 | wr.next = NULL; | |
1233 | wr.wr_cqe = &qe->cqe; | |
1234 | wr.sg_list = sge; | |
1235 | wr.num_sge = num_sge; | |
1236 | wr.opcode = IB_WR_SEND; | |
1237 | wr.send_flags = 0; | |
1238 | ||
1239 | /* | |
1240 | * Unsignalled send completions are another giant desaster in the | |
1241 | * IB Verbs spec: If we don't regularly post signalled sends | |
1242 | * the send queue will fill up and only a QP reset will rescue us. | |
1243 | * Would have been way to obvious to handle this in hardware or | |
1244 | * at least the RDMA stack.. | |
1245 | * | |
71102307 CH |
1246 | * Always signal the flushes. The magic request used for the flush |
1247 | * sequencer is not allocated in our driver's tagset and it's | |
1248 | * triggered to be freed by blk_cleanup_queue(). So we need to | |
1249 | * always mark it as signaled to ensure that the "wr_cqe", which is | |
b43daedc | 1250 | * embedded in request's payload, is not freed when __ib_process_cq() |
71102307 CH |
1251 | * calls wr_cqe->done(). |
1252 | */ | |
0544f549 | 1253 | if (nvme_rdma_queue_sig_limit(queue) || flush) |
71102307 CH |
1254 | wr.send_flags |= IB_SEND_SIGNALED; |
1255 | ||
1256 | if (first) | |
1257 | first->next = ≀ | |
1258 | else | |
1259 | first = ≀ | |
1260 | ||
1261 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
a7b7c7a1 | 1262 | if (unlikely(ret)) { |
71102307 CH |
1263 | dev_err(queue->ctrl->ctrl.device, |
1264 | "%s failed with error code %d\n", __func__, ret); | |
1265 | } | |
1266 | return ret; | |
1267 | } | |
1268 | ||
1269 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1270 | struct nvme_rdma_qe *qe) | |
1271 | { | |
1272 | struct ib_recv_wr wr, *bad_wr; | |
1273 | struct ib_sge list; | |
1274 | int ret; | |
1275 | ||
1276 | list.addr = qe->dma; | |
1277 | list.length = sizeof(struct nvme_completion); | |
1278 | list.lkey = queue->device->pd->local_dma_lkey; | |
1279 | ||
1280 | qe->cqe.done = nvme_rdma_recv_done; | |
1281 | ||
1282 | wr.next = NULL; | |
1283 | wr.wr_cqe = &qe->cqe; | |
1284 | wr.sg_list = &list; | |
1285 | wr.num_sge = 1; | |
1286 | ||
1287 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
a7b7c7a1 | 1288 | if (unlikely(ret)) { |
71102307 CH |
1289 | dev_err(queue->ctrl->ctrl.device, |
1290 | "%s failed with error code %d\n", __func__, ret); | |
1291 | } | |
1292 | return ret; | |
1293 | } | |
1294 | ||
1295 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1296 | { | |
1297 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1298 | ||
1299 | if (queue_idx == 0) | |
1300 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1301 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1302 | } | |
1303 | ||
1304 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx) | |
1305 | { | |
1306 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1307 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1308 | struct ib_device *dev = queue->device->dev; | |
1309 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1310 | struct nvme_command *cmd = sqe->data; | |
1311 | struct ib_sge sge; | |
1312 | int ret; | |
1313 | ||
1314 | if (WARN_ON_ONCE(aer_idx != 0)) | |
1315 | return; | |
1316 | ||
1317 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); | |
1318 | ||
1319 | memset(cmd, 0, sizeof(*cmd)); | |
1320 | cmd->common.opcode = nvme_admin_async_event; | |
1321 | cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1322 | cmd->common.flags |= NVME_CMD_SGL_METABUF; | |
1323 | nvme_rdma_set_sg_null(cmd); | |
1324 | ||
1325 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), | |
1326 | DMA_TO_DEVICE); | |
1327 | ||
1328 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false); | |
1329 | WARN_ON_ONCE(ret); | |
1330 | } | |
1331 | ||
1332 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1333 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1334 | { | |
71102307 CH |
1335 | struct request *rq; |
1336 | struct nvme_rdma_request *req; | |
1337 | int ret = 0; | |
1338 | ||
71102307 CH |
1339 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1340 | if (!rq) { | |
1341 | dev_err(queue->ctrl->ctrl.device, | |
1342 | "tag 0x%x on QP %#x not found\n", | |
1343 | cqe->command_id, queue->qp->qp_num); | |
1344 | nvme_rdma_error_recovery(queue->ctrl); | |
1345 | return ret; | |
1346 | } | |
1347 | req = blk_mq_rq_to_pdu(rq); | |
1348 | ||
71102307 CH |
1349 | if (rq->tag == tag) |
1350 | ret = 1; | |
1351 | ||
1352 | if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) && | |
1353 | wc->ex.invalidate_rkey == req->mr->rkey) | |
f5b7b559 | 1354 | req->mr->need_inval = false; |
71102307 | 1355 | |
27fa9bc5 | 1356 | nvme_end_request(rq, cqe->status, cqe->result); |
71102307 CH |
1357 | return ret; |
1358 | } | |
1359 | ||
1360 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1361 | { | |
1362 | struct nvme_rdma_qe *qe = | |
1363 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1364 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1365 | struct ib_device *ibdev = queue->device->dev; | |
1366 | struct nvme_completion *cqe = qe->data; | |
1367 | const size_t len = sizeof(struct nvme_completion); | |
1368 | int ret = 0; | |
1369 | ||
1370 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1371 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1372 | return 0; | |
1373 | } | |
1374 | ||
1375 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1376 | /* | |
1377 | * AEN requests are special as they don't time out and can | |
1378 | * survive any kind of queue freeze and often don't respond to | |
1379 | * aborts. We don't even bother to allocate a struct request | |
1380 | * for them but rather special case them here. | |
1381 | */ | |
1382 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
1383 | cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH)) | |
7bf58533 CH |
1384 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1385 | &cqe->result); | |
71102307 CH |
1386 | else |
1387 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1388 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1389 | ||
1390 | nvme_rdma_post_recv(queue, qe); | |
1391 | return ret; | |
1392 | } | |
1393 | ||
1394 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1395 | { | |
1396 | __nvme_rdma_recv_done(cq, wc, -1); | |
1397 | } | |
1398 | ||
1399 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1400 | { | |
1401 | int ret, i; | |
1402 | ||
1403 | for (i = 0; i < queue->queue_size; i++) { | |
1404 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1405 | if (ret) | |
1406 | goto out_destroy_queue_ib; | |
1407 | } | |
1408 | ||
1409 | return 0; | |
1410 | ||
1411 | out_destroy_queue_ib: | |
1412 | nvme_rdma_destroy_queue_ib(queue); | |
1413 | return ret; | |
1414 | } | |
1415 | ||
1416 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1417 | struct rdma_cm_event *ev) | |
1418 | { | |
7f03953c SW |
1419 | struct rdma_cm_id *cm_id = queue->cm_id; |
1420 | int status = ev->status; | |
1421 | const char *rej_msg; | |
1422 | const struct nvme_rdma_cm_rej *rej_data; | |
1423 | u8 rej_data_len; | |
1424 | ||
1425 | rej_msg = rdma_reject_msg(cm_id, status); | |
1426 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1427 | ||
1428 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1429 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1430 | |
1431 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1432 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1433 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1434 | } else { |
1435 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1436 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1437 | } |
1438 | ||
1439 | return -ECONNRESET; | |
1440 | } | |
1441 | ||
1442 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1443 | { | |
71102307 CH |
1444 | int ret; |
1445 | ||
ca6e95bb SG |
1446 | ret = nvme_rdma_create_queue_ib(queue); |
1447 | if (ret) | |
1448 | return ret; | |
71102307 CH |
1449 | |
1450 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1451 | if (ret) { | |
1452 | dev_err(queue->ctrl->ctrl.device, | |
1453 | "rdma_resolve_route failed (%d).\n", | |
1454 | queue->cm_error); | |
1455 | goto out_destroy_queue; | |
1456 | } | |
1457 | ||
1458 | return 0; | |
1459 | ||
1460 | out_destroy_queue: | |
1461 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1462 | return ret; |
1463 | } | |
1464 | ||
1465 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1466 | { | |
1467 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1468 | struct rdma_conn_param param = { }; | |
0b857b44 | 1469 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1470 | int ret; |
1471 | ||
1472 | param.qp_num = queue->qp->qp_num; | |
1473 | param.flow_control = 1; | |
1474 | ||
1475 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1476 | /* maximum retry count */ |
1477 | param.retry_count = 7; | |
71102307 CH |
1478 | param.rnr_retry_count = 7; |
1479 | param.private_data = &priv; | |
1480 | param.private_data_len = sizeof(priv); | |
1481 | ||
1482 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1483 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1484 | /* |
1485 | * set the admin queue depth to the minimum size | |
1486 | * specified by the Fabrics standard. | |
1487 | */ | |
1488 | if (priv.qid == 0) { | |
7aa1f427 SG |
1489 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1490 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1491 | } else { |
c5af8654 JF |
1492 | /* |
1493 | * current interpretation of the fabrics spec | |
1494 | * is at minimum you make hrqsize sqsize+1, or a | |
1495 | * 1's based representation of sqsize. | |
1496 | */ | |
f994d9dc | 1497 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1498 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1499 | } |
71102307 CH |
1500 | |
1501 | ret = rdma_connect(queue->cm_id, ¶m); | |
1502 | if (ret) { | |
1503 | dev_err(ctrl->ctrl.device, | |
1504 | "rdma_connect failed (%d).\n", ret); | |
1505 | goto out_destroy_queue_ib; | |
1506 | } | |
1507 | ||
1508 | return 0; | |
1509 | ||
1510 | out_destroy_queue_ib: | |
1511 | nvme_rdma_destroy_queue_ib(queue); | |
1512 | return ret; | |
1513 | } | |
1514 | ||
71102307 CH |
1515 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1516 | struct rdma_cm_event *ev) | |
1517 | { | |
1518 | struct nvme_rdma_queue *queue = cm_id->context; | |
1519 | int cm_error = 0; | |
1520 | ||
1521 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1522 | rdma_event_msg(ev->event), ev->event, | |
1523 | ev->status, cm_id); | |
1524 | ||
1525 | switch (ev->event) { | |
1526 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1527 | cm_error = nvme_rdma_addr_resolved(queue); | |
1528 | break; | |
1529 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1530 | cm_error = nvme_rdma_route_resolved(queue); | |
1531 | break; | |
1532 | case RDMA_CM_EVENT_ESTABLISHED: | |
1533 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1534 | /* complete cm_done regardless of success/failure */ | |
1535 | complete(&queue->cm_done); | |
1536 | return 0; | |
1537 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1538 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1539 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1540 | break; | |
71102307 CH |
1541 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1542 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1543 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e SG |
1544 | nvme_rdma_destroy_queue_ib(queue); |
1545 | case RDMA_CM_EVENT_ADDR_ERROR: | |
71102307 CH |
1546 | dev_dbg(queue->ctrl->ctrl.device, |
1547 | "CM error event %d\n", ev->event); | |
1548 | cm_error = -ECONNRESET; | |
1549 | break; | |
1550 | case RDMA_CM_EVENT_DISCONNECTED: | |
1551 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1552 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1553 | dev_dbg(queue->ctrl->ctrl.device, | |
1554 | "disconnect received - connection closed\n"); | |
1555 | nvme_rdma_error_recovery(queue->ctrl); | |
1556 | break; | |
1557 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1558 | /* device removal is handled via the ib_client API */ |
1559 | break; | |
71102307 CH |
1560 | default: |
1561 | dev_err(queue->ctrl->ctrl.device, | |
1562 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1563 | nvme_rdma_error_recovery(queue->ctrl); | |
1564 | break; | |
1565 | } | |
1566 | ||
1567 | if (cm_error) { | |
1568 | queue->cm_error = cm_error; | |
1569 | complete(&queue->cm_done); | |
1570 | } | |
1571 | ||
1572 | return 0; | |
1573 | } | |
1574 | ||
1575 | static enum blk_eh_timer_return | |
1576 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1577 | { | |
1578 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1579 | ||
1580 | /* queue error recovery */ | |
1581 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1582 | ||
1583 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1584 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1585 | |
1586 | return BLK_EH_HANDLED; | |
1587 | } | |
1588 | ||
553cd9ef CH |
1589 | /* |
1590 | * We cannot accept any other command until the Connect command has completed. | |
1591 | */ | |
a104c9f2 CH |
1592 | static inline blk_status_t |
1593 | nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq) | |
553cd9ef CH |
1594 | { |
1595 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { | |
1392370e | 1596 | struct nvme_command *cmd = nvme_req(rq)->cmd; |
553cd9ef | 1597 | |
57292b58 | 1598 | if (!blk_rq_is_passthrough(rq) || |
553cd9ef | 1599 | cmd->common.opcode != nvme_fabrics_command || |
e818a5b4 SG |
1600 | cmd->fabrics.fctype != nvme_fabrics_type_connect) { |
1601 | /* | |
1602 | * reconnecting state means transport disruption, which | |
1603 | * can take a long time and even might fail permanently, | |
1604 | * so we can't let incoming I/O be requeued forever. | |
1605 | * fail it fast to allow upper layers a chance to | |
1606 | * failover. | |
1607 | */ | |
1608 | if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
a104c9f2 CH |
1609 | return BLK_STS_IOERR; |
1610 | return BLK_STS_RESOURCE; /* try again later */ | |
e818a5b4 | 1611 | } |
553cd9ef CH |
1612 | } |
1613 | ||
e818a5b4 | 1614 | return 0; |
553cd9ef CH |
1615 | } |
1616 | ||
fc17b653 | 1617 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1618 | const struct blk_mq_queue_data *bd) |
1619 | { | |
1620 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1621 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1622 | struct request *rq = bd->rq; | |
1623 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1624 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1625 | struct nvme_command *c = sqe->data; | |
1626 | bool flush = false; | |
1627 | struct ib_device *dev; | |
fc17b653 CH |
1628 | blk_status_t ret; |
1629 | int err; | |
71102307 CH |
1630 | |
1631 | WARN_ON_ONCE(rq->tag < 0); | |
1632 | ||
e818a5b4 SG |
1633 | ret = nvme_rdma_queue_is_ready(queue, rq); |
1634 | if (unlikely(ret)) | |
a104c9f2 | 1635 | return ret; |
553cd9ef | 1636 | |
71102307 CH |
1637 | dev = queue->device->dev; |
1638 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1639 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1640 | ||
1641 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1642 | if (ret) |
71102307 CH |
1643 | return ret; |
1644 | ||
71102307 CH |
1645 | blk_mq_start_request(rq); |
1646 | ||
fc17b653 | 1647 | err = nvme_rdma_map_data(queue, rq, c); |
a7b7c7a1 | 1648 | if (unlikely(err < 0)) { |
71102307 | 1649 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1650 | "Failed to map data (%d)\n", err); |
71102307 CH |
1651 | nvme_cleanup_cmd(rq); |
1652 | goto err; | |
1653 | } | |
1654 | ||
1655 | ib_dma_sync_single_for_device(dev, sqe->dma, | |
1656 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1657 | ||
aebf526b | 1658 | if (req_op(rq) == REQ_OP_FLUSH) |
71102307 | 1659 | flush = true; |
fc17b653 | 1660 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f5b7b559 | 1661 | req->mr->need_inval ? &req->reg_wr.wr : NULL, flush); |
a7b7c7a1 | 1662 | if (unlikely(err)) { |
71102307 CH |
1663 | nvme_rdma_unmap_data(queue, rq); |
1664 | goto err; | |
1665 | } | |
1666 | ||
fc17b653 | 1667 | return BLK_STS_OK; |
71102307 | 1668 | err: |
fc17b653 CH |
1669 | if (err == -ENOMEM || err == -EAGAIN) |
1670 | return BLK_STS_RESOURCE; | |
1671 | return BLK_STS_IOERR; | |
71102307 CH |
1672 | } |
1673 | ||
1674 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1675 | { | |
1676 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1677 | struct ib_cq *cq = queue->ib_cq; | |
1678 | struct ib_wc wc; | |
1679 | int found = 0; | |
1680 | ||
71102307 CH |
1681 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1682 | struct ib_cqe *cqe = wc.wr_cqe; | |
1683 | ||
1684 | if (cqe) { | |
1685 | if (cqe->done == nvme_rdma_recv_done) | |
1686 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1687 | else | |
1688 | cqe->done(cq, &wc); | |
1689 | } | |
1690 | } | |
1691 | ||
1692 | return found; | |
1693 | } | |
1694 | ||
1695 | static void nvme_rdma_complete_rq(struct request *rq) | |
1696 | { | |
1697 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1698 | |
77f02a7a CH |
1699 | nvme_rdma_unmap_data(req->queue, rq); |
1700 | nvme_complete_rq(rq); | |
71102307 CH |
1701 | } |
1702 | ||
0b36658c SG |
1703 | static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) |
1704 | { | |
1705 | struct nvme_rdma_ctrl *ctrl = set->driver_data; | |
1706 | ||
1707 | return blk_mq_rdma_map_queues(set, ctrl->device->dev, 0); | |
1708 | } | |
1709 | ||
f363b089 | 1710 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1711 | .queue_rq = nvme_rdma_queue_rq, |
1712 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1713 | .init_request = nvme_rdma_init_request, |
1714 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1715 | .init_hctx = nvme_rdma_init_hctx, |
1716 | .poll = nvme_rdma_poll, | |
1717 | .timeout = nvme_rdma_timeout, | |
0b36658c | 1718 | .map_queues = nvme_rdma_map_queues, |
71102307 CH |
1719 | }; |
1720 | ||
f363b089 | 1721 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1722 | .queue_rq = nvme_rdma_queue_rq, |
1723 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1724 | .init_request = nvme_rdma_init_request, |
1725 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1726 | .init_hctx = nvme_rdma_init_admin_hctx, |
1727 | .timeout = nvme_rdma_timeout, | |
1728 | }; | |
1729 | ||
18398af2 | 1730 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
71102307 | 1731 | { |
71102307 CH |
1732 | cancel_work_sync(&ctrl->err_work); |
1733 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1734 | ||
d858e5f0 | 1735 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1736 | nvme_stop_queues(&ctrl->ctrl); |
1737 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1738 | nvme_cancel_request, &ctrl->ctrl); | |
a57bd541 | 1739 | nvme_rdma_destroy_io_queues(ctrl, shutdown); |
71102307 CH |
1740 | } |
1741 | ||
18398af2 | 1742 | if (shutdown) |
71102307 | 1743 | nvme_shutdown_ctrl(&ctrl->ctrl); |
18398af2 SG |
1744 | else |
1745 | nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
71102307 | 1746 | |
fb051339 | 1747 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1748 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
1749 | nvme_cancel_request, &ctrl->ctrl); | |
fb051339 | 1750 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
3f02fffb | 1751 | nvme_rdma_destroy_admin_queue(ctrl, shutdown); |
71102307 CH |
1752 | } |
1753 | ||
370ae6e4 | 1754 | static void nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl) |
2461a8dd | 1755 | { |
d09f2b45 | 1756 | nvme_remove_namespaces(&ctrl->ctrl); |
370ae6e4 | 1757 | nvme_rdma_shutdown_ctrl(ctrl, true); |
d09f2b45 | 1758 | nvme_uninit_ctrl(&ctrl->ctrl); |
2461a8dd SG |
1759 | nvme_put_ctrl(&ctrl->ctrl); |
1760 | } | |
1761 | ||
71102307 CH |
1762 | static void nvme_rdma_del_ctrl_work(struct work_struct *work) |
1763 | { | |
1764 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1765 | struct nvme_rdma_ctrl, delete_work); | |
1766 | ||
370ae6e4 SG |
1767 | nvme_stop_ctrl(&ctrl->ctrl); |
1768 | nvme_rdma_remove_ctrl(ctrl); | |
71102307 CH |
1769 | } |
1770 | ||
1771 | static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1772 | { | |
1773 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING)) | |
1774 | return -EBUSY; | |
1775 | ||
9a6327d2 | 1776 | if (!queue_work(nvme_wq, &ctrl->delete_work)) |
71102307 CH |
1777 | return -EBUSY; |
1778 | ||
1779 | return 0; | |
1780 | } | |
1781 | ||
1782 | static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl) | |
1783 | { | |
1784 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
cdbecc8d | 1785 | int ret = 0; |
71102307 | 1786 | |
cdbecc8d SW |
1787 | /* |
1788 | * Keep a reference until all work is flushed since | |
1789 | * __nvme_rdma_del_ctrl can free the ctrl mem | |
1790 | */ | |
1791 | if (!kref_get_unless_zero(&ctrl->ctrl.kref)) | |
1792 | return -EBUSY; | |
71102307 | 1793 | ret = __nvme_rdma_del_ctrl(ctrl); |
cdbecc8d SW |
1794 | if (!ret) |
1795 | flush_work(&ctrl->delete_work); | |
1796 | nvme_put_ctrl(&ctrl->ctrl); | |
1797 | return ret; | |
71102307 CH |
1798 | } |
1799 | ||
71102307 CH |
1800 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) |
1801 | { | |
d86c4d8e CH |
1802 | struct nvme_rdma_ctrl *ctrl = |
1803 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 CH |
1804 | int ret; |
1805 | bool changed; | |
1806 | ||
d09f2b45 | 1807 | nvme_stop_ctrl(&ctrl->ctrl); |
18398af2 | 1808 | nvme_rdma_shutdown_ctrl(ctrl, false); |
71102307 | 1809 | |
3f02fffb | 1810 | ret = nvme_rdma_configure_admin_queue(ctrl, false); |
370ae6e4 SG |
1811 | if (ret) |
1812 | goto out_fail; | |
71102307 | 1813 | |
d858e5f0 | 1814 | if (ctrl->ctrl.queue_count > 1) { |
a57bd541 | 1815 | ret = nvme_rdma_configure_io_queues(ctrl, false); |
71102307 | 1816 | if (ret) |
370ae6e4 | 1817 | goto out_fail; |
71102307 CH |
1818 | } |
1819 | ||
1820 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1821 | WARN_ON_ONCE(!changed); | |
1822 | ||
d09f2b45 | 1823 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1824 | |
1825 | return; | |
1826 | ||
370ae6e4 | 1827 | out_fail: |
71102307 | 1828 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); |
370ae6e4 | 1829 | nvme_rdma_remove_ctrl(ctrl); |
71102307 CH |
1830 | } |
1831 | ||
71102307 CH |
1832 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1833 | .name = "rdma", | |
1834 | .module = THIS_MODULE, | |
d3d5b87d | 1835 | .flags = NVME_F_FABRICS, |
71102307 CH |
1836 | .reg_read32 = nvmf_reg_read32, |
1837 | .reg_read64 = nvmf_reg_read64, | |
1838 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1839 | .free_ctrl = nvme_rdma_free_ctrl, |
1840 | .submit_async_event = nvme_rdma_submit_async_event, | |
1841 | .delete_ctrl = nvme_rdma_del_ctrl, | |
71102307 CH |
1842 | .get_address = nvmf_get_address, |
1843 | }; | |
1844 | ||
71102307 CH |
1845 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1846 | struct nvmf_ctrl_options *opts) | |
1847 | { | |
1848 | struct nvme_rdma_ctrl *ctrl; | |
1849 | int ret; | |
1850 | bool changed; | |
0928f9b4 | 1851 | char *port; |
71102307 CH |
1852 | |
1853 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1854 | if (!ctrl) | |
1855 | return ERR_PTR(-ENOMEM); | |
1856 | ctrl->ctrl.opts = opts; | |
1857 | INIT_LIST_HEAD(&ctrl->list); | |
1858 | ||
0928f9b4 SG |
1859 | if (opts->mask & NVMF_OPT_TRSVCID) |
1860 | port = opts->trsvcid; | |
1861 | else | |
1862 | port = __stringify(NVME_RDMA_IP_PORT); | |
1863 | ||
1864 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1865 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1866 | if (ret) { |
0928f9b4 | 1867 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1868 | goto out_free_ctrl; |
1869 | } | |
1870 | ||
8f4e8dac | 1871 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1872 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1873 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1874 | if (ret) { |
0928f9b4 | 1875 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1876 | opts->host_traddr); |
1877 | goto out_free_ctrl; | |
1878 | } | |
1879 | } | |
1880 | ||
71102307 CH |
1881 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1882 | 0 /* no quirks, we're perfect! */); | |
1883 | if (ret) | |
1884 | goto out_free_ctrl; | |
1885 | ||
71102307 CH |
1886 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1887 | nvme_rdma_reconnect_ctrl_work); | |
1888 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
1889 | INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work); | |
d86c4d8e | 1890 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 | 1891 | |
d858e5f0 | 1892 | ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ |
c5af8654 | 1893 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1894 | ctrl->ctrl.kato = opts->kato; |
1895 | ||
1896 | ret = -ENOMEM; | |
d858e5f0 | 1897 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
71102307 CH |
1898 | GFP_KERNEL); |
1899 | if (!ctrl->queues) | |
1900 | goto out_uninit_ctrl; | |
1901 | ||
3f02fffb | 1902 | ret = nvme_rdma_configure_admin_queue(ctrl, true); |
71102307 CH |
1903 | if (ret) |
1904 | goto out_kfree_queues; | |
1905 | ||
1906 | /* sanity check icdoff */ | |
1907 | if (ctrl->ctrl.icdoff) { | |
1908 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
bb472baa | 1909 | ret = -EINVAL; |
71102307 CH |
1910 | goto out_remove_admin_queue; |
1911 | } | |
1912 | ||
1913 | /* sanity check keyed sgls */ | |
1914 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1915 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
bb472baa | 1916 | ret = -EINVAL; |
71102307 CH |
1917 | goto out_remove_admin_queue; |
1918 | } | |
1919 | ||
1920 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1921 | /* warn if maxcmd is lower than queue_size */ | |
1922 | dev_warn(ctrl->ctrl.device, | |
1923 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1924 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1925 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1926 | } | |
1927 | ||
76c08bf4 SJ |
1928 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1929 | /* warn if sqsize is lower than queue_size */ | |
1930 | dev_warn(ctrl->ctrl.device, | |
1931 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1932 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1933 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1934 | } | |
1935 | ||
71102307 | 1936 | if (opts->nr_io_queues) { |
a57bd541 | 1937 | ret = nvme_rdma_configure_io_queues(ctrl, true); |
71102307 CH |
1938 | if (ret) |
1939 | goto out_remove_admin_queue; | |
1940 | } | |
1941 | ||
1942 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1943 | WARN_ON_ONCE(!changed); | |
1944 | ||
0928f9b4 | 1945 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1946 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1947 | ||
1948 | kref_get(&ctrl->ctrl.kref); | |
1949 | ||
1950 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1951 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1952 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1953 | ||
d09f2b45 | 1954 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1955 | |
1956 | return &ctrl->ctrl; | |
1957 | ||
1958 | out_remove_admin_queue: | |
3f02fffb | 1959 | nvme_rdma_destroy_admin_queue(ctrl, true); |
71102307 CH |
1960 | out_kfree_queues: |
1961 | kfree(ctrl->queues); | |
1962 | out_uninit_ctrl: | |
1963 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1964 | nvme_put_ctrl(&ctrl->ctrl); | |
1965 | if (ret > 0) | |
1966 | ret = -EIO; | |
1967 | return ERR_PTR(ret); | |
1968 | out_free_ctrl: | |
1969 | kfree(ctrl); | |
1970 | return ERR_PTR(ret); | |
1971 | } | |
1972 | ||
1973 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
1974 | .name = "rdma", | |
1975 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 1976 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 1977 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
1978 | .create_ctrl = nvme_rdma_create_ctrl, |
1979 | }; | |
1980 | ||
e87a911f SW |
1981 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) |
1982 | { | |
1983 | struct nvme_rdma_ctrl *ctrl; | |
1984 | ||
1985 | /* Delete all controllers using this device */ | |
1986 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1987 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1988 | if (ctrl->device->dev != ib_device) | |
1989 | continue; | |
1990 | dev_info(ctrl->ctrl.device, | |
1991 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
1992 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
1993 | __nvme_rdma_del_ctrl(ctrl); | |
1994 | } | |
1995 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1996 | ||
9a6327d2 | 1997 | flush_workqueue(nvme_wq); |
e87a911f SW |
1998 | } |
1999 | ||
2000 | static struct ib_client nvme_rdma_ib_client = { | |
2001 | .name = "nvme_rdma", | |
e87a911f SW |
2002 | .remove = nvme_rdma_remove_one |
2003 | }; | |
2004 | ||
71102307 CH |
2005 | static int __init nvme_rdma_init_module(void) |
2006 | { | |
e87a911f SW |
2007 | int ret; |
2008 | ||
e87a911f | 2009 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 2010 | if (ret) |
9a6327d2 | 2011 | return ret; |
a56c79cf SG |
2012 | |
2013 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
2014 | if (ret) | |
2015 | goto err_unreg_client; | |
e87a911f | 2016 | |
a56c79cf | 2017 | return 0; |
e87a911f | 2018 | |
a56c79cf SG |
2019 | err_unreg_client: |
2020 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 2021 | return ret; |
71102307 CH |
2022 | } |
2023 | ||
2024 | static void __exit nvme_rdma_cleanup_module(void) | |
2025 | { | |
71102307 | 2026 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2027 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2028 | } |
2029 | ||
2030 | module_init(nvme_rdma_init_module); | |
2031 | module_exit(nvme_rdma_cleanup_module); | |
2032 | ||
2033 | MODULE_LICENSE("GPL v2"); |