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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/string.h> | |
71102307 CH |
20 | #include <linux/atomic.h> |
21 | #include <linux/blk-mq.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/mutex.h> | |
25 | #include <linux/scatterlist.h> | |
26 | #include <linux/nvme.h> | |
71102307 CH |
27 | #include <asm/unaligned.h> |
28 | ||
29 | #include <rdma/ib_verbs.h> | |
30 | #include <rdma/rdma_cm.h> | |
71102307 CH |
31 | #include <linux/nvme-rdma.h> |
32 | ||
33 | #include "nvme.h" | |
34 | #include "fabrics.h" | |
35 | ||
36 | ||
782d820c | 37 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 | 38 | |
71102307 CH |
39 | #define NVME_RDMA_MAX_SEGMENTS 256 |
40 | ||
41 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
42 | ||
71102307 CH |
43 | /* |
44 | * We handle AEN commands ourselves and don't even let the | |
45 | * block layer know about them. | |
46 | */ | |
47 | #define NVME_RDMA_NR_AEN_COMMANDS 1 | |
48 | #define NVME_RDMA_AQ_BLKMQ_DEPTH \ | |
7aa1f427 | 49 | (NVME_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS) |
71102307 CH |
50 | |
51 | struct nvme_rdma_device { | |
52 | struct ib_device *dev; | |
53 | struct ib_pd *pd; | |
71102307 CH |
54 | struct kref ref; |
55 | struct list_head entry; | |
56 | }; | |
57 | ||
58 | struct nvme_rdma_qe { | |
59 | struct ib_cqe cqe; | |
60 | void *data; | |
61 | u64 dma; | |
62 | }; | |
63 | ||
64 | struct nvme_rdma_queue; | |
65 | struct nvme_rdma_request { | |
d49187e9 | 66 | struct nvme_request req; |
71102307 CH |
67 | struct ib_mr *mr; |
68 | struct nvme_rdma_qe sqe; | |
69 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; | |
70 | u32 num_sge; | |
71 | int nents; | |
72 | bool inline_data; | |
71102307 CH |
73 | struct ib_reg_wr reg_wr; |
74 | struct ib_cqe reg_cqe; | |
75 | struct nvme_rdma_queue *queue; | |
76 | struct sg_table sg_table; | |
77 | struct scatterlist first_sgl[]; | |
78 | }; | |
79 | ||
80 | enum nvme_rdma_queue_flags { | |
b282a88d | 81 | NVME_RDMA_Q_LIVE = 0, |
abf87d5e | 82 | NVME_RDMA_Q_DELETING = 1, |
71102307 CH |
83 | }; |
84 | ||
85 | struct nvme_rdma_queue { | |
86 | struct nvme_rdma_qe *rsp_ring; | |
5e599d73 | 87 | atomic_t sig_count; |
71102307 CH |
88 | int queue_size; |
89 | size_t cmnd_capsule_len; | |
90 | struct nvme_rdma_ctrl *ctrl; | |
91 | struct nvme_rdma_device *device; | |
92 | struct ib_cq *ib_cq; | |
93 | struct ib_qp *qp; | |
94 | ||
95 | unsigned long flags; | |
96 | struct rdma_cm_id *cm_id; | |
97 | int cm_error; | |
98 | struct completion cm_done; | |
99 | }; | |
100 | ||
101 | struct nvme_rdma_ctrl { | |
71102307 CH |
102 | /* read only in the hot path */ |
103 | struct nvme_rdma_queue *queues; | |
71102307 CH |
104 | |
105 | /* other member variables */ | |
71102307 CH |
106 | struct blk_mq_tag_set tag_set; |
107 | struct work_struct delete_work; | |
71102307 CH |
108 | struct work_struct err_work; |
109 | ||
110 | struct nvme_rdma_qe async_event_sqe; | |
111 | ||
71102307 CH |
112 | struct delayed_work reconnect_work; |
113 | ||
114 | struct list_head list; | |
115 | ||
116 | struct blk_mq_tag_set admin_tag_set; | |
117 | struct nvme_rdma_device *device; | |
118 | ||
71102307 CH |
119 | u32 max_fr_pages; |
120 | ||
0928f9b4 SG |
121 | struct sockaddr_storage addr; |
122 | struct sockaddr_storage src_addr; | |
71102307 CH |
123 | |
124 | struct nvme_ctrl ctrl; | |
125 | }; | |
126 | ||
127 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
128 | { | |
129 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
130 | } | |
131 | ||
132 | static LIST_HEAD(device_list); | |
133 | static DEFINE_MUTEX(device_list_mutex); | |
134 | ||
135 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
136 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
137 | ||
71102307 CH |
138 | /* |
139 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
140 | * unsafe. With it turned off we will have to register a global rkey that | |
141 | * allows read and write access to all physical memory. | |
142 | */ | |
143 | static bool register_always = true; | |
144 | module_param(register_always, bool, 0444); | |
145 | MODULE_PARM_DESC(register_always, | |
146 | "Use memory registration even for contiguous memory regions"); | |
147 | ||
148 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
149 | struct rdma_cm_event *event); | |
150 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 | 151 | |
90af3512 SG |
152 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
153 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; | |
154 | ||
71102307 CH |
155 | /* XXX: really should move to a generic header sooner or later.. */ |
156 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
157 | { | |
158 | *p++ = val; | |
159 | *p++ = val >> 8; | |
160 | *p++ = val >> 16; | |
161 | } | |
162 | ||
163 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
164 | { | |
165 | return queue - queue->ctrl->queues; | |
166 | } | |
167 | ||
168 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
169 | { | |
170 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
171 | } | |
172 | ||
173 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
174 | size_t capsule_size, enum dma_data_direction dir) | |
175 | { | |
176 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
177 | kfree(qe->data); | |
178 | } | |
179 | ||
180 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
181 | size_t capsule_size, enum dma_data_direction dir) | |
182 | { | |
183 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
184 | if (!qe->data) | |
185 | return -ENOMEM; | |
186 | ||
187 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
188 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
189 | kfree(qe->data); | |
190 | return -ENOMEM; | |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
195 | ||
196 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
197 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
198 | size_t capsule_size, enum dma_data_direction dir) | |
199 | { | |
200 | int i; | |
201 | ||
202 | for (i = 0; i < ib_queue_size; i++) | |
203 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
204 | kfree(ring); | |
205 | } | |
206 | ||
207 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
208 | size_t ib_queue_size, size_t capsule_size, | |
209 | enum dma_data_direction dir) | |
210 | { | |
211 | struct nvme_rdma_qe *ring; | |
212 | int i; | |
213 | ||
214 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
215 | if (!ring) | |
216 | return NULL; | |
217 | ||
218 | for (i = 0; i < ib_queue_size; i++) { | |
219 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
220 | goto out_free_ring; | |
221 | } | |
222 | ||
223 | return ring; | |
224 | ||
225 | out_free_ring: | |
226 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
227 | return NULL; | |
228 | } | |
229 | ||
230 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
231 | { | |
27a4beef MG |
232 | pr_debug("QP event %s (%d)\n", |
233 | ib_event_msg(event->event), event->event); | |
234 | ||
71102307 CH |
235 | } |
236 | ||
237 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
238 | { | |
239 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
240 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
241 | return queue->cm_error; | |
242 | } | |
243 | ||
244 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
245 | { | |
246 | struct nvme_rdma_device *dev = queue->device; | |
247 | struct ib_qp_init_attr init_attr; | |
248 | int ret; | |
249 | ||
250 | memset(&init_attr, 0, sizeof(init_attr)); | |
251 | init_attr.event_handler = nvme_rdma_qp_event; | |
252 | /* +1 for drain */ | |
253 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
254 | /* +1 for drain */ | |
255 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
256 | init_attr.cap.max_recv_sge = 1; | |
257 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
258 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
259 | init_attr.qp_type = IB_QPT_RC; | |
260 | init_attr.send_cq = queue->ib_cq; | |
261 | init_attr.recv_cq = queue->ib_cq; | |
262 | ||
263 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
264 | ||
265 | queue->qp = queue->cm_id->qp; | |
266 | return ret; | |
267 | } | |
268 | ||
269 | static int nvme_rdma_reinit_request(void *data, struct request *rq) | |
270 | { | |
271 | struct nvme_rdma_ctrl *ctrl = data; | |
272 | struct nvme_rdma_device *dev = ctrl->device; | |
273 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
274 | int ret = 0; | |
275 | ||
71102307 CH |
276 | ib_dereg_mr(req->mr); |
277 | ||
278 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
279 | ctrl->max_fr_pages); | |
280 | if (IS_ERR(req->mr)) { | |
71102307 | 281 | ret = PTR_ERR(req->mr); |
458a9632 | 282 | req->mr = NULL; |
1bda18de | 283 | goto out; |
71102307 CH |
284 | } |
285 | ||
f5b7b559 | 286 | req->mr->need_inval = false; |
71102307 CH |
287 | |
288 | out: | |
289 | return ret; | |
290 | } | |
291 | ||
385475ee CH |
292 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
293 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 294 | { |
385475ee | 295 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 296 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 297 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
298 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
299 | struct nvme_rdma_device *dev = queue->device; | |
300 | ||
301 | if (req->mr) | |
302 | ib_dereg_mr(req->mr); | |
303 | ||
304 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
305 | DMA_TO_DEVICE); | |
306 | } | |
307 | ||
385475ee CH |
308 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
309 | struct request *rq, unsigned int hctx_idx, | |
310 | unsigned int numa_node) | |
71102307 | 311 | { |
385475ee | 312 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 313 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 314 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
315 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
316 | struct nvme_rdma_device *dev = queue->device; | |
317 | struct ib_device *ibdev = dev->dev; | |
318 | int ret; | |
319 | ||
71102307 CH |
320 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
321 | DMA_TO_DEVICE); | |
322 | if (ret) | |
323 | return ret; | |
324 | ||
325 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
326 | ctrl->max_fr_pages); | |
327 | if (IS_ERR(req->mr)) { | |
328 | ret = PTR_ERR(req->mr); | |
329 | goto out_free_qe; | |
330 | } | |
331 | ||
332 | req->queue = queue; | |
333 | ||
334 | return 0; | |
335 | ||
336 | out_free_qe: | |
337 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
338 | DMA_TO_DEVICE); | |
339 | return -ENOMEM; | |
340 | } | |
341 | ||
71102307 CH |
342 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
343 | unsigned int hctx_idx) | |
344 | { | |
345 | struct nvme_rdma_ctrl *ctrl = data; | |
346 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
347 | ||
d858e5f0 | 348 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
71102307 CH |
349 | |
350 | hctx->driver_data = queue; | |
351 | return 0; | |
352 | } | |
353 | ||
354 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
355 | unsigned int hctx_idx) | |
356 | { | |
357 | struct nvme_rdma_ctrl *ctrl = data; | |
358 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
359 | ||
360 | BUG_ON(hctx_idx != 0); | |
361 | ||
362 | hctx->driver_data = queue; | |
363 | return 0; | |
364 | } | |
365 | ||
366 | static void nvme_rdma_free_dev(struct kref *ref) | |
367 | { | |
368 | struct nvme_rdma_device *ndev = | |
369 | container_of(ref, struct nvme_rdma_device, ref); | |
370 | ||
371 | mutex_lock(&device_list_mutex); | |
372 | list_del(&ndev->entry); | |
373 | mutex_unlock(&device_list_mutex); | |
374 | ||
71102307 | 375 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
376 | kfree(ndev); |
377 | } | |
378 | ||
379 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
380 | { | |
381 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
382 | } | |
383 | ||
384 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
385 | { | |
386 | return kref_get_unless_zero(&dev->ref); | |
387 | } | |
388 | ||
389 | static struct nvme_rdma_device * | |
390 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
391 | { | |
392 | struct nvme_rdma_device *ndev; | |
393 | ||
394 | mutex_lock(&device_list_mutex); | |
395 | list_for_each_entry(ndev, &device_list, entry) { | |
396 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
397 | nvme_rdma_dev_get(ndev)) | |
398 | goto out_unlock; | |
399 | } | |
400 | ||
401 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
402 | if (!ndev) | |
403 | goto out_err; | |
404 | ||
405 | ndev->dev = cm_id->device; | |
406 | kref_init(&ndev->ref); | |
407 | ||
11975e01 CH |
408 | ndev->pd = ib_alloc_pd(ndev->dev, |
409 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
410 | if (IS_ERR(ndev->pd)) |
411 | goto out_free_dev; | |
412 | ||
71102307 CH |
413 | if (!(ndev->dev->attrs.device_cap_flags & |
414 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
415 | dev_err(&ndev->dev->dev, | |
416 | "Memory registrations not supported.\n"); | |
11975e01 | 417 | goto out_free_pd; |
71102307 CH |
418 | } |
419 | ||
420 | list_add(&ndev->entry, &device_list); | |
421 | out_unlock: | |
422 | mutex_unlock(&device_list_mutex); | |
423 | return ndev; | |
424 | ||
71102307 CH |
425 | out_free_pd: |
426 | ib_dealloc_pd(ndev->pd); | |
427 | out_free_dev: | |
428 | kfree(ndev); | |
429 | out_err: | |
430 | mutex_unlock(&device_list_mutex); | |
431 | return NULL; | |
432 | } | |
433 | ||
434 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
435 | { | |
f361e5a0 SW |
436 | struct nvme_rdma_device *dev; |
437 | struct ib_device *ibdev; | |
71102307 | 438 | |
f361e5a0 SW |
439 | dev = queue->device; |
440 | ibdev = dev->dev; | |
71102307 CH |
441 | rdma_destroy_qp(queue->cm_id); |
442 | ib_free_cq(queue->ib_cq); | |
443 | ||
444 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
445 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
446 | ||
447 | nvme_rdma_dev_put(dev); | |
448 | } | |
449 | ||
ca6e95bb | 450 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 451 | { |
ca6e95bb | 452 | struct ib_device *ibdev; |
71102307 CH |
453 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
454 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
455 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
456 | int ret; |
457 | ||
ca6e95bb SG |
458 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
459 | if (!queue->device) { | |
460 | dev_err(queue->cm_id->device->dev.parent, | |
461 | "no client data found!\n"); | |
462 | return -ECONNREFUSED; | |
463 | } | |
464 | ibdev = queue->device->dev; | |
71102307 CH |
465 | |
466 | /* | |
467 | * The admin queue is barely used once the controller is live, so don't | |
468 | * bother to spread it out. | |
469 | */ | |
470 | if (idx == 0) | |
471 | comp_vector = 0; | |
472 | else | |
473 | comp_vector = idx % ibdev->num_comp_vectors; | |
474 | ||
475 | ||
476 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
477 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
478 | cq_factor * queue->queue_size + 1, | |
479 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
480 | if (IS_ERR(queue->ib_cq)) { |
481 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 482 | goto out_put_dev; |
71102307 CH |
483 | } |
484 | ||
485 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
486 | if (ret) | |
487 | goto out_destroy_ib_cq; | |
488 | ||
489 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
490 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
491 | if (!queue->rsp_ring) { | |
492 | ret = -ENOMEM; | |
493 | goto out_destroy_qp; | |
494 | } | |
495 | ||
496 | return 0; | |
497 | ||
498 | out_destroy_qp: | |
499 | ib_destroy_qp(queue->qp); | |
500 | out_destroy_ib_cq: | |
501 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
502 | out_put_dev: |
503 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
504 | return ret; |
505 | } | |
506 | ||
507 | static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl, | |
508 | int idx, size_t queue_size) | |
509 | { | |
510 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 511 | struct sockaddr *src_addr = NULL; |
71102307 CH |
512 | int ret; |
513 | ||
514 | queue = &ctrl->queues[idx]; | |
515 | queue->ctrl = ctrl; | |
516 | init_completion(&queue->cm_done); | |
517 | ||
518 | if (idx > 0) | |
519 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
520 | else | |
521 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
522 | ||
523 | queue->queue_size = queue_size; | |
5e599d73 | 524 | atomic_set(&queue->sig_count, 0); |
71102307 CH |
525 | |
526 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
527 | RDMA_PS_TCP, IB_QPT_RC); | |
528 | if (IS_ERR(queue->cm_id)) { | |
529 | dev_info(ctrl->ctrl.device, | |
530 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
531 | return PTR_ERR(queue->cm_id); | |
532 | } | |
533 | ||
8f4e8dac | 534 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 535 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 536 | |
0928f9b4 SG |
537 | queue->cm_error = -ETIMEDOUT; |
538 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
539 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
540 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
541 | if (ret) { | |
542 | dev_info(ctrl->ctrl.device, | |
543 | "rdma_resolve_addr failed (%d).\n", ret); | |
544 | goto out_destroy_cm_id; | |
545 | } | |
546 | ||
547 | ret = nvme_rdma_wait_for_cm(queue); | |
548 | if (ret) { | |
549 | dev_info(ctrl->ctrl.device, | |
550 | "rdma_resolve_addr wait failed (%d).\n", ret); | |
551 | goto out_destroy_cm_id; | |
552 | } | |
553 | ||
3b4ac786 | 554 | clear_bit(NVME_RDMA_Q_DELETING, &queue->flags); |
71102307 CH |
555 | |
556 | return 0; | |
557 | ||
558 | out_destroy_cm_id: | |
559 | rdma_destroy_id(queue->cm_id); | |
560 | return ret; | |
561 | } | |
562 | ||
563 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
564 | { | |
565 | rdma_disconnect(queue->cm_id); | |
566 | ib_drain_qp(queue->qp); | |
567 | } | |
568 | ||
569 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
570 | { | |
571 | nvme_rdma_destroy_queue_ib(queue); | |
572 | rdma_destroy_id(queue->cm_id); | |
573 | } | |
574 | ||
575 | static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue) | |
576 | { | |
e89ca58f | 577 | if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags)) |
71102307 CH |
578 | return; |
579 | nvme_rdma_stop_queue(queue); | |
580 | nvme_rdma_free_queue(queue); | |
581 | } | |
582 | ||
583 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) | |
584 | { | |
585 | int i; | |
586 | ||
d858e5f0 | 587 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
71102307 CH |
588 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
589 | } | |
590 | ||
591 | static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl) | |
592 | { | |
593 | int i, ret = 0; | |
594 | ||
d858e5f0 | 595 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
71102307 | 596 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); |
c8dbc37c SW |
597 | if (ret) { |
598 | dev_info(ctrl->ctrl.device, | |
599 | "failed to connect i/o queue: %d\n", ret); | |
600 | goto out_free_queues; | |
601 | } | |
553cd9ef | 602 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
71102307 CH |
603 | } |
604 | ||
c8dbc37c SW |
605 | return 0; |
606 | ||
607 | out_free_queues: | |
608 | nvme_rdma_free_io_queues(ctrl); | |
71102307 CH |
609 | return ret; |
610 | } | |
611 | ||
612 | static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl) | |
613 | { | |
c248c643 SG |
614 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
615 | unsigned int nr_io_queues; | |
71102307 CH |
616 | int i, ret; |
617 | ||
c248c643 SG |
618 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
619 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
620 | if (ret) | |
621 | return ret; | |
622 | ||
d858e5f0 SG |
623 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
624 | if (ctrl->ctrl.queue_count < 2) | |
c248c643 SG |
625 | return 0; |
626 | ||
627 | dev_info(ctrl->ctrl.device, | |
628 | "creating %d I/O queues.\n", nr_io_queues); | |
629 | ||
d858e5f0 | 630 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
c5af8654 JF |
631 | ret = nvme_rdma_init_queue(ctrl, i, |
632 | ctrl->ctrl.opts->queue_size); | |
71102307 CH |
633 | if (ret) { |
634 | dev_info(ctrl->ctrl.device, | |
635 | "failed to initialize i/o queue: %d\n", ret); | |
636 | goto out_free_queues; | |
637 | } | |
638 | } | |
639 | ||
640 | return 0; | |
641 | ||
642 | out_free_queues: | |
f361e5a0 | 643 | for (i--; i >= 1; i--) |
71102307 CH |
644 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
645 | ||
646 | return ret; | |
647 | } | |
648 | ||
b28a308e SG |
649 | static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl, bool admin) |
650 | { | |
651 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
652 | struct blk_mq_tag_set *set = admin ? | |
653 | &ctrl->admin_tag_set : &ctrl->tag_set; | |
654 | ||
655 | blk_mq_free_tag_set(set); | |
656 | nvme_rdma_dev_put(ctrl->device); | |
657 | } | |
658 | ||
659 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, | |
660 | bool admin) | |
661 | { | |
662 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
663 | struct blk_mq_tag_set *set; | |
664 | int ret; | |
665 | ||
666 | if (admin) { | |
667 | set = &ctrl->admin_tag_set; | |
668 | memset(set, 0, sizeof(*set)); | |
669 | set->ops = &nvme_rdma_admin_mq_ops; | |
670 | set->queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
671 | set->reserved_tags = 2; /* connect + keep-alive */ | |
672 | set->numa_node = NUMA_NO_NODE; | |
673 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
674 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
675 | set->driver_data = ctrl; | |
676 | set->nr_hw_queues = 1; | |
677 | set->timeout = ADMIN_TIMEOUT; | |
678 | } else { | |
679 | set = &ctrl->tag_set; | |
680 | memset(set, 0, sizeof(*set)); | |
681 | set->ops = &nvme_rdma_mq_ops; | |
682 | set->queue_depth = nctrl->opts->queue_size; | |
683 | set->reserved_tags = 1; /* fabric connect */ | |
684 | set->numa_node = NUMA_NO_NODE; | |
685 | set->flags = BLK_MQ_F_SHOULD_MERGE; | |
686 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
687 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
688 | set->driver_data = ctrl; | |
689 | set->nr_hw_queues = nctrl->queue_count - 1; | |
690 | set->timeout = NVME_IO_TIMEOUT; | |
691 | } | |
692 | ||
693 | ret = blk_mq_alloc_tag_set(set); | |
694 | if (ret) | |
695 | goto out; | |
696 | ||
697 | /* | |
698 | * We need a reference on the device as long as the tag_set is alive, | |
699 | * as the MRs in the request structures need a valid ib_device. | |
700 | */ | |
701 | ret = nvme_rdma_dev_get(ctrl->device); | |
702 | if (!ret) { | |
703 | ret = -EINVAL; | |
704 | goto out_free_tagset; | |
705 | } | |
706 | ||
707 | return set; | |
708 | ||
709 | out_free_tagset: | |
710 | blk_mq_free_tag_set(set); | |
711 | out: | |
712 | return ERR_PTR(ret); | |
713 | } | |
714 | ||
71102307 CH |
715 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl) |
716 | { | |
717 | nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe, | |
718 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
719 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
720 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
b28a308e | 721 | nvme_rdma_free_tagset(&ctrl->ctrl, true); |
71102307 CH |
722 | } |
723 | ||
90af3512 SG |
724 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) |
725 | { | |
726 | int error; | |
727 | ||
728 | error = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); | |
729 | if (error) | |
730 | return error; | |
731 | ||
732 | ctrl->device = ctrl->queues[0].device; | |
733 | ||
90af3512 SG |
734 | ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS, |
735 | ctrl->device->dev->attrs.max_fast_reg_page_list_len); | |
736 | ||
b28a308e SG |
737 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); |
738 | if (IS_ERR(ctrl->ctrl.admin_tagset)) | |
739 | goto out_free_queue; | |
90af3512 SG |
740 | |
741 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); | |
742 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
743 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
744 | goto out_free_tagset; | |
745 | } | |
746 | ||
747 | error = nvmf_connect_admin_queue(&ctrl->ctrl); | |
748 | if (error) | |
749 | goto out_cleanup_queue; | |
750 | ||
751 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); | |
752 | ||
753 | error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, | |
754 | &ctrl->ctrl.cap); | |
755 | if (error) { | |
756 | dev_err(ctrl->ctrl.device, | |
757 | "prop_get NVME_REG_CAP failed\n"); | |
758 | goto out_cleanup_queue; | |
759 | } | |
760 | ||
761 | ctrl->ctrl.sqsize = | |
762 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); | |
763 | ||
764 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
765 | if (error) | |
766 | goto out_cleanup_queue; | |
767 | ||
768 | ctrl->ctrl.max_hw_sectors = | |
769 | (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9); | |
770 | ||
771 | error = nvme_init_identify(&ctrl->ctrl); | |
772 | if (error) | |
773 | goto out_cleanup_queue; | |
774 | ||
775 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
776 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
777 | DMA_TO_DEVICE); | |
778 | if (error) | |
779 | goto out_cleanup_queue; | |
780 | ||
781 | return 0; | |
782 | ||
783 | out_cleanup_queue: | |
784 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
785 | out_free_tagset: | |
786 | /* disconnect and drain the queue before freeing the tagset */ | |
787 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
b28a308e | 788 | nvme_rdma_free_tagset(&ctrl->ctrl, true); |
90af3512 SG |
789 | out_free_queue: |
790 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
791 | return error; | |
792 | } | |
793 | ||
71102307 CH |
794 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) |
795 | { | |
796 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
797 | ||
798 | if (list_empty(&ctrl->list)) | |
799 | goto free_ctrl; | |
800 | ||
801 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
802 | list_del(&ctrl->list); | |
803 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
804 | ||
71102307 CH |
805 | kfree(ctrl->queues); |
806 | nvmf_free_options(nctrl->opts); | |
807 | free_ctrl: | |
808 | kfree(ctrl); | |
809 | } | |
810 | ||
fd8563ce SG |
811 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
812 | { | |
813 | /* If we are resetting/deleting then do nothing */ | |
814 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
815 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
816 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
817 | return; | |
818 | } | |
819 | ||
820 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
821 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
822 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 823 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
824 | ctrl->ctrl.opts->reconnect_delay * HZ); |
825 | } else { | |
826 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
9a6327d2 | 827 | queue_work(nvme_wq, &ctrl->delete_work); |
fd8563ce SG |
828 | } |
829 | } | |
830 | ||
71102307 CH |
831 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
832 | { | |
833 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
834 | struct nvme_rdma_ctrl, reconnect_work); | |
835 | bool changed; | |
836 | int ret; | |
837 | ||
fdf9dfa8 | 838 | ++ctrl->ctrl.nr_reconnects; |
fd8563ce | 839 | |
d858e5f0 | 840 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
841 | nvme_rdma_free_io_queues(ctrl); |
842 | ||
d352ae20 BVA |
843 | ret = blk_mq_reinit_tagset(&ctrl->tag_set, |
844 | nvme_rdma_reinit_request); | |
71102307 CH |
845 | if (ret) |
846 | goto requeue; | |
847 | } | |
848 | ||
849 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
850 | ||
d352ae20 BVA |
851 | ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set, |
852 | nvme_rdma_reinit_request); | |
71102307 CH |
853 | if (ret) |
854 | goto requeue; | |
855 | ||
7aa1f427 | 856 | ret = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
857 | if (ret) |
858 | goto requeue; | |
859 | ||
71102307 CH |
860 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
861 | if (ret) | |
e818a5b4 | 862 | goto requeue; |
71102307 | 863 | |
553cd9ef CH |
864 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
865 | ||
20d0dfe6 | 866 | ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
71102307 | 867 | if (ret) |
e818a5b4 | 868 | goto requeue; |
71102307 | 869 | |
d858e5f0 | 870 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
871 | ret = nvme_rdma_init_io_queues(ctrl); |
872 | if (ret) | |
e818a5b4 | 873 | goto requeue; |
71102307 CH |
874 | |
875 | ret = nvme_rdma_connect_io_queues(ctrl); | |
876 | if (ret) | |
e818a5b4 | 877 | goto requeue; |
4c8b99f6 SG |
878 | |
879 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
880 | ctrl->ctrl.queue_count - 1); | |
71102307 CH |
881 | } |
882 | ||
883 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
884 | WARN_ON_ONCE(!changed); | |
fdf9dfa8 | 885 | ctrl->ctrl.nr_reconnects = 0; |
71102307 | 886 | |
d09f2b45 | 887 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
888 | |
889 | dev_info(ctrl->ctrl.device, "Successfully reconnected\n"); | |
890 | ||
891 | return; | |
892 | ||
71102307 | 893 | requeue: |
fd8563ce | 894 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 895 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 896 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
897 | } |
898 | ||
899 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
900 | { | |
901 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
902 | struct nvme_rdma_ctrl, err_work); | |
e89ca58f | 903 | int i; |
71102307 | 904 | |
d09f2b45 | 905 | nvme_stop_ctrl(&ctrl->ctrl); |
e89ca58f | 906 | |
d858e5f0 | 907 | for (i = 0; i < ctrl->ctrl.queue_count; i++) |
553cd9ef | 908 | clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
e89ca58f | 909 | |
d858e5f0 | 910 | if (ctrl->ctrl.queue_count > 1) |
71102307 | 911 | nvme_stop_queues(&ctrl->ctrl); |
fb051339 | 912 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
913 | |
914 | /* We must take care of fastfail/requeue all our inflight requests */ | |
d858e5f0 | 915 | if (ctrl->ctrl.queue_count > 1) |
71102307 CH |
916 | blk_mq_tagset_busy_iter(&ctrl->tag_set, |
917 | nvme_cancel_request, &ctrl->ctrl); | |
918 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
919 | nvme_cancel_request, &ctrl->ctrl); | |
920 | ||
e818a5b4 SG |
921 | /* |
922 | * queues are not a live anymore, so restart the queues to fail fast | |
923 | * new IO | |
924 | */ | |
fb051339 | 925 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
e818a5b4 SG |
926 | nvme_start_queues(&ctrl->ctrl); |
927 | ||
fd8563ce | 928 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
929 | } |
930 | ||
931 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
932 | { | |
933 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
934 | return; | |
935 | ||
9a6327d2 | 936 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
937 | } |
938 | ||
939 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
940 | const char *op) | |
941 | { | |
942 | struct nvme_rdma_queue *queue = cq->cq_context; | |
943 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
944 | ||
945 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
946 | dev_info(ctrl->ctrl.device, | |
947 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
948 | op, wc->wr_cqe, | |
949 | ib_wc_status_msg(wc->status), wc->status); | |
950 | nvme_rdma_error_recovery(ctrl); | |
951 | } | |
952 | ||
953 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
954 | { | |
955 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
956 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
957 | } | |
958 | ||
959 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
960 | { | |
961 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
962 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); | |
963 | } | |
964 | ||
965 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
966 | struct nvme_rdma_request *req) | |
967 | { | |
968 | struct ib_send_wr *bad_wr; | |
969 | struct ib_send_wr wr = { | |
970 | .opcode = IB_WR_LOCAL_INV, | |
971 | .next = NULL, | |
972 | .num_sge = 0, | |
973 | .send_flags = 0, | |
974 | .ex.invalidate_rkey = req->mr->rkey, | |
975 | }; | |
976 | ||
977 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
978 | wr.wr_cqe = &req->reg_cqe; | |
979 | ||
980 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
981 | } | |
982 | ||
983 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
984 | struct request *rq) | |
985 | { | |
986 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
987 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
988 | struct nvme_rdma_device *dev = queue->device; | |
989 | struct ib_device *ibdev = dev->dev; | |
990 | int res; | |
991 | ||
992 | if (!blk_rq_bytes(rq)) | |
993 | return; | |
994 | ||
f5b7b559 | 995 | if (req->mr->need_inval) { |
71102307 CH |
996 | res = nvme_rdma_inv_rkey(queue, req); |
997 | if (res < 0) { | |
998 | dev_err(ctrl->ctrl.device, | |
999 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
1000 | req->mr->rkey, res); | |
1001 | nvme_rdma_error_recovery(queue->ctrl); | |
1002 | } | |
1003 | } | |
1004 | ||
1005 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
1006 | req->nents, rq_data_dir(rq) == | |
1007 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
1008 | ||
1009 | nvme_cleanup_cmd(rq); | |
1010 | sg_free_table_chained(&req->sg_table, true); | |
1011 | } | |
1012 | ||
1013 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
1014 | { | |
1015 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1016 | ||
1017 | sg->addr = 0; | |
1018 | put_unaligned_le24(0, sg->length); | |
1019 | put_unaligned_le32(0, sg->key); | |
1020 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
1025 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1026 | { | |
1027 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
1028 | ||
1029 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
1030 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
1031 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
1032 | ||
1033 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
1034 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
1035 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
1036 | ||
1037 | req->inline_data = true; | |
1038 | req->num_sge++; | |
1039 | return 0; | |
1040 | } | |
1041 | ||
1042 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
1043 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1044 | { | |
1045 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1046 | ||
1047 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
1048 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 1049 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
1050 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
1051 | return 0; | |
1052 | } | |
1053 | ||
1054 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
1055 | struct nvme_rdma_request *req, struct nvme_command *c, | |
1056 | int count) | |
1057 | { | |
1058 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1059 | int nr; | |
1060 | ||
1061 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE); | |
1062 | if (nr < count) { | |
1063 | if (nr < 0) | |
1064 | return nr; | |
1065 | return -EINVAL; | |
1066 | } | |
1067 | ||
1068 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
1069 | ||
1070 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
1071 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
1072 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
1073 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
1074 | req->reg_wr.wr.num_sge = 0; | |
1075 | req->reg_wr.mr = req->mr; | |
1076 | req->reg_wr.key = req->mr->rkey; | |
1077 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
1078 | IB_ACCESS_REMOTE_READ | | |
1079 | IB_ACCESS_REMOTE_WRITE; | |
1080 | ||
f5b7b559 | 1081 | req->mr->need_inval = true; |
71102307 CH |
1082 | |
1083 | sg->addr = cpu_to_le64(req->mr->iova); | |
1084 | put_unaligned_le24(req->mr->length, sg->length); | |
1085 | put_unaligned_le32(req->mr->rkey, sg->key); | |
1086 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
1087 | NVME_SGL_FMT_INVALIDATE; | |
1088 | ||
1089 | return 0; | |
1090 | } | |
1091 | ||
1092 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 1093 | struct request *rq, struct nvme_command *c) |
71102307 CH |
1094 | { |
1095 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1096 | struct nvme_rdma_device *dev = queue->device; | |
1097 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 1098 | int count, ret; |
71102307 CH |
1099 | |
1100 | req->num_sge = 1; | |
1101 | req->inline_data = false; | |
f5b7b559 | 1102 | req->mr->need_inval = false; |
71102307 CH |
1103 | |
1104 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
1105 | ||
1106 | if (!blk_rq_bytes(rq)) | |
1107 | return nvme_rdma_set_sg_null(c); | |
1108 | ||
1109 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
1110 | ret = sg_alloc_table_chained(&req->sg_table, |
1111 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
1112 | if (ret) |
1113 | return -ENOMEM; | |
1114 | ||
f9d03f96 | 1115 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 1116 | |
f9d03f96 | 1117 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
1118 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
1119 | if (unlikely(count <= 0)) { | |
1120 | sg_free_table_chained(&req->sg_table, true); | |
1121 | return -EIO; | |
1122 | } | |
1123 | ||
1124 | if (count == 1) { | |
b131c61d CH |
1125 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
1126 | blk_rq_payload_bytes(rq) <= | |
1127 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
1128 | return nvme_rdma_map_sg_inline(queue, req, c); |
1129 | ||
11975e01 | 1130 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
1131 | return nvme_rdma_map_sg_single(queue, req, c); |
1132 | } | |
1133 | ||
1134 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
1135 | } | |
1136 | ||
1137 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1138 | { | |
1139 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1140 | nvme_rdma_wr_error(cq, wc, "SEND"); | |
1141 | } | |
1142 | ||
5e599d73 MR |
1143 | /* |
1144 | * We want to signal completion at least every queue depth/2. This returns the | |
1145 | * largest power of two that is not above half of (queue size + 1) to optimize | |
1146 | * (avoid divisions). | |
1147 | */ | |
1148 | static inline bool nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue) | |
0544f549 | 1149 | { |
5e599d73 | 1150 | int limit = 1 << ilog2((queue->queue_size + 1) / 2); |
0544f549 | 1151 | |
5e599d73 | 1152 | return (atomic_inc_return(&queue->sig_count) & (limit - 1)) == 0; |
0544f549 MR |
1153 | } |
1154 | ||
71102307 CH |
1155 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
1156 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
1157 | struct ib_send_wr *first, bool flush) | |
1158 | { | |
1159 | struct ib_send_wr wr, *bad_wr; | |
1160 | int ret; | |
1161 | ||
1162 | sge->addr = qe->dma; | |
1163 | sge->length = sizeof(struct nvme_command), | |
1164 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1165 | ||
1166 | qe->cqe.done = nvme_rdma_send_done; | |
1167 | ||
1168 | wr.next = NULL; | |
1169 | wr.wr_cqe = &qe->cqe; | |
1170 | wr.sg_list = sge; | |
1171 | wr.num_sge = num_sge; | |
1172 | wr.opcode = IB_WR_SEND; | |
1173 | wr.send_flags = 0; | |
1174 | ||
1175 | /* | |
1176 | * Unsignalled send completions are another giant desaster in the | |
1177 | * IB Verbs spec: If we don't regularly post signalled sends | |
1178 | * the send queue will fill up and only a QP reset will rescue us. | |
1179 | * Would have been way to obvious to handle this in hardware or | |
1180 | * at least the RDMA stack.. | |
1181 | * | |
71102307 CH |
1182 | * Always signal the flushes. The magic request used for the flush |
1183 | * sequencer is not allocated in our driver's tagset and it's | |
1184 | * triggered to be freed by blk_cleanup_queue(). So we need to | |
1185 | * always mark it as signaled to ensure that the "wr_cqe", which is | |
b43daedc | 1186 | * embedded in request's payload, is not freed when __ib_process_cq() |
71102307 CH |
1187 | * calls wr_cqe->done(). |
1188 | */ | |
0544f549 | 1189 | if (nvme_rdma_queue_sig_limit(queue) || flush) |
71102307 CH |
1190 | wr.send_flags |= IB_SEND_SIGNALED; |
1191 | ||
1192 | if (first) | |
1193 | first->next = ≀ | |
1194 | else | |
1195 | first = ≀ | |
1196 | ||
1197 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
1198 | if (ret) { | |
1199 | dev_err(queue->ctrl->ctrl.device, | |
1200 | "%s failed with error code %d\n", __func__, ret); | |
1201 | } | |
1202 | return ret; | |
1203 | } | |
1204 | ||
1205 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1206 | struct nvme_rdma_qe *qe) | |
1207 | { | |
1208 | struct ib_recv_wr wr, *bad_wr; | |
1209 | struct ib_sge list; | |
1210 | int ret; | |
1211 | ||
1212 | list.addr = qe->dma; | |
1213 | list.length = sizeof(struct nvme_completion); | |
1214 | list.lkey = queue->device->pd->local_dma_lkey; | |
1215 | ||
1216 | qe->cqe.done = nvme_rdma_recv_done; | |
1217 | ||
1218 | wr.next = NULL; | |
1219 | wr.wr_cqe = &qe->cqe; | |
1220 | wr.sg_list = &list; | |
1221 | wr.num_sge = 1; | |
1222 | ||
1223 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
1224 | if (ret) { | |
1225 | dev_err(queue->ctrl->ctrl.device, | |
1226 | "%s failed with error code %d\n", __func__, ret); | |
1227 | } | |
1228 | return ret; | |
1229 | } | |
1230 | ||
1231 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1232 | { | |
1233 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1234 | ||
1235 | if (queue_idx == 0) | |
1236 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1237 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1238 | } | |
1239 | ||
1240 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx) | |
1241 | { | |
1242 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1243 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1244 | struct ib_device *dev = queue->device->dev; | |
1245 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1246 | struct nvme_command *cmd = sqe->data; | |
1247 | struct ib_sge sge; | |
1248 | int ret; | |
1249 | ||
1250 | if (WARN_ON_ONCE(aer_idx != 0)) | |
1251 | return; | |
1252 | ||
1253 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); | |
1254 | ||
1255 | memset(cmd, 0, sizeof(*cmd)); | |
1256 | cmd->common.opcode = nvme_admin_async_event; | |
1257 | cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1258 | cmd->common.flags |= NVME_CMD_SGL_METABUF; | |
1259 | nvme_rdma_set_sg_null(cmd); | |
1260 | ||
1261 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), | |
1262 | DMA_TO_DEVICE); | |
1263 | ||
1264 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false); | |
1265 | WARN_ON_ONCE(ret); | |
1266 | } | |
1267 | ||
1268 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1269 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1270 | { | |
71102307 CH |
1271 | struct request *rq; |
1272 | struct nvme_rdma_request *req; | |
1273 | int ret = 0; | |
1274 | ||
71102307 CH |
1275 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1276 | if (!rq) { | |
1277 | dev_err(queue->ctrl->ctrl.device, | |
1278 | "tag 0x%x on QP %#x not found\n", | |
1279 | cqe->command_id, queue->qp->qp_num); | |
1280 | nvme_rdma_error_recovery(queue->ctrl); | |
1281 | return ret; | |
1282 | } | |
1283 | req = blk_mq_rq_to_pdu(rq); | |
1284 | ||
71102307 CH |
1285 | if (rq->tag == tag) |
1286 | ret = 1; | |
1287 | ||
1288 | if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) && | |
1289 | wc->ex.invalidate_rkey == req->mr->rkey) | |
f5b7b559 | 1290 | req->mr->need_inval = false; |
71102307 | 1291 | |
27fa9bc5 | 1292 | nvme_end_request(rq, cqe->status, cqe->result); |
71102307 CH |
1293 | return ret; |
1294 | } | |
1295 | ||
1296 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1297 | { | |
1298 | struct nvme_rdma_qe *qe = | |
1299 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1300 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1301 | struct ib_device *ibdev = queue->device->dev; | |
1302 | struct nvme_completion *cqe = qe->data; | |
1303 | const size_t len = sizeof(struct nvme_completion); | |
1304 | int ret = 0; | |
1305 | ||
1306 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1307 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1308 | return 0; | |
1309 | } | |
1310 | ||
1311 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1312 | /* | |
1313 | * AEN requests are special as they don't time out and can | |
1314 | * survive any kind of queue freeze and often don't respond to | |
1315 | * aborts. We don't even bother to allocate a struct request | |
1316 | * for them but rather special case them here. | |
1317 | */ | |
1318 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
1319 | cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH)) | |
7bf58533 CH |
1320 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1321 | &cqe->result); | |
71102307 CH |
1322 | else |
1323 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1324 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1325 | ||
1326 | nvme_rdma_post_recv(queue, qe); | |
1327 | return ret; | |
1328 | } | |
1329 | ||
1330 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1331 | { | |
1332 | __nvme_rdma_recv_done(cq, wc, -1); | |
1333 | } | |
1334 | ||
1335 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1336 | { | |
1337 | int ret, i; | |
1338 | ||
1339 | for (i = 0; i < queue->queue_size; i++) { | |
1340 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1341 | if (ret) | |
1342 | goto out_destroy_queue_ib; | |
1343 | } | |
1344 | ||
1345 | return 0; | |
1346 | ||
1347 | out_destroy_queue_ib: | |
1348 | nvme_rdma_destroy_queue_ib(queue); | |
1349 | return ret; | |
1350 | } | |
1351 | ||
1352 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1353 | struct rdma_cm_event *ev) | |
1354 | { | |
7f03953c SW |
1355 | struct rdma_cm_id *cm_id = queue->cm_id; |
1356 | int status = ev->status; | |
1357 | const char *rej_msg; | |
1358 | const struct nvme_rdma_cm_rej *rej_data; | |
1359 | u8 rej_data_len; | |
1360 | ||
1361 | rej_msg = rdma_reject_msg(cm_id, status); | |
1362 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1363 | ||
1364 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1365 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1366 | |
1367 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1368 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1369 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1370 | } else { |
1371 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1372 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1373 | } |
1374 | ||
1375 | return -ECONNRESET; | |
1376 | } | |
1377 | ||
1378 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1379 | { | |
71102307 CH |
1380 | int ret; |
1381 | ||
ca6e95bb SG |
1382 | ret = nvme_rdma_create_queue_ib(queue); |
1383 | if (ret) | |
1384 | return ret; | |
71102307 CH |
1385 | |
1386 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1387 | if (ret) { | |
1388 | dev_err(queue->ctrl->ctrl.device, | |
1389 | "rdma_resolve_route failed (%d).\n", | |
1390 | queue->cm_error); | |
1391 | goto out_destroy_queue; | |
1392 | } | |
1393 | ||
1394 | return 0; | |
1395 | ||
1396 | out_destroy_queue: | |
1397 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1398 | return ret; |
1399 | } | |
1400 | ||
1401 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1402 | { | |
1403 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1404 | struct rdma_conn_param param = { }; | |
0b857b44 | 1405 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1406 | int ret; |
1407 | ||
1408 | param.qp_num = queue->qp->qp_num; | |
1409 | param.flow_control = 1; | |
1410 | ||
1411 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1412 | /* maximum retry count */ |
1413 | param.retry_count = 7; | |
71102307 CH |
1414 | param.rnr_retry_count = 7; |
1415 | param.private_data = &priv; | |
1416 | param.private_data_len = sizeof(priv); | |
1417 | ||
1418 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1419 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1420 | /* |
1421 | * set the admin queue depth to the minimum size | |
1422 | * specified by the Fabrics standard. | |
1423 | */ | |
1424 | if (priv.qid == 0) { | |
7aa1f427 SG |
1425 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1426 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1427 | } else { |
c5af8654 JF |
1428 | /* |
1429 | * current interpretation of the fabrics spec | |
1430 | * is at minimum you make hrqsize sqsize+1, or a | |
1431 | * 1's based representation of sqsize. | |
1432 | */ | |
f994d9dc | 1433 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1434 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1435 | } |
71102307 CH |
1436 | |
1437 | ret = rdma_connect(queue->cm_id, ¶m); | |
1438 | if (ret) { | |
1439 | dev_err(ctrl->ctrl.device, | |
1440 | "rdma_connect failed (%d).\n", ret); | |
1441 | goto out_destroy_queue_ib; | |
1442 | } | |
1443 | ||
1444 | return 0; | |
1445 | ||
1446 | out_destroy_queue_ib: | |
1447 | nvme_rdma_destroy_queue_ib(queue); | |
1448 | return ret; | |
1449 | } | |
1450 | ||
71102307 CH |
1451 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1452 | struct rdma_cm_event *ev) | |
1453 | { | |
1454 | struct nvme_rdma_queue *queue = cm_id->context; | |
1455 | int cm_error = 0; | |
1456 | ||
1457 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1458 | rdma_event_msg(ev->event), ev->event, | |
1459 | ev->status, cm_id); | |
1460 | ||
1461 | switch (ev->event) { | |
1462 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1463 | cm_error = nvme_rdma_addr_resolved(queue); | |
1464 | break; | |
1465 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1466 | cm_error = nvme_rdma_route_resolved(queue); | |
1467 | break; | |
1468 | case RDMA_CM_EVENT_ESTABLISHED: | |
1469 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1470 | /* complete cm_done regardless of success/failure */ | |
1471 | complete(&queue->cm_done); | |
1472 | return 0; | |
1473 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1474 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1475 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1476 | break; | |
71102307 CH |
1477 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1478 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1479 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e SG |
1480 | nvme_rdma_destroy_queue_ib(queue); |
1481 | case RDMA_CM_EVENT_ADDR_ERROR: | |
71102307 CH |
1482 | dev_dbg(queue->ctrl->ctrl.device, |
1483 | "CM error event %d\n", ev->event); | |
1484 | cm_error = -ECONNRESET; | |
1485 | break; | |
1486 | case RDMA_CM_EVENT_DISCONNECTED: | |
1487 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1488 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1489 | dev_dbg(queue->ctrl->ctrl.device, | |
1490 | "disconnect received - connection closed\n"); | |
1491 | nvme_rdma_error_recovery(queue->ctrl); | |
1492 | break; | |
1493 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1494 | /* device removal is handled via the ib_client API */ |
1495 | break; | |
71102307 CH |
1496 | default: |
1497 | dev_err(queue->ctrl->ctrl.device, | |
1498 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1499 | nvme_rdma_error_recovery(queue->ctrl); | |
1500 | break; | |
1501 | } | |
1502 | ||
1503 | if (cm_error) { | |
1504 | queue->cm_error = cm_error; | |
1505 | complete(&queue->cm_done); | |
1506 | } | |
1507 | ||
1508 | return 0; | |
1509 | } | |
1510 | ||
1511 | static enum blk_eh_timer_return | |
1512 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1513 | { | |
1514 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1515 | ||
1516 | /* queue error recovery */ | |
1517 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1518 | ||
1519 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1520 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1521 | |
1522 | return BLK_EH_HANDLED; | |
1523 | } | |
1524 | ||
553cd9ef CH |
1525 | /* |
1526 | * We cannot accept any other command until the Connect command has completed. | |
1527 | */ | |
a104c9f2 CH |
1528 | static inline blk_status_t |
1529 | nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq) | |
553cd9ef CH |
1530 | { |
1531 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { | |
1392370e | 1532 | struct nvme_command *cmd = nvme_req(rq)->cmd; |
553cd9ef | 1533 | |
57292b58 | 1534 | if (!blk_rq_is_passthrough(rq) || |
553cd9ef | 1535 | cmd->common.opcode != nvme_fabrics_command || |
e818a5b4 SG |
1536 | cmd->fabrics.fctype != nvme_fabrics_type_connect) { |
1537 | /* | |
1538 | * reconnecting state means transport disruption, which | |
1539 | * can take a long time and even might fail permanently, | |
1540 | * so we can't let incoming I/O be requeued forever. | |
1541 | * fail it fast to allow upper layers a chance to | |
1542 | * failover. | |
1543 | */ | |
1544 | if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
a104c9f2 CH |
1545 | return BLK_STS_IOERR; |
1546 | return BLK_STS_RESOURCE; /* try again later */ | |
e818a5b4 | 1547 | } |
553cd9ef CH |
1548 | } |
1549 | ||
e818a5b4 | 1550 | return 0; |
553cd9ef CH |
1551 | } |
1552 | ||
fc17b653 | 1553 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1554 | const struct blk_mq_queue_data *bd) |
1555 | { | |
1556 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1557 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1558 | struct request *rq = bd->rq; | |
1559 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1560 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1561 | struct nvme_command *c = sqe->data; | |
1562 | bool flush = false; | |
1563 | struct ib_device *dev; | |
fc17b653 CH |
1564 | blk_status_t ret; |
1565 | int err; | |
71102307 CH |
1566 | |
1567 | WARN_ON_ONCE(rq->tag < 0); | |
1568 | ||
e818a5b4 SG |
1569 | ret = nvme_rdma_queue_is_ready(queue, rq); |
1570 | if (unlikely(ret)) | |
a104c9f2 | 1571 | return ret; |
553cd9ef | 1572 | |
71102307 CH |
1573 | dev = queue->device->dev; |
1574 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1575 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1576 | ||
1577 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1578 | if (ret) |
71102307 CH |
1579 | return ret; |
1580 | ||
71102307 CH |
1581 | blk_mq_start_request(rq); |
1582 | ||
fc17b653 CH |
1583 | err = nvme_rdma_map_data(queue, rq, c); |
1584 | if (err < 0) { | |
71102307 | 1585 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1586 | "Failed to map data (%d)\n", err); |
71102307 CH |
1587 | nvme_cleanup_cmd(rq); |
1588 | goto err; | |
1589 | } | |
1590 | ||
1591 | ib_dma_sync_single_for_device(dev, sqe->dma, | |
1592 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1593 | ||
aebf526b | 1594 | if (req_op(rq) == REQ_OP_FLUSH) |
71102307 | 1595 | flush = true; |
fc17b653 | 1596 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f5b7b559 | 1597 | req->mr->need_inval ? &req->reg_wr.wr : NULL, flush); |
fc17b653 | 1598 | if (err) { |
71102307 CH |
1599 | nvme_rdma_unmap_data(queue, rq); |
1600 | goto err; | |
1601 | } | |
1602 | ||
fc17b653 | 1603 | return BLK_STS_OK; |
71102307 | 1604 | err: |
fc17b653 CH |
1605 | if (err == -ENOMEM || err == -EAGAIN) |
1606 | return BLK_STS_RESOURCE; | |
1607 | return BLK_STS_IOERR; | |
71102307 CH |
1608 | } |
1609 | ||
1610 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1611 | { | |
1612 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1613 | struct ib_cq *cq = queue->ib_cq; | |
1614 | struct ib_wc wc; | |
1615 | int found = 0; | |
1616 | ||
71102307 CH |
1617 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1618 | struct ib_cqe *cqe = wc.wr_cqe; | |
1619 | ||
1620 | if (cqe) { | |
1621 | if (cqe->done == nvme_rdma_recv_done) | |
1622 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1623 | else | |
1624 | cqe->done(cq, &wc); | |
1625 | } | |
1626 | } | |
1627 | ||
1628 | return found; | |
1629 | } | |
1630 | ||
1631 | static void nvme_rdma_complete_rq(struct request *rq) | |
1632 | { | |
1633 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1634 | |
77f02a7a CH |
1635 | nvme_rdma_unmap_data(req->queue, rq); |
1636 | nvme_complete_rq(rq); | |
71102307 CH |
1637 | } |
1638 | ||
f363b089 | 1639 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1640 | .queue_rq = nvme_rdma_queue_rq, |
1641 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1642 | .init_request = nvme_rdma_init_request, |
1643 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1644 | .init_hctx = nvme_rdma_init_hctx, |
1645 | .poll = nvme_rdma_poll, | |
1646 | .timeout = nvme_rdma_timeout, | |
1647 | }; | |
1648 | ||
f363b089 | 1649 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1650 | .queue_rq = nvme_rdma_queue_rq, |
1651 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1652 | .init_request = nvme_rdma_init_request, |
1653 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1654 | .init_hctx = nvme_rdma_init_admin_hctx, |
1655 | .timeout = nvme_rdma_timeout, | |
1656 | }; | |
1657 | ||
18398af2 | 1658 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
71102307 | 1659 | { |
71102307 CH |
1660 | cancel_work_sync(&ctrl->err_work); |
1661 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1662 | ||
d858e5f0 | 1663 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1664 | nvme_stop_queues(&ctrl->ctrl); |
1665 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1666 | nvme_cancel_request, &ctrl->ctrl); | |
1667 | nvme_rdma_free_io_queues(ctrl); | |
1668 | } | |
1669 | ||
18398af2 | 1670 | if (shutdown) |
71102307 | 1671 | nvme_shutdown_ctrl(&ctrl->ctrl); |
18398af2 SG |
1672 | else |
1673 | nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
71102307 | 1674 | |
fb051339 | 1675 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1676 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
1677 | nvme_cancel_request, &ctrl->ctrl); | |
fb051339 | 1678 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1679 | nvme_rdma_destroy_admin_queue(ctrl); |
1680 | } | |
1681 | ||
2461a8dd SG |
1682 | static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
1683 | { | |
d09f2b45 SG |
1684 | nvme_stop_ctrl(&ctrl->ctrl); |
1685 | nvme_remove_namespaces(&ctrl->ctrl); | |
2461a8dd | 1686 | if (shutdown) |
18398af2 | 1687 | nvme_rdma_shutdown_ctrl(ctrl, shutdown); |
a34ca17a | 1688 | |
d09f2b45 | 1689 | nvme_uninit_ctrl(&ctrl->ctrl); |
a34ca17a SG |
1690 | if (ctrl->ctrl.tagset) { |
1691 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
b28a308e | 1692 | nvme_rdma_free_tagset(&ctrl->ctrl, false); |
a34ca17a SG |
1693 | } |
1694 | ||
2461a8dd SG |
1695 | nvme_put_ctrl(&ctrl->ctrl); |
1696 | } | |
1697 | ||
71102307 CH |
1698 | static void nvme_rdma_del_ctrl_work(struct work_struct *work) |
1699 | { | |
1700 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1701 | struct nvme_rdma_ctrl, delete_work); | |
1702 | ||
2461a8dd | 1703 | __nvme_rdma_remove_ctrl(ctrl, true); |
71102307 CH |
1704 | } |
1705 | ||
1706 | static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1707 | { | |
1708 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING)) | |
1709 | return -EBUSY; | |
1710 | ||
9a6327d2 | 1711 | if (!queue_work(nvme_wq, &ctrl->delete_work)) |
71102307 CH |
1712 | return -EBUSY; |
1713 | ||
1714 | return 0; | |
1715 | } | |
1716 | ||
1717 | static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl) | |
1718 | { | |
1719 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
cdbecc8d | 1720 | int ret = 0; |
71102307 | 1721 | |
cdbecc8d SW |
1722 | /* |
1723 | * Keep a reference until all work is flushed since | |
1724 | * __nvme_rdma_del_ctrl can free the ctrl mem | |
1725 | */ | |
1726 | if (!kref_get_unless_zero(&ctrl->ctrl.kref)) | |
1727 | return -EBUSY; | |
71102307 | 1728 | ret = __nvme_rdma_del_ctrl(ctrl); |
cdbecc8d SW |
1729 | if (!ret) |
1730 | flush_work(&ctrl->delete_work); | |
1731 | nvme_put_ctrl(&ctrl->ctrl); | |
1732 | return ret; | |
71102307 CH |
1733 | } |
1734 | ||
1735 | static void nvme_rdma_remove_ctrl_work(struct work_struct *work) | |
1736 | { | |
1737 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1738 | struct nvme_rdma_ctrl, delete_work); | |
1739 | ||
2461a8dd | 1740 | __nvme_rdma_remove_ctrl(ctrl, false); |
71102307 CH |
1741 | } |
1742 | ||
1743 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) | |
1744 | { | |
d86c4d8e CH |
1745 | struct nvme_rdma_ctrl *ctrl = |
1746 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 CH |
1747 | int ret; |
1748 | bool changed; | |
1749 | ||
d09f2b45 | 1750 | nvme_stop_ctrl(&ctrl->ctrl); |
18398af2 | 1751 | nvme_rdma_shutdown_ctrl(ctrl, false); |
71102307 CH |
1752 | |
1753 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1754 | if (ret) { | |
1755 | /* ctrl is already shutdown, just remove the ctrl */ | |
1756 | INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work); | |
1757 | goto del_dead_ctrl; | |
1758 | } | |
1759 | ||
d858e5f0 | 1760 | if (ctrl->ctrl.queue_count > 1) { |
d352ae20 BVA |
1761 | ret = blk_mq_reinit_tagset(&ctrl->tag_set, |
1762 | nvme_rdma_reinit_request); | |
71102307 CH |
1763 | if (ret) |
1764 | goto del_dead_ctrl; | |
1765 | ||
1766 | ret = nvme_rdma_init_io_queues(ctrl); | |
1767 | if (ret) | |
1768 | goto del_dead_ctrl; | |
1769 | ||
1770 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1771 | if (ret) | |
1772 | goto del_dead_ctrl; | |
4c8b99f6 SG |
1773 | |
1774 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
1775 | ctrl->ctrl.queue_count - 1); | |
71102307 CH |
1776 | } |
1777 | ||
1778 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1779 | WARN_ON_ONCE(!changed); | |
1780 | ||
d09f2b45 | 1781 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1782 | |
1783 | return; | |
1784 | ||
1785 | del_dead_ctrl: | |
1786 | /* Deleting this dead controller... */ | |
1787 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); | |
9a6327d2 | 1788 | WARN_ON(!queue_work(nvme_wq, &ctrl->delete_work)); |
71102307 CH |
1789 | } |
1790 | ||
71102307 CH |
1791 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1792 | .name = "rdma", | |
1793 | .module = THIS_MODULE, | |
d3d5b87d | 1794 | .flags = NVME_F_FABRICS, |
71102307 CH |
1795 | .reg_read32 = nvmf_reg_read32, |
1796 | .reg_read64 = nvmf_reg_read64, | |
1797 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1798 | .free_ctrl = nvme_rdma_free_ctrl, |
1799 | .submit_async_event = nvme_rdma_submit_async_event, | |
1800 | .delete_ctrl = nvme_rdma_del_ctrl, | |
71102307 CH |
1801 | .get_address = nvmf_get_address, |
1802 | }; | |
1803 | ||
1804 | static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl) | |
1805 | { | |
71102307 CH |
1806 | int ret; |
1807 | ||
71102307 CH |
1808 | ret = nvme_rdma_init_io_queues(ctrl); |
1809 | if (ret) | |
1810 | return ret; | |
1811 | ||
b28a308e SG |
1812 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); |
1813 | if (IS_ERR(ctrl->ctrl.tagset)) | |
71102307 CH |
1814 | goto out_free_io_queues; |
1815 | ||
71102307 CH |
1816 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); |
1817 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
1818 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
1819 | goto out_free_tag_set; | |
1820 | } | |
1821 | ||
1822 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1823 | if (ret) | |
1824 | goto out_cleanup_connect_q; | |
1825 | ||
1826 | return 0; | |
1827 | ||
1828 | out_cleanup_connect_q: | |
1829 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1830 | out_free_tag_set: | |
b28a308e | 1831 | nvme_rdma_free_tagset(&ctrl->ctrl, false); |
71102307 CH |
1832 | out_free_io_queues: |
1833 | nvme_rdma_free_io_queues(ctrl); | |
1834 | return ret; | |
1835 | } | |
1836 | ||
71102307 CH |
1837 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1838 | struct nvmf_ctrl_options *opts) | |
1839 | { | |
1840 | struct nvme_rdma_ctrl *ctrl; | |
1841 | int ret; | |
1842 | bool changed; | |
0928f9b4 | 1843 | char *port; |
71102307 CH |
1844 | |
1845 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1846 | if (!ctrl) | |
1847 | return ERR_PTR(-ENOMEM); | |
1848 | ctrl->ctrl.opts = opts; | |
1849 | INIT_LIST_HEAD(&ctrl->list); | |
1850 | ||
0928f9b4 SG |
1851 | if (opts->mask & NVMF_OPT_TRSVCID) |
1852 | port = opts->trsvcid; | |
1853 | else | |
1854 | port = __stringify(NVME_RDMA_IP_PORT); | |
1855 | ||
1856 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1857 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1858 | if (ret) { |
0928f9b4 | 1859 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1860 | goto out_free_ctrl; |
1861 | } | |
1862 | ||
8f4e8dac | 1863 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1864 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1865 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1866 | if (ret) { |
0928f9b4 | 1867 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1868 | opts->host_traddr); |
1869 | goto out_free_ctrl; | |
1870 | } | |
1871 | } | |
1872 | ||
71102307 CH |
1873 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1874 | 0 /* no quirks, we're perfect! */); | |
1875 | if (ret) | |
1876 | goto out_free_ctrl; | |
1877 | ||
71102307 CH |
1878 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1879 | nvme_rdma_reconnect_ctrl_work); | |
1880 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
1881 | INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work); | |
d86c4d8e | 1882 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 | 1883 | |
d858e5f0 | 1884 | ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ |
c5af8654 | 1885 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1886 | ctrl->ctrl.kato = opts->kato; |
1887 | ||
1888 | ret = -ENOMEM; | |
d858e5f0 | 1889 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
71102307 CH |
1890 | GFP_KERNEL); |
1891 | if (!ctrl->queues) | |
1892 | goto out_uninit_ctrl; | |
1893 | ||
1894 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1895 | if (ret) | |
1896 | goto out_kfree_queues; | |
1897 | ||
1898 | /* sanity check icdoff */ | |
1899 | if (ctrl->ctrl.icdoff) { | |
1900 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
bb472baa | 1901 | ret = -EINVAL; |
71102307 CH |
1902 | goto out_remove_admin_queue; |
1903 | } | |
1904 | ||
1905 | /* sanity check keyed sgls */ | |
1906 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1907 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
bb472baa | 1908 | ret = -EINVAL; |
71102307 CH |
1909 | goto out_remove_admin_queue; |
1910 | } | |
1911 | ||
1912 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1913 | /* warn if maxcmd is lower than queue_size */ | |
1914 | dev_warn(ctrl->ctrl.device, | |
1915 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1916 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1917 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1918 | } | |
1919 | ||
76c08bf4 SJ |
1920 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1921 | /* warn if sqsize is lower than queue_size */ | |
1922 | dev_warn(ctrl->ctrl.device, | |
1923 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1924 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1925 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1926 | } | |
1927 | ||
71102307 CH |
1928 | if (opts->nr_io_queues) { |
1929 | ret = nvme_rdma_create_io_queues(ctrl); | |
1930 | if (ret) | |
1931 | goto out_remove_admin_queue; | |
1932 | } | |
1933 | ||
1934 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1935 | WARN_ON_ONCE(!changed); | |
1936 | ||
0928f9b4 | 1937 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1938 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1939 | ||
1940 | kref_get(&ctrl->ctrl.kref); | |
1941 | ||
1942 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1943 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1944 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1945 | ||
d09f2b45 | 1946 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1947 | |
1948 | return &ctrl->ctrl; | |
1949 | ||
1950 | out_remove_admin_queue: | |
71102307 CH |
1951 | nvme_rdma_destroy_admin_queue(ctrl); |
1952 | out_kfree_queues: | |
1953 | kfree(ctrl->queues); | |
1954 | out_uninit_ctrl: | |
1955 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1956 | nvme_put_ctrl(&ctrl->ctrl); | |
1957 | if (ret > 0) | |
1958 | ret = -EIO; | |
1959 | return ERR_PTR(ret); | |
1960 | out_free_ctrl: | |
1961 | kfree(ctrl); | |
1962 | return ERR_PTR(ret); | |
1963 | } | |
1964 | ||
1965 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
1966 | .name = "rdma", | |
1967 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 1968 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 1969 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
1970 | .create_ctrl = nvme_rdma_create_ctrl, |
1971 | }; | |
1972 | ||
e87a911f SW |
1973 | static void nvme_rdma_add_one(struct ib_device *ib_device) |
1974 | { | |
1975 | } | |
1976 | ||
1977 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) | |
1978 | { | |
1979 | struct nvme_rdma_ctrl *ctrl; | |
1980 | ||
1981 | /* Delete all controllers using this device */ | |
1982 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1983 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1984 | if (ctrl->device->dev != ib_device) | |
1985 | continue; | |
1986 | dev_info(ctrl->ctrl.device, | |
1987 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
1988 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
1989 | __nvme_rdma_del_ctrl(ctrl); | |
1990 | } | |
1991 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1992 | ||
9a6327d2 | 1993 | flush_workqueue(nvme_wq); |
e87a911f SW |
1994 | } |
1995 | ||
1996 | static struct ib_client nvme_rdma_ib_client = { | |
1997 | .name = "nvme_rdma", | |
1998 | .add = nvme_rdma_add_one, | |
1999 | .remove = nvme_rdma_remove_one | |
2000 | }; | |
2001 | ||
71102307 CH |
2002 | static int __init nvme_rdma_init_module(void) |
2003 | { | |
e87a911f SW |
2004 | int ret; |
2005 | ||
e87a911f | 2006 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 2007 | if (ret) |
9a6327d2 | 2008 | return ret; |
a56c79cf SG |
2009 | |
2010 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
2011 | if (ret) | |
2012 | goto err_unreg_client; | |
e87a911f | 2013 | |
a56c79cf | 2014 | return 0; |
e87a911f | 2015 | |
a56c79cf SG |
2016 | err_unreg_client: |
2017 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 2018 | return ret; |
71102307 CH |
2019 | } |
2020 | ||
2021 | static void __exit nvme_rdma_cleanup_module(void) | |
2022 | { | |
71102307 | 2023 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2024 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2025 | } |
2026 | ||
2027 | module_init(nvme_rdma_init_module); | |
2028 | module_exit(nvme_rdma_cleanup_module); | |
2029 | ||
2030 | MODULE_LICENSE("GPL v2"); |