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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
f41725bb | 18 | #include <rdma/mr_pool.h> |
71102307 CH |
19 | #include <linux/err.h> |
20 | #include <linux/string.h> | |
71102307 CH |
21 | #include <linux/atomic.h> |
22 | #include <linux/blk-mq.h> | |
0b36658c | 23 | #include <linux/blk-mq-rdma.h> |
71102307 CH |
24 | #include <linux/types.h> |
25 | #include <linux/list.h> | |
26 | #include <linux/mutex.h> | |
27 | #include <linux/scatterlist.h> | |
28 | #include <linux/nvme.h> | |
71102307 CH |
29 | #include <asm/unaligned.h> |
30 | ||
31 | #include <rdma/ib_verbs.h> | |
32 | #include <rdma/rdma_cm.h> | |
71102307 CH |
33 | #include <linux/nvme-rdma.h> |
34 | ||
35 | #include "nvme.h" | |
36 | #include "fabrics.h" | |
37 | ||
38 | ||
782d820c | 39 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 | 40 | |
71102307 CH |
41 | #define NVME_RDMA_MAX_SEGMENTS 256 |
42 | ||
64a741c1 | 43 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 |
71102307 | 44 | |
71102307 | 45 | struct nvme_rdma_device { |
f87c89ad MG |
46 | struct ib_device *dev; |
47 | struct ib_pd *pd; | |
71102307 CH |
48 | struct kref ref; |
49 | struct list_head entry; | |
64a741c1 | 50 | unsigned int num_inline_segments; |
71102307 CH |
51 | }; |
52 | ||
53 | struct nvme_rdma_qe { | |
54 | struct ib_cqe cqe; | |
55 | void *data; | |
56 | u64 dma; | |
57 | }; | |
58 | ||
59 | struct nvme_rdma_queue; | |
60 | struct nvme_rdma_request { | |
d49187e9 | 61 | struct nvme_request req; |
71102307 CH |
62 | struct ib_mr *mr; |
63 | struct nvme_rdma_qe sqe; | |
4af7f7ff SG |
64 | union nvme_result result; |
65 | __le16 status; | |
66 | refcount_t ref; | |
71102307 CH |
67 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; |
68 | u32 num_sge; | |
69 | int nents; | |
71102307 CH |
70 | struct ib_reg_wr reg_wr; |
71 | struct ib_cqe reg_cqe; | |
72 | struct nvme_rdma_queue *queue; | |
73 | struct sg_table sg_table; | |
74 | struct scatterlist first_sgl[]; | |
75 | }; | |
76 | ||
77 | enum nvme_rdma_queue_flags { | |
5013e98b SG |
78 | NVME_RDMA_Q_ALLOCATED = 0, |
79 | NVME_RDMA_Q_LIVE = 1, | |
eb1bd249 | 80 | NVME_RDMA_Q_TR_READY = 2, |
71102307 CH |
81 | }; |
82 | ||
83 | struct nvme_rdma_queue { | |
84 | struct nvme_rdma_qe *rsp_ring; | |
71102307 CH |
85 | int queue_size; |
86 | size_t cmnd_capsule_len; | |
87 | struct nvme_rdma_ctrl *ctrl; | |
88 | struct nvme_rdma_device *device; | |
89 | struct ib_cq *ib_cq; | |
90 | struct ib_qp *qp; | |
91 | ||
92 | unsigned long flags; | |
93 | struct rdma_cm_id *cm_id; | |
94 | int cm_error; | |
95 | struct completion cm_done; | |
96 | }; | |
97 | ||
98 | struct nvme_rdma_ctrl { | |
71102307 CH |
99 | /* read only in the hot path */ |
100 | struct nvme_rdma_queue *queues; | |
71102307 CH |
101 | |
102 | /* other member variables */ | |
71102307 | 103 | struct blk_mq_tag_set tag_set; |
71102307 CH |
104 | struct work_struct err_work; |
105 | ||
106 | struct nvme_rdma_qe async_event_sqe; | |
107 | ||
71102307 CH |
108 | struct delayed_work reconnect_work; |
109 | ||
110 | struct list_head list; | |
111 | ||
112 | struct blk_mq_tag_set admin_tag_set; | |
113 | struct nvme_rdma_device *device; | |
114 | ||
71102307 CH |
115 | u32 max_fr_pages; |
116 | ||
0928f9b4 SG |
117 | struct sockaddr_storage addr; |
118 | struct sockaddr_storage src_addr; | |
71102307 CH |
119 | |
120 | struct nvme_ctrl ctrl; | |
64a741c1 | 121 | bool use_inline_data; |
71102307 CH |
122 | }; |
123 | ||
124 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
125 | { | |
126 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
127 | } | |
128 | ||
129 | static LIST_HEAD(device_list); | |
130 | static DEFINE_MUTEX(device_list_mutex); | |
131 | ||
132 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
133 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
134 | ||
71102307 CH |
135 | /* |
136 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
137 | * unsafe. With it turned off we will have to register a global rkey that | |
138 | * allows read and write access to all physical memory. | |
139 | */ | |
140 | static bool register_always = true; | |
141 | module_param(register_always, bool, 0444); | |
142 | MODULE_PARM_DESC(register_always, | |
143 | "Use memory registration even for contiguous memory regions"); | |
144 | ||
145 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
146 | struct rdma_cm_event *event); | |
147 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 | 148 | |
90af3512 SG |
149 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
150 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; | |
151 | ||
71102307 CH |
152 | /* XXX: really should move to a generic header sooner or later.. */ |
153 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
154 | { | |
155 | *p++ = val; | |
156 | *p++ = val >> 8; | |
157 | *p++ = val >> 16; | |
158 | } | |
159 | ||
160 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
161 | { | |
162 | return queue - queue->ctrl->queues; | |
163 | } | |
164 | ||
165 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
166 | { | |
167 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
168 | } | |
169 | ||
170 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
171 | size_t capsule_size, enum dma_data_direction dir) | |
172 | { | |
173 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
174 | kfree(qe->data); | |
175 | } | |
176 | ||
177 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
178 | size_t capsule_size, enum dma_data_direction dir) | |
179 | { | |
180 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
181 | if (!qe->data) | |
182 | return -ENOMEM; | |
183 | ||
184 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
185 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
186 | kfree(qe->data); | |
187 | return -ENOMEM; | |
188 | } | |
189 | ||
190 | return 0; | |
191 | } | |
192 | ||
193 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
194 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
195 | size_t capsule_size, enum dma_data_direction dir) | |
196 | { | |
197 | int i; | |
198 | ||
199 | for (i = 0; i < ib_queue_size; i++) | |
200 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
201 | kfree(ring); | |
202 | } | |
203 | ||
204 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
205 | size_t ib_queue_size, size_t capsule_size, | |
206 | enum dma_data_direction dir) | |
207 | { | |
208 | struct nvme_rdma_qe *ring; | |
209 | int i; | |
210 | ||
211 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
212 | if (!ring) | |
213 | return NULL; | |
214 | ||
215 | for (i = 0; i < ib_queue_size; i++) { | |
216 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
217 | goto out_free_ring; | |
218 | } | |
219 | ||
220 | return ring; | |
221 | ||
222 | out_free_ring: | |
223 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
224 | return NULL; | |
225 | } | |
226 | ||
227 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
228 | { | |
27a4beef MG |
229 | pr_debug("QP event %s (%d)\n", |
230 | ib_event_msg(event->event), event->event); | |
231 | ||
71102307 CH |
232 | } |
233 | ||
234 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
235 | { | |
35da77d5 BVA |
236 | int ret; |
237 | ||
238 | ret = wait_for_completion_interruptible_timeout(&queue->cm_done, | |
71102307 | 239 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); |
35da77d5 BVA |
240 | if (ret < 0) |
241 | return ret; | |
242 | if (ret == 0) | |
243 | return -ETIMEDOUT; | |
244 | WARN_ON_ONCE(queue->cm_error > 0); | |
71102307 CH |
245 | return queue->cm_error; |
246 | } | |
247 | ||
248 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
249 | { | |
250 | struct nvme_rdma_device *dev = queue->device; | |
251 | struct ib_qp_init_attr init_attr; | |
252 | int ret; | |
253 | ||
254 | memset(&init_attr, 0, sizeof(init_attr)); | |
255 | init_attr.event_handler = nvme_rdma_qp_event; | |
256 | /* +1 for drain */ | |
257 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
258 | /* +1 for drain */ | |
259 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
260 | init_attr.cap.max_recv_sge = 1; | |
64a741c1 | 261 | init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; |
71102307 CH |
262 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; |
263 | init_attr.qp_type = IB_QPT_RC; | |
264 | init_attr.send_cq = queue->ib_cq; | |
265 | init_attr.recv_cq = queue->ib_cq; | |
266 | ||
267 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
268 | ||
269 | queue->qp = queue->cm_id->qp; | |
270 | return ret; | |
271 | } | |
272 | ||
385475ee CH |
273 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
274 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 275 | { |
385475ee | 276 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 277 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 278 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
279 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
280 | struct nvme_rdma_device *dev = queue->device; | |
281 | ||
71102307 CH |
282 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), |
283 | DMA_TO_DEVICE); | |
284 | } | |
285 | ||
385475ee CH |
286 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
287 | struct request *rq, unsigned int hctx_idx, | |
288 | unsigned int numa_node) | |
71102307 | 289 | { |
385475ee | 290 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 291 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 292 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
293 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
294 | struct nvme_rdma_device *dev = queue->device; | |
295 | struct ib_device *ibdev = dev->dev; | |
296 | int ret; | |
297 | ||
59e29ce6 | 298 | nvme_req(rq)->ctrl = &ctrl->ctrl; |
71102307 CH |
299 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
300 | DMA_TO_DEVICE); | |
301 | if (ret) | |
302 | return ret; | |
303 | ||
71102307 CH |
304 | req->queue = queue; |
305 | ||
306 | return 0; | |
71102307 CH |
307 | } |
308 | ||
71102307 CH |
309 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
310 | unsigned int hctx_idx) | |
311 | { | |
312 | struct nvme_rdma_ctrl *ctrl = data; | |
313 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
314 | ||
d858e5f0 | 315 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
71102307 CH |
316 | |
317 | hctx->driver_data = queue; | |
318 | return 0; | |
319 | } | |
320 | ||
321 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
322 | unsigned int hctx_idx) | |
323 | { | |
324 | struct nvme_rdma_ctrl *ctrl = data; | |
325 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
326 | ||
327 | BUG_ON(hctx_idx != 0); | |
328 | ||
329 | hctx->driver_data = queue; | |
330 | return 0; | |
331 | } | |
332 | ||
333 | static void nvme_rdma_free_dev(struct kref *ref) | |
334 | { | |
335 | struct nvme_rdma_device *ndev = | |
336 | container_of(ref, struct nvme_rdma_device, ref); | |
337 | ||
338 | mutex_lock(&device_list_mutex); | |
339 | list_del(&ndev->entry); | |
340 | mutex_unlock(&device_list_mutex); | |
341 | ||
71102307 | 342 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
343 | kfree(ndev); |
344 | } | |
345 | ||
346 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
347 | { | |
348 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
349 | } | |
350 | ||
351 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
352 | { | |
353 | return kref_get_unless_zero(&dev->ref); | |
354 | } | |
355 | ||
356 | static struct nvme_rdma_device * | |
357 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
358 | { | |
359 | struct nvme_rdma_device *ndev; | |
360 | ||
361 | mutex_lock(&device_list_mutex); | |
362 | list_for_each_entry(ndev, &device_list, entry) { | |
363 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
364 | nvme_rdma_dev_get(ndev)) | |
365 | goto out_unlock; | |
366 | } | |
367 | ||
368 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
369 | if (!ndev) | |
370 | goto out_err; | |
371 | ||
372 | ndev->dev = cm_id->device; | |
373 | kref_init(&ndev->ref); | |
374 | ||
11975e01 CH |
375 | ndev->pd = ib_alloc_pd(ndev->dev, |
376 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
377 | if (IS_ERR(ndev->pd)) |
378 | goto out_free_dev; | |
379 | ||
71102307 CH |
380 | if (!(ndev->dev->attrs.device_cap_flags & |
381 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
382 | dev_err(&ndev->dev->dev, | |
383 | "Memory registrations not supported.\n"); | |
11975e01 | 384 | goto out_free_pd; |
71102307 CH |
385 | } |
386 | ||
64a741c1 | 387 | ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, |
0a3173a5 | 388 | ndev->dev->attrs.max_send_sge - 1); |
71102307 CH |
389 | list_add(&ndev->entry, &device_list); |
390 | out_unlock: | |
391 | mutex_unlock(&device_list_mutex); | |
392 | return ndev; | |
393 | ||
71102307 CH |
394 | out_free_pd: |
395 | ib_dealloc_pd(ndev->pd); | |
396 | out_free_dev: | |
397 | kfree(ndev); | |
398 | out_err: | |
399 | mutex_unlock(&device_list_mutex); | |
400 | return NULL; | |
401 | } | |
402 | ||
403 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
404 | { | |
eb1bd249 MG |
405 | struct nvme_rdma_device *dev; |
406 | struct ib_device *ibdev; | |
407 | ||
408 | if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) | |
409 | return; | |
410 | ||
411 | dev = queue->device; | |
412 | ibdev = dev->dev; | |
71102307 | 413 | |
f41725bb IR |
414 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
415 | ||
eb1bd249 MG |
416 | /* |
417 | * The cm_id object might have been destroyed during RDMA connection | |
418 | * establishment error flow to avoid getting other cma events, thus | |
419 | * the destruction of the QP shouldn't use rdma_cm API. | |
420 | */ | |
421 | ib_destroy_qp(queue->qp); | |
71102307 CH |
422 | ib_free_cq(queue->ib_cq); |
423 | ||
424 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
425 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
426 | ||
427 | nvme_rdma_dev_put(dev); | |
428 | } | |
429 | ||
f41725bb IR |
430 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev) |
431 | { | |
432 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, | |
433 | ibdev->attrs.max_fast_reg_page_list_len); | |
434 | } | |
435 | ||
ca6e95bb | 436 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 437 | { |
ca6e95bb | 438 | struct ib_device *ibdev; |
71102307 CH |
439 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
440 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
441 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
442 | int ret; |
443 | ||
ca6e95bb SG |
444 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
445 | if (!queue->device) { | |
446 | dev_err(queue->cm_id->device->dev.parent, | |
447 | "no client data found!\n"); | |
448 | return -ECONNREFUSED; | |
449 | } | |
450 | ibdev = queue->device->dev; | |
71102307 CH |
451 | |
452 | /* | |
0b36658c SG |
453 | * Spread I/O queues completion vectors according their queue index. |
454 | * Admin queues can always go on completion vector 0. | |
71102307 | 455 | */ |
0b36658c | 456 | comp_vector = idx == 0 ? idx : idx - 1; |
71102307 CH |
457 | |
458 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
459 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
460 | cq_factor * queue->queue_size + 1, | |
461 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
462 | if (IS_ERR(queue->ib_cq)) { |
463 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 464 | goto out_put_dev; |
71102307 CH |
465 | } |
466 | ||
467 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
468 | if (ret) | |
469 | goto out_destroy_ib_cq; | |
470 | ||
471 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
472 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
473 | if (!queue->rsp_ring) { | |
474 | ret = -ENOMEM; | |
475 | goto out_destroy_qp; | |
476 | } | |
477 | ||
f41725bb IR |
478 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, |
479 | queue->queue_size, | |
480 | IB_MR_TYPE_MEM_REG, | |
481 | nvme_rdma_get_max_fr_pages(ibdev)); | |
482 | if (ret) { | |
483 | dev_err(queue->ctrl->ctrl.device, | |
484 | "failed to initialize MR pool sized %d for QID %d\n", | |
485 | queue->queue_size, idx); | |
486 | goto out_destroy_ring; | |
487 | } | |
488 | ||
eb1bd249 MG |
489 | set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); |
490 | ||
71102307 CH |
491 | return 0; |
492 | ||
f41725bb IR |
493 | out_destroy_ring: |
494 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
495 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
71102307 | 496 | out_destroy_qp: |
1f61def9 | 497 | rdma_destroy_qp(queue->cm_id); |
71102307 CH |
498 | out_destroy_ib_cq: |
499 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
500 | out_put_dev: |
501 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
502 | return ret; |
503 | } | |
504 | ||
41e8cfa1 | 505 | static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, |
71102307 CH |
506 | int idx, size_t queue_size) |
507 | { | |
508 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 509 | struct sockaddr *src_addr = NULL; |
71102307 CH |
510 | int ret; |
511 | ||
512 | queue = &ctrl->queues[idx]; | |
513 | queue->ctrl = ctrl; | |
514 | init_completion(&queue->cm_done); | |
515 | ||
516 | if (idx > 0) | |
517 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
518 | else | |
519 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
520 | ||
521 | queue->queue_size = queue_size; | |
522 | ||
523 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
524 | RDMA_PS_TCP, IB_QPT_RC); | |
525 | if (IS_ERR(queue->cm_id)) { | |
526 | dev_info(ctrl->ctrl.device, | |
527 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
528 | return PTR_ERR(queue->cm_id); | |
529 | } | |
530 | ||
8f4e8dac | 531 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 532 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 533 | |
0928f9b4 SG |
534 | queue->cm_error = -ETIMEDOUT; |
535 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
536 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
537 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
538 | if (ret) { | |
539 | dev_info(ctrl->ctrl.device, | |
540 | "rdma_resolve_addr failed (%d).\n", ret); | |
541 | goto out_destroy_cm_id; | |
542 | } | |
543 | ||
544 | ret = nvme_rdma_wait_for_cm(queue); | |
545 | if (ret) { | |
546 | dev_info(ctrl->ctrl.device, | |
d8bfceeb | 547 | "rdma connection establishment failed (%d)\n", ret); |
71102307 CH |
548 | goto out_destroy_cm_id; |
549 | } | |
550 | ||
5013e98b | 551 | set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); |
71102307 CH |
552 | |
553 | return 0; | |
554 | ||
555 | out_destroy_cm_id: | |
556 | rdma_destroy_id(queue->cm_id); | |
eb1bd249 | 557 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
558 | return ret; |
559 | } | |
560 | ||
561 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
562 | { | |
a57bd541 SG |
563 | if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) |
564 | return; | |
565 | ||
71102307 CH |
566 | rdma_disconnect(queue->cm_id); |
567 | ib_drain_qp(queue->qp); | |
568 | } | |
569 | ||
570 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
571 | { | |
5013e98b | 572 | if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
a57bd541 SG |
573 | return; |
574 | ||
71102307 CH |
575 | nvme_rdma_destroy_queue_ib(queue); |
576 | rdma_destroy_id(queue->cm_id); | |
577 | } | |
578 | ||
a57bd541 | 579 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 | 580 | { |
a57bd541 SG |
581 | int i; |
582 | ||
583 | for (i = 1; i < ctrl->ctrl.queue_count; i++) | |
584 | nvme_rdma_free_queue(&ctrl->queues[i]); | |
71102307 CH |
585 | } |
586 | ||
a57bd541 | 587 | static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 CH |
588 | { |
589 | int i; | |
590 | ||
d858e5f0 | 591 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
a57bd541 | 592 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
71102307 CH |
593 | } |
594 | ||
68e16fcf SG |
595 | static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) |
596 | { | |
597 | int ret; | |
598 | ||
599 | if (idx) | |
600 | ret = nvmf_connect_io_queue(&ctrl->ctrl, idx); | |
601 | else | |
602 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); | |
603 | ||
604 | if (!ret) | |
605 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[idx].flags); | |
606 | else | |
607 | dev_info(ctrl->ctrl.device, | |
608 | "failed to connect queue: %d ret=%d\n", idx, ret); | |
609 | return ret; | |
610 | } | |
611 | ||
612 | static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) | |
71102307 CH |
613 | { |
614 | int i, ret = 0; | |
615 | ||
d858e5f0 | 616 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
68e16fcf SG |
617 | ret = nvme_rdma_start_queue(ctrl, i); |
618 | if (ret) | |
a57bd541 | 619 | goto out_stop_queues; |
71102307 CH |
620 | } |
621 | ||
c8dbc37c SW |
622 | return 0; |
623 | ||
a57bd541 | 624 | out_stop_queues: |
68e16fcf SG |
625 | for (i--; i >= 1; i--) |
626 | nvme_rdma_stop_queue(&ctrl->queues[i]); | |
71102307 CH |
627 | return ret; |
628 | } | |
629 | ||
41e8cfa1 | 630 | static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 | 631 | { |
c248c643 | 632 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
0b36658c | 633 | struct ib_device *ibdev = ctrl->device->dev; |
c248c643 | 634 | unsigned int nr_io_queues; |
71102307 CH |
635 | int i, ret; |
636 | ||
c248c643 | 637 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
0b36658c SG |
638 | |
639 | /* | |
640 | * we map queues according to the device irq vectors for | |
641 | * optimal locality so we don't need more queues than | |
642 | * completion vectors. | |
643 | */ | |
644 | nr_io_queues = min_t(unsigned int, nr_io_queues, | |
645 | ibdev->num_comp_vectors); | |
646 | ||
c248c643 SG |
647 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); |
648 | if (ret) | |
649 | return ret; | |
650 | ||
d858e5f0 SG |
651 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
652 | if (ctrl->ctrl.queue_count < 2) | |
c248c643 SG |
653 | return 0; |
654 | ||
655 | dev_info(ctrl->ctrl.device, | |
656 | "creating %d I/O queues.\n", nr_io_queues); | |
657 | ||
d858e5f0 | 658 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
41e8cfa1 SG |
659 | ret = nvme_rdma_alloc_queue(ctrl, i, |
660 | ctrl->ctrl.sqsize + 1); | |
661 | if (ret) | |
71102307 | 662 | goto out_free_queues; |
71102307 CH |
663 | } |
664 | ||
665 | return 0; | |
666 | ||
667 | out_free_queues: | |
f361e5a0 | 668 | for (i--; i >= 1; i--) |
a57bd541 | 669 | nvme_rdma_free_queue(&ctrl->queues[i]); |
71102307 CH |
670 | |
671 | return ret; | |
672 | } | |
673 | ||
60070c78 SG |
674 | static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl, |
675 | struct blk_mq_tag_set *set) | |
b28a308e SG |
676 | { |
677 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
b28a308e SG |
678 | |
679 | blk_mq_free_tag_set(set); | |
680 | nvme_rdma_dev_put(ctrl->device); | |
681 | } | |
682 | ||
683 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, | |
684 | bool admin) | |
685 | { | |
686 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
687 | struct blk_mq_tag_set *set; | |
688 | int ret; | |
689 | ||
690 | if (admin) { | |
691 | set = &ctrl->admin_tag_set; | |
692 | memset(set, 0, sizeof(*set)); | |
693 | set->ops = &nvme_rdma_admin_mq_ops; | |
38dabe21 | 694 | set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; |
b28a308e SG |
695 | set->reserved_tags = 2; /* connect + keep-alive */ |
696 | set->numa_node = NUMA_NO_NODE; | |
697 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
698 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
699 | set->driver_data = ctrl; | |
700 | set->nr_hw_queues = 1; | |
701 | set->timeout = ADMIN_TIMEOUT; | |
94f29d4f | 702 | set->flags = BLK_MQ_F_NO_SCHED; |
b28a308e SG |
703 | } else { |
704 | set = &ctrl->tag_set; | |
705 | memset(set, 0, sizeof(*set)); | |
706 | set->ops = &nvme_rdma_mq_ops; | |
5e77d61c | 707 | set->queue_depth = nctrl->sqsize + 1; |
b28a308e SG |
708 | set->reserved_tags = 1; /* fabric connect */ |
709 | set->numa_node = NUMA_NO_NODE; | |
710 | set->flags = BLK_MQ_F_SHOULD_MERGE; | |
711 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
712 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
713 | set->driver_data = ctrl; | |
714 | set->nr_hw_queues = nctrl->queue_count - 1; | |
715 | set->timeout = NVME_IO_TIMEOUT; | |
716 | } | |
717 | ||
718 | ret = blk_mq_alloc_tag_set(set); | |
719 | if (ret) | |
720 | goto out; | |
721 | ||
722 | /* | |
723 | * We need a reference on the device as long as the tag_set is alive, | |
724 | * as the MRs in the request structures need a valid ib_device. | |
725 | */ | |
726 | ret = nvme_rdma_dev_get(ctrl->device); | |
727 | if (!ret) { | |
728 | ret = -EINVAL; | |
729 | goto out_free_tagset; | |
730 | } | |
731 | ||
732 | return set; | |
733 | ||
734 | out_free_tagset: | |
735 | blk_mq_free_tag_set(set); | |
736 | out: | |
737 | return ERR_PTR(ret); | |
738 | } | |
739 | ||
3f02fffb SG |
740 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, |
741 | bool remove) | |
71102307 | 742 | { |
3f02fffb SG |
743 | if (remove) { |
744 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
60070c78 | 745 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset); |
3f02fffb | 746 | } |
682630f0 SG |
747 | if (ctrl->async_event_sqe.data) { |
748 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, | |
749 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
750 | ctrl->async_event_sqe.data = NULL; | |
751 | } | |
a57bd541 | 752 | nvme_rdma_free_queue(&ctrl->queues[0]); |
71102307 CH |
753 | } |
754 | ||
3f02fffb SG |
755 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, |
756 | bool new) | |
90af3512 SG |
757 | { |
758 | int error; | |
759 | ||
41e8cfa1 | 760 | error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); |
90af3512 SG |
761 | if (error) |
762 | return error; | |
763 | ||
764 | ctrl->device = ctrl->queues[0].device; | |
765 | ||
f41725bb | 766 | ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev); |
90af3512 | 767 | |
94e42213 SG |
768 | error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
769 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
770 | if (error) | |
771 | goto out_free_queue; | |
772 | ||
3f02fffb SG |
773 | if (new) { |
774 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); | |
f04b9cc8 SG |
775 | if (IS_ERR(ctrl->ctrl.admin_tagset)) { |
776 | error = PTR_ERR(ctrl->ctrl.admin_tagset); | |
94e42213 | 777 | goto out_free_async_qe; |
f04b9cc8 | 778 | } |
90af3512 | 779 | |
3f02fffb SG |
780 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
781 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
782 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
783 | goto out_free_tagset; | |
784 | } | |
90af3512 SG |
785 | } |
786 | ||
68e16fcf | 787 | error = nvme_rdma_start_queue(ctrl, 0); |
90af3512 SG |
788 | if (error) |
789 | goto out_cleanup_queue; | |
790 | ||
09fdc23b | 791 | error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP, |
90af3512 SG |
792 | &ctrl->ctrl.cap); |
793 | if (error) { | |
794 | dev_err(ctrl->ctrl.device, | |
795 | "prop_get NVME_REG_CAP failed\n"); | |
2e050f00 | 796 | goto out_stop_queue; |
90af3512 SG |
797 | } |
798 | ||
799 | ctrl->ctrl.sqsize = | |
800 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); | |
801 | ||
802 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
803 | if (error) | |
2e050f00 | 804 | goto out_stop_queue; |
90af3512 SG |
805 | |
806 | ctrl->ctrl.max_hw_sectors = | |
126e76ff | 807 | (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9); |
90af3512 SG |
808 | |
809 | error = nvme_init_identify(&ctrl->ctrl); | |
810 | if (error) | |
2e050f00 | 811 | goto out_stop_queue; |
90af3512 | 812 | |
90af3512 SG |
813 | return 0; |
814 | ||
2e050f00 JW |
815 | out_stop_queue: |
816 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
90af3512 | 817 | out_cleanup_queue: |
3f02fffb SG |
818 | if (new) |
819 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
90af3512 | 820 | out_free_tagset: |
3f02fffb | 821 | if (new) |
60070c78 | 822 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset); |
94e42213 SG |
823 | out_free_async_qe: |
824 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, | |
825 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
90af3512 SG |
826 | out_free_queue: |
827 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
828 | return error; | |
829 | } | |
830 | ||
a57bd541 SG |
831 | static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, |
832 | bool remove) | |
833 | { | |
a57bd541 SG |
834 | if (remove) { |
835 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
60070c78 | 836 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset); |
a57bd541 SG |
837 | } |
838 | nvme_rdma_free_io_queues(ctrl); | |
839 | } | |
840 | ||
841 | static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) | |
842 | { | |
843 | int ret; | |
844 | ||
41e8cfa1 | 845 | ret = nvme_rdma_alloc_io_queues(ctrl); |
a57bd541 SG |
846 | if (ret) |
847 | return ret; | |
848 | ||
849 | if (new) { | |
850 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); | |
f04b9cc8 SG |
851 | if (IS_ERR(ctrl->ctrl.tagset)) { |
852 | ret = PTR_ERR(ctrl->ctrl.tagset); | |
a57bd541 | 853 | goto out_free_io_queues; |
f04b9cc8 | 854 | } |
a57bd541 SG |
855 | |
856 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
857 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
858 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
859 | goto out_free_tag_set; | |
860 | } | |
861 | } else { | |
a57bd541 SG |
862 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, |
863 | ctrl->ctrl.queue_count - 1); | |
864 | } | |
865 | ||
68e16fcf | 866 | ret = nvme_rdma_start_io_queues(ctrl); |
a57bd541 SG |
867 | if (ret) |
868 | goto out_cleanup_connect_q; | |
869 | ||
870 | return 0; | |
871 | ||
872 | out_cleanup_connect_q: | |
873 | if (new) | |
874 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
875 | out_free_tag_set: | |
876 | if (new) | |
60070c78 | 877 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset); |
a57bd541 SG |
878 | out_free_io_queues: |
879 | nvme_rdma_free_io_queues(ctrl); | |
880 | return ret; | |
71102307 CH |
881 | } |
882 | ||
75862c72 SG |
883 | static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, |
884 | bool remove) | |
885 | { | |
886 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); | |
887 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
888 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, nvme_cancel_request, | |
889 | &ctrl->ctrl); | |
890 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); | |
891 | nvme_rdma_destroy_admin_queue(ctrl, remove); | |
892 | } | |
893 | ||
894 | static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, | |
895 | bool remove) | |
896 | { | |
897 | if (ctrl->ctrl.queue_count > 1) { | |
898 | nvme_stop_queues(&ctrl->ctrl); | |
899 | nvme_rdma_stop_io_queues(ctrl); | |
900 | blk_mq_tagset_busy_iter(&ctrl->tag_set, nvme_cancel_request, | |
901 | &ctrl->ctrl); | |
902 | if (remove) | |
903 | nvme_start_queues(&ctrl->ctrl); | |
904 | nvme_rdma_destroy_io_queues(ctrl, remove); | |
905 | } | |
906 | } | |
907 | ||
b435ecea NC |
908 | static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl) |
909 | { | |
910 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
911 | ||
912 | cancel_work_sync(&ctrl->err_work); | |
913 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
914 | } | |
915 | ||
71102307 CH |
916 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) |
917 | { | |
918 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
919 | ||
920 | if (list_empty(&ctrl->list)) | |
921 | goto free_ctrl; | |
922 | ||
923 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
924 | list_del(&ctrl->list); | |
925 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
926 | ||
71102307 CH |
927 | nvmf_free_options(nctrl->opts); |
928 | free_ctrl: | |
3d064101 | 929 | kfree(ctrl->queues); |
71102307 CH |
930 | kfree(ctrl); |
931 | } | |
932 | ||
fd8563ce SG |
933 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
934 | { | |
935 | /* If we are resetting/deleting then do nothing */ | |
ad6a0a52 | 936 | if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { |
fd8563ce SG |
937 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || |
938 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
939 | return; | |
940 | } | |
941 | ||
942 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
943 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
944 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 945 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
946 | ctrl->ctrl.opts->reconnect_delay * HZ); |
947 | } else { | |
12fa1304 | 948 | nvme_delete_ctrl(&ctrl->ctrl); |
fd8563ce SG |
949 | } |
950 | } | |
951 | ||
c66e2998 | 952 | static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) |
71102307 | 953 | { |
c66e2998 | 954 | int ret = -EINVAL; |
71102307 | 955 | bool changed; |
71102307 | 956 | |
c66e2998 | 957 | ret = nvme_rdma_configure_admin_queue(ctrl, new); |
71102307 | 958 | if (ret) |
c66e2998 SG |
959 | return ret; |
960 | ||
961 | if (ctrl->ctrl.icdoff) { | |
962 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
963 | goto destroy_admin; | |
964 | } | |
965 | ||
966 | if (!(ctrl->ctrl.sgls & (1 << 2))) { | |
967 | dev_err(ctrl->ctrl.device, | |
968 | "Mandatory keyed sgls are not supported!\n"); | |
969 | goto destroy_admin; | |
970 | } | |
971 | ||
972 | if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { | |
973 | dev_warn(ctrl->ctrl.device, | |
974 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
975 | ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); | |
976 | } | |
977 | ||
978 | if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { | |
979 | dev_warn(ctrl->ctrl.device, | |
980 | "sqsize %u > ctrl maxcmd %u, clamping down\n", | |
981 | ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); | |
982 | ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; | |
983 | } | |
71102307 | 984 | |
64a741c1 SW |
985 | if (ctrl->ctrl.sgls & (1 << 20)) |
986 | ctrl->use_inline_data = true; | |
71102307 | 987 | |
d858e5f0 | 988 | if (ctrl->ctrl.queue_count > 1) { |
c66e2998 | 989 | ret = nvme_rdma_configure_io_queues(ctrl, new); |
71102307 | 990 | if (ret) |
5e1fe61d | 991 | goto destroy_admin; |
71102307 CH |
992 | } |
993 | ||
994 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
0a960afd SG |
995 | if (!changed) { |
996 | /* state change failure is ok if we're in DELETING state */ | |
997 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); | |
c66e2998 SG |
998 | ret = -EINVAL; |
999 | goto destroy_io; | |
0a960afd SG |
1000 | } |
1001 | ||
d09f2b45 | 1002 | nvme_start_ctrl(&ctrl->ctrl); |
c66e2998 SG |
1003 | return 0; |
1004 | ||
1005 | destroy_io: | |
1006 | if (ctrl->ctrl.queue_count > 1) | |
1007 | nvme_rdma_destroy_io_queues(ctrl, new); | |
1008 | destroy_admin: | |
1009 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
1010 | nvme_rdma_destroy_admin_queue(ctrl, new); | |
1011 | return ret; | |
1012 | } | |
1013 | ||
1014 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) | |
1015 | { | |
1016 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
1017 | struct nvme_rdma_ctrl, reconnect_work); | |
1018 | ||
1019 | ++ctrl->ctrl.nr_reconnects; | |
1020 | ||
1021 | if (nvme_rdma_setup_ctrl(ctrl, false)) | |
1022 | goto requeue; | |
71102307 | 1023 | |
5e1fe61d SG |
1024 | dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", |
1025 | ctrl->ctrl.nr_reconnects); | |
1026 | ||
1027 | ctrl->ctrl.nr_reconnects = 0; | |
71102307 CH |
1028 | |
1029 | return; | |
1030 | ||
71102307 | 1031 | requeue: |
fd8563ce | 1032 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 1033 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 1034 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
1035 | } |
1036 | ||
1037 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
1038 | { | |
1039 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1040 | struct nvme_rdma_ctrl, err_work); | |
1041 | ||
e4d753d7 | 1042 | nvme_stop_keep_alive(&ctrl->ctrl); |
75862c72 | 1043 | nvme_rdma_teardown_io_queues(ctrl, false); |
e818a5b4 | 1044 | nvme_start_queues(&ctrl->ctrl); |
75862c72 | 1045 | nvme_rdma_teardown_admin_queue(ctrl, false); |
e818a5b4 | 1046 | |
ad6a0a52 | 1047 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
187c0832 NC |
1048 | /* state change failure is ok if we're in DELETING state */ |
1049 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); | |
d5bf4b7f SG |
1050 | return; |
1051 | } | |
1052 | ||
fd8563ce | 1053 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
1054 | } |
1055 | ||
1056 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
1057 | { | |
d5bf4b7f | 1058 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) |
71102307 CH |
1059 | return; |
1060 | ||
9a6327d2 | 1061 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
1062 | } |
1063 | ||
1064 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
1065 | const char *op) | |
1066 | { | |
1067 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1068 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1069 | ||
1070 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
1071 | dev_info(ctrl->ctrl.device, | |
1072 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
1073 | op, wc->wr_cqe, | |
1074 | ib_wc_status_msg(wc->status), wc->status); | |
1075 | nvme_rdma_error_recovery(ctrl); | |
1076 | } | |
1077 | ||
1078 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
1079 | { | |
1080 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1081 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
1082 | } | |
1083 | ||
1084 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
1085 | { | |
2f122e4f SG |
1086 | struct nvme_rdma_request *req = |
1087 | container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); | |
1088 | struct request *rq = blk_mq_rq_from_pdu(req); | |
1089 | ||
1090 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
71102307 | 1091 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); |
2f122e4f SG |
1092 | return; |
1093 | } | |
1094 | ||
1095 | if (refcount_dec_and_test(&req->ref)) | |
1096 | nvme_end_request(rq, req->status, req->result); | |
1097 | ||
71102307 CH |
1098 | } |
1099 | ||
1100 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
1101 | struct nvme_rdma_request *req) | |
1102 | { | |
71102307 CH |
1103 | struct ib_send_wr wr = { |
1104 | .opcode = IB_WR_LOCAL_INV, | |
1105 | .next = NULL, | |
1106 | .num_sge = 0, | |
2f122e4f | 1107 | .send_flags = IB_SEND_SIGNALED, |
71102307 CH |
1108 | .ex.invalidate_rkey = req->mr->rkey, |
1109 | }; | |
1110 | ||
1111 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
1112 | wr.wr_cqe = &req->reg_cqe; | |
1113 | ||
45e3cc1a | 1114 | return ib_post_send(queue->qp, &wr, NULL); |
71102307 CH |
1115 | } |
1116 | ||
1117 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
1118 | struct request *rq) | |
1119 | { | |
1120 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 CH |
1121 | struct nvme_rdma_device *dev = queue->device; |
1122 | struct ib_device *ibdev = dev->dev; | |
71102307 | 1123 | |
0d309923 | 1124 | if (!blk_rq_payload_bytes(rq)) |
71102307 CH |
1125 | return; |
1126 | ||
f41725bb IR |
1127 | if (req->mr) { |
1128 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); | |
1129 | req->mr = NULL; | |
1130 | } | |
1131 | ||
71102307 CH |
1132 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, |
1133 | req->nents, rq_data_dir(rq) == | |
1134 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
1135 | ||
1136 | nvme_cleanup_cmd(rq); | |
1137 | sg_free_table_chained(&req->sg_table, true); | |
1138 | } | |
1139 | ||
1140 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
1141 | { | |
1142 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1143 | ||
1144 | sg->addr = 0; | |
1145 | put_unaligned_le24(0, sg->length); | |
1146 | put_unaligned_le32(0, sg->key); | |
1147 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
1148 | return 0; | |
1149 | } | |
1150 | ||
1151 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
64a741c1 SW |
1152 | struct nvme_rdma_request *req, struct nvme_command *c, |
1153 | int count) | |
71102307 CH |
1154 | { |
1155 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
64a741c1 SW |
1156 | struct scatterlist *sgl = req->sg_table.sgl; |
1157 | struct ib_sge *sge = &req->sge[1]; | |
1158 | u32 len = 0; | |
1159 | int i; | |
71102307 | 1160 | |
64a741c1 SW |
1161 | for (i = 0; i < count; i++, sgl++, sge++) { |
1162 | sge->addr = sg_dma_address(sgl); | |
1163 | sge->length = sg_dma_len(sgl); | |
1164 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1165 | len += sge->length; | |
1166 | } | |
71102307 CH |
1167 | |
1168 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
64a741c1 | 1169 | sg->length = cpu_to_le32(len); |
71102307 CH |
1170 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; |
1171 | ||
64a741c1 | 1172 | req->num_sge += count; |
71102307 CH |
1173 | return 0; |
1174 | } | |
1175 | ||
1176 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
1177 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1178 | { | |
1179 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1180 | ||
1181 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
1182 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 1183 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
1184 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
1185 | return 0; | |
1186 | } | |
1187 | ||
1188 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
1189 | struct nvme_rdma_request *req, struct nvme_command *c, | |
1190 | int count) | |
1191 | { | |
1192 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1193 | int nr; | |
1194 | ||
f41725bb IR |
1195 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); |
1196 | if (WARN_ON_ONCE(!req->mr)) | |
1197 | return -EAGAIN; | |
1198 | ||
b925a2dc MG |
1199 | /* |
1200 | * Align the MR to a 4K page size to match the ctrl page size and | |
1201 | * the block virtual boundary. | |
1202 | */ | |
1203 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K); | |
a7b7c7a1 | 1204 | if (unlikely(nr < count)) { |
f41725bb IR |
1205 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); |
1206 | req->mr = NULL; | |
71102307 CH |
1207 | if (nr < 0) |
1208 | return nr; | |
1209 | return -EINVAL; | |
1210 | } | |
1211 | ||
1212 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
1213 | ||
1214 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
1215 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
1216 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
1217 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
1218 | req->reg_wr.wr.num_sge = 0; | |
1219 | req->reg_wr.mr = req->mr; | |
1220 | req->reg_wr.key = req->mr->rkey; | |
1221 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
1222 | IB_ACCESS_REMOTE_READ | | |
1223 | IB_ACCESS_REMOTE_WRITE; | |
1224 | ||
71102307 CH |
1225 | sg->addr = cpu_to_le64(req->mr->iova); |
1226 | put_unaligned_le24(req->mr->length, sg->length); | |
1227 | put_unaligned_le32(req->mr->rkey, sg->key); | |
1228 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
1229 | NVME_SGL_FMT_INVALIDATE; | |
1230 | ||
1231 | return 0; | |
1232 | } | |
1233 | ||
1234 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 1235 | struct request *rq, struct nvme_command *c) |
71102307 CH |
1236 | { |
1237 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1238 | struct nvme_rdma_device *dev = queue->device; | |
1239 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 1240 | int count, ret; |
71102307 CH |
1241 | |
1242 | req->num_sge = 1; | |
4af7f7ff | 1243 | refcount_set(&req->ref, 2); /* send and recv completions */ |
71102307 CH |
1244 | |
1245 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
1246 | ||
0d309923 | 1247 | if (!blk_rq_payload_bytes(rq)) |
71102307 CH |
1248 | return nvme_rdma_set_sg_null(c); |
1249 | ||
1250 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
1251 | ret = sg_alloc_table_chained(&req->sg_table, |
1252 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
1253 | if (ret) |
1254 | return -ENOMEM; | |
1255 | ||
f9d03f96 | 1256 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 1257 | |
f9d03f96 | 1258 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
1259 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
1260 | if (unlikely(count <= 0)) { | |
94423a8f MG |
1261 | ret = -EIO; |
1262 | goto out_free_table; | |
71102307 CH |
1263 | } |
1264 | ||
64a741c1 | 1265 | if (count <= dev->num_inline_segments) { |
b131c61d | 1266 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
64a741c1 | 1267 | queue->ctrl->use_inline_data && |
b131c61d | 1268 | blk_rq_payload_bytes(rq) <= |
94423a8f | 1269 | nvme_rdma_inline_data_size(queue)) { |
64a741c1 | 1270 | ret = nvme_rdma_map_sg_inline(queue, req, c, count); |
94423a8f MG |
1271 | goto out; |
1272 | } | |
71102307 | 1273 | |
64a741c1 | 1274 | if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { |
94423a8f MG |
1275 | ret = nvme_rdma_map_sg_single(queue, req, c); |
1276 | goto out; | |
1277 | } | |
71102307 CH |
1278 | } |
1279 | ||
94423a8f MG |
1280 | ret = nvme_rdma_map_sg_fr(queue, req, c, count); |
1281 | out: | |
1282 | if (unlikely(ret)) | |
1283 | goto out_unmap_sg; | |
1284 | ||
1285 | return 0; | |
1286 | ||
1287 | out_unmap_sg: | |
1288 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
1289 | req->nents, rq_data_dir(rq) == | |
1290 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
1291 | out_free_table: | |
1292 | sg_free_table_chained(&req->sg_table, true); | |
1293 | return ret; | |
71102307 CH |
1294 | } |
1295 | ||
1296 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1297 | { | |
4af7f7ff SG |
1298 | struct nvme_rdma_qe *qe = |
1299 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1300 | struct nvme_rdma_request *req = | |
1301 | container_of(qe, struct nvme_rdma_request, sqe); | |
1302 | struct request *rq = blk_mq_rq_from_pdu(req); | |
1303 | ||
1304 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
71102307 | 1305 | nvme_rdma_wr_error(cq, wc, "SEND"); |
4af7f7ff SG |
1306 | return; |
1307 | } | |
1308 | ||
1309 | if (refcount_dec_and_test(&req->ref)) | |
1310 | nvme_end_request(rq, req->status, req->result); | |
71102307 CH |
1311 | } |
1312 | ||
1313 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, | |
1314 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
b4b591c8 | 1315 | struct ib_send_wr *first) |
71102307 | 1316 | { |
45e3cc1a | 1317 | struct ib_send_wr wr; |
71102307 CH |
1318 | int ret; |
1319 | ||
1320 | sge->addr = qe->dma; | |
1321 | sge->length = sizeof(struct nvme_command), | |
1322 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1323 | ||
71102307 CH |
1324 | wr.next = NULL; |
1325 | wr.wr_cqe = &qe->cqe; | |
1326 | wr.sg_list = sge; | |
1327 | wr.num_sge = num_sge; | |
1328 | wr.opcode = IB_WR_SEND; | |
b4b591c8 | 1329 | wr.send_flags = IB_SEND_SIGNALED; |
71102307 CH |
1330 | |
1331 | if (first) | |
1332 | first->next = ≀ | |
1333 | else | |
1334 | first = ≀ | |
1335 | ||
45e3cc1a | 1336 | ret = ib_post_send(queue->qp, first, NULL); |
a7b7c7a1 | 1337 | if (unlikely(ret)) { |
71102307 CH |
1338 | dev_err(queue->ctrl->ctrl.device, |
1339 | "%s failed with error code %d\n", __func__, ret); | |
1340 | } | |
1341 | return ret; | |
1342 | } | |
1343 | ||
1344 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1345 | struct nvme_rdma_qe *qe) | |
1346 | { | |
45e3cc1a | 1347 | struct ib_recv_wr wr; |
71102307 CH |
1348 | struct ib_sge list; |
1349 | int ret; | |
1350 | ||
1351 | list.addr = qe->dma; | |
1352 | list.length = sizeof(struct nvme_completion); | |
1353 | list.lkey = queue->device->pd->local_dma_lkey; | |
1354 | ||
1355 | qe->cqe.done = nvme_rdma_recv_done; | |
1356 | ||
1357 | wr.next = NULL; | |
1358 | wr.wr_cqe = &qe->cqe; | |
1359 | wr.sg_list = &list; | |
1360 | wr.num_sge = 1; | |
1361 | ||
45e3cc1a | 1362 | ret = ib_post_recv(queue->qp, &wr, NULL); |
a7b7c7a1 | 1363 | if (unlikely(ret)) { |
71102307 CH |
1364 | dev_err(queue->ctrl->ctrl.device, |
1365 | "%s failed with error code %d\n", __func__, ret); | |
1366 | } | |
1367 | return ret; | |
1368 | } | |
1369 | ||
1370 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1371 | { | |
1372 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1373 | ||
1374 | if (queue_idx == 0) | |
1375 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1376 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1377 | } | |
1378 | ||
b4b591c8 SG |
1379 | static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) |
1380 | { | |
1381 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1382 | nvme_rdma_wr_error(cq, wc, "ASYNC"); | |
1383 | } | |
1384 | ||
ad22c355 | 1385 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) |
71102307 CH |
1386 | { |
1387 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1388 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1389 | struct ib_device *dev = queue->device->dev; | |
1390 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1391 | struct nvme_command *cmd = sqe->data; | |
1392 | struct ib_sge sge; | |
1393 | int ret; | |
1394 | ||
71102307 CH |
1395 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); |
1396 | ||
1397 | memset(cmd, 0, sizeof(*cmd)); | |
1398 | cmd->common.opcode = nvme_admin_async_event; | |
38dabe21 | 1399 | cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; |
71102307 CH |
1400 | cmd->common.flags |= NVME_CMD_SGL_METABUF; |
1401 | nvme_rdma_set_sg_null(cmd); | |
1402 | ||
b4b591c8 SG |
1403 | sqe->cqe.done = nvme_rdma_async_done; |
1404 | ||
71102307 CH |
1405 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), |
1406 | DMA_TO_DEVICE); | |
1407 | ||
b4b591c8 | 1408 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); |
71102307 CH |
1409 | WARN_ON_ONCE(ret); |
1410 | } | |
1411 | ||
1412 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1413 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1414 | { | |
71102307 CH |
1415 | struct request *rq; |
1416 | struct nvme_rdma_request *req; | |
1417 | int ret = 0; | |
1418 | ||
71102307 CH |
1419 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1420 | if (!rq) { | |
1421 | dev_err(queue->ctrl->ctrl.device, | |
1422 | "tag 0x%x on QP %#x not found\n", | |
1423 | cqe->command_id, queue->qp->qp_num); | |
1424 | nvme_rdma_error_recovery(queue->ctrl); | |
1425 | return ret; | |
1426 | } | |
1427 | req = blk_mq_rq_to_pdu(rq); | |
1428 | ||
4af7f7ff SG |
1429 | req->status = cqe->status; |
1430 | req->result = cqe->result; | |
71102307 | 1431 | |
3ef0279b SG |
1432 | if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { |
1433 | if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) { | |
1434 | dev_err(queue->ctrl->ctrl.device, | |
1435 | "Bogus remote invalidation for rkey %#x\n", | |
1436 | req->mr->rkey); | |
1437 | nvme_rdma_error_recovery(queue->ctrl); | |
1438 | } | |
f41725bb | 1439 | } else if (req->mr) { |
2f122e4f SG |
1440 | ret = nvme_rdma_inv_rkey(queue, req); |
1441 | if (unlikely(ret < 0)) { | |
1442 | dev_err(queue->ctrl->ctrl.device, | |
1443 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
1444 | req->mr->rkey, ret); | |
1445 | nvme_rdma_error_recovery(queue->ctrl); | |
1446 | } | |
1447 | /* the local invalidation completion will end the request */ | |
1448 | return 0; | |
1449 | } | |
71102307 | 1450 | |
4af7f7ff SG |
1451 | if (refcount_dec_and_test(&req->ref)) { |
1452 | if (rq->tag == tag) | |
1453 | ret = 1; | |
1454 | nvme_end_request(rq, req->status, req->result); | |
1455 | } | |
1456 | ||
71102307 CH |
1457 | return ret; |
1458 | } | |
1459 | ||
1460 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1461 | { | |
1462 | struct nvme_rdma_qe *qe = | |
1463 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1464 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1465 | struct ib_device *ibdev = queue->device->dev; | |
1466 | struct nvme_completion *cqe = qe->data; | |
1467 | const size_t len = sizeof(struct nvme_completion); | |
1468 | int ret = 0; | |
1469 | ||
1470 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1471 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1472 | return 0; | |
1473 | } | |
1474 | ||
1475 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1476 | /* | |
1477 | * AEN requests are special as they don't time out and can | |
1478 | * survive any kind of queue freeze and often don't respond to | |
1479 | * aborts. We don't even bother to allocate a struct request | |
1480 | * for them but rather special case them here. | |
1481 | */ | |
1482 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
38dabe21 | 1483 | cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH)) |
7bf58533 CH |
1484 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1485 | &cqe->result); | |
71102307 CH |
1486 | else |
1487 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1488 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1489 | ||
1490 | nvme_rdma_post_recv(queue, qe); | |
1491 | return ret; | |
1492 | } | |
1493 | ||
1494 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1495 | { | |
1496 | __nvme_rdma_recv_done(cq, wc, -1); | |
1497 | } | |
1498 | ||
1499 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1500 | { | |
1501 | int ret, i; | |
1502 | ||
1503 | for (i = 0; i < queue->queue_size; i++) { | |
1504 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1505 | if (ret) | |
1506 | goto out_destroy_queue_ib; | |
1507 | } | |
1508 | ||
1509 | return 0; | |
1510 | ||
1511 | out_destroy_queue_ib: | |
1512 | nvme_rdma_destroy_queue_ib(queue); | |
1513 | return ret; | |
1514 | } | |
1515 | ||
1516 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1517 | struct rdma_cm_event *ev) | |
1518 | { | |
7f03953c SW |
1519 | struct rdma_cm_id *cm_id = queue->cm_id; |
1520 | int status = ev->status; | |
1521 | const char *rej_msg; | |
1522 | const struct nvme_rdma_cm_rej *rej_data; | |
1523 | u8 rej_data_len; | |
1524 | ||
1525 | rej_msg = rdma_reject_msg(cm_id, status); | |
1526 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1527 | ||
1528 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1529 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1530 | |
1531 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1532 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1533 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1534 | } else { |
1535 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1536 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1537 | } |
1538 | ||
1539 | return -ECONNRESET; | |
1540 | } | |
1541 | ||
1542 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1543 | { | |
71102307 CH |
1544 | int ret; |
1545 | ||
ca6e95bb SG |
1546 | ret = nvme_rdma_create_queue_ib(queue); |
1547 | if (ret) | |
1548 | return ret; | |
71102307 CH |
1549 | |
1550 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1551 | if (ret) { | |
1552 | dev_err(queue->ctrl->ctrl.device, | |
1553 | "rdma_resolve_route failed (%d).\n", | |
1554 | queue->cm_error); | |
1555 | goto out_destroy_queue; | |
1556 | } | |
1557 | ||
1558 | return 0; | |
1559 | ||
1560 | out_destroy_queue: | |
1561 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1562 | return ret; |
1563 | } | |
1564 | ||
1565 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1566 | { | |
1567 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1568 | struct rdma_conn_param param = { }; | |
0b857b44 | 1569 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1570 | int ret; |
1571 | ||
1572 | param.qp_num = queue->qp->qp_num; | |
1573 | param.flow_control = 1; | |
1574 | ||
1575 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1576 | /* maximum retry count */ |
1577 | param.retry_count = 7; | |
71102307 CH |
1578 | param.rnr_retry_count = 7; |
1579 | param.private_data = &priv; | |
1580 | param.private_data_len = sizeof(priv); | |
1581 | ||
1582 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1583 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1584 | /* |
1585 | * set the admin queue depth to the minimum size | |
1586 | * specified by the Fabrics standard. | |
1587 | */ | |
1588 | if (priv.qid == 0) { | |
7aa1f427 SG |
1589 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1590 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1591 | } else { |
c5af8654 JF |
1592 | /* |
1593 | * current interpretation of the fabrics spec | |
1594 | * is at minimum you make hrqsize sqsize+1, or a | |
1595 | * 1's based representation of sqsize. | |
1596 | */ | |
f994d9dc | 1597 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1598 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1599 | } |
71102307 CH |
1600 | |
1601 | ret = rdma_connect(queue->cm_id, ¶m); | |
1602 | if (ret) { | |
1603 | dev_err(ctrl->ctrl.device, | |
1604 | "rdma_connect failed (%d).\n", ret); | |
1605 | goto out_destroy_queue_ib; | |
1606 | } | |
1607 | ||
1608 | return 0; | |
1609 | ||
1610 | out_destroy_queue_ib: | |
1611 | nvme_rdma_destroy_queue_ib(queue); | |
1612 | return ret; | |
1613 | } | |
1614 | ||
71102307 CH |
1615 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1616 | struct rdma_cm_event *ev) | |
1617 | { | |
1618 | struct nvme_rdma_queue *queue = cm_id->context; | |
1619 | int cm_error = 0; | |
1620 | ||
1621 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1622 | rdma_event_msg(ev->event), ev->event, | |
1623 | ev->status, cm_id); | |
1624 | ||
1625 | switch (ev->event) { | |
1626 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1627 | cm_error = nvme_rdma_addr_resolved(queue); | |
1628 | break; | |
1629 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1630 | cm_error = nvme_rdma_route_resolved(queue); | |
1631 | break; | |
1632 | case RDMA_CM_EVENT_ESTABLISHED: | |
1633 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1634 | /* complete cm_done regardless of success/failure */ | |
1635 | complete(&queue->cm_done); | |
1636 | return 0; | |
1637 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1638 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1639 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1640 | break; | |
71102307 CH |
1641 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1642 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1643 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e | 1644 | nvme_rdma_destroy_queue_ib(queue); |
249090f9 | 1645 | /* fall through */ |
abf87d5e | 1646 | case RDMA_CM_EVENT_ADDR_ERROR: |
71102307 CH |
1647 | dev_dbg(queue->ctrl->ctrl.device, |
1648 | "CM error event %d\n", ev->event); | |
1649 | cm_error = -ECONNRESET; | |
1650 | break; | |
1651 | case RDMA_CM_EVENT_DISCONNECTED: | |
1652 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1653 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1654 | dev_dbg(queue->ctrl->ctrl.device, | |
1655 | "disconnect received - connection closed\n"); | |
1656 | nvme_rdma_error_recovery(queue->ctrl); | |
1657 | break; | |
1658 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1659 | /* device removal is handled via the ib_client API */ |
1660 | break; | |
71102307 CH |
1661 | default: |
1662 | dev_err(queue->ctrl->ctrl.device, | |
1663 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1664 | nvme_rdma_error_recovery(queue->ctrl); | |
1665 | break; | |
1666 | } | |
1667 | ||
1668 | if (cm_error) { | |
1669 | queue->cm_error = cm_error; | |
1670 | complete(&queue->cm_done); | |
1671 | } | |
1672 | ||
1673 | return 0; | |
1674 | } | |
1675 | ||
1676 | static enum blk_eh_timer_return | |
1677 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1678 | { | |
1679 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1680 | ||
e62a538d NC |
1681 | dev_warn(req->queue->ctrl->ctrl.device, |
1682 | "I/O %d QID %d timeout, reset controller\n", | |
1683 | rq->tag, nvme_rdma_queue_idx(req->queue)); | |
1684 | ||
71102307 CH |
1685 | /* queue error recovery */ |
1686 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1687 | ||
1688 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1689 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 | 1690 | |
db8c48e4 | 1691 | return BLK_EH_DONE; |
71102307 CH |
1692 | } |
1693 | ||
fc17b653 | 1694 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1695 | const struct blk_mq_queue_data *bd) |
1696 | { | |
1697 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1698 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1699 | struct request *rq = bd->rq; | |
1700 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1701 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1702 | struct nvme_command *c = sqe->data; | |
71102307 | 1703 | struct ib_device *dev; |
3bc32bb1 | 1704 | bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
fc17b653 CH |
1705 | blk_status_t ret; |
1706 | int err; | |
71102307 CH |
1707 | |
1708 | WARN_ON_ONCE(rq->tag < 0); | |
1709 | ||
3bc32bb1 | 1710 | if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) |
6cdefc6e | 1711 | return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); |
553cd9ef | 1712 | |
71102307 CH |
1713 | dev = queue->device->dev; |
1714 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1715 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1716 | ||
1717 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1718 | if (ret) |
71102307 CH |
1719 | return ret; |
1720 | ||
71102307 CH |
1721 | blk_mq_start_request(rq); |
1722 | ||
fc17b653 | 1723 | err = nvme_rdma_map_data(queue, rq, c); |
a7b7c7a1 | 1724 | if (unlikely(err < 0)) { |
71102307 | 1725 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1726 | "Failed to map data (%d)\n", err); |
71102307 CH |
1727 | nvme_cleanup_cmd(rq); |
1728 | goto err; | |
1729 | } | |
1730 | ||
b4b591c8 SG |
1731 | sqe->cqe.done = nvme_rdma_send_done; |
1732 | ||
71102307 CH |
1733 | ib_dma_sync_single_for_device(dev, sqe->dma, |
1734 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1735 | ||
fc17b653 | 1736 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f41725bb | 1737 | req->mr ? &req->reg_wr.wr : NULL); |
a7b7c7a1 | 1738 | if (unlikely(err)) { |
71102307 CH |
1739 | nvme_rdma_unmap_data(queue, rq); |
1740 | goto err; | |
1741 | } | |
1742 | ||
fc17b653 | 1743 | return BLK_STS_OK; |
71102307 | 1744 | err: |
fc17b653 CH |
1745 | if (err == -ENOMEM || err == -EAGAIN) |
1746 | return BLK_STS_RESOURCE; | |
1747 | return BLK_STS_IOERR; | |
71102307 CH |
1748 | } |
1749 | ||
1750 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1751 | { | |
1752 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1753 | struct ib_cq *cq = queue->ib_cq; | |
1754 | struct ib_wc wc; | |
1755 | int found = 0; | |
1756 | ||
71102307 CH |
1757 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1758 | struct ib_cqe *cqe = wc.wr_cqe; | |
1759 | ||
1760 | if (cqe) { | |
1761 | if (cqe->done == nvme_rdma_recv_done) | |
1762 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1763 | else | |
1764 | cqe->done(cq, &wc); | |
1765 | } | |
1766 | } | |
1767 | ||
1768 | return found; | |
1769 | } | |
1770 | ||
1771 | static void nvme_rdma_complete_rq(struct request *rq) | |
1772 | { | |
1773 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1774 | |
77f02a7a CH |
1775 | nvme_rdma_unmap_data(req->queue, rq); |
1776 | nvme_complete_rq(rq); | |
71102307 CH |
1777 | } |
1778 | ||
0b36658c SG |
1779 | static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) |
1780 | { | |
1781 | struct nvme_rdma_ctrl *ctrl = set->driver_data; | |
1782 | ||
1783 | return blk_mq_rdma_map_queues(set, ctrl->device->dev, 0); | |
1784 | } | |
1785 | ||
f363b089 | 1786 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1787 | .queue_rq = nvme_rdma_queue_rq, |
1788 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1789 | .init_request = nvme_rdma_init_request, |
1790 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1791 | .init_hctx = nvme_rdma_init_hctx, |
1792 | .poll = nvme_rdma_poll, | |
1793 | .timeout = nvme_rdma_timeout, | |
0b36658c | 1794 | .map_queues = nvme_rdma_map_queues, |
71102307 CH |
1795 | }; |
1796 | ||
f363b089 | 1797 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1798 | .queue_rq = nvme_rdma_queue_rq, |
1799 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1800 | .init_request = nvme_rdma_init_request, |
1801 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1802 | .init_hctx = nvme_rdma_init_admin_hctx, |
1803 | .timeout = nvme_rdma_timeout, | |
1804 | }; | |
1805 | ||
18398af2 | 1806 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
71102307 | 1807 | { |
75862c72 | 1808 | nvme_rdma_teardown_io_queues(ctrl, shutdown); |
18398af2 | 1809 | if (shutdown) |
71102307 | 1810 | nvme_shutdown_ctrl(&ctrl->ctrl); |
18398af2 SG |
1811 | else |
1812 | nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
75862c72 | 1813 | nvme_rdma_teardown_admin_queue(ctrl, shutdown); |
71102307 CH |
1814 | } |
1815 | ||
c5017e85 | 1816 | static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) |
2461a8dd | 1817 | { |
e9bc2587 | 1818 | nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); |
71102307 CH |
1819 | } |
1820 | ||
71102307 CH |
1821 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) |
1822 | { | |
d86c4d8e CH |
1823 | struct nvme_rdma_ctrl *ctrl = |
1824 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 | 1825 | |
d09f2b45 | 1826 | nvme_stop_ctrl(&ctrl->ctrl); |
18398af2 | 1827 | nvme_rdma_shutdown_ctrl(ctrl, false); |
71102307 | 1828 | |
ad6a0a52 | 1829 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
d5bf4b7f SG |
1830 | /* state change failure should never happen */ |
1831 | WARN_ON_ONCE(1); | |
1832 | return; | |
1833 | } | |
1834 | ||
c66e2998 | 1835 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
370ae6e4 | 1836 | goto out_fail; |
71102307 | 1837 | |
71102307 CH |
1838 | return; |
1839 | ||
370ae6e4 | 1840 | out_fail: |
8000d1fd NC |
1841 | ++ctrl->ctrl.nr_reconnects; |
1842 | nvme_rdma_reconnect_or_remove(ctrl); | |
71102307 CH |
1843 | } |
1844 | ||
71102307 CH |
1845 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1846 | .name = "rdma", | |
1847 | .module = THIS_MODULE, | |
d3d5b87d | 1848 | .flags = NVME_F_FABRICS, |
71102307 CH |
1849 | .reg_read32 = nvmf_reg_read32, |
1850 | .reg_read64 = nvmf_reg_read64, | |
1851 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1852 | .free_ctrl = nvme_rdma_free_ctrl, |
1853 | .submit_async_event = nvme_rdma_submit_async_event, | |
c5017e85 | 1854 | .delete_ctrl = nvme_rdma_delete_ctrl, |
71102307 | 1855 | .get_address = nvmf_get_address, |
b435ecea | 1856 | .stop_ctrl = nvme_rdma_stop_ctrl, |
71102307 CH |
1857 | }; |
1858 | ||
36e835f2 JS |
1859 | static inline bool |
1860 | __nvme_rdma_options_match(struct nvme_rdma_ctrl *ctrl, | |
1861 | struct nvmf_ctrl_options *opts) | |
1862 | { | |
1863 | char *stdport = __stringify(NVME_RDMA_IP_PORT); | |
1864 | ||
1865 | ||
1866 | if (!nvmf_ctlr_matches_baseopts(&ctrl->ctrl, opts) || | |
1867 | strcmp(opts->traddr, ctrl->ctrl.opts->traddr)) | |
1868 | return false; | |
1869 | ||
1870 | if (opts->mask & NVMF_OPT_TRSVCID && | |
1871 | ctrl->ctrl.opts->mask & NVMF_OPT_TRSVCID) { | |
1872 | if (strcmp(opts->trsvcid, ctrl->ctrl.opts->trsvcid)) | |
1873 | return false; | |
1874 | } else if (opts->mask & NVMF_OPT_TRSVCID) { | |
1875 | if (strcmp(opts->trsvcid, stdport)) | |
1876 | return false; | |
1877 | } else if (ctrl->ctrl.opts->mask & NVMF_OPT_TRSVCID) { | |
1878 | if (strcmp(stdport, ctrl->ctrl.opts->trsvcid)) | |
1879 | return false; | |
1880 | } | |
1881 | /* else, it's a match as both have stdport. Fall to next checks */ | |
1882 | ||
1883 | /* | |
1884 | * checking the local address is rough. In most cases, one | |
1885 | * is not specified and the host port is selected by the stack. | |
1886 | * | |
1887 | * Assume no match if: | |
1888 | * local address is specified and address is not the same | |
1889 | * local address is not specified but remote is, or vice versa | |
1890 | * (admin using specific host_traddr when it matters). | |
1891 | */ | |
1892 | if (opts->mask & NVMF_OPT_HOST_TRADDR && | |
1893 | ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) { | |
1894 | if (strcmp(opts->host_traddr, ctrl->ctrl.opts->host_traddr)) | |
1895 | return false; | |
1896 | } else if (opts->mask & NVMF_OPT_HOST_TRADDR || | |
1897 | ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) | |
1898 | return false; | |
1899 | /* | |
1900 | * if neither controller had an host port specified, assume it's | |
1901 | * a match as everything else matched. | |
1902 | */ | |
1903 | ||
1904 | return true; | |
1905 | } | |
1906 | ||
1907 | /* | |
1908 | * Fails a connection request if it matches an existing controller | |
1909 | * (association) with the same tuple: | |
1910 | * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> | |
1911 | * | |
1912 | * if local address is not specified in the request, it will match an | |
1913 | * existing controller with all the other parameters the same and no | |
1914 | * local port address specified as well. | |
1915 | * | |
1916 | * The ports don't need to be compared as they are intrinsically | |
1917 | * already matched by the port pointers supplied. | |
1918 | */ | |
1919 | static bool | |
1920 | nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) | |
1921 | { | |
1922 | struct nvme_rdma_ctrl *ctrl; | |
1923 | bool found = false; | |
1924 | ||
1925 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1926 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1927 | found = __nvme_rdma_options_match(ctrl, opts); | |
1928 | if (found) | |
1929 | break; | |
1930 | } | |
1931 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1932 | ||
1933 | return found; | |
1934 | } | |
1935 | ||
71102307 CH |
1936 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1937 | struct nvmf_ctrl_options *opts) | |
1938 | { | |
1939 | struct nvme_rdma_ctrl *ctrl; | |
1940 | int ret; | |
1941 | bool changed; | |
0928f9b4 | 1942 | char *port; |
71102307 CH |
1943 | |
1944 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1945 | if (!ctrl) | |
1946 | return ERR_PTR(-ENOMEM); | |
1947 | ctrl->ctrl.opts = opts; | |
1948 | INIT_LIST_HEAD(&ctrl->list); | |
1949 | ||
0928f9b4 SG |
1950 | if (opts->mask & NVMF_OPT_TRSVCID) |
1951 | port = opts->trsvcid; | |
1952 | else | |
1953 | port = __stringify(NVME_RDMA_IP_PORT); | |
1954 | ||
1955 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1956 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1957 | if (ret) { |
0928f9b4 | 1958 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1959 | goto out_free_ctrl; |
1960 | } | |
1961 | ||
8f4e8dac | 1962 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1963 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1964 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1965 | if (ret) { |
0928f9b4 | 1966 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1967 | opts->host_traddr); |
1968 | goto out_free_ctrl; | |
1969 | } | |
1970 | } | |
1971 | ||
36e835f2 JS |
1972 | if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { |
1973 | ret = -EALREADY; | |
1974 | goto out_free_ctrl; | |
1975 | } | |
1976 | ||
71102307 CH |
1977 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1978 | nvme_rdma_reconnect_ctrl_work); | |
1979 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
d86c4d8e | 1980 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 | 1981 | |
d858e5f0 | 1982 | ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ |
c5af8654 | 1983 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1984 | ctrl->ctrl.kato = opts->kato; |
1985 | ||
1986 | ret = -ENOMEM; | |
d858e5f0 | 1987 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
71102307 CH |
1988 | GFP_KERNEL); |
1989 | if (!ctrl->queues) | |
3d064101 SG |
1990 | goto out_free_ctrl; |
1991 | ||
1992 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, | |
1993 | 0 /* no quirks, we're perfect! */); | |
1994 | if (ret) | |
1995 | goto out_kfree_queues; | |
71102307 | 1996 | |
b754a32c MG |
1997 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); |
1998 | WARN_ON_ONCE(!changed); | |
1999 | ||
c66e2998 | 2000 | ret = nvme_rdma_setup_ctrl(ctrl, true); |
71102307 | 2001 | if (ret) |
3d064101 | 2002 | goto out_uninit_ctrl; |
71102307 | 2003 | |
0928f9b4 | 2004 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
2005 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
2006 | ||
d22524a4 | 2007 | nvme_get_ctrl(&ctrl->ctrl); |
71102307 CH |
2008 | |
2009 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
2010 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
2011 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
2012 | ||
71102307 CH |
2013 | return &ctrl->ctrl; |
2014 | ||
71102307 CH |
2015 | out_uninit_ctrl: |
2016 | nvme_uninit_ctrl(&ctrl->ctrl); | |
2017 | nvme_put_ctrl(&ctrl->ctrl); | |
2018 | if (ret > 0) | |
2019 | ret = -EIO; | |
2020 | return ERR_PTR(ret); | |
3d064101 SG |
2021 | out_kfree_queues: |
2022 | kfree(ctrl->queues); | |
71102307 CH |
2023 | out_free_ctrl: |
2024 | kfree(ctrl); | |
2025 | return ERR_PTR(ret); | |
2026 | } | |
2027 | ||
2028 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
2029 | .name = "rdma", | |
0de5cd36 | 2030 | .module = THIS_MODULE, |
71102307 | 2031 | .required_opts = NVMF_OPT_TRADDR, |
8f4e8dac | 2032 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 2033 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
2034 | .create_ctrl = nvme_rdma_create_ctrl, |
2035 | }; | |
2036 | ||
e87a911f SW |
2037 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) |
2038 | { | |
2039 | struct nvme_rdma_ctrl *ctrl; | |
9bad0404 MG |
2040 | struct nvme_rdma_device *ndev; |
2041 | bool found = false; | |
2042 | ||
2043 | mutex_lock(&device_list_mutex); | |
2044 | list_for_each_entry(ndev, &device_list, entry) { | |
2045 | if (ndev->dev == ib_device) { | |
2046 | found = true; | |
2047 | break; | |
2048 | } | |
2049 | } | |
2050 | mutex_unlock(&device_list_mutex); | |
2051 | ||
2052 | if (!found) | |
2053 | return; | |
e87a911f SW |
2054 | |
2055 | /* Delete all controllers using this device */ | |
2056 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
2057 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
2058 | if (ctrl->device->dev != ib_device) | |
2059 | continue; | |
c5017e85 | 2060 | nvme_delete_ctrl(&ctrl->ctrl); |
e87a911f SW |
2061 | } |
2062 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
2063 | ||
b227c59b | 2064 | flush_workqueue(nvme_delete_wq); |
e87a911f SW |
2065 | } |
2066 | ||
2067 | static struct ib_client nvme_rdma_ib_client = { | |
2068 | .name = "nvme_rdma", | |
e87a911f SW |
2069 | .remove = nvme_rdma_remove_one |
2070 | }; | |
2071 | ||
71102307 CH |
2072 | static int __init nvme_rdma_init_module(void) |
2073 | { | |
e87a911f SW |
2074 | int ret; |
2075 | ||
e87a911f | 2076 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 2077 | if (ret) |
9a6327d2 | 2078 | return ret; |
a56c79cf SG |
2079 | |
2080 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
2081 | if (ret) | |
2082 | goto err_unreg_client; | |
e87a911f | 2083 | |
a56c79cf | 2084 | return 0; |
e87a911f | 2085 | |
a56c79cf SG |
2086 | err_unreg_client: |
2087 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 2088 | return ret; |
71102307 CH |
2089 | } |
2090 | ||
2091 | static void __exit nvme_rdma_cleanup_module(void) | |
2092 | { | |
71102307 | 2093 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2094 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2095 | } |
2096 | ||
2097 | module_init(nvme_rdma_init_module); | |
2098 | module_exit(nvme_rdma_cleanup_module); | |
2099 | ||
2100 | MODULE_LICENSE("GPL v2"); |