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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
f41725bb | 18 | #include <rdma/mr_pool.h> |
71102307 CH |
19 | #include <linux/err.h> |
20 | #include <linux/string.h> | |
71102307 CH |
21 | #include <linux/atomic.h> |
22 | #include <linux/blk-mq.h> | |
0b36658c | 23 | #include <linux/blk-mq-rdma.h> |
71102307 CH |
24 | #include <linux/types.h> |
25 | #include <linux/list.h> | |
26 | #include <linux/mutex.h> | |
27 | #include <linux/scatterlist.h> | |
28 | #include <linux/nvme.h> | |
71102307 CH |
29 | #include <asm/unaligned.h> |
30 | ||
31 | #include <rdma/ib_verbs.h> | |
32 | #include <rdma/rdma_cm.h> | |
71102307 CH |
33 | #include <linux/nvme-rdma.h> |
34 | ||
35 | #include "nvme.h" | |
36 | #include "fabrics.h" | |
37 | ||
38 | ||
782d820c | 39 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 | 40 | |
71102307 CH |
41 | #define NVME_RDMA_MAX_SEGMENTS 256 |
42 | ||
43 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
44 | ||
71102307 | 45 | struct nvme_rdma_device { |
f87c89ad MG |
46 | struct ib_device *dev; |
47 | struct ib_pd *pd; | |
71102307 CH |
48 | struct kref ref; |
49 | struct list_head entry; | |
50 | }; | |
51 | ||
52 | struct nvme_rdma_qe { | |
53 | struct ib_cqe cqe; | |
54 | void *data; | |
55 | u64 dma; | |
56 | }; | |
57 | ||
58 | struct nvme_rdma_queue; | |
59 | struct nvme_rdma_request { | |
d49187e9 | 60 | struct nvme_request req; |
71102307 CH |
61 | struct ib_mr *mr; |
62 | struct nvme_rdma_qe sqe; | |
4af7f7ff SG |
63 | union nvme_result result; |
64 | __le16 status; | |
65 | refcount_t ref; | |
71102307 CH |
66 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; |
67 | u32 num_sge; | |
68 | int nents; | |
69 | bool inline_data; | |
71102307 CH |
70 | struct ib_reg_wr reg_wr; |
71 | struct ib_cqe reg_cqe; | |
72 | struct nvme_rdma_queue *queue; | |
73 | struct sg_table sg_table; | |
74 | struct scatterlist first_sgl[]; | |
75 | }; | |
76 | ||
77 | enum nvme_rdma_queue_flags { | |
5013e98b SG |
78 | NVME_RDMA_Q_ALLOCATED = 0, |
79 | NVME_RDMA_Q_LIVE = 1, | |
eb1bd249 | 80 | NVME_RDMA_Q_TR_READY = 2, |
71102307 CH |
81 | }; |
82 | ||
83 | struct nvme_rdma_queue { | |
84 | struct nvme_rdma_qe *rsp_ring; | |
71102307 CH |
85 | int queue_size; |
86 | size_t cmnd_capsule_len; | |
87 | struct nvme_rdma_ctrl *ctrl; | |
88 | struct nvme_rdma_device *device; | |
89 | struct ib_cq *ib_cq; | |
90 | struct ib_qp *qp; | |
91 | ||
92 | unsigned long flags; | |
93 | struct rdma_cm_id *cm_id; | |
94 | int cm_error; | |
95 | struct completion cm_done; | |
96 | }; | |
97 | ||
98 | struct nvme_rdma_ctrl { | |
71102307 CH |
99 | /* read only in the hot path */ |
100 | struct nvme_rdma_queue *queues; | |
71102307 CH |
101 | |
102 | /* other member variables */ | |
71102307 | 103 | struct blk_mq_tag_set tag_set; |
71102307 CH |
104 | struct work_struct err_work; |
105 | ||
106 | struct nvme_rdma_qe async_event_sqe; | |
107 | ||
71102307 CH |
108 | struct delayed_work reconnect_work; |
109 | ||
110 | struct list_head list; | |
111 | ||
112 | struct blk_mq_tag_set admin_tag_set; | |
113 | struct nvme_rdma_device *device; | |
114 | ||
71102307 CH |
115 | u32 max_fr_pages; |
116 | ||
0928f9b4 SG |
117 | struct sockaddr_storage addr; |
118 | struct sockaddr_storage src_addr; | |
71102307 CH |
119 | |
120 | struct nvme_ctrl ctrl; | |
121 | }; | |
122 | ||
123 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
124 | { | |
125 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
126 | } | |
127 | ||
128 | static LIST_HEAD(device_list); | |
129 | static DEFINE_MUTEX(device_list_mutex); | |
130 | ||
131 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
132 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
133 | ||
71102307 CH |
134 | /* |
135 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
136 | * unsafe. With it turned off we will have to register a global rkey that | |
137 | * allows read and write access to all physical memory. | |
138 | */ | |
139 | static bool register_always = true; | |
140 | module_param(register_always, bool, 0444); | |
141 | MODULE_PARM_DESC(register_always, | |
142 | "Use memory registration even for contiguous memory regions"); | |
143 | ||
144 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
145 | struct rdma_cm_event *event); | |
146 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 | 147 | |
90af3512 SG |
148 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
149 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; | |
150 | ||
71102307 CH |
151 | /* XXX: really should move to a generic header sooner or later.. */ |
152 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
153 | { | |
154 | *p++ = val; | |
155 | *p++ = val >> 8; | |
156 | *p++ = val >> 16; | |
157 | } | |
158 | ||
159 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
160 | { | |
161 | return queue - queue->ctrl->queues; | |
162 | } | |
163 | ||
164 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
165 | { | |
166 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
167 | } | |
168 | ||
169 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
170 | size_t capsule_size, enum dma_data_direction dir) | |
171 | { | |
172 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
173 | kfree(qe->data); | |
174 | } | |
175 | ||
176 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
177 | size_t capsule_size, enum dma_data_direction dir) | |
178 | { | |
179 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
180 | if (!qe->data) | |
181 | return -ENOMEM; | |
182 | ||
183 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
184 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
185 | kfree(qe->data); | |
186 | return -ENOMEM; | |
187 | } | |
188 | ||
189 | return 0; | |
190 | } | |
191 | ||
192 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
193 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
194 | size_t capsule_size, enum dma_data_direction dir) | |
195 | { | |
196 | int i; | |
197 | ||
198 | for (i = 0; i < ib_queue_size; i++) | |
199 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
200 | kfree(ring); | |
201 | } | |
202 | ||
203 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
204 | size_t ib_queue_size, size_t capsule_size, | |
205 | enum dma_data_direction dir) | |
206 | { | |
207 | struct nvme_rdma_qe *ring; | |
208 | int i; | |
209 | ||
210 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
211 | if (!ring) | |
212 | return NULL; | |
213 | ||
214 | for (i = 0; i < ib_queue_size; i++) { | |
215 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
216 | goto out_free_ring; | |
217 | } | |
218 | ||
219 | return ring; | |
220 | ||
221 | out_free_ring: | |
222 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
223 | return NULL; | |
224 | } | |
225 | ||
226 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
227 | { | |
27a4beef MG |
228 | pr_debug("QP event %s (%d)\n", |
229 | ib_event_msg(event->event), event->event); | |
230 | ||
71102307 CH |
231 | } |
232 | ||
233 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
234 | { | |
235 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
236 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
237 | return queue->cm_error; | |
238 | } | |
239 | ||
240 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
241 | { | |
242 | struct nvme_rdma_device *dev = queue->device; | |
243 | struct ib_qp_init_attr init_attr; | |
244 | int ret; | |
245 | ||
246 | memset(&init_attr, 0, sizeof(init_attr)); | |
247 | init_attr.event_handler = nvme_rdma_qp_event; | |
248 | /* +1 for drain */ | |
249 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
250 | /* +1 for drain */ | |
251 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
252 | init_attr.cap.max_recv_sge = 1; | |
253 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
254 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
255 | init_attr.qp_type = IB_QPT_RC; | |
256 | init_attr.send_cq = queue->ib_cq; | |
257 | init_attr.recv_cq = queue->ib_cq; | |
258 | ||
259 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
260 | ||
261 | queue->qp = queue->cm_id->qp; | |
262 | return ret; | |
263 | } | |
264 | ||
385475ee CH |
265 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
266 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 267 | { |
385475ee | 268 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 269 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 270 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
271 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
272 | struct nvme_rdma_device *dev = queue->device; | |
273 | ||
71102307 CH |
274 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), |
275 | DMA_TO_DEVICE); | |
276 | } | |
277 | ||
385475ee CH |
278 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
279 | struct request *rq, unsigned int hctx_idx, | |
280 | unsigned int numa_node) | |
71102307 | 281 | { |
385475ee | 282 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 283 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 284 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
285 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
286 | struct nvme_rdma_device *dev = queue->device; | |
287 | struct ib_device *ibdev = dev->dev; | |
288 | int ret; | |
289 | ||
71102307 CH |
290 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
291 | DMA_TO_DEVICE); | |
292 | if (ret) | |
293 | return ret; | |
294 | ||
71102307 CH |
295 | req->queue = queue; |
296 | ||
297 | return 0; | |
71102307 CH |
298 | } |
299 | ||
71102307 CH |
300 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
301 | unsigned int hctx_idx) | |
302 | { | |
303 | struct nvme_rdma_ctrl *ctrl = data; | |
304 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
305 | ||
d858e5f0 | 306 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
71102307 CH |
307 | |
308 | hctx->driver_data = queue; | |
309 | return 0; | |
310 | } | |
311 | ||
312 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
313 | unsigned int hctx_idx) | |
314 | { | |
315 | struct nvme_rdma_ctrl *ctrl = data; | |
316 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
317 | ||
318 | BUG_ON(hctx_idx != 0); | |
319 | ||
320 | hctx->driver_data = queue; | |
321 | return 0; | |
322 | } | |
323 | ||
324 | static void nvme_rdma_free_dev(struct kref *ref) | |
325 | { | |
326 | struct nvme_rdma_device *ndev = | |
327 | container_of(ref, struct nvme_rdma_device, ref); | |
328 | ||
329 | mutex_lock(&device_list_mutex); | |
330 | list_del(&ndev->entry); | |
331 | mutex_unlock(&device_list_mutex); | |
332 | ||
71102307 | 333 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
334 | kfree(ndev); |
335 | } | |
336 | ||
337 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
338 | { | |
339 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
340 | } | |
341 | ||
342 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
343 | { | |
344 | return kref_get_unless_zero(&dev->ref); | |
345 | } | |
346 | ||
347 | static struct nvme_rdma_device * | |
348 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
349 | { | |
350 | struct nvme_rdma_device *ndev; | |
351 | ||
352 | mutex_lock(&device_list_mutex); | |
353 | list_for_each_entry(ndev, &device_list, entry) { | |
354 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
355 | nvme_rdma_dev_get(ndev)) | |
356 | goto out_unlock; | |
357 | } | |
358 | ||
359 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
360 | if (!ndev) | |
361 | goto out_err; | |
362 | ||
363 | ndev->dev = cm_id->device; | |
364 | kref_init(&ndev->ref); | |
365 | ||
11975e01 CH |
366 | ndev->pd = ib_alloc_pd(ndev->dev, |
367 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
368 | if (IS_ERR(ndev->pd)) |
369 | goto out_free_dev; | |
370 | ||
71102307 CH |
371 | if (!(ndev->dev->attrs.device_cap_flags & |
372 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
373 | dev_err(&ndev->dev->dev, | |
374 | "Memory registrations not supported.\n"); | |
11975e01 | 375 | goto out_free_pd; |
71102307 CH |
376 | } |
377 | ||
378 | list_add(&ndev->entry, &device_list); | |
379 | out_unlock: | |
380 | mutex_unlock(&device_list_mutex); | |
381 | return ndev; | |
382 | ||
71102307 CH |
383 | out_free_pd: |
384 | ib_dealloc_pd(ndev->pd); | |
385 | out_free_dev: | |
386 | kfree(ndev); | |
387 | out_err: | |
388 | mutex_unlock(&device_list_mutex); | |
389 | return NULL; | |
390 | } | |
391 | ||
392 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
393 | { | |
eb1bd249 MG |
394 | struct nvme_rdma_device *dev; |
395 | struct ib_device *ibdev; | |
396 | ||
397 | if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) | |
398 | return; | |
399 | ||
400 | dev = queue->device; | |
401 | ibdev = dev->dev; | |
71102307 | 402 | |
f41725bb IR |
403 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
404 | ||
eb1bd249 MG |
405 | /* |
406 | * The cm_id object might have been destroyed during RDMA connection | |
407 | * establishment error flow to avoid getting other cma events, thus | |
408 | * the destruction of the QP shouldn't use rdma_cm API. | |
409 | */ | |
410 | ib_destroy_qp(queue->qp); | |
71102307 CH |
411 | ib_free_cq(queue->ib_cq); |
412 | ||
413 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
414 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
415 | ||
416 | nvme_rdma_dev_put(dev); | |
417 | } | |
418 | ||
f41725bb IR |
419 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev) |
420 | { | |
421 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, | |
422 | ibdev->attrs.max_fast_reg_page_list_len); | |
423 | } | |
424 | ||
ca6e95bb | 425 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 426 | { |
ca6e95bb | 427 | struct ib_device *ibdev; |
71102307 CH |
428 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
429 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
430 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
431 | int ret; |
432 | ||
ca6e95bb SG |
433 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
434 | if (!queue->device) { | |
435 | dev_err(queue->cm_id->device->dev.parent, | |
436 | "no client data found!\n"); | |
437 | return -ECONNREFUSED; | |
438 | } | |
439 | ibdev = queue->device->dev; | |
71102307 CH |
440 | |
441 | /* | |
0b36658c SG |
442 | * Spread I/O queues completion vectors according their queue index. |
443 | * Admin queues can always go on completion vector 0. | |
71102307 | 444 | */ |
0b36658c | 445 | comp_vector = idx == 0 ? idx : idx - 1; |
71102307 CH |
446 | |
447 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
448 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
449 | cq_factor * queue->queue_size + 1, | |
450 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
451 | if (IS_ERR(queue->ib_cq)) { |
452 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 453 | goto out_put_dev; |
71102307 CH |
454 | } |
455 | ||
456 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
457 | if (ret) | |
458 | goto out_destroy_ib_cq; | |
459 | ||
460 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
461 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
462 | if (!queue->rsp_ring) { | |
463 | ret = -ENOMEM; | |
464 | goto out_destroy_qp; | |
465 | } | |
466 | ||
f41725bb IR |
467 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, |
468 | queue->queue_size, | |
469 | IB_MR_TYPE_MEM_REG, | |
470 | nvme_rdma_get_max_fr_pages(ibdev)); | |
471 | if (ret) { | |
472 | dev_err(queue->ctrl->ctrl.device, | |
473 | "failed to initialize MR pool sized %d for QID %d\n", | |
474 | queue->queue_size, idx); | |
475 | goto out_destroy_ring; | |
476 | } | |
477 | ||
eb1bd249 MG |
478 | set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); |
479 | ||
71102307 CH |
480 | return 0; |
481 | ||
f41725bb IR |
482 | out_destroy_ring: |
483 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
484 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
71102307 | 485 | out_destroy_qp: |
1f61def9 | 486 | rdma_destroy_qp(queue->cm_id); |
71102307 CH |
487 | out_destroy_ib_cq: |
488 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
489 | out_put_dev: |
490 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
491 | return ret; |
492 | } | |
493 | ||
41e8cfa1 | 494 | static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, |
71102307 CH |
495 | int idx, size_t queue_size) |
496 | { | |
497 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 498 | struct sockaddr *src_addr = NULL; |
71102307 CH |
499 | int ret; |
500 | ||
501 | queue = &ctrl->queues[idx]; | |
502 | queue->ctrl = ctrl; | |
503 | init_completion(&queue->cm_done); | |
504 | ||
505 | if (idx > 0) | |
506 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
507 | else | |
508 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
509 | ||
510 | queue->queue_size = queue_size; | |
511 | ||
512 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
513 | RDMA_PS_TCP, IB_QPT_RC); | |
514 | if (IS_ERR(queue->cm_id)) { | |
515 | dev_info(ctrl->ctrl.device, | |
516 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
517 | return PTR_ERR(queue->cm_id); | |
518 | } | |
519 | ||
8f4e8dac | 520 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 521 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 522 | |
0928f9b4 SG |
523 | queue->cm_error = -ETIMEDOUT; |
524 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
525 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
526 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
527 | if (ret) { | |
528 | dev_info(ctrl->ctrl.device, | |
529 | "rdma_resolve_addr failed (%d).\n", ret); | |
530 | goto out_destroy_cm_id; | |
531 | } | |
532 | ||
533 | ret = nvme_rdma_wait_for_cm(queue); | |
534 | if (ret) { | |
535 | dev_info(ctrl->ctrl.device, | |
d8bfceeb | 536 | "rdma connection establishment failed (%d)\n", ret); |
71102307 CH |
537 | goto out_destroy_cm_id; |
538 | } | |
539 | ||
5013e98b | 540 | set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); |
71102307 CH |
541 | |
542 | return 0; | |
543 | ||
544 | out_destroy_cm_id: | |
545 | rdma_destroy_id(queue->cm_id); | |
eb1bd249 | 546 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
547 | return ret; |
548 | } | |
549 | ||
550 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
551 | { | |
a57bd541 SG |
552 | if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) |
553 | return; | |
554 | ||
71102307 CH |
555 | rdma_disconnect(queue->cm_id); |
556 | ib_drain_qp(queue->qp); | |
557 | } | |
558 | ||
559 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
560 | { | |
5013e98b | 561 | if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
a57bd541 SG |
562 | return; |
563 | ||
bd9f0759 SG |
564 | if (nvme_rdma_queue_idx(queue) == 0) { |
565 | nvme_rdma_free_qe(queue->device->dev, | |
566 | &queue->ctrl->async_event_sqe, | |
567 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
568 | } | |
569 | ||
71102307 CH |
570 | nvme_rdma_destroy_queue_ib(queue); |
571 | rdma_destroy_id(queue->cm_id); | |
572 | } | |
573 | ||
a57bd541 | 574 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 | 575 | { |
a57bd541 SG |
576 | int i; |
577 | ||
578 | for (i = 1; i < ctrl->ctrl.queue_count; i++) | |
579 | nvme_rdma_free_queue(&ctrl->queues[i]); | |
71102307 CH |
580 | } |
581 | ||
a57bd541 | 582 | static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 CH |
583 | { |
584 | int i; | |
585 | ||
d858e5f0 | 586 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
a57bd541 | 587 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
71102307 CH |
588 | } |
589 | ||
68e16fcf SG |
590 | static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) |
591 | { | |
592 | int ret; | |
593 | ||
594 | if (idx) | |
595 | ret = nvmf_connect_io_queue(&ctrl->ctrl, idx); | |
596 | else | |
597 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); | |
598 | ||
599 | if (!ret) | |
600 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[idx].flags); | |
601 | else | |
602 | dev_info(ctrl->ctrl.device, | |
603 | "failed to connect queue: %d ret=%d\n", idx, ret); | |
604 | return ret; | |
605 | } | |
606 | ||
607 | static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) | |
71102307 CH |
608 | { |
609 | int i, ret = 0; | |
610 | ||
d858e5f0 | 611 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
68e16fcf SG |
612 | ret = nvme_rdma_start_queue(ctrl, i); |
613 | if (ret) | |
a57bd541 | 614 | goto out_stop_queues; |
71102307 CH |
615 | } |
616 | ||
c8dbc37c SW |
617 | return 0; |
618 | ||
a57bd541 | 619 | out_stop_queues: |
68e16fcf SG |
620 | for (i--; i >= 1; i--) |
621 | nvme_rdma_stop_queue(&ctrl->queues[i]); | |
71102307 CH |
622 | return ret; |
623 | } | |
624 | ||
41e8cfa1 | 625 | static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) |
71102307 | 626 | { |
c248c643 | 627 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
0b36658c | 628 | struct ib_device *ibdev = ctrl->device->dev; |
c248c643 | 629 | unsigned int nr_io_queues; |
71102307 CH |
630 | int i, ret; |
631 | ||
c248c643 | 632 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
0b36658c SG |
633 | |
634 | /* | |
635 | * we map queues according to the device irq vectors for | |
636 | * optimal locality so we don't need more queues than | |
637 | * completion vectors. | |
638 | */ | |
639 | nr_io_queues = min_t(unsigned int, nr_io_queues, | |
640 | ibdev->num_comp_vectors); | |
641 | ||
c248c643 SG |
642 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); |
643 | if (ret) | |
644 | return ret; | |
645 | ||
d858e5f0 SG |
646 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
647 | if (ctrl->ctrl.queue_count < 2) | |
c248c643 SG |
648 | return 0; |
649 | ||
650 | dev_info(ctrl->ctrl.device, | |
651 | "creating %d I/O queues.\n", nr_io_queues); | |
652 | ||
d858e5f0 | 653 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
41e8cfa1 SG |
654 | ret = nvme_rdma_alloc_queue(ctrl, i, |
655 | ctrl->ctrl.sqsize + 1); | |
656 | if (ret) | |
71102307 | 657 | goto out_free_queues; |
71102307 CH |
658 | } |
659 | ||
660 | return 0; | |
661 | ||
662 | out_free_queues: | |
f361e5a0 | 663 | for (i--; i >= 1; i--) |
a57bd541 | 664 | nvme_rdma_free_queue(&ctrl->queues[i]); |
71102307 CH |
665 | |
666 | return ret; | |
667 | } | |
668 | ||
60070c78 SG |
669 | static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl, |
670 | struct blk_mq_tag_set *set) | |
b28a308e SG |
671 | { |
672 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
b28a308e SG |
673 | |
674 | blk_mq_free_tag_set(set); | |
675 | nvme_rdma_dev_put(ctrl->device); | |
676 | } | |
677 | ||
678 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, | |
679 | bool admin) | |
680 | { | |
681 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
682 | struct blk_mq_tag_set *set; | |
683 | int ret; | |
684 | ||
685 | if (admin) { | |
686 | set = &ctrl->admin_tag_set; | |
687 | memset(set, 0, sizeof(*set)); | |
688 | set->ops = &nvme_rdma_admin_mq_ops; | |
38dabe21 | 689 | set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; |
b28a308e SG |
690 | set->reserved_tags = 2; /* connect + keep-alive */ |
691 | set->numa_node = NUMA_NO_NODE; | |
692 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
693 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
694 | set->driver_data = ctrl; | |
695 | set->nr_hw_queues = 1; | |
696 | set->timeout = ADMIN_TIMEOUT; | |
94f29d4f | 697 | set->flags = BLK_MQ_F_NO_SCHED; |
b28a308e SG |
698 | } else { |
699 | set = &ctrl->tag_set; | |
700 | memset(set, 0, sizeof(*set)); | |
701 | set->ops = &nvme_rdma_mq_ops; | |
702 | set->queue_depth = nctrl->opts->queue_size; | |
703 | set->reserved_tags = 1; /* fabric connect */ | |
704 | set->numa_node = NUMA_NO_NODE; | |
705 | set->flags = BLK_MQ_F_SHOULD_MERGE; | |
706 | set->cmd_size = sizeof(struct nvme_rdma_request) + | |
707 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
708 | set->driver_data = ctrl; | |
709 | set->nr_hw_queues = nctrl->queue_count - 1; | |
710 | set->timeout = NVME_IO_TIMEOUT; | |
711 | } | |
712 | ||
713 | ret = blk_mq_alloc_tag_set(set); | |
714 | if (ret) | |
715 | goto out; | |
716 | ||
717 | /* | |
718 | * We need a reference on the device as long as the tag_set is alive, | |
719 | * as the MRs in the request structures need a valid ib_device. | |
720 | */ | |
721 | ret = nvme_rdma_dev_get(ctrl->device); | |
722 | if (!ret) { | |
723 | ret = -EINVAL; | |
724 | goto out_free_tagset; | |
725 | } | |
726 | ||
727 | return set; | |
728 | ||
729 | out_free_tagset: | |
730 | blk_mq_free_tag_set(set); | |
731 | out: | |
732 | return ERR_PTR(ret); | |
733 | } | |
734 | ||
3f02fffb SG |
735 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, |
736 | bool remove) | |
71102307 | 737 | { |
a57bd541 | 738 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
3f02fffb SG |
739 | if (remove) { |
740 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
60070c78 | 741 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset); |
3f02fffb | 742 | } |
a57bd541 | 743 | nvme_rdma_free_queue(&ctrl->queues[0]); |
71102307 CH |
744 | } |
745 | ||
3f02fffb SG |
746 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, |
747 | bool new) | |
90af3512 SG |
748 | { |
749 | int error; | |
750 | ||
41e8cfa1 | 751 | error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); |
90af3512 SG |
752 | if (error) |
753 | return error; | |
754 | ||
755 | ctrl->device = ctrl->queues[0].device; | |
756 | ||
f41725bb | 757 | ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev); |
90af3512 | 758 | |
3f02fffb SG |
759 | if (new) { |
760 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); | |
f04b9cc8 SG |
761 | if (IS_ERR(ctrl->ctrl.admin_tagset)) { |
762 | error = PTR_ERR(ctrl->ctrl.admin_tagset); | |
3f02fffb | 763 | goto out_free_queue; |
f04b9cc8 | 764 | } |
90af3512 | 765 | |
3f02fffb SG |
766 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
767 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
768 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
769 | goto out_free_tagset; | |
770 | } | |
90af3512 SG |
771 | } |
772 | ||
68e16fcf | 773 | error = nvme_rdma_start_queue(ctrl, 0); |
90af3512 SG |
774 | if (error) |
775 | goto out_cleanup_queue; | |
776 | ||
09fdc23b | 777 | error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP, |
90af3512 SG |
778 | &ctrl->ctrl.cap); |
779 | if (error) { | |
780 | dev_err(ctrl->ctrl.device, | |
781 | "prop_get NVME_REG_CAP failed\n"); | |
782 | goto out_cleanup_queue; | |
783 | } | |
784 | ||
785 | ctrl->ctrl.sqsize = | |
786 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); | |
787 | ||
788 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
789 | if (error) | |
790 | goto out_cleanup_queue; | |
791 | ||
792 | ctrl->ctrl.max_hw_sectors = | |
126e76ff | 793 | (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9); |
90af3512 SG |
794 | |
795 | error = nvme_init_identify(&ctrl->ctrl); | |
796 | if (error) | |
797 | goto out_cleanup_queue; | |
798 | ||
799 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
800 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
801 | DMA_TO_DEVICE); | |
802 | if (error) | |
803 | goto out_cleanup_queue; | |
804 | ||
805 | return 0; | |
806 | ||
807 | out_cleanup_queue: | |
3f02fffb SG |
808 | if (new) |
809 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
90af3512 | 810 | out_free_tagset: |
3f02fffb | 811 | if (new) |
60070c78 | 812 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset); |
90af3512 SG |
813 | out_free_queue: |
814 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
815 | return error; | |
816 | } | |
817 | ||
a57bd541 SG |
818 | static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, |
819 | bool remove) | |
820 | { | |
821 | nvme_rdma_stop_io_queues(ctrl); | |
822 | if (remove) { | |
823 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
60070c78 | 824 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset); |
a57bd541 SG |
825 | } |
826 | nvme_rdma_free_io_queues(ctrl); | |
827 | } | |
828 | ||
829 | static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) | |
830 | { | |
831 | int ret; | |
832 | ||
41e8cfa1 | 833 | ret = nvme_rdma_alloc_io_queues(ctrl); |
a57bd541 SG |
834 | if (ret) |
835 | return ret; | |
836 | ||
837 | if (new) { | |
838 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); | |
f04b9cc8 SG |
839 | if (IS_ERR(ctrl->ctrl.tagset)) { |
840 | ret = PTR_ERR(ctrl->ctrl.tagset); | |
a57bd541 | 841 | goto out_free_io_queues; |
f04b9cc8 | 842 | } |
a57bd541 SG |
843 | |
844 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
845 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
846 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
847 | goto out_free_tag_set; | |
848 | } | |
849 | } else { | |
a57bd541 SG |
850 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, |
851 | ctrl->ctrl.queue_count - 1); | |
852 | } | |
853 | ||
68e16fcf | 854 | ret = nvme_rdma_start_io_queues(ctrl); |
a57bd541 SG |
855 | if (ret) |
856 | goto out_cleanup_connect_q; | |
857 | ||
858 | return 0; | |
859 | ||
860 | out_cleanup_connect_q: | |
861 | if (new) | |
862 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
863 | out_free_tag_set: | |
864 | if (new) | |
60070c78 | 865 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset); |
a57bd541 SG |
866 | out_free_io_queues: |
867 | nvme_rdma_free_io_queues(ctrl); | |
868 | return ret; | |
71102307 CH |
869 | } |
870 | ||
871 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) | |
872 | { | |
873 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
874 | ||
875 | if (list_empty(&ctrl->list)) | |
876 | goto free_ctrl; | |
877 | ||
878 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
879 | list_del(&ctrl->list); | |
880 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
881 | ||
71102307 CH |
882 | kfree(ctrl->queues); |
883 | nvmf_free_options(nctrl->opts); | |
884 | free_ctrl: | |
885 | kfree(ctrl); | |
886 | } | |
887 | ||
fd8563ce SG |
888 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
889 | { | |
890 | /* If we are resetting/deleting then do nothing */ | |
891 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
892 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
893 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
894 | return; | |
895 | } | |
896 | ||
897 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
898 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
899 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 900 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
901 | ctrl->ctrl.opts->reconnect_delay * HZ); |
902 | } else { | |
903 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
12fa1304 | 904 | nvme_delete_ctrl(&ctrl->ctrl); |
fd8563ce SG |
905 | } |
906 | } | |
907 | ||
71102307 CH |
908 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
909 | { | |
910 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
911 | struct nvme_rdma_ctrl, reconnect_work); | |
912 | bool changed; | |
913 | int ret; | |
914 | ||
fdf9dfa8 | 915 | ++ctrl->ctrl.nr_reconnects; |
fd8563ce | 916 | |
31fdf184 | 917 | ret = nvme_rdma_configure_admin_queue(ctrl, false); |
71102307 | 918 | if (ret) |
e818a5b4 | 919 | goto requeue; |
71102307 | 920 | |
d858e5f0 | 921 | if (ctrl->ctrl.queue_count > 1) { |
a57bd541 | 922 | ret = nvme_rdma_configure_io_queues(ctrl, false); |
71102307 | 923 | if (ret) |
5e1fe61d | 924 | goto destroy_admin; |
71102307 CH |
925 | } |
926 | ||
927 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
0a960afd SG |
928 | if (!changed) { |
929 | /* state change failure is ok if we're in DELETING state */ | |
930 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); | |
931 | return; | |
932 | } | |
933 | ||
d09f2b45 | 934 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 | 935 | |
5e1fe61d SG |
936 | dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", |
937 | ctrl->ctrl.nr_reconnects); | |
938 | ||
939 | ctrl->ctrl.nr_reconnects = 0; | |
71102307 CH |
940 | |
941 | return; | |
942 | ||
5e1fe61d SG |
943 | destroy_admin: |
944 | nvme_rdma_destroy_admin_queue(ctrl, false); | |
71102307 | 945 | requeue: |
fd8563ce | 946 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 947 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 948 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
949 | } |
950 | ||
951 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
952 | { | |
953 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
954 | struct nvme_rdma_ctrl, err_work); | |
955 | ||
e4d753d7 | 956 | nvme_stop_keep_alive(&ctrl->ctrl); |
e89ca58f | 957 | |
148b4e7f | 958 | if (ctrl->ctrl.queue_count > 1) { |
71102307 | 959 | nvme_stop_queues(&ctrl->ctrl); |
71102307 CH |
960 | blk_mq_tagset_busy_iter(&ctrl->tag_set, |
961 | nvme_cancel_request, &ctrl->ctrl); | |
5e1fe61d SG |
962 | nvme_rdma_destroy_io_queues(ctrl, false); |
963 | } | |
964 | ||
965 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); | |
71102307 CH |
966 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
967 | nvme_cancel_request, &ctrl->ctrl); | |
5e1fe61d | 968 | nvme_rdma_destroy_admin_queue(ctrl, false); |
71102307 | 969 | |
e818a5b4 SG |
970 | /* |
971 | * queues are not a live anymore, so restart the queues to fail fast | |
972 | * new IO | |
973 | */ | |
fb051339 | 974 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
e818a5b4 SG |
975 | nvme_start_queues(&ctrl->ctrl); |
976 | ||
fd8563ce | 977 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
978 | } |
979 | ||
980 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
981 | { | |
982 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
983 | return; | |
984 | ||
9a6327d2 | 985 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
986 | } |
987 | ||
988 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
989 | const char *op) | |
990 | { | |
991 | struct nvme_rdma_queue *queue = cq->cq_context; | |
992 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
993 | ||
994 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
995 | dev_info(ctrl->ctrl.device, | |
996 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
997 | op, wc->wr_cqe, | |
998 | ib_wc_status_msg(wc->status), wc->status); | |
999 | nvme_rdma_error_recovery(ctrl); | |
1000 | } | |
1001 | ||
1002 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
1003 | { | |
1004 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1005 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
1006 | } | |
1007 | ||
1008 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
1009 | { | |
2f122e4f SG |
1010 | struct nvme_rdma_request *req = |
1011 | container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); | |
1012 | struct request *rq = blk_mq_rq_from_pdu(req); | |
1013 | ||
1014 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
71102307 | 1015 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); |
2f122e4f SG |
1016 | return; |
1017 | } | |
1018 | ||
1019 | if (refcount_dec_and_test(&req->ref)) | |
1020 | nvme_end_request(rq, req->status, req->result); | |
1021 | ||
71102307 CH |
1022 | } |
1023 | ||
1024 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
1025 | struct nvme_rdma_request *req) | |
1026 | { | |
1027 | struct ib_send_wr *bad_wr; | |
1028 | struct ib_send_wr wr = { | |
1029 | .opcode = IB_WR_LOCAL_INV, | |
1030 | .next = NULL, | |
1031 | .num_sge = 0, | |
2f122e4f | 1032 | .send_flags = IB_SEND_SIGNALED, |
71102307 CH |
1033 | .ex.invalidate_rkey = req->mr->rkey, |
1034 | }; | |
1035 | ||
1036 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
1037 | wr.wr_cqe = &req->reg_cqe; | |
1038 | ||
1039 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
1040 | } | |
1041 | ||
1042 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
1043 | struct request *rq) | |
1044 | { | |
1045 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 CH |
1046 | struct nvme_rdma_device *dev = queue->device; |
1047 | struct ib_device *ibdev = dev->dev; | |
71102307 CH |
1048 | |
1049 | if (!blk_rq_bytes(rq)) | |
1050 | return; | |
1051 | ||
f41725bb IR |
1052 | if (req->mr) { |
1053 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); | |
1054 | req->mr = NULL; | |
1055 | } | |
1056 | ||
71102307 CH |
1057 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, |
1058 | req->nents, rq_data_dir(rq) == | |
1059 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
1060 | ||
1061 | nvme_cleanup_cmd(rq); | |
1062 | sg_free_table_chained(&req->sg_table, true); | |
1063 | } | |
1064 | ||
1065 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
1066 | { | |
1067 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1068 | ||
1069 | sg->addr = 0; | |
1070 | put_unaligned_le24(0, sg->length); | |
1071 | put_unaligned_le32(0, sg->key); | |
1072 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
1073 | return 0; | |
1074 | } | |
1075 | ||
1076 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
1077 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1078 | { | |
1079 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
1080 | ||
1081 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
1082 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
1083 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
1084 | ||
1085 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
1086 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
1087 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
1088 | ||
1089 | req->inline_data = true; | |
1090 | req->num_sge++; | |
1091 | return 0; | |
1092 | } | |
1093 | ||
1094 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
1095 | struct nvme_rdma_request *req, struct nvme_command *c) | |
1096 | { | |
1097 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1098 | ||
1099 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
1100 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 1101 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
1102 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
1103 | return 0; | |
1104 | } | |
1105 | ||
1106 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
1107 | struct nvme_rdma_request *req, struct nvme_command *c, | |
1108 | int count) | |
1109 | { | |
1110 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
1111 | int nr; | |
1112 | ||
f41725bb IR |
1113 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); |
1114 | if (WARN_ON_ONCE(!req->mr)) | |
1115 | return -EAGAIN; | |
1116 | ||
b925a2dc MG |
1117 | /* |
1118 | * Align the MR to a 4K page size to match the ctrl page size and | |
1119 | * the block virtual boundary. | |
1120 | */ | |
1121 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K); | |
a7b7c7a1 | 1122 | if (unlikely(nr < count)) { |
f41725bb IR |
1123 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); |
1124 | req->mr = NULL; | |
71102307 CH |
1125 | if (nr < 0) |
1126 | return nr; | |
1127 | return -EINVAL; | |
1128 | } | |
1129 | ||
1130 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
1131 | ||
1132 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
1133 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
1134 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
1135 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
1136 | req->reg_wr.wr.num_sge = 0; | |
1137 | req->reg_wr.mr = req->mr; | |
1138 | req->reg_wr.key = req->mr->rkey; | |
1139 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
1140 | IB_ACCESS_REMOTE_READ | | |
1141 | IB_ACCESS_REMOTE_WRITE; | |
1142 | ||
71102307 CH |
1143 | sg->addr = cpu_to_le64(req->mr->iova); |
1144 | put_unaligned_le24(req->mr->length, sg->length); | |
1145 | put_unaligned_le32(req->mr->rkey, sg->key); | |
1146 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
1147 | NVME_SGL_FMT_INVALIDATE; | |
1148 | ||
1149 | return 0; | |
1150 | } | |
1151 | ||
1152 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 1153 | struct request *rq, struct nvme_command *c) |
71102307 CH |
1154 | { |
1155 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1156 | struct nvme_rdma_device *dev = queue->device; | |
1157 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 1158 | int count, ret; |
71102307 CH |
1159 | |
1160 | req->num_sge = 1; | |
1161 | req->inline_data = false; | |
4af7f7ff | 1162 | refcount_set(&req->ref, 2); /* send and recv completions */ |
71102307 CH |
1163 | |
1164 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
1165 | ||
1166 | if (!blk_rq_bytes(rq)) | |
1167 | return nvme_rdma_set_sg_null(c); | |
1168 | ||
1169 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
1170 | ret = sg_alloc_table_chained(&req->sg_table, |
1171 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
1172 | if (ret) |
1173 | return -ENOMEM; | |
1174 | ||
f9d03f96 | 1175 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 1176 | |
f9d03f96 | 1177 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
1178 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
1179 | if (unlikely(count <= 0)) { | |
1180 | sg_free_table_chained(&req->sg_table, true); | |
1181 | return -EIO; | |
1182 | } | |
1183 | ||
1184 | if (count == 1) { | |
b131c61d CH |
1185 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
1186 | blk_rq_payload_bytes(rq) <= | |
1187 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
1188 | return nvme_rdma_map_sg_inline(queue, req, c); |
1189 | ||
11975e01 | 1190 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
1191 | return nvme_rdma_map_sg_single(queue, req, c); |
1192 | } | |
1193 | ||
1194 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
1195 | } | |
1196 | ||
1197 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1198 | { | |
4af7f7ff SG |
1199 | struct nvme_rdma_qe *qe = |
1200 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1201 | struct nvme_rdma_request *req = | |
1202 | container_of(qe, struct nvme_rdma_request, sqe); | |
1203 | struct request *rq = blk_mq_rq_from_pdu(req); | |
1204 | ||
1205 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
71102307 | 1206 | nvme_rdma_wr_error(cq, wc, "SEND"); |
4af7f7ff SG |
1207 | return; |
1208 | } | |
1209 | ||
1210 | if (refcount_dec_and_test(&req->ref)) | |
1211 | nvme_end_request(rq, req->status, req->result); | |
71102307 CH |
1212 | } |
1213 | ||
1214 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, | |
1215 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
b4b591c8 | 1216 | struct ib_send_wr *first) |
71102307 CH |
1217 | { |
1218 | struct ib_send_wr wr, *bad_wr; | |
1219 | int ret; | |
1220 | ||
1221 | sge->addr = qe->dma; | |
1222 | sge->length = sizeof(struct nvme_command), | |
1223 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1224 | ||
71102307 CH |
1225 | wr.next = NULL; |
1226 | wr.wr_cqe = &qe->cqe; | |
1227 | wr.sg_list = sge; | |
1228 | wr.num_sge = num_sge; | |
1229 | wr.opcode = IB_WR_SEND; | |
b4b591c8 | 1230 | wr.send_flags = IB_SEND_SIGNALED; |
71102307 CH |
1231 | |
1232 | if (first) | |
1233 | first->next = ≀ | |
1234 | else | |
1235 | first = ≀ | |
1236 | ||
1237 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
a7b7c7a1 | 1238 | if (unlikely(ret)) { |
71102307 CH |
1239 | dev_err(queue->ctrl->ctrl.device, |
1240 | "%s failed with error code %d\n", __func__, ret); | |
1241 | } | |
1242 | return ret; | |
1243 | } | |
1244 | ||
1245 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1246 | struct nvme_rdma_qe *qe) | |
1247 | { | |
1248 | struct ib_recv_wr wr, *bad_wr; | |
1249 | struct ib_sge list; | |
1250 | int ret; | |
1251 | ||
1252 | list.addr = qe->dma; | |
1253 | list.length = sizeof(struct nvme_completion); | |
1254 | list.lkey = queue->device->pd->local_dma_lkey; | |
1255 | ||
1256 | qe->cqe.done = nvme_rdma_recv_done; | |
1257 | ||
1258 | wr.next = NULL; | |
1259 | wr.wr_cqe = &qe->cqe; | |
1260 | wr.sg_list = &list; | |
1261 | wr.num_sge = 1; | |
1262 | ||
1263 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
a7b7c7a1 | 1264 | if (unlikely(ret)) { |
71102307 CH |
1265 | dev_err(queue->ctrl->ctrl.device, |
1266 | "%s failed with error code %d\n", __func__, ret); | |
1267 | } | |
1268 | return ret; | |
1269 | } | |
1270 | ||
1271 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1272 | { | |
1273 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1274 | ||
1275 | if (queue_idx == 0) | |
1276 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1277 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1278 | } | |
1279 | ||
b4b591c8 SG |
1280 | static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) |
1281 | { | |
1282 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1283 | nvme_rdma_wr_error(cq, wc, "ASYNC"); | |
1284 | } | |
1285 | ||
ad22c355 | 1286 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) |
71102307 CH |
1287 | { |
1288 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1289 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1290 | struct ib_device *dev = queue->device->dev; | |
1291 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1292 | struct nvme_command *cmd = sqe->data; | |
1293 | struct ib_sge sge; | |
1294 | int ret; | |
1295 | ||
71102307 CH |
1296 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); |
1297 | ||
1298 | memset(cmd, 0, sizeof(*cmd)); | |
1299 | cmd->common.opcode = nvme_admin_async_event; | |
38dabe21 | 1300 | cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; |
71102307 CH |
1301 | cmd->common.flags |= NVME_CMD_SGL_METABUF; |
1302 | nvme_rdma_set_sg_null(cmd); | |
1303 | ||
b4b591c8 SG |
1304 | sqe->cqe.done = nvme_rdma_async_done; |
1305 | ||
71102307 CH |
1306 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), |
1307 | DMA_TO_DEVICE); | |
1308 | ||
b4b591c8 | 1309 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); |
71102307 CH |
1310 | WARN_ON_ONCE(ret); |
1311 | } | |
1312 | ||
1313 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1314 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1315 | { | |
71102307 CH |
1316 | struct request *rq; |
1317 | struct nvme_rdma_request *req; | |
1318 | int ret = 0; | |
1319 | ||
71102307 CH |
1320 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1321 | if (!rq) { | |
1322 | dev_err(queue->ctrl->ctrl.device, | |
1323 | "tag 0x%x on QP %#x not found\n", | |
1324 | cqe->command_id, queue->qp->qp_num); | |
1325 | nvme_rdma_error_recovery(queue->ctrl); | |
1326 | return ret; | |
1327 | } | |
1328 | req = blk_mq_rq_to_pdu(rq); | |
1329 | ||
4af7f7ff SG |
1330 | req->status = cqe->status; |
1331 | req->result = cqe->result; | |
71102307 | 1332 | |
3ef0279b SG |
1333 | if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { |
1334 | if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) { | |
1335 | dev_err(queue->ctrl->ctrl.device, | |
1336 | "Bogus remote invalidation for rkey %#x\n", | |
1337 | req->mr->rkey); | |
1338 | nvme_rdma_error_recovery(queue->ctrl); | |
1339 | } | |
f41725bb | 1340 | } else if (req->mr) { |
2f122e4f SG |
1341 | ret = nvme_rdma_inv_rkey(queue, req); |
1342 | if (unlikely(ret < 0)) { | |
1343 | dev_err(queue->ctrl->ctrl.device, | |
1344 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
1345 | req->mr->rkey, ret); | |
1346 | nvme_rdma_error_recovery(queue->ctrl); | |
1347 | } | |
1348 | /* the local invalidation completion will end the request */ | |
1349 | return 0; | |
1350 | } | |
71102307 | 1351 | |
4af7f7ff SG |
1352 | if (refcount_dec_and_test(&req->ref)) { |
1353 | if (rq->tag == tag) | |
1354 | ret = 1; | |
1355 | nvme_end_request(rq, req->status, req->result); | |
1356 | } | |
1357 | ||
71102307 CH |
1358 | return ret; |
1359 | } | |
1360 | ||
1361 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1362 | { | |
1363 | struct nvme_rdma_qe *qe = | |
1364 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1365 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1366 | struct ib_device *ibdev = queue->device->dev; | |
1367 | struct nvme_completion *cqe = qe->data; | |
1368 | const size_t len = sizeof(struct nvme_completion); | |
1369 | int ret = 0; | |
1370 | ||
1371 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1372 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1373 | return 0; | |
1374 | } | |
1375 | ||
1376 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1377 | /* | |
1378 | * AEN requests are special as they don't time out and can | |
1379 | * survive any kind of queue freeze and often don't respond to | |
1380 | * aborts. We don't even bother to allocate a struct request | |
1381 | * for them but rather special case them here. | |
1382 | */ | |
1383 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
38dabe21 | 1384 | cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH)) |
7bf58533 CH |
1385 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1386 | &cqe->result); | |
71102307 CH |
1387 | else |
1388 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1389 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1390 | ||
1391 | nvme_rdma_post_recv(queue, qe); | |
1392 | return ret; | |
1393 | } | |
1394 | ||
1395 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1396 | { | |
1397 | __nvme_rdma_recv_done(cq, wc, -1); | |
1398 | } | |
1399 | ||
1400 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1401 | { | |
1402 | int ret, i; | |
1403 | ||
1404 | for (i = 0; i < queue->queue_size; i++) { | |
1405 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1406 | if (ret) | |
1407 | goto out_destroy_queue_ib; | |
1408 | } | |
1409 | ||
1410 | return 0; | |
1411 | ||
1412 | out_destroy_queue_ib: | |
1413 | nvme_rdma_destroy_queue_ib(queue); | |
1414 | return ret; | |
1415 | } | |
1416 | ||
1417 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1418 | struct rdma_cm_event *ev) | |
1419 | { | |
7f03953c SW |
1420 | struct rdma_cm_id *cm_id = queue->cm_id; |
1421 | int status = ev->status; | |
1422 | const char *rej_msg; | |
1423 | const struct nvme_rdma_cm_rej *rej_data; | |
1424 | u8 rej_data_len; | |
1425 | ||
1426 | rej_msg = rdma_reject_msg(cm_id, status); | |
1427 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1428 | ||
1429 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1430 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1431 | |
1432 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1433 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1434 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1435 | } else { |
1436 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1437 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1438 | } |
1439 | ||
1440 | return -ECONNRESET; | |
1441 | } | |
1442 | ||
1443 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1444 | { | |
71102307 CH |
1445 | int ret; |
1446 | ||
ca6e95bb SG |
1447 | ret = nvme_rdma_create_queue_ib(queue); |
1448 | if (ret) | |
1449 | return ret; | |
71102307 CH |
1450 | |
1451 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1452 | if (ret) { | |
1453 | dev_err(queue->ctrl->ctrl.device, | |
1454 | "rdma_resolve_route failed (%d).\n", | |
1455 | queue->cm_error); | |
1456 | goto out_destroy_queue; | |
1457 | } | |
1458 | ||
1459 | return 0; | |
1460 | ||
1461 | out_destroy_queue: | |
1462 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1463 | return ret; |
1464 | } | |
1465 | ||
1466 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1467 | { | |
1468 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1469 | struct rdma_conn_param param = { }; | |
0b857b44 | 1470 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1471 | int ret; |
1472 | ||
1473 | param.qp_num = queue->qp->qp_num; | |
1474 | param.flow_control = 1; | |
1475 | ||
1476 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1477 | /* maximum retry count */ |
1478 | param.retry_count = 7; | |
71102307 CH |
1479 | param.rnr_retry_count = 7; |
1480 | param.private_data = &priv; | |
1481 | param.private_data_len = sizeof(priv); | |
1482 | ||
1483 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1484 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1485 | /* |
1486 | * set the admin queue depth to the minimum size | |
1487 | * specified by the Fabrics standard. | |
1488 | */ | |
1489 | if (priv.qid == 0) { | |
7aa1f427 SG |
1490 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1491 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1492 | } else { |
c5af8654 JF |
1493 | /* |
1494 | * current interpretation of the fabrics spec | |
1495 | * is at minimum you make hrqsize sqsize+1, or a | |
1496 | * 1's based representation of sqsize. | |
1497 | */ | |
f994d9dc | 1498 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1499 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1500 | } |
71102307 CH |
1501 | |
1502 | ret = rdma_connect(queue->cm_id, ¶m); | |
1503 | if (ret) { | |
1504 | dev_err(ctrl->ctrl.device, | |
1505 | "rdma_connect failed (%d).\n", ret); | |
1506 | goto out_destroy_queue_ib; | |
1507 | } | |
1508 | ||
1509 | return 0; | |
1510 | ||
1511 | out_destroy_queue_ib: | |
1512 | nvme_rdma_destroy_queue_ib(queue); | |
1513 | return ret; | |
1514 | } | |
1515 | ||
71102307 CH |
1516 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1517 | struct rdma_cm_event *ev) | |
1518 | { | |
1519 | struct nvme_rdma_queue *queue = cm_id->context; | |
1520 | int cm_error = 0; | |
1521 | ||
1522 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1523 | rdma_event_msg(ev->event), ev->event, | |
1524 | ev->status, cm_id); | |
1525 | ||
1526 | switch (ev->event) { | |
1527 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1528 | cm_error = nvme_rdma_addr_resolved(queue); | |
1529 | break; | |
1530 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1531 | cm_error = nvme_rdma_route_resolved(queue); | |
1532 | break; | |
1533 | case RDMA_CM_EVENT_ESTABLISHED: | |
1534 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1535 | /* complete cm_done regardless of success/failure */ | |
1536 | complete(&queue->cm_done); | |
1537 | return 0; | |
1538 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1539 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1540 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1541 | break; | |
71102307 CH |
1542 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1543 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1544 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e SG |
1545 | nvme_rdma_destroy_queue_ib(queue); |
1546 | case RDMA_CM_EVENT_ADDR_ERROR: | |
71102307 CH |
1547 | dev_dbg(queue->ctrl->ctrl.device, |
1548 | "CM error event %d\n", ev->event); | |
1549 | cm_error = -ECONNRESET; | |
1550 | break; | |
1551 | case RDMA_CM_EVENT_DISCONNECTED: | |
1552 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1553 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1554 | dev_dbg(queue->ctrl->ctrl.device, | |
1555 | "disconnect received - connection closed\n"); | |
1556 | nvme_rdma_error_recovery(queue->ctrl); | |
1557 | break; | |
1558 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1559 | /* device removal is handled via the ib_client API */ |
1560 | break; | |
71102307 CH |
1561 | default: |
1562 | dev_err(queue->ctrl->ctrl.device, | |
1563 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1564 | nvme_rdma_error_recovery(queue->ctrl); | |
1565 | break; | |
1566 | } | |
1567 | ||
1568 | if (cm_error) { | |
1569 | queue->cm_error = cm_error; | |
1570 | complete(&queue->cm_done); | |
1571 | } | |
1572 | ||
1573 | return 0; | |
1574 | } | |
1575 | ||
1576 | static enum blk_eh_timer_return | |
1577 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1578 | { | |
1579 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1580 | ||
e62a538d NC |
1581 | dev_warn(req->queue->ctrl->ctrl.device, |
1582 | "I/O %d QID %d timeout, reset controller\n", | |
1583 | rq->tag, nvme_rdma_queue_idx(req->queue)); | |
1584 | ||
71102307 CH |
1585 | /* queue error recovery */ |
1586 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1587 | ||
1588 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1589 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1590 | |
1591 | return BLK_EH_HANDLED; | |
1592 | } | |
1593 | ||
553cd9ef CH |
1594 | /* |
1595 | * We cannot accept any other command until the Connect command has completed. | |
1596 | */ | |
a104c9f2 | 1597 | static inline blk_status_t |
48832f8d SG |
1598 | nvme_rdma_is_ready(struct nvme_rdma_queue *queue, struct request *rq) |
1599 | { | |
1600 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) | |
1601 | return nvmf_check_init_req(&queue->ctrl->ctrl, rq); | |
1602 | return BLK_STS_OK; | |
553cd9ef CH |
1603 | } |
1604 | ||
fc17b653 | 1605 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1606 | const struct blk_mq_queue_data *bd) |
1607 | { | |
1608 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1609 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1610 | struct request *rq = bd->rq; | |
1611 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1612 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1613 | struct nvme_command *c = sqe->data; | |
71102307 | 1614 | struct ib_device *dev; |
fc17b653 CH |
1615 | blk_status_t ret; |
1616 | int err; | |
71102307 CH |
1617 | |
1618 | WARN_ON_ONCE(rq->tag < 0); | |
1619 | ||
48832f8d | 1620 | ret = nvme_rdma_is_ready(queue, rq); |
e818a5b4 | 1621 | if (unlikely(ret)) |
a104c9f2 | 1622 | return ret; |
553cd9ef | 1623 | |
71102307 CH |
1624 | dev = queue->device->dev; |
1625 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1626 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1627 | ||
1628 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1629 | if (ret) |
71102307 CH |
1630 | return ret; |
1631 | ||
71102307 CH |
1632 | blk_mq_start_request(rq); |
1633 | ||
fc17b653 | 1634 | err = nvme_rdma_map_data(queue, rq, c); |
a7b7c7a1 | 1635 | if (unlikely(err < 0)) { |
71102307 | 1636 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1637 | "Failed to map data (%d)\n", err); |
71102307 CH |
1638 | nvme_cleanup_cmd(rq); |
1639 | goto err; | |
1640 | } | |
1641 | ||
b4b591c8 SG |
1642 | sqe->cqe.done = nvme_rdma_send_done; |
1643 | ||
71102307 CH |
1644 | ib_dma_sync_single_for_device(dev, sqe->dma, |
1645 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1646 | ||
fc17b653 | 1647 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f41725bb | 1648 | req->mr ? &req->reg_wr.wr : NULL); |
a7b7c7a1 | 1649 | if (unlikely(err)) { |
71102307 CH |
1650 | nvme_rdma_unmap_data(queue, rq); |
1651 | goto err; | |
1652 | } | |
1653 | ||
fc17b653 | 1654 | return BLK_STS_OK; |
71102307 | 1655 | err: |
fc17b653 CH |
1656 | if (err == -ENOMEM || err == -EAGAIN) |
1657 | return BLK_STS_RESOURCE; | |
1658 | return BLK_STS_IOERR; | |
71102307 CH |
1659 | } |
1660 | ||
1661 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1662 | { | |
1663 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1664 | struct ib_cq *cq = queue->ib_cq; | |
1665 | struct ib_wc wc; | |
1666 | int found = 0; | |
1667 | ||
71102307 CH |
1668 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1669 | struct ib_cqe *cqe = wc.wr_cqe; | |
1670 | ||
1671 | if (cqe) { | |
1672 | if (cqe->done == nvme_rdma_recv_done) | |
1673 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1674 | else | |
1675 | cqe->done(cq, &wc); | |
1676 | } | |
1677 | } | |
1678 | ||
1679 | return found; | |
1680 | } | |
1681 | ||
1682 | static void nvme_rdma_complete_rq(struct request *rq) | |
1683 | { | |
1684 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1685 | |
77f02a7a CH |
1686 | nvme_rdma_unmap_data(req->queue, rq); |
1687 | nvme_complete_rq(rq); | |
71102307 CH |
1688 | } |
1689 | ||
0b36658c SG |
1690 | static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) |
1691 | { | |
1692 | struct nvme_rdma_ctrl *ctrl = set->driver_data; | |
1693 | ||
1694 | return blk_mq_rdma_map_queues(set, ctrl->device->dev, 0); | |
1695 | } | |
1696 | ||
f363b089 | 1697 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1698 | .queue_rq = nvme_rdma_queue_rq, |
1699 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1700 | .init_request = nvme_rdma_init_request, |
1701 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1702 | .init_hctx = nvme_rdma_init_hctx, |
1703 | .poll = nvme_rdma_poll, | |
1704 | .timeout = nvme_rdma_timeout, | |
0b36658c | 1705 | .map_queues = nvme_rdma_map_queues, |
71102307 CH |
1706 | }; |
1707 | ||
f363b089 | 1708 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1709 | .queue_rq = nvme_rdma_queue_rq, |
1710 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1711 | .init_request = nvme_rdma_init_request, |
1712 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1713 | .init_hctx = nvme_rdma_init_admin_hctx, |
1714 | .timeout = nvme_rdma_timeout, | |
1715 | }; | |
1716 | ||
18398af2 | 1717 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
71102307 | 1718 | { |
71102307 CH |
1719 | cancel_work_sync(&ctrl->err_work); |
1720 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1721 | ||
d858e5f0 | 1722 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1723 | nvme_stop_queues(&ctrl->ctrl); |
1724 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1725 | nvme_cancel_request, &ctrl->ctrl); | |
a57bd541 | 1726 | nvme_rdma_destroy_io_queues(ctrl, shutdown); |
71102307 CH |
1727 | } |
1728 | ||
18398af2 | 1729 | if (shutdown) |
71102307 | 1730 | nvme_shutdown_ctrl(&ctrl->ctrl); |
18398af2 SG |
1731 | else |
1732 | nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); | |
71102307 | 1733 | |
fb051339 | 1734 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1735 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
1736 | nvme_cancel_request, &ctrl->ctrl); | |
fb051339 | 1737 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
3f02fffb | 1738 | nvme_rdma_destroy_admin_queue(ctrl, shutdown); |
71102307 CH |
1739 | } |
1740 | ||
c5017e85 | 1741 | static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) |
2461a8dd | 1742 | { |
e9bc2587 | 1743 | nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); |
71102307 CH |
1744 | } |
1745 | ||
71102307 CH |
1746 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) |
1747 | { | |
d86c4d8e CH |
1748 | struct nvme_rdma_ctrl *ctrl = |
1749 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 CH |
1750 | int ret; |
1751 | bool changed; | |
1752 | ||
d09f2b45 | 1753 | nvme_stop_ctrl(&ctrl->ctrl); |
18398af2 | 1754 | nvme_rdma_shutdown_ctrl(ctrl, false); |
71102307 | 1755 | |
3f02fffb | 1756 | ret = nvme_rdma_configure_admin_queue(ctrl, false); |
370ae6e4 SG |
1757 | if (ret) |
1758 | goto out_fail; | |
71102307 | 1759 | |
d858e5f0 | 1760 | if (ctrl->ctrl.queue_count > 1) { |
a57bd541 | 1761 | ret = nvme_rdma_configure_io_queues(ctrl, false); |
71102307 | 1762 | if (ret) |
370ae6e4 | 1763 | goto out_fail; |
71102307 CH |
1764 | } |
1765 | ||
1766 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
0ad0bfa2 SG |
1767 | if (!changed) { |
1768 | /* state change failure is ok if we're in DELETING state */ | |
1769 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); | |
1770 | return; | |
1771 | } | |
71102307 | 1772 | |
d09f2b45 | 1773 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1774 | |
1775 | return; | |
1776 | ||
370ae6e4 | 1777 | out_fail: |
71102307 | 1778 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); |
e9bc2587 CH |
1779 | nvme_remove_namespaces(&ctrl->ctrl); |
1780 | nvme_rdma_shutdown_ctrl(ctrl, true); | |
1781 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1782 | nvme_put_ctrl(&ctrl->ctrl); | |
71102307 CH |
1783 | } |
1784 | ||
71102307 CH |
1785 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1786 | .name = "rdma", | |
1787 | .module = THIS_MODULE, | |
d3d5b87d | 1788 | .flags = NVME_F_FABRICS, |
71102307 CH |
1789 | .reg_read32 = nvmf_reg_read32, |
1790 | .reg_read64 = nvmf_reg_read64, | |
1791 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1792 | .free_ctrl = nvme_rdma_free_ctrl, |
1793 | .submit_async_event = nvme_rdma_submit_async_event, | |
c5017e85 | 1794 | .delete_ctrl = nvme_rdma_delete_ctrl, |
71102307 CH |
1795 | .get_address = nvmf_get_address, |
1796 | }; | |
1797 | ||
36e835f2 JS |
1798 | static inline bool |
1799 | __nvme_rdma_options_match(struct nvme_rdma_ctrl *ctrl, | |
1800 | struct nvmf_ctrl_options *opts) | |
1801 | { | |
1802 | char *stdport = __stringify(NVME_RDMA_IP_PORT); | |
1803 | ||
1804 | ||
1805 | if (!nvmf_ctlr_matches_baseopts(&ctrl->ctrl, opts) || | |
1806 | strcmp(opts->traddr, ctrl->ctrl.opts->traddr)) | |
1807 | return false; | |
1808 | ||
1809 | if (opts->mask & NVMF_OPT_TRSVCID && | |
1810 | ctrl->ctrl.opts->mask & NVMF_OPT_TRSVCID) { | |
1811 | if (strcmp(opts->trsvcid, ctrl->ctrl.opts->trsvcid)) | |
1812 | return false; | |
1813 | } else if (opts->mask & NVMF_OPT_TRSVCID) { | |
1814 | if (strcmp(opts->trsvcid, stdport)) | |
1815 | return false; | |
1816 | } else if (ctrl->ctrl.opts->mask & NVMF_OPT_TRSVCID) { | |
1817 | if (strcmp(stdport, ctrl->ctrl.opts->trsvcid)) | |
1818 | return false; | |
1819 | } | |
1820 | /* else, it's a match as both have stdport. Fall to next checks */ | |
1821 | ||
1822 | /* | |
1823 | * checking the local address is rough. In most cases, one | |
1824 | * is not specified and the host port is selected by the stack. | |
1825 | * | |
1826 | * Assume no match if: | |
1827 | * local address is specified and address is not the same | |
1828 | * local address is not specified but remote is, or vice versa | |
1829 | * (admin using specific host_traddr when it matters). | |
1830 | */ | |
1831 | if (opts->mask & NVMF_OPT_HOST_TRADDR && | |
1832 | ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) { | |
1833 | if (strcmp(opts->host_traddr, ctrl->ctrl.opts->host_traddr)) | |
1834 | return false; | |
1835 | } else if (opts->mask & NVMF_OPT_HOST_TRADDR || | |
1836 | ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) | |
1837 | return false; | |
1838 | /* | |
1839 | * if neither controller had an host port specified, assume it's | |
1840 | * a match as everything else matched. | |
1841 | */ | |
1842 | ||
1843 | return true; | |
1844 | } | |
1845 | ||
1846 | /* | |
1847 | * Fails a connection request if it matches an existing controller | |
1848 | * (association) with the same tuple: | |
1849 | * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> | |
1850 | * | |
1851 | * if local address is not specified in the request, it will match an | |
1852 | * existing controller with all the other parameters the same and no | |
1853 | * local port address specified as well. | |
1854 | * | |
1855 | * The ports don't need to be compared as they are intrinsically | |
1856 | * already matched by the port pointers supplied. | |
1857 | */ | |
1858 | static bool | |
1859 | nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) | |
1860 | { | |
1861 | struct nvme_rdma_ctrl *ctrl; | |
1862 | bool found = false; | |
1863 | ||
1864 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1865 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1866 | found = __nvme_rdma_options_match(ctrl, opts); | |
1867 | if (found) | |
1868 | break; | |
1869 | } | |
1870 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1871 | ||
1872 | return found; | |
1873 | } | |
1874 | ||
71102307 CH |
1875 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1876 | struct nvmf_ctrl_options *opts) | |
1877 | { | |
1878 | struct nvme_rdma_ctrl *ctrl; | |
1879 | int ret; | |
1880 | bool changed; | |
0928f9b4 | 1881 | char *port; |
71102307 CH |
1882 | |
1883 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1884 | if (!ctrl) | |
1885 | return ERR_PTR(-ENOMEM); | |
1886 | ctrl->ctrl.opts = opts; | |
1887 | INIT_LIST_HEAD(&ctrl->list); | |
1888 | ||
0928f9b4 SG |
1889 | if (opts->mask & NVMF_OPT_TRSVCID) |
1890 | port = opts->trsvcid; | |
1891 | else | |
1892 | port = __stringify(NVME_RDMA_IP_PORT); | |
1893 | ||
1894 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1895 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1896 | if (ret) { |
0928f9b4 | 1897 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1898 | goto out_free_ctrl; |
1899 | } | |
1900 | ||
8f4e8dac | 1901 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1902 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1903 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1904 | if (ret) { |
0928f9b4 | 1905 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1906 | opts->host_traddr); |
1907 | goto out_free_ctrl; | |
1908 | } | |
1909 | } | |
1910 | ||
36e835f2 JS |
1911 | if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { |
1912 | ret = -EALREADY; | |
1913 | goto out_free_ctrl; | |
1914 | } | |
1915 | ||
71102307 CH |
1916 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1917 | 0 /* no quirks, we're perfect! */); | |
1918 | if (ret) | |
1919 | goto out_free_ctrl; | |
1920 | ||
71102307 CH |
1921 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1922 | nvme_rdma_reconnect_ctrl_work); | |
1923 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
d86c4d8e | 1924 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 | 1925 | |
d858e5f0 | 1926 | ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ |
c5af8654 | 1927 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1928 | ctrl->ctrl.kato = opts->kato; |
1929 | ||
1930 | ret = -ENOMEM; | |
d858e5f0 | 1931 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
71102307 CH |
1932 | GFP_KERNEL); |
1933 | if (!ctrl->queues) | |
1934 | goto out_uninit_ctrl; | |
1935 | ||
3f02fffb | 1936 | ret = nvme_rdma_configure_admin_queue(ctrl, true); |
71102307 CH |
1937 | if (ret) |
1938 | goto out_kfree_queues; | |
1939 | ||
1940 | /* sanity check icdoff */ | |
1941 | if (ctrl->ctrl.icdoff) { | |
1942 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
bb472baa | 1943 | ret = -EINVAL; |
71102307 CH |
1944 | goto out_remove_admin_queue; |
1945 | } | |
1946 | ||
1947 | /* sanity check keyed sgls */ | |
1948 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1949 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
bb472baa | 1950 | ret = -EINVAL; |
71102307 CH |
1951 | goto out_remove_admin_queue; |
1952 | } | |
1953 | ||
1954 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1955 | /* warn if maxcmd is lower than queue_size */ | |
1956 | dev_warn(ctrl->ctrl.device, | |
1957 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1958 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1959 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1960 | } | |
1961 | ||
76c08bf4 SJ |
1962 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1963 | /* warn if sqsize is lower than queue_size */ | |
1964 | dev_warn(ctrl->ctrl.device, | |
1965 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1966 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1967 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1968 | } | |
1969 | ||
71102307 | 1970 | if (opts->nr_io_queues) { |
a57bd541 | 1971 | ret = nvme_rdma_configure_io_queues(ctrl, true); |
71102307 CH |
1972 | if (ret) |
1973 | goto out_remove_admin_queue; | |
1974 | } | |
1975 | ||
1976 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1977 | WARN_ON_ONCE(!changed); | |
1978 | ||
0928f9b4 | 1979 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1980 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1981 | ||
d22524a4 | 1982 | nvme_get_ctrl(&ctrl->ctrl); |
71102307 CH |
1983 | |
1984 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1985 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1986 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1987 | ||
d09f2b45 | 1988 | nvme_start_ctrl(&ctrl->ctrl); |
71102307 CH |
1989 | |
1990 | return &ctrl->ctrl; | |
1991 | ||
1992 | out_remove_admin_queue: | |
3f02fffb | 1993 | nvme_rdma_destroy_admin_queue(ctrl, true); |
71102307 CH |
1994 | out_kfree_queues: |
1995 | kfree(ctrl->queues); | |
1996 | out_uninit_ctrl: | |
1997 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1998 | nvme_put_ctrl(&ctrl->ctrl); | |
1999 | if (ret > 0) | |
2000 | ret = -EIO; | |
2001 | return ERR_PTR(ret); | |
2002 | out_free_ctrl: | |
2003 | kfree(ctrl); | |
2004 | return ERR_PTR(ret); | |
2005 | } | |
2006 | ||
2007 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
2008 | .name = "rdma", | |
2009 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 2010 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 2011 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
2012 | .create_ctrl = nvme_rdma_create_ctrl, |
2013 | }; | |
2014 | ||
e87a911f SW |
2015 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) |
2016 | { | |
2017 | struct nvme_rdma_ctrl *ctrl; | |
2018 | ||
2019 | /* Delete all controllers using this device */ | |
2020 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
2021 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
2022 | if (ctrl->device->dev != ib_device) | |
2023 | continue; | |
2024 | dev_info(ctrl->ctrl.device, | |
2025 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
2026 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
c5017e85 | 2027 | nvme_delete_ctrl(&ctrl->ctrl); |
e87a911f SW |
2028 | } |
2029 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
2030 | ||
9a6327d2 | 2031 | flush_workqueue(nvme_wq); |
e87a911f SW |
2032 | } |
2033 | ||
2034 | static struct ib_client nvme_rdma_ib_client = { | |
2035 | .name = "nvme_rdma", | |
e87a911f SW |
2036 | .remove = nvme_rdma_remove_one |
2037 | }; | |
2038 | ||
71102307 CH |
2039 | static int __init nvme_rdma_init_module(void) |
2040 | { | |
e87a911f SW |
2041 | int ret; |
2042 | ||
e87a911f | 2043 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 2044 | if (ret) |
9a6327d2 | 2045 | return ret; |
a56c79cf SG |
2046 | |
2047 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
2048 | if (ret) | |
2049 | goto err_unreg_client; | |
e87a911f | 2050 | |
a56c79cf | 2051 | return 0; |
e87a911f | 2052 | |
a56c79cf SG |
2053 | err_unreg_client: |
2054 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 2055 | return ret; |
71102307 CH |
2056 | } |
2057 | ||
2058 | static void __exit nvme_rdma_cleanup_module(void) | |
2059 | { | |
71102307 | 2060 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2061 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2062 | } |
2063 | ||
2064 | module_init(nvme_rdma_init_module); | |
2065 | module_exit(nvme_rdma_cleanup_module); | |
2066 | ||
2067 | MODULE_LICENSE("GPL v2"); |