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CommitLineData
5d8762d5 1// SPDX-License-Identifier: GPL-2.0
71102307
CH
2/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
71102307
CH
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
71102307
CH
7#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
f41725bb 10#include <rdma/mr_pool.h>
71102307
CH
11#include <linux/err.h>
12#include <linux/string.h>
71102307
CH
13#include <linux/atomic.h>
14#include <linux/blk-mq.h>
0b36658c 15#include <linux/blk-mq-rdma.h>
71102307
CH
16#include <linux/types.h>
17#include <linux/list.h>
18#include <linux/mutex.h>
19#include <linux/scatterlist.h>
20#include <linux/nvme.h>
71102307
CH
21#include <asm/unaligned.h>
22
23#include <rdma/ib_verbs.h>
24#include <rdma/rdma_cm.h>
71102307
CH
25#include <linux/nvme-rdma.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29
30
782d820c 31#define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
71102307 32
71102307
CH
33#define NVME_RDMA_MAX_SEGMENTS 256
34
64a741c1 35#define NVME_RDMA_MAX_INLINE_SEGMENTS 4
71102307 36
71102307 37struct nvme_rdma_device {
f87c89ad
MG
38 struct ib_device *dev;
39 struct ib_pd *pd;
71102307
CH
40 struct kref ref;
41 struct list_head entry;
64a741c1 42 unsigned int num_inline_segments;
71102307
CH
43};
44
45struct nvme_rdma_qe {
46 struct ib_cqe cqe;
47 void *data;
48 u64 dma;
49};
50
51struct nvme_rdma_queue;
52struct nvme_rdma_request {
d49187e9 53 struct nvme_request req;
71102307
CH
54 struct ib_mr *mr;
55 struct nvme_rdma_qe sqe;
4af7f7ff
SG
56 union nvme_result result;
57 __le16 status;
58 refcount_t ref;
71102307
CH
59 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
60 u32 num_sge;
61 int nents;
71102307
CH
62 struct ib_reg_wr reg_wr;
63 struct ib_cqe reg_cqe;
64 struct nvme_rdma_queue *queue;
65 struct sg_table sg_table;
66 struct scatterlist first_sgl[];
67};
68
69enum nvme_rdma_queue_flags {
5013e98b
SG
70 NVME_RDMA_Q_ALLOCATED = 0,
71 NVME_RDMA_Q_LIVE = 1,
eb1bd249 72 NVME_RDMA_Q_TR_READY = 2,
71102307
CH
73};
74
75struct nvme_rdma_queue {
76 struct nvme_rdma_qe *rsp_ring;
71102307
CH
77 int queue_size;
78 size_t cmnd_capsule_len;
79 struct nvme_rdma_ctrl *ctrl;
80 struct nvme_rdma_device *device;
81 struct ib_cq *ib_cq;
82 struct ib_qp *qp;
83
84 unsigned long flags;
85 struct rdma_cm_id *cm_id;
86 int cm_error;
87 struct completion cm_done;
88};
89
90struct nvme_rdma_ctrl {
71102307
CH
91 /* read only in the hot path */
92 struct nvme_rdma_queue *queues;
71102307
CH
93
94 /* other member variables */
71102307 95 struct blk_mq_tag_set tag_set;
71102307
CH
96 struct work_struct err_work;
97
98 struct nvme_rdma_qe async_event_sqe;
99
71102307
CH
100 struct delayed_work reconnect_work;
101
102 struct list_head list;
103
104 struct blk_mq_tag_set admin_tag_set;
105 struct nvme_rdma_device *device;
106
71102307
CH
107 u32 max_fr_pages;
108
0928f9b4
SG
109 struct sockaddr_storage addr;
110 struct sockaddr_storage src_addr;
71102307
CH
111
112 struct nvme_ctrl ctrl;
64a741c1 113 bool use_inline_data;
b1064d3e 114 u32 io_queues[HCTX_MAX_TYPES];
71102307
CH
115};
116
117static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
118{
119 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
120}
121
122static LIST_HEAD(device_list);
123static DEFINE_MUTEX(device_list_mutex);
124
125static LIST_HEAD(nvme_rdma_ctrl_list);
126static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
127
71102307
CH
128/*
129 * Disabling this option makes small I/O goes faster, but is fundamentally
130 * unsafe. With it turned off we will have to register a global rkey that
131 * allows read and write access to all physical memory.
132 */
133static bool register_always = true;
134module_param(register_always, bool, 0444);
135MODULE_PARM_DESC(register_always,
136 "Use memory registration even for contiguous memory regions");
137
138static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
139 struct rdma_cm_event *event);
140static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
71102307 141
90af3512
SG
142static const struct blk_mq_ops nvme_rdma_mq_ops;
143static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
144
71102307
CH
145/* XXX: really should move to a generic header sooner or later.. */
146static inline void put_unaligned_le24(u32 val, u8 *p)
147{
148 *p++ = val;
149 *p++ = val >> 8;
150 *p++ = val >> 16;
151}
152
153static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
154{
155 return queue - queue->ctrl->queues;
156}
157
ff8519f9
SG
158static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
159{
160 return nvme_rdma_queue_idx(queue) >
b1064d3e
SG
161 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
162 queue->ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
163}
164
71102307
CH
165static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
166{
167 return queue->cmnd_capsule_len - sizeof(struct nvme_command);
168}
169
170static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
171 size_t capsule_size, enum dma_data_direction dir)
172{
173 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
174 kfree(qe->data);
175}
176
177static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 size_t capsule_size, enum dma_data_direction dir)
179{
180 qe->data = kzalloc(capsule_size, GFP_KERNEL);
181 if (!qe->data)
182 return -ENOMEM;
183
184 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
185 if (ib_dma_mapping_error(ibdev, qe->dma)) {
186 kfree(qe->data);
6344d02d 187 qe->data = NULL;
71102307
CH
188 return -ENOMEM;
189 }
190
191 return 0;
192}
193
194static void nvme_rdma_free_ring(struct ib_device *ibdev,
195 struct nvme_rdma_qe *ring, size_t ib_queue_size,
196 size_t capsule_size, enum dma_data_direction dir)
197{
198 int i;
199
200 for (i = 0; i < ib_queue_size; i++)
201 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
202 kfree(ring);
203}
204
205static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
206 size_t ib_queue_size, size_t capsule_size,
207 enum dma_data_direction dir)
208{
209 struct nvme_rdma_qe *ring;
210 int i;
211
212 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
213 if (!ring)
214 return NULL;
215
62f99b62
MG
216 /*
217 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
218 * lifetime. It's safe, since any chage in the underlying RDMA device
219 * will issue error recovery and queue re-creation.
220 */
71102307
CH
221 for (i = 0; i < ib_queue_size; i++) {
222 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
223 goto out_free_ring;
224 }
225
226 return ring;
227
228out_free_ring:
229 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
230 return NULL;
231}
232
233static void nvme_rdma_qp_event(struct ib_event *event, void *context)
234{
27a4beef
MG
235 pr_debug("QP event %s (%d)\n",
236 ib_event_msg(event->event), event->event);
237
71102307
CH
238}
239
240static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
241{
35da77d5
BVA
242 int ret;
243
244 ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
71102307 245 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
35da77d5
BVA
246 if (ret < 0)
247 return ret;
248 if (ret == 0)
249 return -ETIMEDOUT;
250 WARN_ON_ONCE(queue->cm_error > 0);
71102307
CH
251 return queue->cm_error;
252}
253
254static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
255{
256 struct nvme_rdma_device *dev = queue->device;
257 struct ib_qp_init_attr init_attr;
258 int ret;
259
260 memset(&init_attr, 0, sizeof(init_attr));
261 init_attr.event_handler = nvme_rdma_qp_event;
262 /* +1 for drain */
263 init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
264 /* +1 for drain */
265 init_attr.cap.max_recv_wr = queue->queue_size + 1;
266 init_attr.cap.max_recv_sge = 1;
64a741c1 267 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
71102307
CH
268 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
269 init_attr.qp_type = IB_QPT_RC;
270 init_attr.send_cq = queue->ib_cq;
271 init_attr.recv_cq = queue->ib_cq;
272
273 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
274
275 queue->qp = queue->cm_id->qp;
276 return ret;
277}
278
385475ee
CH
279static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
280 struct request *rq, unsigned int hctx_idx)
71102307
CH
281{
282 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307 283
62f99b62 284 kfree(req->sqe.data);
71102307
CH
285}
286
385475ee
CH
287static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
288 struct request *rq, unsigned int hctx_idx,
289 unsigned int numa_node)
71102307 290{
385475ee 291 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 293 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307 294 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
71102307 295
59e29ce6 296 nvme_req(rq)->ctrl = &ctrl->ctrl;
62f99b62
MG
297 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
298 if (!req->sqe.data)
299 return -ENOMEM;
71102307 300
71102307
CH
301 req->queue = queue;
302
303 return 0;
71102307
CH
304}
305
71102307
CH
306static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
307 unsigned int hctx_idx)
308{
309 struct nvme_rdma_ctrl *ctrl = data;
310 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
311
d858e5f0 312 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
71102307
CH
313
314 hctx->driver_data = queue;
315 return 0;
316}
317
318static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
319 unsigned int hctx_idx)
320{
321 struct nvme_rdma_ctrl *ctrl = data;
322 struct nvme_rdma_queue *queue = &ctrl->queues[0];
323
324 BUG_ON(hctx_idx != 0);
325
326 hctx->driver_data = queue;
327 return 0;
328}
329
330static void nvme_rdma_free_dev(struct kref *ref)
331{
332 struct nvme_rdma_device *ndev =
333 container_of(ref, struct nvme_rdma_device, ref);
334
335 mutex_lock(&device_list_mutex);
336 list_del(&ndev->entry);
337 mutex_unlock(&device_list_mutex);
338
71102307 339 ib_dealloc_pd(ndev->pd);
71102307
CH
340 kfree(ndev);
341}
342
343static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
344{
345 kref_put(&dev->ref, nvme_rdma_free_dev);
346}
347
348static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
349{
350 return kref_get_unless_zero(&dev->ref);
351}
352
353static struct nvme_rdma_device *
354nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
355{
356 struct nvme_rdma_device *ndev;
357
358 mutex_lock(&device_list_mutex);
359 list_for_each_entry(ndev, &device_list, entry) {
360 if (ndev->dev->node_guid == cm_id->device->node_guid &&
361 nvme_rdma_dev_get(ndev))
362 goto out_unlock;
363 }
364
365 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
366 if (!ndev)
367 goto out_err;
368
369 ndev->dev = cm_id->device;
370 kref_init(&ndev->ref);
371
11975e01
CH
372 ndev->pd = ib_alloc_pd(ndev->dev,
373 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
71102307
CH
374 if (IS_ERR(ndev->pd))
375 goto out_free_dev;
376
71102307
CH
377 if (!(ndev->dev->attrs.device_cap_flags &
378 IB_DEVICE_MEM_MGT_EXTENSIONS)) {
379 dev_err(&ndev->dev->dev,
380 "Memory registrations not supported.\n");
11975e01 381 goto out_free_pd;
71102307
CH
382 }
383
64a741c1 384 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
0a3173a5 385 ndev->dev->attrs.max_send_sge - 1);
71102307
CH
386 list_add(&ndev->entry, &device_list);
387out_unlock:
388 mutex_unlock(&device_list_mutex);
389 return ndev;
390
71102307
CH
391out_free_pd:
392 ib_dealloc_pd(ndev->pd);
393out_free_dev:
394 kfree(ndev);
395out_err:
396 mutex_unlock(&device_list_mutex);
397 return NULL;
398}
399
400static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
401{
eb1bd249
MG
402 struct nvme_rdma_device *dev;
403 struct ib_device *ibdev;
404
405 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
406 return;
407
408 dev = queue->device;
409 ibdev = dev->dev;
71102307 410
f41725bb
IR
411 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
412
eb1bd249
MG
413 /*
414 * The cm_id object might have been destroyed during RDMA connection
415 * establishment error flow to avoid getting other cma events, thus
416 * the destruction of the QP shouldn't use rdma_cm API.
417 */
418 ib_destroy_qp(queue->qp);
71102307
CH
419 ib_free_cq(queue->ib_cq);
420
421 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
422 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
423
424 nvme_rdma_dev_put(dev);
425}
426
f41725bb
IR
427static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
428{
429 return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
430 ibdev->attrs.max_fast_reg_page_list_len);
431}
432
ca6e95bb 433static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
71102307 434{
ca6e95bb 435 struct ib_device *ibdev;
71102307
CH
436 const int send_wr_factor = 3; /* MR, SEND, INV */
437 const int cq_factor = send_wr_factor + 1; /* + RECV */
438 int comp_vector, idx = nvme_rdma_queue_idx(queue);
ff8519f9 439 enum ib_poll_context poll_ctx;
71102307
CH
440 int ret;
441
ca6e95bb
SG
442 queue->device = nvme_rdma_find_get_device(queue->cm_id);
443 if (!queue->device) {
444 dev_err(queue->cm_id->device->dev.parent,
445 "no client data found!\n");
446 return -ECONNREFUSED;
447 }
448 ibdev = queue->device->dev;
71102307
CH
449
450 /*
0b36658c
SG
451 * Spread I/O queues completion vectors according their queue index.
452 * Admin queues can always go on completion vector 0.
71102307 453 */
0b36658c 454 comp_vector = idx == 0 ? idx : idx - 1;
71102307 455
ff8519f9
SG
456 /* Polling queues need direct cq polling context */
457 if (nvme_rdma_poll_queue(queue))
458 poll_ctx = IB_POLL_DIRECT;
459 else
460 poll_ctx = IB_POLL_SOFTIRQ;
461
71102307 462 /* +1 for ib_stop_cq */
ca6e95bb
SG
463 queue->ib_cq = ib_alloc_cq(ibdev, queue,
464 cq_factor * queue->queue_size + 1,
ff8519f9 465 comp_vector, poll_ctx);
71102307
CH
466 if (IS_ERR(queue->ib_cq)) {
467 ret = PTR_ERR(queue->ib_cq);
ca6e95bb 468 goto out_put_dev;
71102307
CH
469 }
470
471 ret = nvme_rdma_create_qp(queue, send_wr_factor);
472 if (ret)
473 goto out_destroy_ib_cq;
474
475 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
476 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
477 if (!queue->rsp_ring) {
478 ret = -ENOMEM;
479 goto out_destroy_qp;
480 }
481
f41725bb
IR
482 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
483 queue->queue_size,
484 IB_MR_TYPE_MEM_REG,
5a6781a5 485 nvme_rdma_get_max_fr_pages(ibdev), 0);
f41725bb
IR
486 if (ret) {
487 dev_err(queue->ctrl->ctrl.device,
488 "failed to initialize MR pool sized %d for QID %d\n",
489 queue->queue_size, idx);
490 goto out_destroy_ring;
491 }
492
eb1bd249
MG
493 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
494
71102307
CH
495 return 0;
496
f41725bb
IR
497out_destroy_ring:
498 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
499 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
71102307 500out_destroy_qp:
1f61def9 501 rdma_destroy_qp(queue->cm_id);
71102307
CH
502out_destroy_ib_cq:
503 ib_free_cq(queue->ib_cq);
ca6e95bb
SG
504out_put_dev:
505 nvme_rdma_dev_put(queue->device);
71102307
CH
506 return ret;
507}
508
41e8cfa1 509static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
71102307
CH
510 int idx, size_t queue_size)
511{
512 struct nvme_rdma_queue *queue;
8f4e8dac 513 struct sockaddr *src_addr = NULL;
71102307
CH
514 int ret;
515
516 queue = &ctrl->queues[idx];
517 queue->ctrl = ctrl;
518 init_completion(&queue->cm_done);
519
520 if (idx > 0)
521 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
522 else
523 queue->cmnd_capsule_len = sizeof(struct nvme_command);
524
525 queue->queue_size = queue_size;
526
527 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
528 RDMA_PS_TCP, IB_QPT_RC);
529 if (IS_ERR(queue->cm_id)) {
530 dev_info(ctrl->ctrl.device,
531 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
532 return PTR_ERR(queue->cm_id);
533 }
534
8f4e8dac 535 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
0928f9b4 536 src_addr = (struct sockaddr *)&ctrl->src_addr;
8f4e8dac 537
0928f9b4
SG
538 queue->cm_error = -ETIMEDOUT;
539 ret = rdma_resolve_addr(queue->cm_id, src_addr,
540 (struct sockaddr *)&ctrl->addr,
71102307
CH
541 NVME_RDMA_CONNECT_TIMEOUT_MS);
542 if (ret) {
543 dev_info(ctrl->ctrl.device,
544 "rdma_resolve_addr failed (%d).\n", ret);
545 goto out_destroy_cm_id;
546 }
547
548 ret = nvme_rdma_wait_for_cm(queue);
549 if (ret) {
550 dev_info(ctrl->ctrl.device,
d8bfceeb 551 "rdma connection establishment failed (%d)\n", ret);
71102307
CH
552 goto out_destroy_cm_id;
553 }
554
5013e98b 555 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
71102307
CH
556
557 return 0;
558
559out_destroy_cm_id:
560 rdma_destroy_id(queue->cm_id);
eb1bd249 561 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
562 return ret;
563}
564
565static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
566{
a57bd541
SG
567 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
568 return;
569
71102307
CH
570 rdma_disconnect(queue->cm_id);
571 ib_drain_qp(queue->qp);
572}
573
574static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
575{
5013e98b 576 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
a57bd541
SG
577 return;
578
71102307
CH
579 nvme_rdma_destroy_queue_ib(queue);
580 rdma_destroy_id(queue->cm_id);
581}
582
a57bd541 583static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 584{
a57bd541
SG
585 int i;
586
587 for (i = 1; i < ctrl->ctrl.queue_count; i++)
588 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
589}
590
a57bd541 591static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
592{
593 int i;
594
d858e5f0 595 for (i = 1; i < ctrl->ctrl.queue_count; i++)
a57bd541 596 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
597}
598
68e16fcf
SG
599static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
600{
ff8519f9
SG
601 struct nvme_rdma_queue *queue = &ctrl->queues[idx];
602 bool poll = nvme_rdma_poll_queue(queue);
68e16fcf
SG
603 int ret;
604
605 if (idx)
ff8519f9 606 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
68e16fcf
SG
607 else
608 ret = nvmf_connect_admin_queue(&ctrl->ctrl);
609
610 if (!ret)
ff8519f9 611 set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
68e16fcf
SG
612 else
613 dev_info(ctrl->ctrl.device,
614 "failed to connect queue: %d ret=%d\n", idx, ret);
615 return ret;
616}
617
618static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
619{
620 int i, ret = 0;
621
d858e5f0 622 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
68e16fcf
SG
623 ret = nvme_rdma_start_queue(ctrl, i);
624 if (ret)
a57bd541 625 goto out_stop_queues;
71102307
CH
626 }
627
c8dbc37c
SW
628 return 0;
629
a57bd541 630out_stop_queues:
68e16fcf
SG
631 for (i--; i >= 1; i--)
632 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
633 return ret;
634}
635
41e8cfa1 636static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 637{
c248c643 638 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 639 struct ib_device *ibdev = ctrl->device->dev;
5651cd3c
SG
640 unsigned int nr_io_queues, nr_default_queues;
641 unsigned int nr_read_queues, nr_poll_queues;
71102307
CH
642 int i, ret;
643
5651cd3c
SG
644 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
645 min(opts->nr_io_queues, num_online_cpus()));
646 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors,
647 min(opts->nr_write_queues, num_online_cpus()));
648 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
649 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
b65bb777 650
c248c643
SG
651 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
652 if (ret)
653 return ret;
654
d858e5f0
SG
655 ctrl->ctrl.queue_count = nr_io_queues + 1;
656 if (ctrl->ctrl.queue_count < 2)
c248c643
SG
657 return 0;
658
659 dev_info(ctrl->ctrl.device,
660 "creating %d I/O queues.\n", nr_io_queues);
661
5651cd3c
SG
662 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
663 /*
664 * separate read/write queues
665 * hand out dedicated default queues only after we have
666 * sufficient read queues.
667 */
668 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
669 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
670 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
671 min(nr_default_queues, nr_io_queues);
672 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
673 } else {
674 /*
675 * shared read/write queues
676 * either no write queues were requested, or we don't have
677 * sufficient queue count to have dedicated default queues.
678 */
679 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
680 min(nr_read_queues, nr_io_queues);
681 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
682 }
683
684 if (opts->nr_poll_queues && nr_io_queues) {
685 /* map dedicated poll queues only if we have queues left */
686 ctrl->io_queues[HCTX_TYPE_POLL] =
687 min(nr_poll_queues, nr_io_queues);
688 }
689
d858e5f0 690 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
41e8cfa1
SG
691 ret = nvme_rdma_alloc_queue(ctrl, i,
692 ctrl->ctrl.sqsize + 1);
693 if (ret)
71102307 694 goto out_free_queues;
71102307
CH
695 }
696
697 return 0;
698
699out_free_queues:
f361e5a0 700 for (i--; i >= 1; i--)
a57bd541 701 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
702
703 return ret;
704}
705
b28a308e
SG
706static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
707 bool admin)
708{
709 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
710 struct blk_mq_tag_set *set;
711 int ret;
712
713 if (admin) {
714 set = &ctrl->admin_tag_set;
715 memset(set, 0, sizeof(*set));
716 set->ops = &nvme_rdma_admin_mq_ops;
38dabe21 717 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
b28a308e 718 set->reserved_tags = 2; /* connect + keep-alive */
103e515e 719 set->numa_node = nctrl->numa_node;
b28a308e
SG
720 set->cmd_size = sizeof(struct nvme_rdma_request) +
721 SG_CHUNK_SIZE * sizeof(struct scatterlist);
722 set->driver_data = ctrl;
723 set->nr_hw_queues = 1;
724 set->timeout = ADMIN_TIMEOUT;
94f29d4f 725 set->flags = BLK_MQ_F_NO_SCHED;
b28a308e
SG
726 } else {
727 set = &ctrl->tag_set;
728 memset(set, 0, sizeof(*set));
729 set->ops = &nvme_rdma_mq_ops;
5e77d61c 730 set->queue_depth = nctrl->sqsize + 1;
b28a308e 731 set->reserved_tags = 1; /* fabric connect */
103e515e 732 set->numa_node = nctrl->numa_node;
b28a308e
SG
733 set->flags = BLK_MQ_F_SHOULD_MERGE;
734 set->cmd_size = sizeof(struct nvme_rdma_request) +
735 SG_CHUNK_SIZE * sizeof(struct scatterlist);
736 set->driver_data = ctrl;
737 set->nr_hw_queues = nctrl->queue_count - 1;
738 set->timeout = NVME_IO_TIMEOUT;
ff8519f9 739 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
b28a308e
SG
740 }
741
742 ret = blk_mq_alloc_tag_set(set);
743 if (ret)
87fd1253 744 return ERR_PTR(ret);
b28a308e
SG
745
746 return set;
b28a308e
SG
747}
748
3f02fffb
SG
749static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
750 bool remove)
71102307 751{
3f02fffb
SG
752 if (remove) {
753 blk_cleanup_queue(ctrl->ctrl.admin_q);
87fd1253 754 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
3f02fffb 755 }
682630f0
SG
756 if (ctrl->async_event_sqe.data) {
757 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
758 sizeof(struct nvme_command), DMA_TO_DEVICE);
759 ctrl->async_event_sqe.data = NULL;
760 }
a57bd541 761 nvme_rdma_free_queue(&ctrl->queues[0]);
71102307
CH
762}
763
3f02fffb
SG
764static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
765 bool new)
90af3512
SG
766{
767 int error;
768
41e8cfa1 769 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
90af3512
SG
770 if (error)
771 return error;
772
773 ctrl->device = ctrl->queues[0].device;
103e515e 774 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device);
90af3512 775
f41725bb 776 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
90af3512 777
62f99b62
MG
778 /*
779 * Bind the async event SQE DMA mapping to the admin queue lifetime.
780 * It's safe, since any chage in the underlying RDMA device will issue
781 * error recovery and queue re-creation.
782 */
94e42213
SG
783 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
784 sizeof(struct nvme_command), DMA_TO_DEVICE);
785 if (error)
786 goto out_free_queue;
787
3f02fffb
SG
788 if (new) {
789 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
f04b9cc8
SG
790 if (IS_ERR(ctrl->ctrl.admin_tagset)) {
791 error = PTR_ERR(ctrl->ctrl.admin_tagset);
94e42213 792 goto out_free_async_qe;
f04b9cc8 793 }
90af3512 794
3f02fffb
SG
795 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
796 if (IS_ERR(ctrl->ctrl.admin_q)) {
797 error = PTR_ERR(ctrl->ctrl.admin_q);
798 goto out_free_tagset;
799 }
90af3512
SG
800 }
801
68e16fcf 802 error = nvme_rdma_start_queue(ctrl, 0);
90af3512
SG
803 if (error)
804 goto out_cleanup_queue;
805
09fdc23b 806 error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP,
90af3512
SG
807 &ctrl->ctrl.cap);
808 if (error) {
809 dev_err(ctrl->ctrl.device,
810 "prop_get NVME_REG_CAP failed\n");
2e050f00 811 goto out_stop_queue;
90af3512
SG
812 }
813
814 ctrl->ctrl.sqsize =
815 min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);
816
817 error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
818 if (error)
2e050f00 819 goto out_stop_queue;
90af3512
SG
820
821 ctrl->ctrl.max_hw_sectors =
126e76ff 822 (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
90af3512
SG
823
824 error = nvme_init_identify(&ctrl->ctrl);
825 if (error)
2e050f00 826 goto out_stop_queue;
90af3512 827
90af3512
SG
828 return 0;
829
2e050f00
JW
830out_stop_queue:
831 nvme_rdma_stop_queue(&ctrl->queues[0]);
90af3512 832out_cleanup_queue:
3f02fffb
SG
833 if (new)
834 blk_cleanup_queue(ctrl->ctrl.admin_q);
90af3512 835out_free_tagset:
3f02fffb 836 if (new)
87fd1253 837 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
94e42213
SG
838out_free_async_qe:
839 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
840 sizeof(struct nvme_command), DMA_TO_DEVICE);
6344d02d 841 ctrl->async_event_sqe.data = NULL;
90af3512
SG
842out_free_queue:
843 nvme_rdma_free_queue(&ctrl->queues[0]);
844 return error;
845}
846
a57bd541
SG
847static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
848 bool remove)
849{
a57bd541
SG
850 if (remove) {
851 blk_cleanup_queue(ctrl->ctrl.connect_q);
87fd1253 852 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
853 }
854 nvme_rdma_free_io_queues(ctrl);
855}
856
857static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
858{
859 int ret;
860
41e8cfa1 861 ret = nvme_rdma_alloc_io_queues(ctrl);
a57bd541
SG
862 if (ret)
863 return ret;
864
865 if (new) {
866 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
f04b9cc8
SG
867 if (IS_ERR(ctrl->ctrl.tagset)) {
868 ret = PTR_ERR(ctrl->ctrl.tagset);
a57bd541 869 goto out_free_io_queues;
f04b9cc8 870 }
a57bd541
SG
871
872 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
873 if (IS_ERR(ctrl->ctrl.connect_q)) {
874 ret = PTR_ERR(ctrl->ctrl.connect_q);
875 goto out_free_tag_set;
876 }
877 } else {
a57bd541
SG
878 blk_mq_update_nr_hw_queues(&ctrl->tag_set,
879 ctrl->ctrl.queue_count - 1);
880 }
881
68e16fcf 882 ret = nvme_rdma_start_io_queues(ctrl);
a57bd541
SG
883 if (ret)
884 goto out_cleanup_connect_q;
885
886 return 0;
887
888out_cleanup_connect_q:
889 if (new)
890 blk_cleanup_queue(ctrl->ctrl.connect_q);
891out_free_tag_set:
892 if (new)
87fd1253 893 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
894out_free_io_queues:
895 nvme_rdma_free_io_queues(ctrl);
896 return ret;
71102307
CH
897}
898
75862c72
SG
899static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
900 bool remove)
901{
902 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
903 nvme_rdma_stop_queue(&ctrl->queues[0]);
1007709d
SG
904 if (ctrl->ctrl.admin_tagset)
905 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset,
906 nvme_cancel_request, &ctrl->ctrl);
75862c72
SG
907 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
908 nvme_rdma_destroy_admin_queue(ctrl, remove);
909}
910
911static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
912 bool remove)
913{
914 if (ctrl->ctrl.queue_count > 1) {
915 nvme_stop_queues(&ctrl->ctrl);
916 nvme_rdma_stop_io_queues(ctrl);
1007709d
SG
917 if (ctrl->ctrl.tagset)
918 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset,
919 nvme_cancel_request, &ctrl->ctrl);
75862c72
SG
920 if (remove)
921 nvme_start_queues(&ctrl->ctrl);
922 nvme_rdma_destroy_io_queues(ctrl, remove);
923 }
924}
925
71102307
CH
926static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
927{
928 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
929
930 if (list_empty(&ctrl->list))
931 goto free_ctrl;
932
933 mutex_lock(&nvme_rdma_ctrl_mutex);
934 list_del(&ctrl->list);
935 mutex_unlock(&nvme_rdma_ctrl_mutex);
936
71102307
CH
937 nvmf_free_options(nctrl->opts);
938free_ctrl:
3d064101 939 kfree(ctrl->queues);
71102307
CH
940 kfree(ctrl);
941}
942
fd8563ce
SG
943static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
944{
945 /* If we are resetting/deleting then do nothing */
ad6a0a52 946 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
fd8563ce
SG
947 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
948 ctrl->ctrl.state == NVME_CTRL_LIVE);
949 return;
950 }
951
952 if (nvmf_should_reconnect(&ctrl->ctrl)) {
953 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
954 ctrl->ctrl.opts->reconnect_delay);
9a6327d2 955 queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
fd8563ce
SG
956 ctrl->ctrl.opts->reconnect_delay * HZ);
957 } else {
12fa1304 958 nvme_delete_ctrl(&ctrl->ctrl);
fd8563ce
SG
959 }
960}
961
c66e2998 962static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
71102307 963{
c66e2998 964 int ret = -EINVAL;
71102307 965 bool changed;
71102307 966
c66e2998 967 ret = nvme_rdma_configure_admin_queue(ctrl, new);
71102307 968 if (ret)
c66e2998
SG
969 return ret;
970
971 if (ctrl->ctrl.icdoff) {
972 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
973 goto destroy_admin;
974 }
975
976 if (!(ctrl->ctrl.sgls & (1 << 2))) {
977 dev_err(ctrl->ctrl.device,
978 "Mandatory keyed sgls are not supported!\n");
979 goto destroy_admin;
980 }
981
982 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
983 dev_warn(ctrl->ctrl.device,
984 "queue_size %zu > ctrl sqsize %u, clamping down\n",
985 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
986 }
987
988 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
989 dev_warn(ctrl->ctrl.device,
990 "sqsize %u > ctrl maxcmd %u, clamping down\n",
991 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
992 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
993 }
71102307 994
64a741c1
SW
995 if (ctrl->ctrl.sgls & (1 << 20))
996 ctrl->use_inline_data = true;
71102307 997
d858e5f0 998 if (ctrl->ctrl.queue_count > 1) {
c66e2998 999 ret = nvme_rdma_configure_io_queues(ctrl, new);
71102307 1000 if (ret)
5e1fe61d 1001 goto destroy_admin;
71102307
CH
1002 }
1003
1004 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
0a960afd
SG
1005 if (!changed) {
1006 /* state change failure is ok if we're in DELETING state */
1007 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
c66e2998
SG
1008 ret = -EINVAL;
1009 goto destroy_io;
0a960afd
SG
1010 }
1011
d09f2b45 1012 nvme_start_ctrl(&ctrl->ctrl);
c66e2998
SG
1013 return 0;
1014
1015destroy_io:
1016 if (ctrl->ctrl.queue_count > 1)
1017 nvme_rdma_destroy_io_queues(ctrl, new);
1018destroy_admin:
1019 nvme_rdma_stop_queue(&ctrl->queues[0]);
1020 nvme_rdma_destroy_admin_queue(ctrl, new);
1021 return ret;
1022}
1023
1024static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1025{
1026 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1027 struct nvme_rdma_ctrl, reconnect_work);
1028
1029 ++ctrl->ctrl.nr_reconnects;
1030
1031 if (nvme_rdma_setup_ctrl(ctrl, false))
1032 goto requeue;
71102307 1033
5e1fe61d
SG
1034 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1035 ctrl->ctrl.nr_reconnects);
1036
1037 ctrl->ctrl.nr_reconnects = 0;
71102307
CH
1038
1039 return;
1040
71102307 1041requeue:
fd8563ce 1042 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
fdf9dfa8 1043 ctrl->ctrl.nr_reconnects);
fd8563ce 1044 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1045}
1046
1047static void nvme_rdma_error_recovery_work(struct work_struct *work)
1048{
1049 struct nvme_rdma_ctrl *ctrl = container_of(work,
1050 struct nvme_rdma_ctrl, err_work);
1051
e4d753d7 1052 nvme_stop_keep_alive(&ctrl->ctrl);
75862c72 1053 nvme_rdma_teardown_io_queues(ctrl, false);
e818a5b4 1054 nvme_start_queues(&ctrl->ctrl);
75862c72 1055 nvme_rdma_teardown_admin_queue(ctrl, false);
e818a5b4 1056
ad6a0a52 1057 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
187c0832
NC
1058 /* state change failure is ok if we're in DELETING state */
1059 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
d5bf4b7f
SG
1060 return;
1061 }
1062
fd8563ce 1063 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1064}
1065
1066static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1067{
d5bf4b7f 1068 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
71102307
CH
1069 return;
1070
9a6327d2 1071 queue_work(nvme_wq, &ctrl->err_work);
71102307
CH
1072}
1073
1074static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1075 const char *op)
1076{
1077 struct nvme_rdma_queue *queue = cq->cq_context;
1078 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1079
1080 if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1081 dev_info(ctrl->ctrl.device,
1082 "%s for CQE 0x%p failed with status %s (%d)\n",
1083 op, wc->wr_cqe,
1084 ib_wc_status_msg(wc->status), wc->status);
1085 nvme_rdma_error_recovery(ctrl);
1086}
1087
1088static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1089{
1090 if (unlikely(wc->status != IB_WC_SUCCESS))
1091 nvme_rdma_wr_error(cq, wc, "MEMREG");
1092}
1093
1094static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1095{
2f122e4f
SG
1096 struct nvme_rdma_request *req =
1097 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1098 struct request *rq = blk_mq_rq_from_pdu(req);
1099
1100 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1101 nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
2f122e4f
SG
1102 return;
1103 }
1104
1105 if (refcount_dec_and_test(&req->ref))
1106 nvme_end_request(rq, req->status, req->result);
1107
71102307
CH
1108}
1109
1110static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1111 struct nvme_rdma_request *req)
1112{
71102307
CH
1113 struct ib_send_wr wr = {
1114 .opcode = IB_WR_LOCAL_INV,
1115 .next = NULL,
1116 .num_sge = 0,
2f122e4f 1117 .send_flags = IB_SEND_SIGNALED,
71102307
CH
1118 .ex.invalidate_rkey = req->mr->rkey,
1119 };
1120
1121 req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1122 wr.wr_cqe = &req->reg_cqe;
1123
45e3cc1a 1124 return ib_post_send(queue->qp, &wr, NULL);
71102307
CH
1125}
1126
1127static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1128 struct request *rq)
1129{
1130 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307
CH
1131 struct nvme_rdma_device *dev = queue->device;
1132 struct ib_device *ibdev = dev->dev;
71102307 1133
34e08191 1134 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1135 return;
1136
f41725bb
IR
1137 if (req->mr) {
1138 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1139 req->mr = NULL;
1140 }
1141
71102307
CH
1142 ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
1143 req->nents, rq_data_dir(rq) ==
1144 WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1145
1146 nvme_cleanup_cmd(rq);
4635873c 1147 sg_free_table_chained(&req->sg_table, SG_CHUNK_SIZE);
71102307
CH
1148}
1149
1150static int nvme_rdma_set_sg_null(struct nvme_command *c)
1151{
1152 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1153
1154 sg->addr = 0;
1155 put_unaligned_le24(0, sg->length);
1156 put_unaligned_le32(0, sg->key);
1157 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1158 return 0;
1159}
1160
1161static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
64a741c1
SW
1162 struct nvme_rdma_request *req, struct nvme_command *c,
1163 int count)
71102307
CH
1164{
1165 struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
64a741c1
SW
1166 struct scatterlist *sgl = req->sg_table.sgl;
1167 struct ib_sge *sge = &req->sge[1];
1168 u32 len = 0;
1169 int i;
71102307 1170
64a741c1
SW
1171 for (i = 0; i < count; i++, sgl++, sge++) {
1172 sge->addr = sg_dma_address(sgl);
1173 sge->length = sg_dma_len(sgl);
1174 sge->lkey = queue->device->pd->local_dma_lkey;
1175 len += sge->length;
1176 }
71102307
CH
1177
1178 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
64a741c1 1179 sg->length = cpu_to_le32(len);
71102307
CH
1180 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1181
64a741c1 1182 req->num_sge += count;
71102307
CH
1183 return 0;
1184}
1185
1186static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1187 struct nvme_rdma_request *req, struct nvme_command *c)
1188{
1189 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1190
1191 sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
1192 put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
11975e01 1193 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
71102307
CH
1194 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1195 return 0;
1196}
1197
1198static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1199 struct nvme_rdma_request *req, struct nvme_command *c,
1200 int count)
1201{
1202 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1203 int nr;
1204
f41725bb
IR
1205 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1206 if (WARN_ON_ONCE(!req->mr))
1207 return -EAGAIN;
1208
b925a2dc
MG
1209 /*
1210 * Align the MR to a 4K page size to match the ctrl page size and
1211 * the block virtual boundary.
1212 */
1213 nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
a7b7c7a1 1214 if (unlikely(nr < count)) {
f41725bb
IR
1215 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1216 req->mr = NULL;
71102307
CH
1217 if (nr < 0)
1218 return nr;
1219 return -EINVAL;
1220 }
1221
1222 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1223
1224 req->reg_cqe.done = nvme_rdma_memreg_done;
1225 memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1226 req->reg_wr.wr.opcode = IB_WR_REG_MR;
1227 req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1228 req->reg_wr.wr.num_sge = 0;
1229 req->reg_wr.mr = req->mr;
1230 req->reg_wr.key = req->mr->rkey;
1231 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1232 IB_ACCESS_REMOTE_READ |
1233 IB_ACCESS_REMOTE_WRITE;
1234
71102307
CH
1235 sg->addr = cpu_to_le64(req->mr->iova);
1236 put_unaligned_le24(req->mr->length, sg->length);
1237 put_unaligned_le32(req->mr->rkey, sg->key);
1238 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1239 NVME_SGL_FMT_INVALIDATE;
1240
1241 return 0;
1242}
1243
1244static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
b131c61d 1245 struct request *rq, struct nvme_command *c)
71102307
CH
1246{
1247 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1248 struct nvme_rdma_device *dev = queue->device;
1249 struct ib_device *ibdev = dev->dev;
f9d03f96 1250 int count, ret;
71102307
CH
1251
1252 req->num_sge = 1;
4af7f7ff 1253 refcount_set(&req->ref, 2); /* send and recv completions */
71102307
CH
1254
1255 c->common.flags |= NVME_CMD_SGL_METABUF;
1256
34e08191 1257 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1258 return nvme_rdma_set_sg_null(c);
1259
1260 req->sg_table.sgl = req->first_sgl;
f9d03f96 1261 ret = sg_alloc_table_chained(&req->sg_table,
4635873c
ML
1262 blk_rq_nr_phys_segments(rq), req->sg_table.sgl,
1263 SG_CHUNK_SIZE);
71102307
CH
1264 if (ret)
1265 return -ENOMEM;
1266
f9d03f96 1267 req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
71102307 1268
f9d03f96 1269 count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
71102307
CH
1270 rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1271 if (unlikely(count <= 0)) {
94423a8f
MG
1272 ret = -EIO;
1273 goto out_free_table;
71102307
CH
1274 }
1275
64a741c1 1276 if (count <= dev->num_inline_segments) {
b131c61d 1277 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
64a741c1 1278 queue->ctrl->use_inline_data &&
b131c61d 1279 blk_rq_payload_bytes(rq) <=
94423a8f 1280 nvme_rdma_inline_data_size(queue)) {
64a741c1 1281 ret = nvme_rdma_map_sg_inline(queue, req, c, count);
94423a8f
MG
1282 goto out;
1283 }
71102307 1284
64a741c1 1285 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
94423a8f
MG
1286 ret = nvme_rdma_map_sg_single(queue, req, c);
1287 goto out;
1288 }
71102307
CH
1289 }
1290
94423a8f
MG
1291 ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1292out:
1293 if (unlikely(ret))
1294 goto out_unmap_sg;
1295
1296 return 0;
1297
1298out_unmap_sg:
1299 ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
1300 req->nents, rq_data_dir(rq) ==
1301 WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1302out_free_table:
4635873c 1303 sg_free_table_chained(&req->sg_table, SG_CHUNK_SIZE);
94423a8f 1304 return ret;
71102307
CH
1305}
1306
1307static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1308{
4af7f7ff
SG
1309 struct nvme_rdma_qe *qe =
1310 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1311 struct nvme_rdma_request *req =
1312 container_of(qe, struct nvme_rdma_request, sqe);
1313 struct request *rq = blk_mq_rq_from_pdu(req);
1314
1315 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1316 nvme_rdma_wr_error(cq, wc, "SEND");
4af7f7ff
SG
1317 return;
1318 }
1319
1320 if (refcount_dec_and_test(&req->ref))
1321 nvme_end_request(rq, req->status, req->result);
71102307
CH
1322}
1323
1324static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1325 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
b4b591c8 1326 struct ib_send_wr *first)
71102307 1327{
45e3cc1a 1328 struct ib_send_wr wr;
71102307
CH
1329 int ret;
1330
1331 sge->addr = qe->dma;
1332 sge->length = sizeof(struct nvme_command),
1333 sge->lkey = queue->device->pd->local_dma_lkey;
1334
71102307
CH
1335 wr.next = NULL;
1336 wr.wr_cqe = &qe->cqe;
1337 wr.sg_list = sge;
1338 wr.num_sge = num_sge;
1339 wr.opcode = IB_WR_SEND;
b4b591c8 1340 wr.send_flags = IB_SEND_SIGNALED;
71102307
CH
1341
1342 if (first)
1343 first->next = &wr;
1344 else
1345 first = &wr;
1346
45e3cc1a 1347 ret = ib_post_send(queue->qp, first, NULL);
a7b7c7a1 1348 if (unlikely(ret)) {
71102307
CH
1349 dev_err(queue->ctrl->ctrl.device,
1350 "%s failed with error code %d\n", __func__, ret);
1351 }
1352 return ret;
1353}
1354
1355static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1356 struct nvme_rdma_qe *qe)
1357{
45e3cc1a 1358 struct ib_recv_wr wr;
71102307
CH
1359 struct ib_sge list;
1360 int ret;
1361
1362 list.addr = qe->dma;
1363 list.length = sizeof(struct nvme_completion);
1364 list.lkey = queue->device->pd->local_dma_lkey;
1365
1366 qe->cqe.done = nvme_rdma_recv_done;
1367
1368 wr.next = NULL;
1369 wr.wr_cqe = &qe->cqe;
1370 wr.sg_list = &list;
1371 wr.num_sge = 1;
1372
45e3cc1a 1373 ret = ib_post_recv(queue->qp, &wr, NULL);
a7b7c7a1 1374 if (unlikely(ret)) {
71102307
CH
1375 dev_err(queue->ctrl->ctrl.device,
1376 "%s failed with error code %d\n", __func__, ret);
1377 }
1378 return ret;
1379}
1380
1381static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1382{
1383 u32 queue_idx = nvme_rdma_queue_idx(queue);
1384
1385 if (queue_idx == 0)
1386 return queue->ctrl->admin_tag_set.tags[queue_idx];
1387 return queue->ctrl->tag_set.tags[queue_idx - 1];
1388}
1389
b4b591c8
SG
1390static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1391{
1392 if (unlikely(wc->status != IB_WC_SUCCESS))
1393 nvme_rdma_wr_error(cq, wc, "ASYNC");
1394}
1395
ad22c355 1396static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
71102307
CH
1397{
1398 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1399 struct nvme_rdma_queue *queue = &ctrl->queues[0];
1400 struct ib_device *dev = queue->device->dev;
1401 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1402 struct nvme_command *cmd = sqe->data;
1403 struct ib_sge sge;
1404 int ret;
1405
71102307
CH
1406 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1407
1408 memset(cmd, 0, sizeof(*cmd));
1409 cmd->common.opcode = nvme_admin_async_event;
38dabe21 1410 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
71102307
CH
1411 cmd->common.flags |= NVME_CMD_SGL_METABUF;
1412 nvme_rdma_set_sg_null(cmd);
1413
b4b591c8
SG
1414 sqe->cqe.done = nvme_rdma_async_done;
1415
71102307
CH
1416 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1417 DMA_TO_DEVICE);
1418
b4b591c8 1419 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
71102307
CH
1420 WARN_ON_ONCE(ret);
1421}
1422
1052b8ac
JA
1423static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1424 struct nvme_completion *cqe, struct ib_wc *wc)
71102307 1425{
71102307
CH
1426 struct request *rq;
1427 struct nvme_rdma_request *req;
71102307 1428
71102307
CH
1429 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
1430 if (!rq) {
1431 dev_err(queue->ctrl->ctrl.device,
1432 "tag 0x%x on QP %#x not found\n",
1433 cqe->command_id, queue->qp->qp_num);
1434 nvme_rdma_error_recovery(queue->ctrl);
1052b8ac 1435 return;
71102307
CH
1436 }
1437 req = blk_mq_rq_to_pdu(rq);
1438
4af7f7ff
SG
1439 req->status = cqe->status;
1440 req->result = cqe->result;
71102307 1441
3ef0279b
SG
1442 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1443 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
1444 dev_err(queue->ctrl->ctrl.device,
1445 "Bogus remote invalidation for rkey %#x\n",
1446 req->mr->rkey);
1447 nvme_rdma_error_recovery(queue->ctrl);
1448 }
f41725bb 1449 } else if (req->mr) {
1052b8ac
JA
1450 int ret;
1451
2f122e4f
SG
1452 ret = nvme_rdma_inv_rkey(queue, req);
1453 if (unlikely(ret < 0)) {
1454 dev_err(queue->ctrl->ctrl.device,
1455 "Queueing INV WR for rkey %#x failed (%d)\n",
1456 req->mr->rkey, ret);
1457 nvme_rdma_error_recovery(queue->ctrl);
1458 }
1459 /* the local invalidation completion will end the request */
1052b8ac 1460 return;
2f122e4f 1461 }
71102307 1462
1052b8ac 1463 if (refcount_dec_and_test(&req->ref))
4af7f7ff 1464 nvme_end_request(rq, req->status, req->result);
71102307
CH
1465}
1466
1052b8ac 1467static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
71102307
CH
1468{
1469 struct nvme_rdma_qe *qe =
1470 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1471 struct nvme_rdma_queue *queue = cq->cq_context;
1472 struct ib_device *ibdev = queue->device->dev;
1473 struct nvme_completion *cqe = qe->data;
1474 const size_t len = sizeof(struct nvme_completion);
71102307
CH
1475
1476 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1477 nvme_rdma_wr_error(cq, wc, "RECV");
1052b8ac 1478 return;
71102307
CH
1479 }
1480
1481 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1482 /*
1483 * AEN requests are special as they don't time out and can
1484 * survive any kind of queue freeze and often don't respond to
1485 * aborts. We don't even bother to allocate a struct request
1486 * for them but rather special case them here.
1487 */
1488 if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
38dabe21 1489 cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH))
7bf58533
CH
1490 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1491 &cqe->result);
71102307 1492 else
1052b8ac 1493 nvme_rdma_process_nvme_rsp(queue, cqe, wc);
71102307
CH
1494 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1495
1496 nvme_rdma_post_recv(queue, qe);
71102307
CH
1497}
1498
1499static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1500{
1501 int ret, i;
1502
1503 for (i = 0; i < queue->queue_size; i++) {
1504 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1505 if (ret)
1506 goto out_destroy_queue_ib;
1507 }
1508
1509 return 0;
1510
1511out_destroy_queue_ib:
1512 nvme_rdma_destroy_queue_ib(queue);
1513 return ret;
1514}
1515
1516static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1517 struct rdma_cm_event *ev)
1518{
7f03953c
SW
1519 struct rdma_cm_id *cm_id = queue->cm_id;
1520 int status = ev->status;
1521 const char *rej_msg;
1522 const struct nvme_rdma_cm_rej *rej_data;
1523 u8 rej_data_len;
1524
1525 rej_msg = rdma_reject_msg(cm_id, status);
1526 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1527
1528 if (rej_data && rej_data_len >= sizeof(u16)) {
1529 u16 sts = le16_to_cpu(rej_data->sts);
71102307
CH
1530
1531 dev_err(queue->ctrl->ctrl.device,
7f03953c
SW
1532 "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1533 status, rej_msg, sts, nvme_rdma_cm_msg(sts));
71102307
CH
1534 } else {
1535 dev_err(queue->ctrl->ctrl.device,
7f03953c 1536 "Connect rejected: status %d (%s).\n", status, rej_msg);
71102307
CH
1537 }
1538
1539 return -ECONNRESET;
1540}
1541
1542static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1543{
71102307
CH
1544 int ret;
1545
ca6e95bb
SG
1546 ret = nvme_rdma_create_queue_ib(queue);
1547 if (ret)
1548 return ret;
71102307
CH
1549
1550 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1551 if (ret) {
1552 dev_err(queue->ctrl->ctrl.device,
1553 "rdma_resolve_route failed (%d).\n",
1554 queue->cm_error);
1555 goto out_destroy_queue;
1556 }
1557
1558 return 0;
1559
1560out_destroy_queue:
1561 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1562 return ret;
1563}
1564
1565static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1566{
1567 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1568 struct rdma_conn_param param = { };
0b857b44 1569 struct nvme_rdma_cm_req priv = { };
71102307
CH
1570 int ret;
1571
1572 param.qp_num = queue->qp->qp_num;
1573 param.flow_control = 1;
1574
1575 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
2ac17c28
SG
1576 /* maximum retry count */
1577 param.retry_count = 7;
71102307
CH
1578 param.rnr_retry_count = 7;
1579 param.private_data = &priv;
1580 param.private_data_len = sizeof(priv);
1581
1582 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1583 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
f994d9dc
JF
1584 /*
1585 * set the admin queue depth to the minimum size
1586 * specified by the Fabrics standard.
1587 */
1588 if (priv.qid == 0) {
7aa1f427
SG
1589 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1590 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
f994d9dc 1591 } else {
c5af8654
JF
1592 /*
1593 * current interpretation of the fabrics spec
1594 * is at minimum you make hrqsize sqsize+1, or a
1595 * 1's based representation of sqsize.
1596 */
f994d9dc 1597 priv.hrqsize = cpu_to_le16(queue->queue_size);
c5af8654 1598 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
f994d9dc 1599 }
71102307
CH
1600
1601 ret = rdma_connect(queue->cm_id, &param);
1602 if (ret) {
1603 dev_err(ctrl->ctrl.device,
1604 "rdma_connect failed (%d).\n", ret);
1605 goto out_destroy_queue_ib;
1606 }
1607
1608 return 0;
1609
1610out_destroy_queue_ib:
1611 nvme_rdma_destroy_queue_ib(queue);
1612 return ret;
1613}
1614
71102307
CH
1615static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1616 struct rdma_cm_event *ev)
1617{
1618 struct nvme_rdma_queue *queue = cm_id->context;
1619 int cm_error = 0;
1620
1621 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1622 rdma_event_msg(ev->event), ev->event,
1623 ev->status, cm_id);
1624
1625 switch (ev->event) {
1626 case RDMA_CM_EVENT_ADDR_RESOLVED:
1627 cm_error = nvme_rdma_addr_resolved(queue);
1628 break;
1629 case RDMA_CM_EVENT_ROUTE_RESOLVED:
1630 cm_error = nvme_rdma_route_resolved(queue);
1631 break;
1632 case RDMA_CM_EVENT_ESTABLISHED:
1633 queue->cm_error = nvme_rdma_conn_established(queue);
1634 /* complete cm_done regardless of success/failure */
1635 complete(&queue->cm_done);
1636 return 0;
1637 case RDMA_CM_EVENT_REJECTED:
abf87d5e 1638 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1639 cm_error = nvme_rdma_conn_rejected(queue, ev);
1640 break;
71102307
CH
1641 case RDMA_CM_EVENT_ROUTE_ERROR:
1642 case RDMA_CM_EVENT_CONNECT_ERROR:
1643 case RDMA_CM_EVENT_UNREACHABLE:
abf87d5e 1644 nvme_rdma_destroy_queue_ib(queue);
249090f9 1645 /* fall through */
abf87d5e 1646 case RDMA_CM_EVENT_ADDR_ERROR:
71102307
CH
1647 dev_dbg(queue->ctrl->ctrl.device,
1648 "CM error event %d\n", ev->event);
1649 cm_error = -ECONNRESET;
1650 break;
1651 case RDMA_CM_EVENT_DISCONNECTED:
1652 case RDMA_CM_EVENT_ADDR_CHANGE:
1653 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1654 dev_dbg(queue->ctrl->ctrl.device,
1655 "disconnect received - connection closed\n");
1656 nvme_rdma_error_recovery(queue->ctrl);
1657 break;
1658 case RDMA_CM_EVENT_DEVICE_REMOVAL:
e87a911f
SW
1659 /* device removal is handled via the ib_client API */
1660 break;
71102307
CH
1661 default:
1662 dev_err(queue->ctrl->ctrl.device,
1663 "Unexpected RDMA CM event (%d)\n", ev->event);
1664 nvme_rdma_error_recovery(queue->ctrl);
1665 break;
1666 }
1667
1668 if (cm_error) {
1669 queue->cm_error = cm_error;
1670 complete(&queue->cm_done);
1671 }
1672
1673 return 0;
1674}
1675
1676static enum blk_eh_timer_return
1677nvme_rdma_timeout(struct request *rq, bool reserved)
1678{
1679 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
4c174e63
SG
1680 struct nvme_rdma_queue *queue = req->queue;
1681 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
71102307 1682
4c174e63
SG
1683 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
1684 rq->tag, nvme_rdma_queue_idx(queue));
e62a538d 1685
4c174e63
SG
1686 if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
1687 /*
1688 * Teardown immediately if controller times out while starting
1689 * or we are already started error recovery. all outstanding
1690 * requests are completed on shutdown, so we return BLK_EH_DONE.
1691 */
1692 flush_work(&ctrl->err_work);
1693 nvme_rdma_teardown_io_queues(ctrl, false);
1694 nvme_rdma_teardown_admin_queue(ctrl, false);
1695 return BLK_EH_DONE;
1696 }
71102307 1697
4c174e63
SG
1698 dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1699 nvme_rdma_error_recovery(ctrl);
71102307 1700
4c174e63 1701 return BLK_EH_RESET_TIMER;
71102307
CH
1702}
1703
fc17b653 1704static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
71102307
CH
1705 const struct blk_mq_queue_data *bd)
1706{
1707 struct nvme_ns *ns = hctx->queue->queuedata;
1708 struct nvme_rdma_queue *queue = hctx->driver_data;
1709 struct request *rq = bd->rq;
1710 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1711 struct nvme_rdma_qe *sqe = &req->sqe;
1712 struct nvme_command *c = sqe->data;
71102307 1713 struct ib_device *dev;
3bc32bb1 1714 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
fc17b653
CH
1715 blk_status_t ret;
1716 int err;
71102307
CH
1717
1718 WARN_ON_ONCE(rq->tag < 0);
1719
3bc32bb1 1720 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
6cdefc6e 1721 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
553cd9ef 1722
71102307 1723 dev = queue->device->dev;
62f99b62
MG
1724
1725 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
1726 sizeof(struct nvme_command),
1727 DMA_TO_DEVICE);
1728 err = ib_dma_mapping_error(dev, req->sqe.dma);
1729 if (unlikely(err))
1730 return BLK_STS_RESOURCE;
1731
71102307
CH
1732 ib_dma_sync_single_for_cpu(dev, sqe->dma,
1733 sizeof(struct nvme_command), DMA_TO_DEVICE);
1734
1735 ret = nvme_setup_cmd(ns, rq, c);
fc17b653 1736 if (ret)
62f99b62 1737 goto unmap_qe;
71102307 1738
71102307
CH
1739 blk_mq_start_request(rq);
1740
fc17b653 1741 err = nvme_rdma_map_data(queue, rq, c);
a7b7c7a1 1742 if (unlikely(err < 0)) {
71102307 1743 dev_err(queue->ctrl->ctrl.device,
fc17b653 1744 "Failed to map data (%d)\n", err);
71102307
CH
1745 nvme_cleanup_cmd(rq);
1746 goto err;
1747 }
1748
b4b591c8
SG
1749 sqe->cqe.done = nvme_rdma_send_done;
1750
71102307
CH
1751 ib_dma_sync_single_for_device(dev, sqe->dma,
1752 sizeof(struct nvme_command), DMA_TO_DEVICE);
1753
fc17b653 1754 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
f41725bb 1755 req->mr ? &req->reg_wr.wr : NULL);
a7b7c7a1 1756 if (unlikely(err)) {
71102307
CH
1757 nvme_rdma_unmap_data(queue, rq);
1758 goto err;
1759 }
1760
fc17b653 1761 return BLK_STS_OK;
62f99b62 1762
71102307 1763err:
fc17b653 1764 if (err == -ENOMEM || err == -EAGAIN)
62f99b62
MG
1765 ret = BLK_STS_RESOURCE;
1766 else
1767 ret = BLK_STS_IOERR;
1768unmap_qe:
1769 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
1770 DMA_TO_DEVICE);
1771 return ret;
71102307
CH
1772}
1773
ff8519f9
SG
1774static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
1775{
1776 struct nvme_rdma_queue *queue = hctx->driver_data;
1777
1778 return ib_process_cq_direct(queue->ib_cq, -1);
1779}
1780
71102307
CH
1781static void nvme_rdma_complete_rq(struct request *rq)
1782{
1783 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
62f99b62
MG
1784 struct nvme_rdma_queue *queue = req->queue;
1785 struct ib_device *ibdev = queue->device->dev;
71102307 1786
62f99b62
MG
1787 nvme_rdma_unmap_data(queue, rq);
1788 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
1789 DMA_TO_DEVICE);
77f02a7a 1790 nvme_complete_rq(rq);
71102307
CH
1791}
1792
0b36658c
SG
1793static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
1794{
1795 struct nvme_rdma_ctrl *ctrl = set->driver_data;
5651cd3c 1796 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 1797
5651cd3c 1798 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
b65bb777 1799 /* separate read/write queues */
5651cd3c
SG
1800 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1801 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1802 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1803 set->map[HCTX_TYPE_READ].nr_queues =
1804 ctrl->io_queues[HCTX_TYPE_READ];
b65bb777 1805 set->map[HCTX_TYPE_READ].queue_offset =
5651cd3c 1806 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777 1807 } else {
5651cd3c
SG
1808 /* shared read/write queues */
1809 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1810 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1811 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1812 set->map[HCTX_TYPE_READ].nr_queues =
1813 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777
SG
1814 set->map[HCTX_TYPE_READ].queue_offset = 0;
1815 }
1816 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
1817 ctrl->device->dev, 0);
1818 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
1819 ctrl->device->dev, 0);
ff8519f9 1820
5651cd3c
SG
1821 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
1822 /* map dedicated poll queues only if we have queues left */
ff8519f9 1823 set->map[HCTX_TYPE_POLL].nr_queues =
b1064d3e 1824 ctrl->io_queues[HCTX_TYPE_POLL];
ff8519f9 1825 set->map[HCTX_TYPE_POLL].queue_offset =
5651cd3c
SG
1826 ctrl->io_queues[HCTX_TYPE_DEFAULT] +
1827 ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
1828 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
1829 }
5651cd3c
SG
1830
1831 dev_info(ctrl->ctrl.device,
1832 "mapped %d/%d/%d default/read/poll queues.\n",
1833 ctrl->io_queues[HCTX_TYPE_DEFAULT],
1834 ctrl->io_queues[HCTX_TYPE_READ],
1835 ctrl->io_queues[HCTX_TYPE_POLL]);
1836
b65bb777 1837 return 0;
0b36658c
SG
1838}
1839
f363b089 1840static const struct blk_mq_ops nvme_rdma_mq_ops = {
71102307
CH
1841 .queue_rq = nvme_rdma_queue_rq,
1842 .complete = nvme_rdma_complete_rq,
71102307
CH
1843 .init_request = nvme_rdma_init_request,
1844 .exit_request = nvme_rdma_exit_request,
71102307 1845 .init_hctx = nvme_rdma_init_hctx,
71102307 1846 .timeout = nvme_rdma_timeout,
0b36658c 1847 .map_queues = nvme_rdma_map_queues,
ff8519f9 1848 .poll = nvme_rdma_poll,
71102307
CH
1849};
1850
f363b089 1851static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
71102307
CH
1852 .queue_rq = nvme_rdma_queue_rq,
1853 .complete = nvme_rdma_complete_rq,
385475ee
CH
1854 .init_request = nvme_rdma_init_request,
1855 .exit_request = nvme_rdma_exit_request,
71102307
CH
1856 .init_hctx = nvme_rdma_init_admin_hctx,
1857 .timeout = nvme_rdma_timeout,
1858};
1859
18398af2 1860static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
71102307 1861{
794a4cb3
SG
1862 cancel_work_sync(&ctrl->err_work);
1863 cancel_delayed_work_sync(&ctrl->reconnect_work);
1864
75862c72 1865 nvme_rdma_teardown_io_queues(ctrl, shutdown);
18398af2 1866 if (shutdown)
71102307 1867 nvme_shutdown_ctrl(&ctrl->ctrl);
18398af2
SG
1868 else
1869 nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
75862c72 1870 nvme_rdma_teardown_admin_queue(ctrl, shutdown);
71102307
CH
1871}
1872
c5017e85 1873static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2461a8dd 1874{
e9bc2587 1875 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
71102307
CH
1876}
1877
71102307
CH
1878static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
1879{
d86c4d8e
CH
1880 struct nvme_rdma_ctrl *ctrl =
1881 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
71102307 1882
d09f2b45 1883 nvme_stop_ctrl(&ctrl->ctrl);
18398af2 1884 nvme_rdma_shutdown_ctrl(ctrl, false);
71102307 1885
ad6a0a52 1886 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
d5bf4b7f
SG
1887 /* state change failure should never happen */
1888 WARN_ON_ONCE(1);
1889 return;
1890 }
1891
c66e2998 1892 if (nvme_rdma_setup_ctrl(ctrl, false))
370ae6e4 1893 goto out_fail;
71102307 1894
71102307
CH
1895 return;
1896
370ae6e4 1897out_fail:
8000d1fd
NC
1898 ++ctrl->ctrl.nr_reconnects;
1899 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1900}
1901
71102307
CH
1902static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
1903 .name = "rdma",
1904 .module = THIS_MODULE,
d3d5b87d 1905 .flags = NVME_F_FABRICS,
71102307
CH
1906 .reg_read32 = nvmf_reg_read32,
1907 .reg_read64 = nvmf_reg_read64,
1908 .reg_write32 = nvmf_reg_write32,
71102307
CH
1909 .free_ctrl = nvme_rdma_free_ctrl,
1910 .submit_async_event = nvme_rdma_submit_async_event,
c5017e85 1911 .delete_ctrl = nvme_rdma_delete_ctrl,
71102307
CH
1912 .get_address = nvmf_get_address,
1913};
1914
36e835f2
JS
1915/*
1916 * Fails a connection request if it matches an existing controller
1917 * (association) with the same tuple:
1918 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
1919 *
1920 * if local address is not specified in the request, it will match an
1921 * existing controller with all the other parameters the same and no
1922 * local port address specified as well.
1923 *
1924 * The ports don't need to be compared as they are intrinsically
1925 * already matched by the port pointers supplied.
1926 */
1927static bool
1928nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
1929{
1930 struct nvme_rdma_ctrl *ctrl;
1931 bool found = false;
1932
1933 mutex_lock(&nvme_rdma_ctrl_mutex);
1934 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
b7c7be6f 1935 found = nvmf_ip_options_match(&ctrl->ctrl, opts);
36e835f2
JS
1936 if (found)
1937 break;
1938 }
1939 mutex_unlock(&nvme_rdma_ctrl_mutex);
1940
1941 return found;
1942}
1943
71102307
CH
1944static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
1945 struct nvmf_ctrl_options *opts)
1946{
1947 struct nvme_rdma_ctrl *ctrl;
1948 int ret;
1949 bool changed;
1950
1951 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1952 if (!ctrl)
1953 return ERR_PTR(-ENOMEM);
1954 ctrl->ctrl.opts = opts;
1955 INIT_LIST_HEAD(&ctrl->list);
1956
bb59b8e5
SG
1957 if (!(opts->mask & NVMF_OPT_TRSVCID)) {
1958 opts->trsvcid =
1959 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
1960 if (!opts->trsvcid) {
1961 ret = -ENOMEM;
1962 goto out_free_ctrl;
1963 }
1964 opts->mask |= NVMF_OPT_TRSVCID;
1965 }
0928f9b4
SG
1966
1967 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
bb59b8e5 1968 opts->traddr, opts->trsvcid, &ctrl->addr);
71102307 1969 if (ret) {
bb59b8e5
SG
1970 pr_err("malformed address passed: %s:%s\n",
1971 opts->traddr, opts->trsvcid);
71102307
CH
1972 goto out_free_ctrl;
1973 }
1974
8f4e8dac 1975 if (opts->mask & NVMF_OPT_HOST_TRADDR) {
0928f9b4
SG
1976 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
1977 opts->host_traddr, NULL, &ctrl->src_addr);
8f4e8dac 1978 if (ret) {
0928f9b4 1979 pr_err("malformed src address passed: %s\n",
8f4e8dac
MG
1980 opts->host_traddr);
1981 goto out_free_ctrl;
1982 }
1983 }
1984
36e835f2
JS
1985 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
1986 ret = -EALREADY;
1987 goto out_free_ctrl;
1988 }
1989
71102307
CH
1990 INIT_DELAYED_WORK(&ctrl->reconnect_work,
1991 nvme_rdma_reconnect_ctrl_work);
1992 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
d86c4d8e 1993 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
71102307 1994
ff8519f9
SG
1995 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
1996 opts->nr_poll_queues + 1;
c5af8654 1997 ctrl->ctrl.sqsize = opts->queue_size - 1;
71102307
CH
1998 ctrl->ctrl.kato = opts->kato;
1999
2000 ret = -ENOMEM;
d858e5f0 2001 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
71102307
CH
2002 GFP_KERNEL);
2003 if (!ctrl->queues)
3d064101
SG
2004 goto out_free_ctrl;
2005
2006 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2007 0 /* no quirks, we're perfect! */);
2008 if (ret)
2009 goto out_kfree_queues;
71102307 2010
b754a32c
MG
2011 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2012 WARN_ON_ONCE(!changed);
2013
c66e2998 2014 ret = nvme_rdma_setup_ctrl(ctrl, true);
71102307 2015 if (ret)
3d064101 2016 goto out_uninit_ctrl;
71102307 2017
0928f9b4 2018 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
71102307
CH
2019 ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2020
d22524a4 2021 nvme_get_ctrl(&ctrl->ctrl);
71102307
CH
2022
2023 mutex_lock(&nvme_rdma_ctrl_mutex);
2024 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2025 mutex_unlock(&nvme_rdma_ctrl_mutex);
2026
71102307
CH
2027 return &ctrl->ctrl;
2028
71102307
CH
2029out_uninit_ctrl:
2030 nvme_uninit_ctrl(&ctrl->ctrl);
2031 nvme_put_ctrl(&ctrl->ctrl);
2032 if (ret > 0)
2033 ret = -EIO;
2034 return ERR_PTR(ret);
3d064101
SG
2035out_kfree_queues:
2036 kfree(ctrl->queues);
71102307
CH
2037out_free_ctrl:
2038 kfree(ctrl);
2039 return ERR_PTR(ret);
2040}
2041
2042static struct nvmf_transport_ops nvme_rdma_transport = {
2043 .name = "rdma",
0de5cd36 2044 .module = THIS_MODULE,
71102307 2045 .required_opts = NVMF_OPT_TRADDR,
8f4e8dac 2046 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
b65bb777 2047 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
ff8519f9 2048 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES,
71102307
CH
2049 .create_ctrl = nvme_rdma_create_ctrl,
2050};
2051
e87a911f
SW
2052static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2053{
2054 struct nvme_rdma_ctrl *ctrl;
9bad0404
MG
2055 struct nvme_rdma_device *ndev;
2056 bool found = false;
2057
2058 mutex_lock(&device_list_mutex);
2059 list_for_each_entry(ndev, &device_list, entry) {
2060 if (ndev->dev == ib_device) {
2061 found = true;
2062 break;
2063 }
2064 }
2065 mutex_unlock(&device_list_mutex);
2066
2067 if (!found)
2068 return;
e87a911f
SW
2069
2070 /* Delete all controllers using this device */
2071 mutex_lock(&nvme_rdma_ctrl_mutex);
2072 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2073 if (ctrl->device->dev != ib_device)
2074 continue;
c5017e85 2075 nvme_delete_ctrl(&ctrl->ctrl);
e87a911f
SW
2076 }
2077 mutex_unlock(&nvme_rdma_ctrl_mutex);
2078
b227c59b 2079 flush_workqueue(nvme_delete_wq);
e87a911f
SW
2080}
2081
2082static struct ib_client nvme_rdma_ib_client = {
2083 .name = "nvme_rdma",
e87a911f
SW
2084 .remove = nvme_rdma_remove_one
2085};
2086
71102307
CH
2087static int __init nvme_rdma_init_module(void)
2088{
e87a911f
SW
2089 int ret;
2090
e87a911f 2091 ret = ib_register_client(&nvme_rdma_ib_client);
a56c79cf 2092 if (ret)
9a6327d2 2093 return ret;
a56c79cf
SG
2094
2095 ret = nvmf_register_transport(&nvme_rdma_transport);
2096 if (ret)
2097 goto err_unreg_client;
e87a911f 2098
a56c79cf 2099 return 0;
e87a911f 2100
a56c79cf
SG
2101err_unreg_client:
2102 ib_unregister_client(&nvme_rdma_ib_client);
a56c79cf 2103 return ret;
71102307
CH
2104}
2105
2106static void __exit nvme_rdma_cleanup_module(void)
2107{
71102307 2108 nvmf_unregister_transport(&nvme_rdma_transport);
e87a911f 2109 ib_unregister_client(&nvme_rdma_ib_client);
71102307
CH
2110}
2111
2112module_init(nvme_rdma_init_module);
2113module_exit(nvme_rdma_cleanup_module);
2114
2115MODULE_LICENSE("GPL v2");