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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/string.h> | |
71102307 CH |
20 | #include <linux/atomic.h> |
21 | #include <linux/blk-mq.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/mutex.h> | |
25 | #include <linux/scatterlist.h> | |
26 | #include <linux/nvme.h> | |
71102307 CH |
27 | #include <asm/unaligned.h> |
28 | ||
29 | #include <rdma/ib_verbs.h> | |
30 | #include <rdma/rdma_cm.h> | |
71102307 CH |
31 | #include <linux/nvme-rdma.h> |
32 | ||
33 | #include "nvme.h" | |
34 | #include "fabrics.h" | |
35 | ||
36 | ||
782d820c | 37 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 CH |
38 | |
39 | #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */ | |
40 | ||
41 | #define NVME_RDMA_MAX_SEGMENTS 256 | |
42 | ||
43 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
44 | ||
71102307 CH |
45 | /* |
46 | * We handle AEN commands ourselves and don't even let the | |
47 | * block layer know about them. | |
48 | */ | |
49 | #define NVME_RDMA_NR_AEN_COMMANDS 1 | |
50 | #define NVME_RDMA_AQ_BLKMQ_DEPTH \ | |
51 | (NVMF_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS) | |
52 | ||
53 | struct nvme_rdma_device { | |
54 | struct ib_device *dev; | |
55 | struct ib_pd *pd; | |
71102307 CH |
56 | struct kref ref; |
57 | struct list_head entry; | |
58 | }; | |
59 | ||
60 | struct nvme_rdma_qe { | |
61 | struct ib_cqe cqe; | |
62 | void *data; | |
63 | u64 dma; | |
64 | }; | |
65 | ||
66 | struct nvme_rdma_queue; | |
67 | struct nvme_rdma_request { | |
d49187e9 | 68 | struct nvme_request req; |
71102307 CH |
69 | struct ib_mr *mr; |
70 | struct nvme_rdma_qe sqe; | |
71 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; | |
72 | u32 num_sge; | |
73 | int nents; | |
74 | bool inline_data; | |
71102307 CH |
75 | struct ib_reg_wr reg_wr; |
76 | struct ib_cqe reg_cqe; | |
77 | struct nvme_rdma_queue *queue; | |
78 | struct sg_table sg_table; | |
79 | struct scatterlist first_sgl[]; | |
80 | }; | |
81 | ||
82 | enum nvme_rdma_queue_flags { | |
dc5bc6a9 SG |
83 | NVME_RDMA_Q_CONNECTED = 0, |
84 | NVME_RDMA_IB_QUEUE_ALLOCATED = 1, | |
85 | NVME_RDMA_Q_DELETING = 2, | |
86 | NVME_RDMA_Q_LIVE = 3, | |
71102307 CH |
87 | }; |
88 | ||
89 | struct nvme_rdma_queue { | |
90 | struct nvme_rdma_qe *rsp_ring; | |
91 | u8 sig_count; | |
92 | int queue_size; | |
93 | size_t cmnd_capsule_len; | |
94 | struct nvme_rdma_ctrl *ctrl; | |
95 | struct nvme_rdma_device *device; | |
96 | struct ib_cq *ib_cq; | |
97 | struct ib_qp *qp; | |
98 | ||
99 | unsigned long flags; | |
100 | struct rdma_cm_id *cm_id; | |
101 | int cm_error; | |
102 | struct completion cm_done; | |
103 | }; | |
104 | ||
105 | struct nvme_rdma_ctrl { | |
71102307 CH |
106 | /* read only in the hot path */ |
107 | struct nvme_rdma_queue *queues; | |
108 | u32 queue_count; | |
109 | ||
110 | /* other member variables */ | |
71102307 CH |
111 | struct blk_mq_tag_set tag_set; |
112 | struct work_struct delete_work; | |
113 | struct work_struct reset_work; | |
114 | struct work_struct err_work; | |
115 | ||
116 | struct nvme_rdma_qe async_event_sqe; | |
117 | ||
71102307 CH |
118 | struct delayed_work reconnect_work; |
119 | ||
120 | struct list_head list; | |
121 | ||
122 | struct blk_mq_tag_set admin_tag_set; | |
123 | struct nvme_rdma_device *device; | |
124 | ||
125 | u64 cap; | |
126 | u32 max_fr_pages; | |
127 | ||
0928f9b4 SG |
128 | struct sockaddr_storage addr; |
129 | struct sockaddr_storage src_addr; | |
71102307 CH |
130 | |
131 | struct nvme_ctrl ctrl; | |
132 | }; | |
133 | ||
134 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
135 | { | |
136 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
137 | } | |
138 | ||
139 | static LIST_HEAD(device_list); | |
140 | static DEFINE_MUTEX(device_list_mutex); | |
141 | ||
142 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
143 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
144 | ||
145 | static struct workqueue_struct *nvme_rdma_wq; | |
146 | ||
147 | /* | |
148 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
149 | * unsafe. With it turned off we will have to register a global rkey that | |
150 | * allows read and write access to all physical memory. | |
151 | */ | |
152 | static bool register_always = true; | |
153 | module_param(register_always, bool, 0444); | |
154 | MODULE_PARM_DESC(register_always, | |
155 | "Use memory registration even for contiguous memory regions"); | |
156 | ||
157 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
158 | struct rdma_cm_event *event); | |
159 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 CH |
160 | |
161 | /* XXX: really should move to a generic header sooner or later.. */ | |
162 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
163 | { | |
164 | *p++ = val; | |
165 | *p++ = val >> 8; | |
166 | *p++ = val >> 16; | |
167 | } | |
168 | ||
169 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
170 | { | |
171 | return queue - queue->ctrl->queues; | |
172 | } | |
173 | ||
174 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
175 | { | |
176 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
177 | } | |
178 | ||
179 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
180 | size_t capsule_size, enum dma_data_direction dir) | |
181 | { | |
182 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
183 | kfree(qe->data); | |
184 | } | |
185 | ||
186 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
187 | size_t capsule_size, enum dma_data_direction dir) | |
188 | { | |
189 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
190 | if (!qe->data) | |
191 | return -ENOMEM; | |
192 | ||
193 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
194 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
195 | kfree(qe->data); | |
196 | return -ENOMEM; | |
197 | } | |
198 | ||
199 | return 0; | |
200 | } | |
201 | ||
202 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
203 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
204 | size_t capsule_size, enum dma_data_direction dir) | |
205 | { | |
206 | int i; | |
207 | ||
208 | for (i = 0; i < ib_queue_size; i++) | |
209 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
210 | kfree(ring); | |
211 | } | |
212 | ||
213 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
214 | size_t ib_queue_size, size_t capsule_size, | |
215 | enum dma_data_direction dir) | |
216 | { | |
217 | struct nvme_rdma_qe *ring; | |
218 | int i; | |
219 | ||
220 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
221 | if (!ring) | |
222 | return NULL; | |
223 | ||
224 | for (i = 0; i < ib_queue_size; i++) { | |
225 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
226 | goto out_free_ring; | |
227 | } | |
228 | ||
229 | return ring; | |
230 | ||
231 | out_free_ring: | |
232 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
233 | return NULL; | |
234 | } | |
235 | ||
236 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
237 | { | |
27a4beef MG |
238 | pr_debug("QP event %s (%d)\n", |
239 | ib_event_msg(event->event), event->event); | |
240 | ||
71102307 CH |
241 | } |
242 | ||
243 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
244 | { | |
245 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
246 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
247 | return queue->cm_error; | |
248 | } | |
249 | ||
250 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
251 | { | |
252 | struct nvme_rdma_device *dev = queue->device; | |
253 | struct ib_qp_init_attr init_attr; | |
254 | int ret; | |
255 | ||
256 | memset(&init_attr, 0, sizeof(init_attr)); | |
257 | init_attr.event_handler = nvme_rdma_qp_event; | |
258 | /* +1 for drain */ | |
259 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
260 | /* +1 for drain */ | |
261 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
262 | init_attr.cap.max_recv_sge = 1; | |
263 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
264 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
265 | init_attr.qp_type = IB_QPT_RC; | |
266 | init_attr.send_cq = queue->ib_cq; | |
267 | init_attr.recv_cq = queue->ib_cq; | |
268 | ||
269 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
270 | ||
271 | queue->qp = queue->cm_id->qp; | |
272 | return ret; | |
273 | } | |
274 | ||
275 | static int nvme_rdma_reinit_request(void *data, struct request *rq) | |
276 | { | |
277 | struct nvme_rdma_ctrl *ctrl = data; | |
278 | struct nvme_rdma_device *dev = ctrl->device; | |
279 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
280 | int ret = 0; | |
281 | ||
f5b7b559 | 282 | if (!req->mr->need_inval) |
71102307 CH |
283 | goto out; |
284 | ||
285 | ib_dereg_mr(req->mr); | |
286 | ||
287 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
288 | ctrl->max_fr_pages); | |
289 | if (IS_ERR(req->mr)) { | |
71102307 | 290 | ret = PTR_ERR(req->mr); |
458a9632 | 291 | req->mr = NULL; |
1bda18de | 292 | goto out; |
71102307 CH |
293 | } |
294 | ||
f5b7b559 | 295 | req->mr->need_inval = false; |
71102307 CH |
296 | |
297 | out: | |
298 | return ret; | |
299 | } | |
300 | ||
301 | static void __nvme_rdma_exit_request(struct nvme_rdma_ctrl *ctrl, | |
302 | struct request *rq, unsigned int queue_idx) | |
303 | { | |
304 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
305 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; | |
306 | struct nvme_rdma_device *dev = queue->device; | |
307 | ||
308 | if (req->mr) | |
309 | ib_dereg_mr(req->mr); | |
310 | ||
311 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
312 | DMA_TO_DEVICE); | |
313 | } | |
314 | ||
d6296d39 CH |
315 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
316 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 317 | { |
d6296d39 | 318 | return __nvme_rdma_exit_request(set->driver_data, rq, hctx_idx + 1); |
71102307 CH |
319 | } |
320 | ||
d6296d39 CH |
321 | static void nvme_rdma_exit_admin_request(struct blk_mq_tag_set *set, |
322 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 323 | { |
d6296d39 | 324 | return __nvme_rdma_exit_request(set->driver_data, rq, 0); |
71102307 CH |
325 | } |
326 | ||
327 | static int __nvme_rdma_init_request(struct nvme_rdma_ctrl *ctrl, | |
328 | struct request *rq, unsigned int queue_idx) | |
329 | { | |
330 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
331 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; | |
332 | struct nvme_rdma_device *dev = queue->device; | |
333 | struct ib_device *ibdev = dev->dev; | |
334 | int ret; | |
335 | ||
71102307 CH |
336 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
337 | DMA_TO_DEVICE); | |
338 | if (ret) | |
339 | return ret; | |
340 | ||
341 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
342 | ctrl->max_fr_pages); | |
343 | if (IS_ERR(req->mr)) { | |
344 | ret = PTR_ERR(req->mr); | |
345 | goto out_free_qe; | |
346 | } | |
347 | ||
348 | req->queue = queue; | |
349 | ||
350 | return 0; | |
351 | ||
352 | out_free_qe: | |
353 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
354 | DMA_TO_DEVICE); | |
355 | return -ENOMEM; | |
356 | } | |
357 | ||
d6296d39 CH |
358 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
359 | struct request *rq, unsigned int hctx_idx, | |
360 | unsigned int numa_node) | |
71102307 | 361 | { |
d6296d39 | 362 | return __nvme_rdma_init_request(set->driver_data, rq, hctx_idx + 1); |
71102307 CH |
363 | } |
364 | ||
d6296d39 CH |
365 | static int nvme_rdma_init_admin_request(struct blk_mq_tag_set *set, |
366 | struct request *rq, unsigned int hctx_idx, | |
367 | unsigned int numa_node) | |
71102307 | 368 | { |
d6296d39 | 369 | return __nvme_rdma_init_request(set->driver_data, rq, 0); |
71102307 CH |
370 | } |
371 | ||
372 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
373 | unsigned int hctx_idx) | |
374 | { | |
375 | struct nvme_rdma_ctrl *ctrl = data; | |
376 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
377 | ||
378 | BUG_ON(hctx_idx >= ctrl->queue_count); | |
379 | ||
380 | hctx->driver_data = queue; | |
381 | return 0; | |
382 | } | |
383 | ||
384 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
385 | unsigned int hctx_idx) | |
386 | { | |
387 | struct nvme_rdma_ctrl *ctrl = data; | |
388 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
389 | ||
390 | BUG_ON(hctx_idx != 0); | |
391 | ||
392 | hctx->driver_data = queue; | |
393 | return 0; | |
394 | } | |
395 | ||
396 | static void nvme_rdma_free_dev(struct kref *ref) | |
397 | { | |
398 | struct nvme_rdma_device *ndev = | |
399 | container_of(ref, struct nvme_rdma_device, ref); | |
400 | ||
401 | mutex_lock(&device_list_mutex); | |
402 | list_del(&ndev->entry); | |
403 | mutex_unlock(&device_list_mutex); | |
404 | ||
71102307 | 405 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
406 | kfree(ndev); |
407 | } | |
408 | ||
409 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
410 | { | |
411 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
412 | } | |
413 | ||
414 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
415 | { | |
416 | return kref_get_unless_zero(&dev->ref); | |
417 | } | |
418 | ||
419 | static struct nvme_rdma_device * | |
420 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
421 | { | |
422 | struct nvme_rdma_device *ndev; | |
423 | ||
424 | mutex_lock(&device_list_mutex); | |
425 | list_for_each_entry(ndev, &device_list, entry) { | |
426 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
427 | nvme_rdma_dev_get(ndev)) | |
428 | goto out_unlock; | |
429 | } | |
430 | ||
431 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
432 | if (!ndev) | |
433 | goto out_err; | |
434 | ||
435 | ndev->dev = cm_id->device; | |
436 | kref_init(&ndev->ref); | |
437 | ||
11975e01 CH |
438 | ndev->pd = ib_alloc_pd(ndev->dev, |
439 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
440 | if (IS_ERR(ndev->pd)) |
441 | goto out_free_dev; | |
442 | ||
71102307 CH |
443 | if (!(ndev->dev->attrs.device_cap_flags & |
444 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
445 | dev_err(&ndev->dev->dev, | |
446 | "Memory registrations not supported.\n"); | |
11975e01 | 447 | goto out_free_pd; |
71102307 CH |
448 | } |
449 | ||
450 | list_add(&ndev->entry, &device_list); | |
451 | out_unlock: | |
452 | mutex_unlock(&device_list_mutex); | |
453 | return ndev; | |
454 | ||
71102307 CH |
455 | out_free_pd: |
456 | ib_dealloc_pd(ndev->pd); | |
457 | out_free_dev: | |
458 | kfree(ndev); | |
459 | out_err: | |
460 | mutex_unlock(&device_list_mutex); | |
461 | return NULL; | |
462 | } | |
463 | ||
464 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
465 | { | |
f361e5a0 SW |
466 | struct nvme_rdma_device *dev; |
467 | struct ib_device *ibdev; | |
71102307 | 468 | |
f361e5a0 SW |
469 | if (!test_and_clear_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags)) |
470 | return; | |
471 | ||
472 | dev = queue->device; | |
473 | ibdev = dev->dev; | |
71102307 CH |
474 | rdma_destroy_qp(queue->cm_id); |
475 | ib_free_cq(queue->ib_cq); | |
476 | ||
477 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
478 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
479 | ||
480 | nvme_rdma_dev_put(dev); | |
481 | } | |
482 | ||
483 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue, | |
484 | struct nvme_rdma_device *dev) | |
485 | { | |
486 | struct ib_device *ibdev = dev->dev; | |
487 | const int send_wr_factor = 3; /* MR, SEND, INV */ | |
488 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
489 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
490 | ||
491 | int ret; | |
492 | ||
493 | queue->device = dev; | |
494 | ||
495 | /* | |
496 | * The admin queue is barely used once the controller is live, so don't | |
497 | * bother to spread it out. | |
498 | */ | |
499 | if (idx == 0) | |
500 | comp_vector = 0; | |
501 | else | |
502 | comp_vector = idx % ibdev->num_comp_vectors; | |
503 | ||
504 | ||
505 | /* +1 for ib_stop_cq */ | |
506 | queue->ib_cq = ib_alloc_cq(dev->dev, queue, | |
507 | cq_factor * queue->queue_size + 1, comp_vector, | |
508 | IB_POLL_SOFTIRQ); | |
509 | if (IS_ERR(queue->ib_cq)) { | |
510 | ret = PTR_ERR(queue->ib_cq); | |
511 | goto out; | |
512 | } | |
513 | ||
514 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
515 | if (ret) | |
516 | goto out_destroy_ib_cq; | |
517 | ||
518 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
519 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
520 | if (!queue->rsp_ring) { | |
521 | ret = -ENOMEM; | |
522 | goto out_destroy_qp; | |
523 | } | |
f361e5a0 | 524 | set_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags); |
71102307 CH |
525 | |
526 | return 0; | |
527 | ||
528 | out_destroy_qp: | |
529 | ib_destroy_qp(queue->qp); | |
530 | out_destroy_ib_cq: | |
531 | ib_free_cq(queue->ib_cq); | |
532 | out: | |
533 | return ret; | |
534 | } | |
535 | ||
536 | static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl, | |
537 | int idx, size_t queue_size) | |
538 | { | |
539 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 540 | struct sockaddr *src_addr = NULL; |
71102307 CH |
541 | int ret; |
542 | ||
543 | queue = &ctrl->queues[idx]; | |
544 | queue->ctrl = ctrl; | |
545 | init_completion(&queue->cm_done); | |
546 | ||
547 | if (idx > 0) | |
548 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
549 | else | |
550 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
551 | ||
552 | queue->queue_size = queue_size; | |
553 | ||
554 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
555 | RDMA_PS_TCP, IB_QPT_RC); | |
556 | if (IS_ERR(queue->cm_id)) { | |
557 | dev_info(ctrl->ctrl.device, | |
558 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
559 | return PTR_ERR(queue->cm_id); | |
560 | } | |
561 | ||
8f4e8dac | 562 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 563 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 564 | |
0928f9b4 SG |
565 | queue->cm_error = -ETIMEDOUT; |
566 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
567 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
568 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
569 | if (ret) { | |
570 | dev_info(ctrl->ctrl.device, | |
571 | "rdma_resolve_addr failed (%d).\n", ret); | |
572 | goto out_destroy_cm_id; | |
573 | } | |
574 | ||
575 | ret = nvme_rdma_wait_for_cm(queue); | |
576 | if (ret) { | |
577 | dev_info(ctrl->ctrl.device, | |
578 | "rdma_resolve_addr wait failed (%d).\n", ret); | |
579 | goto out_destroy_cm_id; | |
580 | } | |
581 | ||
3b4ac786 | 582 | clear_bit(NVME_RDMA_Q_DELETING, &queue->flags); |
71102307 CH |
583 | set_bit(NVME_RDMA_Q_CONNECTED, &queue->flags); |
584 | ||
585 | return 0; | |
586 | ||
587 | out_destroy_cm_id: | |
f361e5a0 | 588 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
589 | rdma_destroy_id(queue->cm_id); |
590 | return ret; | |
591 | } | |
592 | ||
593 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
594 | { | |
595 | rdma_disconnect(queue->cm_id); | |
596 | ib_drain_qp(queue->qp); | |
597 | } | |
598 | ||
599 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
600 | { | |
601 | nvme_rdma_destroy_queue_ib(queue); | |
602 | rdma_destroy_id(queue->cm_id); | |
603 | } | |
604 | ||
605 | static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue) | |
606 | { | |
e89ca58f | 607 | if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags)) |
71102307 CH |
608 | return; |
609 | nvme_rdma_stop_queue(queue); | |
610 | nvme_rdma_free_queue(queue); | |
611 | } | |
612 | ||
613 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) | |
614 | { | |
615 | int i; | |
616 | ||
617 | for (i = 1; i < ctrl->queue_count; i++) | |
618 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); | |
619 | } | |
620 | ||
621 | static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl) | |
622 | { | |
623 | int i, ret = 0; | |
624 | ||
625 | for (i = 1; i < ctrl->queue_count; i++) { | |
626 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); | |
c8dbc37c SW |
627 | if (ret) { |
628 | dev_info(ctrl->ctrl.device, | |
629 | "failed to connect i/o queue: %d\n", ret); | |
630 | goto out_free_queues; | |
631 | } | |
553cd9ef | 632 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
71102307 CH |
633 | } |
634 | ||
c8dbc37c SW |
635 | return 0; |
636 | ||
637 | out_free_queues: | |
638 | nvme_rdma_free_io_queues(ctrl); | |
71102307 CH |
639 | return ret; |
640 | } | |
641 | ||
642 | static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl) | |
643 | { | |
c248c643 SG |
644 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
645 | unsigned int nr_io_queues; | |
71102307 CH |
646 | int i, ret; |
647 | ||
c248c643 SG |
648 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
649 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
650 | if (ret) | |
651 | return ret; | |
652 | ||
653 | ctrl->queue_count = nr_io_queues + 1; | |
654 | if (ctrl->queue_count < 2) | |
655 | return 0; | |
656 | ||
657 | dev_info(ctrl->ctrl.device, | |
658 | "creating %d I/O queues.\n", nr_io_queues); | |
659 | ||
71102307 | 660 | for (i = 1; i < ctrl->queue_count; i++) { |
c5af8654 JF |
661 | ret = nvme_rdma_init_queue(ctrl, i, |
662 | ctrl->ctrl.opts->queue_size); | |
71102307 CH |
663 | if (ret) { |
664 | dev_info(ctrl->ctrl.device, | |
665 | "failed to initialize i/o queue: %d\n", ret); | |
666 | goto out_free_queues; | |
667 | } | |
668 | } | |
669 | ||
670 | return 0; | |
671 | ||
672 | out_free_queues: | |
f361e5a0 | 673 | for (i--; i >= 1; i--) |
71102307 CH |
674 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
675 | ||
676 | return ret; | |
677 | } | |
678 | ||
679 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
680 | { | |
681 | nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe, | |
682 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
683 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
684 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
685 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
686 | nvme_rdma_dev_put(ctrl->device); | |
687 | } | |
688 | ||
689 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) | |
690 | { | |
691 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
692 | ||
693 | if (list_empty(&ctrl->list)) | |
694 | goto free_ctrl; | |
695 | ||
696 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
697 | list_del(&ctrl->list); | |
698 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
699 | ||
71102307 CH |
700 | kfree(ctrl->queues); |
701 | nvmf_free_options(nctrl->opts); | |
702 | free_ctrl: | |
703 | kfree(ctrl); | |
704 | } | |
705 | ||
fd8563ce SG |
706 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
707 | { | |
708 | /* If we are resetting/deleting then do nothing */ | |
709 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
710 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
711 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
712 | return; | |
713 | } | |
714 | ||
715 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
716 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
717 | ctrl->ctrl.opts->reconnect_delay); | |
718 | queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work, | |
719 | ctrl->ctrl.opts->reconnect_delay * HZ); | |
720 | } else { | |
721 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
722 | queue_work(nvme_rdma_wq, &ctrl->delete_work); | |
723 | } | |
724 | } | |
725 | ||
71102307 CH |
726 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
727 | { | |
728 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
729 | struct nvme_rdma_ctrl, reconnect_work); | |
730 | bool changed; | |
731 | int ret; | |
732 | ||
fd8563ce SG |
733 | ++ctrl->ctrl.opts->nr_reconnects; |
734 | ||
71102307 CH |
735 | if (ctrl->queue_count > 1) { |
736 | nvme_rdma_free_io_queues(ctrl); | |
737 | ||
738 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); | |
739 | if (ret) | |
740 | goto requeue; | |
741 | } | |
742 | ||
743 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
744 | ||
745 | ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set); | |
746 | if (ret) | |
747 | goto requeue; | |
748 | ||
749 | ret = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH); | |
750 | if (ret) | |
751 | goto requeue; | |
752 | ||
71102307 CH |
753 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
754 | if (ret) | |
e818a5b4 | 755 | goto requeue; |
71102307 | 756 | |
553cd9ef CH |
757 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
758 | ||
71102307 CH |
759 | ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap); |
760 | if (ret) | |
e818a5b4 | 761 | goto requeue; |
71102307 CH |
762 | |
763 | nvme_start_keep_alive(&ctrl->ctrl); | |
764 | ||
765 | if (ctrl->queue_count > 1) { | |
766 | ret = nvme_rdma_init_io_queues(ctrl); | |
767 | if (ret) | |
e818a5b4 | 768 | goto requeue; |
71102307 CH |
769 | |
770 | ret = nvme_rdma_connect_io_queues(ctrl); | |
771 | if (ret) | |
e818a5b4 | 772 | goto requeue; |
71102307 CH |
773 | } |
774 | ||
775 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
776 | WARN_ON_ONCE(!changed); | |
fd8563ce | 777 | ctrl->ctrl.opts->nr_reconnects = 0; |
71102307 | 778 | |
5f372eb3 | 779 | if (ctrl->queue_count > 1) { |
5f372eb3 | 780 | nvme_queue_scan(&ctrl->ctrl); |
3ef1b4b2 | 781 | nvme_queue_async_events(&ctrl->ctrl); |
5f372eb3 | 782 | } |
71102307 CH |
783 | |
784 | dev_info(ctrl->ctrl.device, "Successfully reconnected\n"); | |
785 | ||
786 | return; | |
787 | ||
71102307 | 788 | requeue: |
fd8563ce SG |
789 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
790 | ctrl->ctrl.opts->nr_reconnects); | |
791 | nvme_rdma_reconnect_or_remove(ctrl); | |
71102307 CH |
792 | } |
793 | ||
794 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
795 | { | |
796 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
797 | struct nvme_rdma_ctrl, err_work); | |
e89ca58f | 798 | int i; |
71102307 CH |
799 | |
800 | nvme_stop_keep_alive(&ctrl->ctrl); | |
e89ca58f | 801 | |
553cd9ef | 802 | for (i = 0; i < ctrl->queue_count; i++) { |
e89ca58f | 803 | clear_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[i].flags); |
553cd9ef CH |
804 | clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
805 | } | |
e89ca58f | 806 | |
71102307 CH |
807 | if (ctrl->queue_count > 1) |
808 | nvme_stop_queues(&ctrl->ctrl); | |
809 | blk_mq_stop_hw_queues(ctrl->ctrl.admin_q); | |
810 | ||
811 | /* We must take care of fastfail/requeue all our inflight requests */ | |
812 | if (ctrl->queue_count > 1) | |
813 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
814 | nvme_cancel_request, &ctrl->ctrl); | |
815 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
816 | nvme_cancel_request, &ctrl->ctrl); | |
817 | ||
e818a5b4 SG |
818 | /* |
819 | * queues are not a live anymore, so restart the queues to fail fast | |
820 | * new IO | |
821 | */ | |
822 | blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true); | |
823 | nvme_start_queues(&ctrl->ctrl); | |
824 | ||
fd8563ce | 825 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
826 | } |
827 | ||
828 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
829 | { | |
830 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
831 | return; | |
832 | ||
833 | queue_work(nvme_rdma_wq, &ctrl->err_work); | |
834 | } | |
835 | ||
836 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
837 | const char *op) | |
838 | { | |
839 | struct nvme_rdma_queue *queue = cq->cq_context; | |
840 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
841 | ||
842 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
843 | dev_info(ctrl->ctrl.device, | |
844 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
845 | op, wc->wr_cqe, | |
846 | ib_wc_status_msg(wc->status), wc->status); | |
847 | nvme_rdma_error_recovery(ctrl); | |
848 | } | |
849 | ||
850 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
851 | { | |
852 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
853 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
854 | } | |
855 | ||
856 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
857 | { | |
858 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
859 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); | |
860 | } | |
861 | ||
862 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
863 | struct nvme_rdma_request *req) | |
864 | { | |
865 | struct ib_send_wr *bad_wr; | |
866 | struct ib_send_wr wr = { | |
867 | .opcode = IB_WR_LOCAL_INV, | |
868 | .next = NULL, | |
869 | .num_sge = 0, | |
870 | .send_flags = 0, | |
871 | .ex.invalidate_rkey = req->mr->rkey, | |
872 | }; | |
873 | ||
874 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
875 | wr.wr_cqe = &req->reg_cqe; | |
876 | ||
877 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
878 | } | |
879 | ||
880 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
881 | struct request *rq) | |
882 | { | |
883 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
884 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
885 | struct nvme_rdma_device *dev = queue->device; | |
886 | struct ib_device *ibdev = dev->dev; | |
887 | int res; | |
888 | ||
889 | if (!blk_rq_bytes(rq)) | |
890 | return; | |
891 | ||
f5b7b559 | 892 | if (req->mr->need_inval) { |
71102307 CH |
893 | res = nvme_rdma_inv_rkey(queue, req); |
894 | if (res < 0) { | |
895 | dev_err(ctrl->ctrl.device, | |
896 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
897 | req->mr->rkey, res); | |
898 | nvme_rdma_error_recovery(queue->ctrl); | |
899 | } | |
900 | } | |
901 | ||
902 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
903 | req->nents, rq_data_dir(rq) == | |
904 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
905 | ||
906 | nvme_cleanup_cmd(rq); | |
907 | sg_free_table_chained(&req->sg_table, true); | |
908 | } | |
909 | ||
910 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
911 | { | |
912 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
913 | ||
914 | sg->addr = 0; | |
915 | put_unaligned_le24(0, sg->length); | |
916 | put_unaligned_le32(0, sg->key); | |
917 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
918 | return 0; | |
919 | } | |
920 | ||
921 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
922 | struct nvme_rdma_request *req, struct nvme_command *c) | |
923 | { | |
924 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
925 | ||
926 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
927 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
928 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
929 | ||
930 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
931 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
932 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
933 | ||
934 | req->inline_data = true; | |
935 | req->num_sge++; | |
936 | return 0; | |
937 | } | |
938 | ||
939 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
940 | struct nvme_rdma_request *req, struct nvme_command *c) | |
941 | { | |
942 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
943 | ||
944 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
945 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 946 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
947 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
948 | return 0; | |
949 | } | |
950 | ||
951 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
952 | struct nvme_rdma_request *req, struct nvme_command *c, | |
953 | int count) | |
954 | { | |
955 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
956 | int nr; | |
957 | ||
958 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE); | |
959 | if (nr < count) { | |
960 | if (nr < 0) | |
961 | return nr; | |
962 | return -EINVAL; | |
963 | } | |
964 | ||
965 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
966 | ||
967 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
968 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
969 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
970 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
971 | req->reg_wr.wr.num_sge = 0; | |
972 | req->reg_wr.mr = req->mr; | |
973 | req->reg_wr.key = req->mr->rkey; | |
974 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
975 | IB_ACCESS_REMOTE_READ | | |
976 | IB_ACCESS_REMOTE_WRITE; | |
977 | ||
f5b7b559 | 978 | req->mr->need_inval = true; |
71102307 CH |
979 | |
980 | sg->addr = cpu_to_le64(req->mr->iova); | |
981 | put_unaligned_le24(req->mr->length, sg->length); | |
982 | put_unaligned_le32(req->mr->rkey, sg->key); | |
983 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
984 | NVME_SGL_FMT_INVALIDATE; | |
985 | ||
986 | return 0; | |
987 | } | |
988 | ||
989 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 990 | struct request *rq, struct nvme_command *c) |
71102307 CH |
991 | { |
992 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
993 | struct nvme_rdma_device *dev = queue->device; | |
994 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 995 | int count, ret; |
71102307 CH |
996 | |
997 | req->num_sge = 1; | |
998 | req->inline_data = false; | |
f5b7b559 | 999 | req->mr->need_inval = false; |
71102307 CH |
1000 | |
1001 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
1002 | ||
1003 | if (!blk_rq_bytes(rq)) | |
1004 | return nvme_rdma_set_sg_null(c); | |
1005 | ||
1006 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
1007 | ret = sg_alloc_table_chained(&req->sg_table, |
1008 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
1009 | if (ret) |
1010 | return -ENOMEM; | |
1011 | ||
f9d03f96 | 1012 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 1013 | |
f9d03f96 | 1014 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
1015 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
1016 | if (unlikely(count <= 0)) { | |
1017 | sg_free_table_chained(&req->sg_table, true); | |
1018 | return -EIO; | |
1019 | } | |
1020 | ||
1021 | if (count == 1) { | |
b131c61d CH |
1022 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
1023 | blk_rq_payload_bytes(rq) <= | |
1024 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
1025 | return nvme_rdma_map_sg_inline(queue, req, c); |
1026 | ||
11975e01 | 1027 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
1028 | return nvme_rdma_map_sg_single(queue, req, c); |
1029 | } | |
1030 | ||
1031 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
1032 | } | |
1033 | ||
1034 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1035 | { | |
1036 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1037 | nvme_rdma_wr_error(cq, wc, "SEND"); | |
1038 | } | |
1039 | ||
0544f549 MR |
1040 | static inline int nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue) |
1041 | { | |
1042 | int sig_limit; | |
1043 | ||
1044 | /* | |
1045 | * We signal completion every queue depth/2 and also handle the | |
1046 | * degenerated case of a device with queue_depth=1, where we | |
1047 | * would need to signal every message. | |
1048 | */ | |
1049 | sig_limit = max(queue->queue_size / 2, 1); | |
1050 | return (++queue->sig_count % sig_limit) == 0; | |
1051 | } | |
1052 | ||
71102307 CH |
1053 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
1054 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
1055 | struct ib_send_wr *first, bool flush) | |
1056 | { | |
1057 | struct ib_send_wr wr, *bad_wr; | |
1058 | int ret; | |
1059 | ||
1060 | sge->addr = qe->dma; | |
1061 | sge->length = sizeof(struct nvme_command), | |
1062 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1063 | ||
1064 | qe->cqe.done = nvme_rdma_send_done; | |
1065 | ||
1066 | wr.next = NULL; | |
1067 | wr.wr_cqe = &qe->cqe; | |
1068 | wr.sg_list = sge; | |
1069 | wr.num_sge = num_sge; | |
1070 | wr.opcode = IB_WR_SEND; | |
1071 | wr.send_flags = 0; | |
1072 | ||
1073 | /* | |
1074 | * Unsignalled send completions are another giant desaster in the | |
1075 | * IB Verbs spec: If we don't regularly post signalled sends | |
1076 | * the send queue will fill up and only a QP reset will rescue us. | |
1077 | * Would have been way to obvious to handle this in hardware or | |
1078 | * at least the RDMA stack.. | |
1079 | * | |
71102307 CH |
1080 | * Always signal the flushes. The magic request used for the flush |
1081 | * sequencer is not allocated in our driver's tagset and it's | |
1082 | * triggered to be freed by blk_cleanup_queue(). So we need to | |
1083 | * always mark it as signaled to ensure that the "wr_cqe", which is | |
b43daedc | 1084 | * embedded in request's payload, is not freed when __ib_process_cq() |
71102307 CH |
1085 | * calls wr_cqe->done(). |
1086 | */ | |
0544f549 | 1087 | if (nvme_rdma_queue_sig_limit(queue) || flush) |
71102307 CH |
1088 | wr.send_flags |= IB_SEND_SIGNALED; |
1089 | ||
1090 | if (first) | |
1091 | first->next = ≀ | |
1092 | else | |
1093 | first = ≀ | |
1094 | ||
1095 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
1096 | if (ret) { | |
1097 | dev_err(queue->ctrl->ctrl.device, | |
1098 | "%s failed with error code %d\n", __func__, ret); | |
1099 | } | |
1100 | return ret; | |
1101 | } | |
1102 | ||
1103 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1104 | struct nvme_rdma_qe *qe) | |
1105 | { | |
1106 | struct ib_recv_wr wr, *bad_wr; | |
1107 | struct ib_sge list; | |
1108 | int ret; | |
1109 | ||
1110 | list.addr = qe->dma; | |
1111 | list.length = sizeof(struct nvme_completion); | |
1112 | list.lkey = queue->device->pd->local_dma_lkey; | |
1113 | ||
1114 | qe->cqe.done = nvme_rdma_recv_done; | |
1115 | ||
1116 | wr.next = NULL; | |
1117 | wr.wr_cqe = &qe->cqe; | |
1118 | wr.sg_list = &list; | |
1119 | wr.num_sge = 1; | |
1120 | ||
1121 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
1122 | if (ret) { | |
1123 | dev_err(queue->ctrl->ctrl.device, | |
1124 | "%s failed with error code %d\n", __func__, ret); | |
1125 | } | |
1126 | return ret; | |
1127 | } | |
1128 | ||
1129 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1130 | { | |
1131 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1132 | ||
1133 | if (queue_idx == 0) | |
1134 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1135 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1136 | } | |
1137 | ||
1138 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx) | |
1139 | { | |
1140 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1141 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1142 | struct ib_device *dev = queue->device->dev; | |
1143 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1144 | struct nvme_command *cmd = sqe->data; | |
1145 | struct ib_sge sge; | |
1146 | int ret; | |
1147 | ||
1148 | if (WARN_ON_ONCE(aer_idx != 0)) | |
1149 | return; | |
1150 | ||
1151 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); | |
1152 | ||
1153 | memset(cmd, 0, sizeof(*cmd)); | |
1154 | cmd->common.opcode = nvme_admin_async_event; | |
1155 | cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1156 | cmd->common.flags |= NVME_CMD_SGL_METABUF; | |
1157 | nvme_rdma_set_sg_null(cmd); | |
1158 | ||
1159 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), | |
1160 | DMA_TO_DEVICE); | |
1161 | ||
1162 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false); | |
1163 | WARN_ON_ONCE(ret); | |
1164 | } | |
1165 | ||
1166 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1167 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1168 | { | |
71102307 CH |
1169 | struct request *rq; |
1170 | struct nvme_rdma_request *req; | |
1171 | int ret = 0; | |
1172 | ||
71102307 CH |
1173 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1174 | if (!rq) { | |
1175 | dev_err(queue->ctrl->ctrl.device, | |
1176 | "tag 0x%x on QP %#x not found\n", | |
1177 | cqe->command_id, queue->qp->qp_num); | |
1178 | nvme_rdma_error_recovery(queue->ctrl); | |
1179 | return ret; | |
1180 | } | |
1181 | req = blk_mq_rq_to_pdu(rq); | |
1182 | ||
71102307 CH |
1183 | if (rq->tag == tag) |
1184 | ret = 1; | |
1185 | ||
1186 | if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) && | |
1187 | wc->ex.invalidate_rkey == req->mr->rkey) | |
f5b7b559 | 1188 | req->mr->need_inval = false; |
71102307 | 1189 | |
27fa9bc5 | 1190 | nvme_end_request(rq, cqe->status, cqe->result); |
71102307 CH |
1191 | return ret; |
1192 | } | |
1193 | ||
1194 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1195 | { | |
1196 | struct nvme_rdma_qe *qe = | |
1197 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1198 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1199 | struct ib_device *ibdev = queue->device->dev; | |
1200 | struct nvme_completion *cqe = qe->data; | |
1201 | const size_t len = sizeof(struct nvme_completion); | |
1202 | int ret = 0; | |
1203 | ||
1204 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1205 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1206 | return 0; | |
1207 | } | |
1208 | ||
1209 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1210 | /* | |
1211 | * AEN requests are special as they don't time out and can | |
1212 | * survive any kind of queue freeze and often don't respond to | |
1213 | * aborts. We don't even bother to allocate a struct request | |
1214 | * for them but rather special case them here. | |
1215 | */ | |
1216 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
1217 | cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH)) | |
7bf58533 CH |
1218 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1219 | &cqe->result); | |
71102307 CH |
1220 | else |
1221 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1222 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1223 | ||
1224 | nvme_rdma_post_recv(queue, qe); | |
1225 | return ret; | |
1226 | } | |
1227 | ||
1228 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1229 | { | |
1230 | __nvme_rdma_recv_done(cq, wc, -1); | |
1231 | } | |
1232 | ||
1233 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1234 | { | |
1235 | int ret, i; | |
1236 | ||
1237 | for (i = 0; i < queue->queue_size; i++) { | |
1238 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1239 | if (ret) | |
1240 | goto out_destroy_queue_ib; | |
1241 | } | |
1242 | ||
1243 | return 0; | |
1244 | ||
1245 | out_destroy_queue_ib: | |
1246 | nvme_rdma_destroy_queue_ib(queue); | |
1247 | return ret; | |
1248 | } | |
1249 | ||
1250 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1251 | struct rdma_cm_event *ev) | |
1252 | { | |
7f03953c SW |
1253 | struct rdma_cm_id *cm_id = queue->cm_id; |
1254 | int status = ev->status; | |
1255 | const char *rej_msg; | |
1256 | const struct nvme_rdma_cm_rej *rej_data; | |
1257 | u8 rej_data_len; | |
1258 | ||
1259 | rej_msg = rdma_reject_msg(cm_id, status); | |
1260 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1261 | ||
1262 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1263 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1264 | |
1265 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1266 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1267 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1268 | } else { |
1269 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1270 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1271 | } |
1272 | ||
1273 | return -ECONNRESET; | |
1274 | } | |
1275 | ||
1276 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1277 | { | |
1278 | struct nvme_rdma_device *dev; | |
1279 | int ret; | |
1280 | ||
1281 | dev = nvme_rdma_find_get_device(queue->cm_id); | |
1282 | if (!dev) { | |
92f4ae35 | 1283 | dev_err(queue->cm_id->device->dev.parent, |
71102307 CH |
1284 | "no client data found!\n"); |
1285 | return -ECONNREFUSED; | |
1286 | } | |
1287 | ||
1288 | ret = nvme_rdma_create_queue_ib(queue, dev); | |
1289 | if (ret) { | |
1290 | nvme_rdma_dev_put(dev); | |
1291 | goto out; | |
1292 | } | |
1293 | ||
1294 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1295 | if (ret) { | |
1296 | dev_err(queue->ctrl->ctrl.device, | |
1297 | "rdma_resolve_route failed (%d).\n", | |
1298 | queue->cm_error); | |
1299 | goto out_destroy_queue; | |
1300 | } | |
1301 | ||
1302 | return 0; | |
1303 | ||
1304 | out_destroy_queue: | |
1305 | nvme_rdma_destroy_queue_ib(queue); | |
1306 | out: | |
1307 | return ret; | |
1308 | } | |
1309 | ||
1310 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1311 | { | |
1312 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1313 | struct rdma_conn_param param = { }; | |
0b857b44 | 1314 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1315 | int ret; |
1316 | ||
1317 | param.qp_num = queue->qp->qp_num; | |
1318 | param.flow_control = 1; | |
1319 | ||
1320 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1321 | /* maximum retry count */ |
1322 | param.retry_count = 7; | |
71102307 CH |
1323 | param.rnr_retry_count = 7; |
1324 | param.private_data = &priv; | |
1325 | param.private_data_len = sizeof(priv); | |
1326 | ||
1327 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1328 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1329 | /* |
1330 | * set the admin queue depth to the minimum size | |
1331 | * specified by the Fabrics standard. | |
1332 | */ | |
1333 | if (priv.qid == 0) { | |
1334 | priv.hrqsize = cpu_to_le16(NVMF_AQ_DEPTH); | |
1335 | priv.hsqsize = cpu_to_le16(NVMF_AQ_DEPTH - 1); | |
1336 | } else { | |
c5af8654 JF |
1337 | /* |
1338 | * current interpretation of the fabrics spec | |
1339 | * is at minimum you make hrqsize sqsize+1, or a | |
1340 | * 1's based representation of sqsize. | |
1341 | */ | |
f994d9dc | 1342 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1343 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1344 | } |
71102307 CH |
1345 | |
1346 | ret = rdma_connect(queue->cm_id, ¶m); | |
1347 | if (ret) { | |
1348 | dev_err(ctrl->ctrl.device, | |
1349 | "rdma_connect failed (%d).\n", ret); | |
1350 | goto out_destroy_queue_ib; | |
1351 | } | |
1352 | ||
1353 | return 0; | |
1354 | ||
1355 | out_destroy_queue_ib: | |
1356 | nvme_rdma_destroy_queue_ib(queue); | |
1357 | return ret; | |
1358 | } | |
1359 | ||
71102307 CH |
1360 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1361 | struct rdma_cm_event *ev) | |
1362 | { | |
1363 | struct nvme_rdma_queue *queue = cm_id->context; | |
1364 | int cm_error = 0; | |
1365 | ||
1366 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1367 | rdma_event_msg(ev->event), ev->event, | |
1368 | ev->status, cm_id); | |
1369 | ||
1370 | switch (ev->event) { | |
1371 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1372 | cm_error = nvme_rdma_addr_resolved(queue); | |
1373 | break; | |
1374 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1375 | cm_error = nvme_rdma_route_resolved(queue); | |
1376 | break; | |
1377 | case RDMA_CM_EVENT_ESTABLISHED: | |
1378 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1379 | /* complete cm_done regardless of success/failure */ | |
1380 | complete(&queue->cm_done); | |
1381 | return 0; | |
1382 | case RDMA_CM_EVENT_REJECTED: | |
1383 | cm_error = nvme_rdma_conn_rejected(queue, ev); | |
1384 | break; | |
1385 | case RDMA_CM_EVENT_ADDR_ERROR: | |
1386 | case RDMA_CM_EVENT_ROUTE_ERROR: | |
1387 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1388 | case RDMA_CM_EVENT_UNREACHABLE: | |
1389 | dev_dbg(queue->ctrl->ctrl.device, | |
1390 | "CM error event %d\n", ev->event); | |
1391 | cm_error = -ECONNRESET; | |
1392 | break; | |
1393 | case RDMA_CM_EVENT_DISCONNECTED: | |
1394 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1395 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1396 | dev_dbg(queue->ctrl->ctrl.device, | |
1397 | "disconnect received - connection closed\n"); | |
1398 | nvme_rdma_error_recovery(queue->ctrl); | |
1399 | break; | |
1400 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1401 | /* device removal is handled via the ib_client API */ |
1402 | break; | |
71102307 CH |
1403 | default: |
1404 | dev_err(queue->ctrl->ctrl.device, | |
1405 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1406 | nvme_rdma_error_recovery(queue->ctrl); | |
1407 | break; | |
1408 | } | |
1409 | ||
1410 | if (cm_error) { | |
1411 | queue->cm_error = cm_error; | |
1412 | complete(&queue->cm_done); | |
1413 | } | |
1414 | ||
1415 | return 0; | |
1416 | } | |
1417 | ||
1418 | static enum blk_eh_timer_return | |
1419 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1420 | { | |
1421 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1422 | ||
1423 | /* queue error recovery */ | |
1424 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1425 | ||
1426 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1427 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1428 | |
1429 | return BLK_EH_HANDLED; | |
1430 | } | |
1431 | ||
553cd9ef CH |
1432 | /* |
1433 | * We cannot accept any other command until the Connect command has completed. | |
1434 | */ | |
a104c9f2 CH |
1435 | static inline blk_status_t |
1436 | nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq) | |
553cd9ef CH |
1437 | { |
1438 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { | |
1392370e | 1439 | struct nvme_command *cmd = nvme_req(rq)->cmd; |
553cd9ef | 1440 | |
57292b58 | 1441 | if (!blk_rq_is_passthrough(rq) || |
553cd9ef | 1442 | cmd->common.opcode != nvme_fabrics_command || |
e818a5b4 SG |
1443 | cmd->fabrics.fctype != nvme_fabrics_type_connect) { |
1444 | /* | |
1445 | * reconnecting state means transport disruption, which | |
1446 | * can take a long time and even might fail permanently, | |
1447 | * so we can't let incoming I/O be requeued forever. | |
1448 | * fail it fast to allow upper layers a chance to | |
1449 | * failover. | |
1450 | */ | |
1451 | if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
a104c9f2 CH |
1452 | return BLK_STS_IOERR; |
1453 | return BLK_STS_RESOURCE; /* try again later */ | |
e818a5b4 | 1454 | } |
553cd9ef CH |
1455 | } |
1456 | ||
e818a5b4 | 1457 | return 0; |
553cd9ef CH |
1458 | } |
1459 | ||
fc17b653 | 1460 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1461 | const struct blk_mq_queue_data *bd) |
1462 | { | |
1463 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1464 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1465 | struct request *rq = bd->rq; | |
1466 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1467 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1468 | struct nvme_command *c = sqe->data; | |
1469 | bool flush = false; | |
1470 | struct ib_device *dev; | |
fc17b653 CH |
1471 | blk_status_t ret; |
1472 | int err; | |
71102307 CH |
1473 | |
1474 | WARN_ON_ONCE(rq->tag < 0); | |
1475 | ||
e818a5b4 SG |
1476 | ret = nvme_rdma_queue_is_ready(queue, rq); |
1477 | if (unlikely(ret)) | |
a104c9f2 | 1478 | return ret; |
553cd9ef | 1479 | |
71102307 CH |
1480 | dev = queue->device->dev; |
1481 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1482 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1483 | ||
1484 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1485 | if (ret) |
71102307 CH |
1486 | return ret; |
1487 | ||
71102307 CH |
1488 | blk_mq_start_request(rq); |
1489 | ||
fc17b653 CH |
1490 | err = nvme_rdma_map_data(queue, rq, c); |
1491 | if (err < 0) { | |
71102307 | 1492 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1493 | "Failed to map data (%d)\n", err); |
71102307 CH |
1494 | nvme_cleanup_cmd(rq); |
1495 | goto err; | |
1496 | } | |
1497 | ||
1498 | ib_dma_sync_single_for_device(dev, sqe->dma, | |
1499 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1500 | ||
aebf526b | 1501 | if (req_op(rq) == REQ_OP_FLUSH) |
71102307 | 1502 | flush = true; |
fc17b653 | 1503 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f5b7b559 | 1504 | req->mr->need_inval ? &req->reg_wr.wr : NULL, flush); |
fc17b653 | 1505 | if (err) { |
71102307 CH |
1506 | nvme_rdma_unmap_data(queue, rq); |
1507 | goto err; | |
1508 | } | |
1509 | ||
fc17b653 | 1510 | return BLK_STS_OK; |
71102307 | 1511 | err: |
fc17b653 CH |
1512 | if (err == -ENOMEM || err == -EAGAIN) |
1513 | return BLK_STS_RESOURCE; | |
1514 | return BLK_STS_IOERR; | |
71102307 CH |
1515 | } |
1516 | ||
1517 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1518 | { | |
1519 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1520 | struct ib_cq *cq = queue->ib_cq; | |
1521 | struct ib_wc wc; | |
1522 | int found = 0; | |
1523 | ||
71102307 CH |
1524 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1525 | struct ib_cqe *cqe = wc.wr_cqe; | |
1526 | ||
1527 | if (cqe) { | |
1528 | if (cqe->done == nvme_rdma_recv_done) | |
1529 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1530 | else | |
1531 | cqe->done(cq, &wc); | |
1532 | } | |
1533 | } | |
1534 | ||
1535 | return found; | |
1536 | } | |
1537 | ||
1538 | static void nvme_rdma_complete_rq(struct request *rq) | |
1539 | { | |
1540 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1541 | |
77f02a7a CH |
1542 | nvme_rdma_unmap_data(req->queue, rq); |
1543 | nvme_complete_rq(rq); | |
71102307 CH |
1544 | } |
1545 | ||
f363b089 | 1546 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1547 | .queue_rq = nvme_rdma_queue_rq, |
1548 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1549 | .init_request = nvme_rdma_init_request, |
1550 | .exit_request = nvme_rdma_exit_request, | |
1551 | .reinit_request = nvme_rdma_reinit_request, | |
1552 | .init_hctx = nvme_rdma_init_hctx, | |
1553 | .poll = nvme_rdma_poll, | |
1554 | .timeout = nvme_rdma_timeout, | |
1555 | }; | |
1556 | ||
f363b089 | 1557 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1558 | .queue_rq = nvme_rdma_queue_rq, |
1559 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1560 | .init_request = nvme_rdma_init_admin_request, |
1561 | .exit_request = nvme_rdma_exit_admin_request, | |
1562 | .reinit_request = nvme_rdma_reinit_request, | |
1563 | .init_hctx = nvme_rdma_init_admin_hctx, | |
1564 | .timeout = nvme_rdma_timeout, | |
1565 | }; | |
1566 | ||
1567 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
1568 | { | |
1569 | int error; | |
1570 | ||
1571 | error = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH); | |
1572 | if (error) | |
1573 | return error; | |
1574 | ||
1575 | ctrl->device = ctrl->queues[0].device; | |
1576 | ||
1577 | /* | |
1578 | * We need a reference on the device as long as the tag_set is alive, | |
1579 | * as the MRs in the request structures need a valid ib_device. | |
1580 | */ | |
1581 | error = -EINVAL; | |
1582 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1583 | goto out_free_queue; | |
1584 | ||
1585 | ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS, | |
1586 | ctrl->device->dev->attrs.max_fast_reg_page_list_len); | |
1587 | ||
1588 | memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set)); | |
1589 | ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops; | |
1590 | ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1591 | ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */ | |
1592 | ctrl->admin_tag_set.numa_node = NUMA_NO_NODE; | |
1593 | ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1594 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1595 | ctrl->admin_tag_set.driver_data = ctrl; | |
1596 | ctrl->admin_tag_set.nr_hw_queues = 1; | |
1597 | ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT; | |
1598 | ||
1599 | error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set); | |
1600 | if (error) | |
1601 | goto out_put_dev; | |
1602 | ||
1603 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); | |
1604 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
1605 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
1606 | goto out_free_tagset; | |
1607 | } | |
1608 | ||
1609 | error = nvmf_connect_admin_queue(&ctrl->ctrl); | |
1610 | if (error) | |
1611 | goto out_cleanup_queue; | |
1612 | ||
553cd9ef CH |
1613 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
1614 | ||
71102307 CH |
1615 | error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap); |
1616 | if (error) { | |
1617 | dev_err(ctrl->ctrl.device, | |
1618 | "prop_get NVME_REG_CAP failed\n"); | |
1619 | goto out_cleanup_queue; | |
1620 | } | |
1621 | ||
1622 | ctrl->ctrl.sqsize = | |
1af76dda | 1623 | min_t(int, NVME_CAP_MQES(ctrl->cap), ctrl->ctrl.sqsize); |
71102307 CH |
1624 | |
1625 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap); | |
1626 | if (error) | |
1627 | goto out_cleanup_queue; | |
1628 | ||
1629 | ctrl->ctrl.max_hw_sectors = | |
1630 | (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9); | |
1631 | ||
1632 | error = nvme_init_identify(&ctrl->ctrl); | |
1633 | if (error) | |
1634 | goto out_cleanup_queue; | |
1635 | ||
1636 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
1637 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
1638 | DMA_TO_DEVICE); | |
1639 | if (error) | |
1640 | goto out_cleanup_queue; | |
1641 | ||
1642 | nvme_start_keep_alive(&ctrl->ctrl); | |
1643 | ||
1644 | return 0; | |
1645 | ||
1646 | out_cleanup_queue: | |
1647 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
1648 | out_free_tagset: | |
1649 | /* disconnect and drain the queue before freeing the tagset */ | |
1650 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
1651 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
1652 | out_put_dev: | |
1653 | nvme_rdma_dev_put(ctrl->device); | |
1654 | out_free_queue: | |
1655 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
1656 | return error; | |
1657 | } | |
1658 | ||
1659 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1660 | { | |
1661 | nvme_stop_keep_alive(&ctrl->ctrl); | |
1662 | cancel_work_sync(&ctrl->err_work); | |
1663 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1664 | ||
1665 | if (ctrl->queue_count > 1) { | |
1666 | nvme_stop_queues(&ctrl->ctrl); | |
1667 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1668 | nvme_cancel_request, &ctrl->ctrl); | |
1669 | nvme_rdma_free_io_queues(ctrl); | |
1670 | } | |
1671 | ||
45862ebc | 1672 | if (test_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[0].flags)) |
71102307 CH |
1673 | nvme_shutdown_ctrl(&ctrl->ctrl); |
1674 | ||
1675 | blk_mq_stop_hw_queues(ctrl->ctrl.admin_q); | |
1676 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
1677 | nvme_cancel_request, &ctrl->ctrl); | |
1678 | nvme_rdma_destroy_admin_queue(ctrl); | |
1679 | } | |
1680 | ||
2461a8dd SG |
1681 | static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
1682 | { | |
1683 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1684 | if (shutdown) | |
1685 | nvme_rdma_shutdown_ctrl(ctrl); | |
a34ca17a SG |
1686 | |
1687 | if (ctrl->ctrl.tagset) { | |
1688 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1689 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1690 | nvme_rdma_dev_put(ctrl->device); | |
1691 | } | |
1692 | ||
2461a8dd SG |
1693 | nvme_put_ctrl(&ctrl->ctrl); |
1694 | } | |
1695 | ||
71102307 CH |
1696 | static void nvme_rdma_del_ctrl_work(struct work_struct *work) |
1697 | { | |
1698 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1699 | struct nvme_rdma_ctrl, delete_work); | |
1700 | ||
2461a8dd | 1701 | __nvme_rdma_remove_ctrl(ctrl, true); |
71102307 CH |
1702 | } |
1703 | ||
1704 | static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1705 | { | |
1706 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING)) | |
1707 | return -EBUSY; | |
1708 | ||
1709 | if (!queue_work(nvme_rdma_wq, &ctrl->delete_work)) | |
1710 | return -EBUSY; | |
1711 | ||
1712 | return 0; | |
1713 | } | |
1714 | ||
1715 | static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl) | |
1716 | { | |
1717 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
cdbecc8d | 1718 | int ret = 0; |
71102307 | 1719 | |
cdbecc8d SW |
1720 | /* |
1721 | * Keep a reference until all work is flushed since | |
1722 | * __nvme_rdma_del_ctrl can free the ctrl mem | |
1723 | */ | |
1724 | if (!kref_get_unless_zero(&ctrl->ctrl.kref)) | |
1725 | return -EBUSY; | |
71102307 | 1726 | ret = __nvme_rdma_del_ctrl(ctrl); |
cdbecc8d SW |
1727 | if (!ret) |
1728 | flush_work(&ctrl->delete_work); | |
1729 | nvme_put_ctrl(&ctrl->ctrl); | |
1730 | return ret; | |
71102307 CH |
1731 | } |
1732 | ||
1733 | static void nvme_rdma_remove_ctrl_work(struct work_struct *work) | |
1734 | { | |
1735 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1736 | struct nvme_rdma_ctrl, delete_work); | |
1737 | ||
2461a8dd | 1738 | __nvme_rdma_remove_ctrl(ctrl, false); |
71102307 CH |
1739 | } |
1740 | ||
1741 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) | |
1742 | { | |
1743 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1744 | struct nvme_rdma_ctrl, reset_work); | |
1745 | int ret; | |
1746 | bool changed; | |
1747 | ||
1748 | nvme_rdma_shutdown_ctrl(ctrl); | |
1749 | ||
1750 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1751 | if (ret) { | |
1752 | /* ctrl is already shutdown, just remove the ctrl */ | |
1753 | INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work); | |
1754 | goto del_dead_ctrl; | |
1755 | } | |
1756 | ||
1757 | if (ctrl->queue_count > 1) { | |
1758 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); | |
1759 | if (ret) | |
1760 | goto del_dead_ctrl; | |
1761 | ||
1762 | ret = nvme_rdma_init_io_queues(ctrl); | |
1763 | if (ret) | |
1764 | goto del_dead_ctrl; | |
1765 | ||
1766 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1767 | if (ret) | |
1768 | goto del_dead_ctrl; | |
1769 | } | |
1770 | ||
1771 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1772 | WARN_ON_ONCE(!changed); | |
1773 | ||
1774 | if (ctrl->queue_count > 1) { | |
1775 | nvme_start_queues(&ctrl->ctrl); | |
1776 | nvme_queue_scan(&ctrl->ctrl); | |
3ef1b4b2 | 1777 | nvme_queue_async_events(&ctrl->ctrl); |
71102307 CH |
1778 | } |
1779 | ||
1780 | return; | |
1781 | ||
1782 | del_dead_ctrl: | |
1783 | /* Deleting this dead controller... */ | |
1784 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); | |
1785 | WARN_ON(!queue_work(nvme_rdma_wq, &ctrl->delete_work)); | |
1786 | } | |
1787 | ||
1788 | static int nvme_rdma_reset_ctrl(struct nvme_ctrl *nctrl) | |
1789 | { | |
1790 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
1791 | ||
1792 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) | |
1793 | return -EBUSY; | |
1794 | ||
1795 | if (!queue_work(nvme_rdma_wq, &ctrl->reset_work)) | |
1796 | return -EBUSY; | |
1797 | ||
1798 | flush_work(&ctrl->reset_work); | |
1799 | ||
1800 | return 0; | |
1801 | } | |
1802 | ||
1803 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { | |
1804 | .name = "rdma", | |
1805 | .module = THIS_MODULE, | |
d3d5b87d | 1806 | .flags = NVME_F_FABRICS, |
71102307 CH |
1807 | .reg_read32 = nvmf_reg_read32, |
1808 | .reg_read64 = nvmf_reg_read64, | |
1809 | .reg_write32 = nvmf_reg_write32, | |
1810 | .reset_ctrl = nvme_rdma_reset_ctrl, | |
1811 | .free_ctrl = nvme_rdma_free_ctrl, | |
1812 | .submit_async_event = nvme_rdma_submit_async_event, | |
1813 | .delete_ctrl = nvme_rdma_del_ctrl, | |
1814 | .get_subsysnqn = nvmf_get_subsysnqn, | |
1815 | .get_address = nvmf_get_address, | |
1816 | }; | |
1817 | ||
1818 | static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl) | |
1819 | { | |
71102307 CH |
1820 | int ret; |
1821 | ||
71102307 CH |
1822 | ret = nvme_rdma_init_io_queues(ctrl); |
1823 | if (ret) | |
1824 | return ret; | |
1825 | ||
1826 | /* | |
1827 | * We need a reference on the device as long as the tag_set is alive, | |
1828 | * as the MRs in the request structures need a valid ib_device. | |
1829 | */ | |
1830 | ret = -EINVAL; | |
1831 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1832 | goto out_free_io_queues; | |
1833 | ||
1834 | memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set)); | |
1835 | ctrl->tag_set.ops = &nvme_rdma_mq_ops; | |
c5af8654 | 1836 | ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size; |
71102307 CH |
1837 | ctrl->tag_set.reserved_tags = 1; /* fabric connect */ |
1838 | ctrl->tag_set.numa_node = NUMA_NO_NODE; | |
1839 | ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE; | |
1840 | ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1841 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1842 | ctrl->tag_set.driver_data = ctrl; | |
1843 | ctrl->tag_set.nr_hw_queues = ctrl->queue_count - 1; | |
1844 | ctrl->tag_set.timeout = NVME_IO_TIMEOUT; | |
1845 | ||
1846 | ret = blk_mq_alloc_tag_set(&ctrl->tag_set); | |
1847 | if (ret) | |
1848 | goto out_put_dev; | |
1849 | ctrl->ctrl.tagset = &ctrl->tag_set; | |
1850 | ||
1851 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
1852 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
1853 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
1854 | goto out_free_tag_set; | |
1855 | } | |
1856 | ||
1857 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1858 | if (ret) | |
1859 | goto out_cleanup_connect_q; | |
1860 | ||
1861 | return 0; | |
1862 | ||
1863 | out_cleanup_connect_q: | |
1864 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1865 | out_free_tag_set: | |
1866 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1867 | out_put_dev: | |
1868 | nvme_rdma_dev_put(ctrl->device); | |
1869 | out_free_io_queues: | |
1870 | nvme_rdma_free_io_queues(ctrl); | |
1871 | return ret; | |
1872 | } | |
1873 | ||
71102307 CH |
1874 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1875 | struct nvmf_ctrl_options *opts) | |
1876 | { | |
1877 | struct nvme_rdma_ctrl *ctrl; | |
1878 | int ret; | |
1879 | bool changed; | |
0928f9b4 | 1880 | char *port; |
71102307 CH |
1881 | |
1882 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1883 | if (!ctrl) | |
1884 | return ERR_PTR(-ENOMEM); | |
1885 | ctrl->ctrl.opts = opts; | |
1886 | INIT_LIST_HEAD(&ctrl->list); | |
1887 | ||
0928f9b4 SG |
1888 | if (opts->mask & NVMF_OPT_TRSVCID) |
1889 | port = opts->trsvcid; | |
1890 | else | |
1891 | port = __stringify(NVME_RDMA_IP_PORT); | |
1892 | ||
1893 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1894 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1895 | if (ret) { |
0928f9b4 | 1896 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1897 | goto out_free_ctrl; |
1898 | } | |
1899 | ||
8f4e8dac | 1900 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1901 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1902 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1903 | if (ret) { |
0928f9b4 | 1904 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1905 | opts->host_traddr); |
1906 | goto out_free_ctrl; | |
1907 | } | |
1908 | } | |
1909 | ||
71102307 CH |
1910 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1911 | 0 /* no quirks, we're perfect! */); | |
1912 | if (ret) | |
1913 | goto out_free_ctrl; | |
1914 | ||
71102307 CH |
1915 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1916 | nvme_rdma_reconnect_ctrl_work); | |
1917 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
1918 | INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work); | |
1919 | INIT_WORK(&ctrl->reset_work, nvme_rdma_reset_ctrl_work); | |
71102307 CH |
1920 | |
1921 | ctrl->queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ | |
c5af8654 | 1922 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1923 | ctrl->ctrl.kato = opts->kato; |
1924 | ||
1925 | ret = -ENOMEM; | |
1926 | ctrl->queues = kcalloc(ctrl->queue_count, sizeof(*ctrl->queues), | |
1927 | GFP_KERNEL); | |
1928 | if (!ctrl->queues) | |
1929 | goto out_uninit_ctrl; | |
1930 | ||
1931 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1932 | if (ret) | |
1933 | goto out_kfree_queues; | |
1934 | ||
1935 | /* sanity check icdoff */ | |
1936 | if (ctrl->ctrl.icdoff) { | |
1937 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
1938 | goto out_remove_admin_queue; | |
1939 | } | |
1940 | ||
1941 | /* sanity check keyed sgls */ | |
1942 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1943 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
1944 | goto out_remove_admin_queue; | |
1945 | } | |
1946 | ||
1947 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1948 | /* warn if maxcmd is lower than queue_size */ | |
1949 | dev_warn(ctrl->ctrl.device, | |
1950 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1951 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1952 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1953 | } | |
1954 | ||
76c08bf4 SJ |
1955 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1956 | /* warn if sqsize is lower than queue_size */ | |
1957 | dev_warn(ctrl->ctrl.device, | |
1958 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1959 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1960 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1961 | } | |
1962 | ||
71102307 CH |
1963 | if (opts->nr_io_queues) { |
1964 | ret = nvme_rdma_create_io_queues(ctrl); | |
1965 | if (ret) | |
1966 | goto out_remove_admin_queue; | |
1967 | } | |
1968 | ||
1969 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1970 | WARN_ON_ONCE(!changed); | |
1971 | ||
0928f9b4 | 1972 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1973 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1974 | ||
1975 | kref_get(&ctrl->ctrl.kref); | |
1976 | ||
1977 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1978 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1979 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1980 | ||
1981 | if (opts->nr_io_queues) { | |
1982 | nvme_queue_scan(&ctrl->ctrl); | |
1983 | nvme_queue_async_events(&ctrl->ctrl); | |
1984 | } | |
1985 | ||
1986 | return &ctrl->ctrl; | |
1987 | ||
1988 | out_remove_admin_queue: | |
1989 | nvme_stop_keep_alive(&ctrl->ctrl); | |
1990 | nvme_rdma_destroy_admin_queue(ctrl); | |
1991 | out_kfree_queues: | |
1992 | kfree(ctrl->queues); | |
1993 | out_uninit_ctrl: | |
1994 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1995 | nvme_put_ctrl(&ctrl->ctrl); | |
1996 | if (ret > 0) | |
1997 | ret = -EIO; | |
1998 | return ERR_PTR(ret); | |
1999 | out_free_ctrl: | |
2000 | kfree(ctrl); | |
2001 | return ERR_PTR(ret); | |
2002 | } | |
2003 | ||
2004 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
2005 | .name = "rdma", | |
2006 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 2007 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 2008 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
2009 | .create_ctrl = nvme_rdma_create_ctrl, |
2010 | }; | |
2011 | ||
e87a911f SW |
2012 | static void nvme_rdma_add_one(struct ib_device *ib_device) |
2013 | { | |
2014 | } | |
2015 | ||
2016 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) | |
2017 | { | |
2018 | struct nvme_rdma_ctrl *ctrl; | |
2019 | ||
2020 | /* Delete all controllers using this device */ | |
2021 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
2022 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
2023 | if (ctrl->device->dev != ib_device) | |
2024 | continue; | |
2025 | dev_info(ctrl->ctrl.device, | |
2026 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
2027 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
2028 | __nvme_rdma_del_ctrl(ctrl); | |
2029 | } | |
2030 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
2031 | ||
2032 | flush_workqueue(nvme_rdma_wq); | |
2033 | } | |
2034 | ||
2035 | static struct ib_client nvme_rdma_ib_client = { | |
2036 | .name = "nvme_rdma", | |
2037 | .add = nvme_rdma_add_one, | |
2038 | .remove = nvme_rdma_remove_one | |
2039 | }; | |
2040 | ||
71102307 CH |
2041 | static int __init nvme_rdma_init_module(void) |
2042 | { | |
e87a911f SW |
2043 | int ret; |
2044 | ||
71102307 CH |
2045 | nvme_rdma_wq = create_workqueue("nvme_rdma_wq"); |
2046 | if (!nvme_rdma_wq) | |
2047 | return -ENOMEM; | |
2048 | ||
e87a911f | 2049 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf SG |
2050 | if (ret) |
2051 | goto err_destroy_wq; | |
2052 | ||
2053 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
2054 | if (ret) | |
2055 | goto err_unreg_client; | |
e87a911f | 2056 | |
a56c79cf | 2057 | return 0; |
e87a911f | 2058 | |
a56c79cf SG |
2059 | err_unreg_client: |
2060 | ib_unregister_client(&nvme_rdma_ib_client); | |
2061 | err_destroy_wq: | |
2062 | destroy_workqueue(nvme_rdma_wq); | |
2063 | return ret; | |
71102307 CH |
2064 | } |
2065 | ||
2066 | static void __exit nvme_rdma_cleanup_module(void) | |
2067 | { | |
71102307 | 2068 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2069 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2070 | destroy_workqueue(nvme_rdma_wq); |
2071 | } | |
2072 | ||
2073 | module_init(nvme_rdma_init_module); | |
2074 | module_exit(nvme_rdma_cleanup_module); | |
2075 | ||
2076 | MODULE_LICENSE("GPL v2"); |