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nvme: Fix u32 overflow in the number of namespace list calculation
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CommitLineData
5d8762d5 1// SPDX-License-Identifier: GPL-2.0
71102307
CH
2/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
71102307
CH
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
71102307
CH
7#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
f41725bb 10#include <rdma/mr_pool.h>
71102307
CH
11#include <linux/err.h>
12#include <linux/string.h>
71102307
CH
13#include <linux/atomic.h>
14#include <linux/blk-mq.h>
0b36658c 15#include <linux/blk-mq-rdma.h>
71102307
CH
16#include <linux/types.h>
17#include <linux/list.h>
18#include <linux/mutex.h>
19#include <linux/scatterlist.h>
20#include <linux/nvme.h>
71102307
CH
21#include <asm/unaligned.h>
22
23#include <rdma/ib_verbs.h>
24#include <rdma/rdma_cm.h>
71102307
CH
25#include <linux/nvme-rdma.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29
30
782d820c 31#define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
71102307 32
71102307
CH
33#define NVME_RDMA_MAX_SEGMENTS 256
34
64a741c1 35#define NVME_RDMA_MAX_INLINE_SEGMENTS 4
71102307 36
71102307 37struct nvme_rdma_device {
f87c89ad
MG
38 struct ib_device *dev;
39 struct ib_pd *pd;
71102307
CH
40 struct kref ref;
41 struct list_head entry;
64a741c1 42 unsigned int num_inline_segments;
71102307
CH
43};
44
45struct nvme_rdma_qe {
46 struct ib_cqe cqe;
47 void *data;
48 u64 dma;
49};
50
51struct nvme_rdma_queue;
52struct nvme_rdma_request {
d49187e9 53 struct nvme_request req;
71102307
CH
54 struct ib_mr *mr;
55 struct nvme_rdma_qe sqe;
4af7f7ff
SG
56 union nvme_result result;
57 __le16 status;
58 refcount_t ref;
71102307
CH
59 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
60 u32 num_sge;
61 int nents;
71102307
CH
62 struct ib_reg_wr reg_wr;
63 struct ib_cqe reg_cqe;
64 struct nvme_rdma_queue *queue;
65 struct sg_table sg_table;
66 struct scatterlist first_sgl[];
67};
68
69enum nvme_rdma_queue_flags {
5013e98b
SG
70 NVME_RDMA_Q_ALLOCATED = 0,
71 NVME_RDMA_Q_LIVE = 1,
eb1bd249 72 NVME_RDMA_Q_TR_READY = 2,
71102307
CH
73};
74
75struct nvme_rdma_queue {
76 struct nvme_rdma_qe *rsp_ring;
71102307
CH
77 int queue_size;
78 size_t cmnd_capsule_len;
79 struct nvme_rdma_ctrl *ctrl;
80 struct nvme_rdma_device *device;
81 struct ib_cq *ib_cq;
82 struct ib_qp *qp;
83
84 unsigned long flags;
85 struct rdma_cm_id *cm_id;
86 int cm_error;
87 struct completion cm_done;
88};
89
90struct nvme_rdma_ctrl {
71102307
CH
91 /* read only in the hot path */
92 struct nvme_rdma_queue *queues;
71102307
CH
93
94 /* other member variables */
71102307 95 struct blk_mq_tag_set tag_set;
71102307
CH
96 struct work_struct err_work;
97
98 struct nvme_rdma_qe async_event_sqe;
99
71102307
CH
100 struct delayed_work reconnect_work;
101
102 struct list_head list;
103
104 struct blk_mq_tag_set admin_tag_set;
105 struct nvme_rdma_device *device;
106
71102307
CH
107 u32 max_fr_pages;
108
0928f9b4
SG
109 struct sockaddr_storage addr;
110 struct sockaddr_storage src_addr;
71102307
CH
111
112 struct nvme_ctrl ctrl;
64a741c1 113 bool use_inline_data;
b1064d3e 114 u32 io_queues[HCTX_MAX_TYPES];
71102307
CH
115};
116
117static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
118{
119 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
120}
121
122static LIST_HEAD(device_list);
123static DEFINE_MUTEX(device_list_mutex);
124
125static LIST_HEAD(nvme_rdma_ctrl_list);
126static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
127
71102307
CH
128/*
129 * Disabling this option makes small I/O goes faster, but is fundamentally
130 * unsafe. With it turned off we will have to register a global rkey that
131 * allows read and write access to all physical memory.
132 */
133static bool register_always = true;
134module_param(register_always, bool, 0444);
135MODULE_PARM_DESC(register_always,
136 "Use memory registration even for contiguous memory regions");
137
138static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
139 struct rdma_cm_event *event);
140static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
71102307 141
90af3512
SG
142static const struct blk_mq_ops nvme_rdma_mq_ops;
143static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
144
71102307
CH
145/* XXX: really should move to a generic header sooner or later.. */
146static inline void put_unaligned_le24(u32 val, u8 *p)
147{
148 *p++ = val;
149 *p++ = val >> 8;
150 *p++ = val >> 16;
151}
152
153static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
154{
155 return queue - queue->ctrl->queues;
156}
157
ff8519f9
SG
158static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
159{
160 return nvme_rdma_queue_idx(queue) >
b1064d3e
SG
161 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
162 queue->ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
163}
164
71102307
CH
165static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
166{
167 return queue->cmnd_capsule_len - sizeof(struct nvme_command);
168}
169
170static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
171 size_t capsule_size, enum dma_data_direction dir)
172{
173 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
174 kfree(qe->data);
175}
176
177static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 size_t capsule_size, enum dma_data_direction dir)
179{
180 qe->data = kzalloc(capsule_size, GFP_KERNEL);
181 if (!qe->data)
182 return -ENOMEM;
183
184 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
185 if (ib_dma_mapping_error(ibdev, qe->dma)) {
186 kfree(qe->data);
6344d02d 187 qe->data = NULL;
71102307
CH
188 return -ENOMEM;
189 }
190
191 return 0;
192}
193
194static void nvme_rdma_free_ring(struct ib_device *ibdev,
195 struct nvme_rdma_qe *ring, size_t ib_queue_size,
196 size_t capsule_size, enum dma_data_direction dir)
197{
198 int i;
199
200 for (i = 0; i < ib_queue_size; i++)
201 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
202 kfree(ring);
203}
204
205static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
206 size_t ib_queue_size, size_t capsule_size,
207 enum dma_data_direction dir)
208{
209 struct nvme_rdma_qe *ring;
210 int i;
211
212 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
213 if (!ring)
214 return NULL;
215
216 for (i = 0; i < ib_queue_size; i++) {
217 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
218 goto out_free_ring;
219 }
220
221 return ring;
222
223out_free_ring:
224 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
225 return NULL;
226}
227
228static void nvme_rdma_qp_event(struct ib_event *event, void *context)
229{
27a4beef
MG
230 pr_debug("QP event %s (%d)\n",
231 ib_event_msg(event->event), event->event);
232
71102307
CH
233}
234
235static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
236{
35da77d5
BVA
237 int ret;
238
239 ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
71102307 240 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
35da77d5
BVA
241 if (ret < 0)
242 return ret;
243 if (ret == 0)
244 return -ETIMEDOUT;
245 WARN_ON_ONCE(queue->cm_error > 0);
71102307
CH
246 return queue->cm_error;
247}
248
249static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
250{
251 struct nvme_rdma_device *dev = queue->device;
252 struct ib_qp_init_attr init_attr;
253 int ret;
254
255 memset(&init_attr, 0, sizeof(init_attr));
256 init_attr.event_handler = nvme_rdma_qp_event;
257 /* +1 for drain */
258 init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
259 /* +1 for drain */
260 init_attr.cap.max_recv_wr = queue->queue_size + 1;
261 init_attr.cap.max_recv_sge = 1;
64a741c1 262 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
71102307
CH
263 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
264 init_attr.qp_type = IB_QPT_RC;
265 init_attr.send_cq = queue->ib_cq;
266 init_attr.recv_cq = queue->ib_cq;
267
268 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
269
270 queue->qp = queue->cm_id->qp;
271 return ret;
272}
273
385475ee
CH
274static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
275 struct request *rq, unsigned int hctx_idx)
71102307 276{
385475ee 277 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 278 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 279 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307
CH
280 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
281 struct nvme_rdma_device *dev = queue->device;
282
71102307
CH
283 nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
284 DMA_TO_DEVICE);
285}
286
385475ee
CH
287static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
288 struct request *rq, unsigned int hctx_idx,
289 unsigned int numa_node)
71102307 290{
385475ee 291 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 293 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307
CH
294 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
295 struct nvme_rdma_device *dev = queue->device;
296 struct ib_device *ibdev = dev->dev;
297 int ret;
298
59e29ce6 299 nvme_req(rq)->ctrl = &ctrl->ctrl;
71102307
CH
300 ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
301 DMA_TO_DEVICE);
302 if (ret)
303 return ret;
304
71102307
CH
305 req->queue = queue;
306
307 return 0;
71102307
CH
308}
309
71102307
CH
310static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
311 unsigned int hctx_idx)
312{
313 struct nvme_rdma_ctrl *ctrl = data;
314 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
315
d858e5f0 316 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
71102307
CH
317
318 hctx->driver_data = queue;
319 return 0;
320}
321
322static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
323 unsigned int hctx_idx)
324{
325 struct nvme_rdma_ctrl *ctrl = data;
326 struct nvme_rdma_queue *queue = &ctrl->queues[0];
327
328 BUG_ON(hctx_idx != 0);
329
330 hctx->driver_data = queue;
331 return 0;
332}
333
334static void nvme_rdma_free_dev(struct kref *ref)
335{
336 struct nvme_rdma_device *ndev =
337 container_of(ref, struct nvme_rdma_device, ref);
338
339 mutex_lock(&device_list_mutex);
340 list_del(&ndev->entry);
341 mutex_unlock(&device_list_mutex);
342
71102307 343 ib_dealloc_pd(ndev->pd);
71102307
CH
344 kfree(ndev);
345}
346
347static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
348{
349 kref_put(&dev->ref, nvme_rdma_free_dev);
350}
351
352static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
353{
354 return kref_get_unless_zero(&dev->ref);
355}
356
357static struct nvme_rdma_device *
358nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
359{
360 struct nvme_rdma_device *ndev;
361
362 mutex_lock(&device_list_mutex);
363 list_for_each_entry(ndev, &device_list, entry) {
364 if (ndev->dev->node_guid == cm_id->device->node_guid &&
365 nvme_rdma_dev_get(ndev))
366 goto out_unlock;
367 }
368
369 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
370 if (!ndev)
371 goto out_err;
372
373 ndev->dev = cm_id->device;
374 kref_init(&ndev->ref);
375
11975e01
CH
376 ndev->pd = ib_alloc_pd(ndev->dev,
377 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
71102307
CH
378 if (IS_ERR(ndev->pd))
379 goto out_free_dev;
380
71102307
CH
381 if (!(ndev->dev->attrs.device_cap_flags &
382 IB_DEVICE_MEM_MGT_EXTENSIONS)) {
383 dev_err(&ndev->dev->dev,
384 "Memory registrations not supported.\n");
11975e01 385 goto out_free_pd;
71102307
CH
386 }
387
64a741c1 388 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
0a3173a5 389 ndev->dev->attrs.max_send_sge - 1);
71102307
CH
390 list_add(&ndev->entry, &device_list);
391out_unlock:
392 mutex_unlock(&device_list_mutex);
393 return ndev;
394
71102307
CH
395out_free_pd:
396 ib_dealloc_pd(ndev->pd);
397out_free_dev:
398 kfree(ndev);
399out_err:
400 mutex_unlock(&device_list_mutex);
401 return NULL;
402}
403
404static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
405{
eb1bd249
MG
406 struct nvme_rdma_device *dev;
407 struct ib_device *ibdev;
408
409 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
410 return;
411
412 dev = queue->device;
413 ibdev = dev->dev;
71102307 414
f41725bb
IR
415 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
416
eb1bd249
MG
417 /*
418 * The cm_id object might have been destroyed during RDMA connection
419 * establishment error flow to avoid getting other cma events, thus
420 * the destruction of the QP shouldn't use rdma_cm API.
421 */
422 ib_destroy_qp(queue->qp);
71102307
CH
423 ib_free_cq(queue->ib_cq);
424
425 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
426 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
427
428 nvme_rdma_dev_put(dev);
429}
430
f41725bb
IR
431static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
432{
433 return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
434 ibdev->attrs.max_fast_reg_page_list_len);
435}
436
ca6e95bb 437static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
71102307 438{
ca6e95bb 439 struct ib_device *ibdev;
71102307
CH
440 const int send_wr_factor = 3; /* MR, SEND, INV */
441 const int cq_factor = send_wr_factor + 1; /* + RECV */
442 int comp_vector, idx = nvme_rdma_queue_idx(queue);
ff8519f9 443 enum ib_poll_context poll_ctx;
71102307
CH
444 int ret;
445
ca6e95bb
SG
446 queue->device = nvme_rdma_find_get_device(queue->cm_id);
447 if (!queue->device) {
448 dev_err(queue->cm_id->device->dev.parent,
449 "no client data found!\n");
450 return -ECONNREFUSED;
451 }
452 ibdev = queue->device->dev;
71102307
CH
453
454 /*
0b36658c
SG
455 * Spread I/O queues completion vectors according their queue index.
456 * Admin queues can always go on completion vector 0.
71102307 457 */
0b36658c 458 comp_vector = idx == 0 ? idx : idx - 1;
71102307 459
ff8519f9
SG
460 /* Polling queues need direct cq polling context */
461 if (nvme_rdma_poll_queue(queue))
462 poll_ctx = IB_POLL_DIRECT;
463 else
464 poll_ctx = IB_POLL_SOFTIRQ;
465
71102307 466 /* +1 for ib_stop_cq */
ca6e95bb
SG
467 queue->ib_cq = ib_alloc_cq(ibdev, queue,
468 cq_factor * queue->queue_size + 1,
ff8519f9 469 comp_vector, poll_ctx);
71102307
CH
470 if (IS_ERR(queue->ib_cq)) {
471 ret = PTR_ERR(queue->ib_cq);
ca6e95bb 472 goto out_put_dev;
71102307
CH
473 }
474
475 ret = nvme_rdma_create_qp(queue, send_wr_factor);
476 if (ret)
477 goto out_destroy_ib_cq;
478
479 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
480 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
481 if (!queue->rsp_ring) {
482 ret = -ENOMEM;
483 goto out_destroy_qp;
484 }
485
f41725bb
IR
486 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
487 queue->queue_size,
488 IB_MR_TYPE_MEM_REG,
489 nvme_rdma_get_max_fr_pages(ibdev));
490 if (ret) {
491 dev_err(queue->ctrl->ctrl.device,
492 "failed to initialize MR pool sized %d for QID %d\n",
493 queue->queue_size, idx);
494 goto out_destroy_ring;
495 }
496
eb1bd249
MG
497 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
498
71102307
CH
499 return 0;
500
f41725bb
IR
501out_destroy_ring:
502 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
503 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
71102307 504out_destroy_qp:
1f61def9 505 rdma_destroy_qp(queue->cm_id);
71102307
CH
506out_destroy_ib_cq:
507 ib_free_cq(queue->ib_cq);
ca6e95bb
SG
508out_put_dev:
509 nvme_rdma_dev_put(queue->device);
71102307
CH
510 return ret;
511}
512
41e8cfa1 513static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
71102307
CH
514 int idx, size_t queue_size)
515{
516 struct nvme_rdma_queue *queue;
8f4e8dac 517 struct sockaddr *src_addr = NULL;
71102307
CH
518 int ret;
519
520 queue = &ctrl->queues[idx];
521 queue->ctrl = ctrl;
522 init_completion(&queue->cm_done);
523
524 if (idx > 0)
525 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
526 else
527 queue->cmnd_capsule_len = sizeof(struct nvme_command);
528
529 queue->queue_size = queue_size;
530
531 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
532 RDMA_PS_TCP, IB_QPT_RC);
533 if (IS_ERR(queue->cm_id)) {
534 dev_info(ctrl->ctrl.device,
535 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
536 return PTR_ERR(queue->cm_id);
537 }
538
8f4e8dac 539 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
0928f9b4 540 src_addr = (struct sockaddr *)&ctrl->src_addr;
8f4e8dac 541
0928f9b4
SG
542 queue->cm_error = -ETIMEDOUT;
543 ret = rdma_resolve_addr(queue->cm_id, src_addr,
544 (struct sockaddr *)&ctrl->addr,
71102307
CH
545 NVME_RDMA_CONNECT_TIMEOUT_MS);
546 if (ret) {
547 dev_info(ctrl->ctrl.device,
548 "rdma_resolve_addr failed (%d).\n", ret);
549 goto out_destroy_cm_id;
550 }
551
552 ret = nvme_rdma_wait_for_cm(queue);
553 if (ret) {
554 dev_info(ctrl->ctrl.device,
d8bfceeb 555 "rdma connection establishment failed (%d)\n", ret);
71102307
CH
556 goto out_destroy_cm_id;
557 }
558
5013e98b 559 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
71102307
CH
560
561 return 0;
562
563out_destroy_cm_id:
564 rdma_destroy_id(queue->cm_id);
eb1bd249 565 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
566 return ret;
567}
568
569static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
570{
a57bd541
SG
571 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
572 return;
573
71102307
CH
574 rdma_disconnect(queue->cm_id);
575 ib_drain_qp(queue->qp);
576}
577
578static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
579{
5013e98b 580 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
a57bd541
SG
581 return;
582
71102307
CH
583 nvme_rdma_destroy_queue_ib(queue);
584 rdma_destroy_id(queue->cm_id);
585}
586
a57bd541 587static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 588{
a57bd541
SG
589 int i;
590
591 for (i = 1; i < ctrl->ctrl.queue_count; i++)
592 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
593}
594
a57bd541 595static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
596{
597 int i;
598
d858e5f0 599 for (i = 1; i < ctrl->ctrl.queue_count; i++)
a57bd541 600 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
601}
602
68e16fcf
SG
603static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
604{
ff8519f9
SG
605 struct nvme_rdma_queue *queue = &ctrl->queues[idx];
606 bool poll = nvme_rdma_poll_queue(queue);
68e16fcf
SG
607 int ret;
608
609 if (idx)
ff8519f9 610 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
68e16fcf
SG
611 else
612 ret = nvmf_connect_admin_queue(&ctrl->ctrl);
613
614 if (!ret)
ff8519f9 615 set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
68e16fcf
SG
616 else
617 dev_info(ctrl->ctrl.device,
618 "failed to connect queue: %d ret=%d\n", idx, ret);
619 return ret;
620}
621
622static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
623{
624 int i, ret = 0;
625
d858e5f0 626 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
68e16fcf
SG
627 ret = nvme_rdma_start_queue(ctrl, i);
628 if (ret)
a57bd541 629 goto out_stop_queues;
71102307
CH
630 }
631
c8dbc37c
SW
632 return 0;
633
a57bd541 634out_stop_queues:
68e16fcf
SG
635 for (i--; i >= 1; i--)
636 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
637 return ret;
638}
639
41e8cfa1 640static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 641{
c248c643 642 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 643 struct ib_device *ibdev = ctrl->device->dev;
5651cd3c
SG
644 unsigned int nr_io_queues, nr_default_queues;
645 unsigned int nr_read_queues, nr_poll_queues;
71102307
CH
646 int i, ret;
647
5651cd3c
SG
648 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
649 min(opts->nr_io_queues, num_online_cpus()));
650 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors,
651 min(opts->nr_write_queues, num_online_cpus()));
652 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
653 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
b65bb777 654
c248c643
SG
655 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
656 if (ret)
657 return ret;
658
d858e5f0
SG
659 ctrl->ctrl.queue_count = nr_io_queues + 1;
660 if (ctrl->ctrl.queue_count < 2)
c248c643
SG
661 return 0;
662
663 dev_info(ctrl->ctrl.device,
664 "creating %d I/O queues.\n", nr_io_queues);
665
5651cd3c
SG
666 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
667 /*
668 * separate read/write queues
669 * hand out dedicated default queues only after we have
670 * sufficient read queues.
671 */
672 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
673 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
674 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
675 min(nr_default_queues, nr_io_queues);
676 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
677 } else {
678 /*
679 * shared read/write queues
680 * either no write queues were requested, or we don't have
681 * sufficient queue count to have dedicated default queues.
682 */
683 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
684 min(nr_read_queues, nr_io_queues);
685 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
686 }
687
688 if (opts->nr_poll_queues && nr_io_queues) {
689 /* map dedicated poll queues only if we have queues left */
690 ctrl->io_queues[HCTX_TYPE_POLL] =
691 min(nr_poll_queues, nr_io_queues);
692 }
693
d858e5f0 694 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
41e8cfa1
SG
695 ret = nvme_rdma_alloc_queue(ctrl, i,
696 ctrl->ctrl.sqsize + 1);
697 if (ret)
71102307 698 goto out_free_queues;
71102307
CH
699 }
700
701 return 0;
702
703out_free_queues:
f361e5a0 704 for (i--; i >= 1; i--)
a57bd541 705 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
706
707 return ret;
708}
709
b28a308e
SG
710static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
711 bool admin)
712{
713 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
714 struct blk_mq_tag_set *set;
715 int ret;
716
717 if (admin) {
718 set = &ctrl->admin_tag_set;
719 memset(set, 0, sizeof(*set));
720 set->ops = &nvme_rdma_admin_mq_ops;
38dabe21 721 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
b28a308e 722 set->reserved_tags = 2; /* connect + keep-alive */
103e515e 723 set->numa_node = nctrl->numa_node;
b28a308e
SG
724 set->cmd_size = sizeof(struct nvme_rdma_request) +
725 SG_CHUNK_SIZE * sizeof(struct scatterlist);
726 set->driver_data = ctrl;
727 set->nr_hw_queues = 1;
728 set->timeout = ADMIN_TIMEOUT;
94f29d4f 729 set->flags = BLK_MQ_F_NO_SCHED;
b28a308e
SG
730 } else {
731 set = &ctrl->tag_set;
732 memset(set, 0, sizeof(*set));
733 set->ops = &nvme_rdma_mq_ops;
5e77d61c 734 set->queue_depth = nctrl->sqsize + 1;
b28a308e 735 set->reserved_tags = 1; /* fabric connect */
103e515e 736 set->numa_node = nctrl->numa_node;
b28a308e
SG
737 set->flags = BLK_MQ_F_SHOULD_MERGE;
738 set->cmd_size = sizeof(struct nvme_rdma_request) +
739 SG_CHUNK_SIZE * sizeof(struct scatterlist);
740 set->driver_data = ctrl;
741 set->nr_hw_queues = nctrl->queue_count - 1;
742 set->timeout = NVME_IO_TIMEOUT;
ff8519f9 743 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
b28a308e
SG
744 }
745
746 ret = blk_mq_alloc_tag_set(set);
747 if (ret)
87fd1253 748 return ERR_PTR(ret);
b28a308e
SG
749
750 return set;
b28a308e
SG
751}
752
3f02fffb
SG
753static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
754 bool remove)
71102307 755{
3f02fffb
SG
756 if (remove) {
757 blk_cleanup_queue(ctrl->ctrl.admin_q);
87fd1253 758 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
3f02fffb 759 }
682630f0
SG
760 if (ctrl->async_event_sqe.data) {
761 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
762 sizeof(struct nvme_command), DMA_TO_DEVICE);
763 ctrl->async_event_sqe.data = NULL;
764 }
a57bd541 765 nvme_rdma_free_queue(&ctrl->queues[0]);
71102307
CH
766}
767
3f02fffb
SG
768static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
769 bool new)
90af3512
SG
770{
771 int error;
772
41e8cfa1 773 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
90af3512
SG
774 if (error)
775 return error;
776
777 ctrl->device = ctrl->queues[0].device;
103e515e 778 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device);
90af3512 779
f41725bb 780 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
90af3512 781
94e42213
SG
782 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
783 sizeof(struct nvme_command), DMA_TO_DEVICE);
784 if (error)
785 goto out_free_queue;
786
3f02fffb
SG
787 if (new) {
788 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
f04b9cc8
SG
789 if (IS_ERR(ctrl->ctrl.admin_tagset)) {
790 error = PTR_ERR(ctrl->ctrl.admin_tagset);
94e42213 791 goto out_free_async_qe;
f04b9cc8 792 }
90af3512 793
3f02fffb
SG
794 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
795 if (IS_ERR(ctrl->ctrl.admin_q)) {
796 error = PTR_ERR(ctrl->ctrl.admin_q);
797 goto out_free_tagset;
798 }
90af3512
SG
799 }
800
68e16fcf 801 error = nvme_rdma_start_queue(ctrl, 0);
90af3512
SG
802 if (error)
803 goto out_cleanup_queue;
804
09fdc23b 805 error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP,
90af3512
SG
806 &ctrl->ctrl.cap);
807 if (error) {
808 dev_err(ctrl->ctrl.device,
809 "prop_get NVME_REG_CAP failed\n");
2e050f00 810 goto out_stop_queue;
90af3512
SG
811 }
812
813 ctrl->ctrl.sqsize =
814 min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);
815
816 error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
817 if (error)
2e050f00 818 goto out_stop_queue;
90af3512
SG
819
820 ctrl->ctrl.max_hw_sectors =
126e76ff 821 (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
90af3512
SG
822
823 error = nvme_init_identify(&ctrl->ctrl);
824 if (error)
2e050f00 825 goto out_stop_queue;
90af3512 826
90af3512
SG
827 return 0;
828
2e050f00
JW
829out_stop_queue:
830 nvme_rdma_stop_queue(&ctrl->queues[0]);
90af3512 831out_cleanup_queue:
3f02fffb
SG
832 if (new)
833 blk_cleanup_queue(ctrl->ctrl.admin_q);
90af3512 834out_free_tagset:
3f02fffb 835 if (new)
87fd1253 836 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
94e42213
SG
837out_free_async_qe:
838 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
839 sizeof(struct nvme_command), DMA_TO_DEVICE);
6344d02d 840 ctrl->async_event_sqe.data = NULL;
90af3512
SG
841out_free_queue:
842 nvme_rdma_free_queue(&ctrl->queues[0]);
843 return error;
844}
845
a57bd541
SG
846static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
847 bool remove)
848{
a57bd541
SG
849 if (remove) {
850 blk_cleanup_queue(ctrl->ctrl.connect_q);
87fd1253 851 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
852 }
853 nvme_rdma_free_io_queues(ctrl);
854}
855
856static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
857{
858 int ret;
859
41e8cfa1 860 ret = nvme_rdma_alloc_io_queues(ctrl);
a57bd541
SG
861 if (ret)
862 return ret;
863
864 if (new) {
865 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
f04b9cc8
SG
866 if (IS_ERR(ctrl->ctrl.tagset)) {
867 ret = PTR_ERR(ctrl->ctrl.tagset);
a57bd541 868 goto out_free_io_queues;
f04b9cc8 869 }
a57bd541
SG
870
871 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
872 if (IS_ERR(ctrl->ctrl.connect_q)) {
873 ret = PTR_ERR(ctrl->ctrl.connect_q);
874 goto out_free_tag_set;
875 }
876 } else {
a57bd541
SG
877 blk_mq_update_nr_hw_queues(&ctrl->tag_set,
878 ctrl->ctrl.queue_count - 1);
879 }
880
68e16fcf 881 ret = nvme_rdma_start_io_queues(ctrl);
a57bd541
SG
882 if (ret)
883 goto out_cleanup_connect_q;
884
885 return 0;
886
887out_cleanup_connect_q:
888 if (new)
889 blk_cleanup_queue(ctrl->ctrl.connect_q);
890out_free_tag_set:
891 if (new)
87fd1253 892 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
893out_free_io_queues:
894 nvme_rdma_free_io_queues(ctrl);
895 return ret;
71102307
CH
896}
897
75862c72
SG
898static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
899 bool remove)
900{
901 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
902 nvme_rdma_stop_queue(&ctrl->queues[0]);
1007709d
SG
903 if (ctrl->ctrl.admin_tagset)
904 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset,
905 nvme_cancel_request, &ctrl->ctrl);
75862c72
SG
906 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
907 nvme_rdma_destroy_admin_queue(ctrl, remove);
908}
909
910static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
911 bool remove)
912{
913 if (ctrl->ctrl.queue_count > 1) {
914 nvme_stop_queues(&ctrl->ctrl);
915 nvme_rdma_stop_io_queues(ctrl);
1007709d
SG
916 if (ctrl->ctrl.tagset)
917 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset,
918 nvme_cancel_request, &ctrl->ctrl);
75862c72
SG
919 if (remove)
920 nvme_start_queues(&ctrl->ctrl);
921 nvme_rdma_destroy_io_queues(ctrl, remove);
922 }
923}
924
71102307
CH
925static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
926{
927 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
928
929 if (list_empty(&ctrl->list))
930 goto free_ctrl;
931
932 mutex_lock(&nvme_rdma_ctrl_mutex);
933 list_del(&ctrl->list);
934 mutex_unlock(&nvme_rdma_ctrl_mutex);
935
71102307
CH
936 nvmf_free_options(nctrl->opts);
937free_ctrl:
3d064101 938 kfree(ctrl->queues);
71102307
CH
939 kfree(ctrl);
940}
941
fd8563ce
SG
942static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
943{
944 /* If we are resetting/deleting then do nothing */
ad6a0a52 945 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
fd8563ce
SG
946 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
947 ctrl->ctrl.state == NVME_CTRL_LIVE);
948 return;
949 }
950
951 if (nvmf_should_reconnect(&ctrl->ctrl)) {
952 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
953 ctrl->ctrl.opts->reconnect_delay);
9a6327d2 954 queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
fd8563ce
SG
955 ctrl->ctrl.opts->reconnect_delay * HZ);
956 } else {
12fa1304 957 nvme_delete_ctrl(&ctrl->ctrl);
fd8563ce
SG
958 }
959}
960
c66e2998 961static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
71102307 962{
c66e2998 963 int ret = -EINVAL;
71102307 964 bool changed;
71102307 965
c66e2998 966 ret = nvme_rdma_configure_admin_queue(ctrl, new);
71102307 967 if (ret)
c66e2998
SG
968 return ret;
969
970 if (ctrl->ctrl.icdoff) {
971 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
972 goto destroy_admin;
973 }
974
975 if (!(ctrl->ctrl.sgls & (1 << 2))) {
976 dev_err(ctrl->ctrl.device,
977 "Mandatory keyed sgls are not supported!\n");
978 goto destroy_admin;
979 }
980
981 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
982 dev_warn(ctrl->ctrl.device,
983 "queue_size %zu > ctrl sqsize %u, clamping down\n",
984 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
985 }
986
987 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
988 dev_warn(ctrl->ctrl.device,
989 "sqsize %u > ctrl maxcmd %u, clamping down\n",
990 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
991 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
992 }
71102307 993
64a741c1
SW
994 if (ctrl->ctrl.sgls & (1 << 20))
995 ctrl->use_inline_data = true;
71102307 996
d858e5f0 997 if (ctrl->ctrl.queue_count > 1) {
c66e2998 998 ret = nvme_rdma_configure_io_queues(ctrl, new);
71102307 999 if (ret)
5e1fe61d 1000 goto destroy_admin;
71102307
CH
1001 }
1002
1003 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
0a960afd
SG
1004 if (!changed) {
1005 /* state change failure is ok if we're in DELETING state */
1006 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
c66e2998
SG
1007 ret = -EINVAL;
1008 goto destroy_io;
0a960afd
SG
1009 }
1010
d09f2b45 1011 nvme_start_ctrl(&ctrl->ctrl);
c66e2998
SG
1012 return 0;
1013
1014destroy_io:
1015 if (ctrl->ctrl.queue_count > 1)
1016 nvme_rdma_destroy_io_queues(ctrl, new);
1017destroy_admin:
1018 nvme_rdma_stop_queue(&ctrl->queues[0]);
1019 nvme_rdma_destroy_admin_queue(ctrl, new);
1020 return ret;
1021}
1022
1023static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1024{
1025 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1026 struct nvme_rdma_ctrl, reconnect_work);
1027
1028 ++ctrl->ctrl.nr_reconnects;
1029
1030 if (nvme_rdma_setup_ctrl(ctrl, false))
1031 goto requeue;
71102307 1032
5e1fe61d
SG
1033 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1034 ctrl->ctrl.nr_reconnects);
1035
1036 ctrl->ctrl.nr_reconnects = 0;
71102307
CH
1037
1038 return;
1039
71102307 1040requeue:
fd8563ce 1041 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
fdf9dfa8 1042 ctrl->ctrl.nr_reconnects);
fd8563ce 1043 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1044}
1045
1046static void nvme_rdma_error_recovery_work(struct work_struct *work)
1047{
1048 struct nvme_rdma_ctrl *ctrl = container_of(work,
1049 struct nvme_rdma_ctrl, err_work);
1050
e4d753d7 1051 nvme_stop_keep_alive(&ctrl->ctrl);
75862c72 1052 nvme_rdma_teardown_io_queues(ctrl, false);
e818a5b4 1053 nvme_start_queues(&ctrl->ctrl);
75862c72 1054 nvme_rdma_teardown_admin_queue(ctrl, false);
e818a5b4 1055
ad6a0a52 1056 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
187c0832
NC
1057 /* state change failure is ok if we're in DELETING state */
1058 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
d5bf4b7f
SG
1059 return;
1060 }
1061
fd8563ce 1062 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1063}
1064
1065static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1066{
d5bf4b7f 1067 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
71102307
CH
1068 return;
1069
9a6327d2 1070 queue_work(nvme_wq, &ctrl->err_work);
71102307
CH
1071}
1072
1073static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1074 const char *op)
1075{
1076 struct nvme_rdma_queue *queue = cq->cq_context;
1077 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1078
1079 if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1080 dev_info(ctrl->ctrl.device,
1081 "%s for CQE 0x%p failed with status %s (%d)\n",
1082 op, wc->wr_cqe,
1083 ib_wc_status_msg(wc->status), wc->status);
1084 nvme_rdma_error_recovery(ctrl);
1085}
1086
1087static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1088{
1089 if (unlikely(wc->status != IB_WC_SUCCESS))
1090 nvme_rdma_wr_error(cq, wc, "MEMREG");
1091}
1092
1093static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1094{
2f122e4f
SG
1095 struct nvme_rdma_request *req =
1096 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1097 struct request *rq = blk_mq_rq_from_pdu(req);
1098
1099 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1100 nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
2f122e4f
SG
1101 return;
1102 }
1103
1104 if (refcount_dec_and_test(&req->ref))
1105 nvme_end_request(rq, req->status, req->result);
1106
71102307
CH
1107}
1108
1109static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1110 struct nvme_rdma_request *req)
1111{
71102307
CH
1112 struct ib_send_wr wr = {
1113 .opcode = IB_WR_LOCAL_INV,
1114 .next = NULL,
1115 .num_sge = 0,
2f122e4f 1116 .send_flags = IB_SEND_SIGNALED,
71102307
CH
1117 .ex.invalidate_rkey = req->mr->rkey,
1118 };
1119
1120 req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1121 wr.wr_cqe = &req->reg_cqe;
1122
45e3cc1a 1123 return ib_post_send(queue->qp, &wr, NULL);
71102307
CH
1124}
1125
1126static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1127 struct request *rq)
1128{
1129 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307
CH
1130 struct nvme_rdma_device *dev = queue->device;
1131 struct ib_device *ibdev = dev->dev;
71102307 1132
34e08191 1133 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1134 return;
1135
f41725bb
IR
1136 if (req->mr) {
1137 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1138 req->mr = NULL;
1139 }
1140
71102307
CH
1141 ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
1142 req->nents, rq_data_dir(rq) ==
1143 WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1144
1145 nvme_cleanup_cmd(rq);
1146 sg_free_table_chained(&req->sg_table, true);
1147}
1148
1149static int nvme_rdma_set_sg_null(struct nvme_command *c)
1150{
1151 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1152
1153 sg->addr = 0;
1154 put_unaligned_le24(0, sg->length);
1155 put_unaligned_le32(0, sg->key);
1156 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1157 return 0;
1158}
1159
1160static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
64a741c1
SW
1161 struct nvme_rdma_request *req, struct nvme_command *c,
1162 int count)
71102307
CH
1163{
1164 struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
64a741c1
SW
1165 struct scatterlist *sgl = req->sg_table.sgl;
1166 struct ib_sge *sge = &req->sge[1];
1167 u32 len = 0;
1168 int i;
71102307 1169
64a741c1
SW
1170 for (i = 0; i < count; i++, sgl++, sge++) {
1171 sge->addr = sg_dma_address(sgl);
1172 sge->length = sg_dma_len(sgl);
1173 sge->lkey = queue->device->pd->local_dma_lkey;
1174 len += sge->length;
1175 }
71102307
CH
1176
1177 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
64a741c1 1178 sg->length = cpu_to_le32(len);
71102307
CH
1179 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1180
64a741c1 1181 req->num_sge += count;
71102307
CH
1182 return 0;
1183}
1184
1185static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1186 struct nvme_rdma_request *req, struct nvme_command *c)
1187{
1188 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1189
1190 sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
1191 put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
11975e01 1192 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
71102307
CH
1193 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1194 return 0;
1195}
1196
1197static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1198 struct nvme_rdma_request *req, struct nvme_command *c,
1199 int count)
1200{
1201 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1202 int nr;
1203
f41725bb
IR
1204 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1205 if (WARN_ON_ONCE(!req->mr))
1206 return -EAGAIN;
1207
b925a2dc
MG
1208 /*
1209 * Align the MR to a 4K page size to match the ctrl page size and
1210 * the block virtual boundary.
1211 */
1212 nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
a7b7c7a1 1213 if (unlikely(nr < count)) {
f41725bb
IR
1214 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1215 req->mr = NULL;
71102307
CH
1216 if (nr < 0)
1217 return nr;
1218 return -EINVAL;
1219 }
1220
1221 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1222
1223 req->reg_cqe.done = nvme_rdma_memreg_done;
1224 memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1225 req->reg_wr.wr.opcode = IB_WR_REG_MR;
1226 req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1227 req->reg_wr.wr.num_sge = 0;
1228 req->reg_wr.mr = req->mr;
1229 req->reg_wr.key = req->mr->rkey;
1230 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1231 IB_ACCESS_REMOTE_READ |
1232 IB_ACCESS_REMOTE_WRITE;
1233
71102307
CH
1234 sg->addr = cpu_to_le64(req->mr->iova);
1235 put_unaligned_le24(req->mr->length, sg->length);
1236 put_unaligned_le32(req->mr->rkey, sg->key);
1237 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1238 NVME_SGL_FMT_INVALIDATE;
1239
1240 return 0;
1241}
1242
1243static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
b131c61d 1244 struct request *rq, struct nvme_command *c)
71102307
CH
1245{
1246 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1247 struct nvme_rdma_device *dev = queue->device;
1248 struct ib_device *ibdev = dev->dev;
f9d03f96 1249 int count, ret;
71102307
CH
1250
1251 req->num_sge = 1;
4af7f7ff 1252 refcount_set(&req->ref, 2); /* send and recv completions */
71102307
CH
1253
1254 c->common.flags |= NVME_CMD_SGL_METABUF;
1255
34e08191 1256 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1257 return nvme_rdma_set_sg_null(c);
1258
1259 req->sg_table.sgl = req->first_sgl;
f9d03f96
CH
1260 ret = sg_alloc_table_chained(&req->sg_table,
1261 blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
71102307
CH
1262 if (ret)
1263 return -ENOMEM;
1264
f9d03f96 1265 req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
71102307 1266
f9d03f96 1267 count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
71102307
CH
1268 rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1269 if (unlikely(count <= 0)) {
94423a8f
MG
1270 ret = -EIO;
1271 goto out_free_table;
71102307
CH
1272 }
1273
64a741c1 1274 if (count <= dev->num_inline_segments) {
b131c61d 1275 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
64a741c1 1276 queue->ctrl->use_inline_data &&
b131c61d 1277 blk_rq_payload_bytes(rq) <=
94423a8f 1278 nvme_rdma_inline_data_size(queue)) {
64a741c1 1279 ret = nvme_rdma_map_sg_inline(queue, req, c, count);
94423a8f
MG
1280 goto out;
1281 }
71102307 1282
64a741c1 1283 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
94423a8f
MG
1284 ret = nvme_rdma_map_sg_single(queue, req, c);
1285 goto out;
1286 }
71102307
CH
1287 }
1288
94423a8f
MG
1289 ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1290out:
1291 if (unlikely(ret))
1292 goto out_unmap_sg;
1293
1294 return 0;
1295
1296out_unmap_sg:
1297 ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
1298 req->nents, rq_data_dir(rq) ==
1299 WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1300out_free_table:
1301 sg_free_table_chained(&req->sg_table, true);
1302 return ret;
71102307
CH
1303}
1304
1305static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1306{
4af7f7ff
SG
1307 struct nvme_rdma_qe *qe =
1308 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1309 struct nvme_rdma_request *req =
1310 container_of(qe, struct nvme_rdma_request, sqe);
1311 struct request *rq = blk_mq_rq_from_pdu(req);
1312
1313 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1314 nvme_rdma_wr_error(cq, wc, "SEND");
4af7f7ff
SG
1315 return;
1316 }
1317
1318 if (refcount_dec_and_test(&req->ref))
1319 nvme_end_request(rq, req->status, req->result);
71102307
CH
1320}
1321
1322static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1323 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
b4b591c8 1324 struct ib_send_wr *first)
71102307 1325{
45e3cc1a 1326 struct ib_send_wr wr;
71102307
CH
1327 int ret;
1328
1329 sge->addr = qe->dma;
1330 sge->length = sizeof(struct nvme_command),
1331 sge->lkey = queue->device->pd->local_dma_lkey;
1332
71102307
CH
1333 wr.next = NULL;
1334 wr.wr_cqe = &qe->cqe;
1335 wr.sg_list = sge;
1336 wr.num_sge = num_sge;
1337 wr.opcode = IB_WR_SEND;
b4b591c8 1338 wr.send_flags = IB_SEND_SIGNALED;
71102307
CH
1339
1340 if (first)
1341 first->next = &wr;
1342 else
1343 first = &wr;
1344
45e3cc1a 1345 ret = ib_post_send(queue->qp, first, NULL);
a7b7c7a1 1346 if (unlikely(ret)) {
71102307
CH
1347 dev_err(queue->ctrl->ctrl.device,
1348 "%s failed with error code %d\n", __func__, ret);
1349 }
1350 return ret;
1351}
1352
1353static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1354 struct nvme_rdma_qe *qe)
1355{
45e3cc1a 1356 struct ib_recv_wr wr;
71102307
CH
1357 struct ib_sge list;
1358 int ret;
1359
1360 list.addr = qe->dma;
1361 list.length = sizeof(struct nvme_completion);
1362 list.lkey = queue->device->pd->local_dma_lkey;
1363
1364 qe->cqe.done = nvme_rdma_recv_done;
1365
1366 wr.next = NULL;
1367 wr.wr_cqe = &qe->cqe;
1368 wr.sg_list = &list;
1369 wr.num_sge = 1;
1370
45e3cc1a 1371 ret = ib_post_recv(queue->qp, &wr, NULL);
a7b7c7a1 1372 if (unlikely(ret)) {
71102307
CH
1373 dev_err(queue->ctrl->ctrl.device,
1374 "%s failed with error code %d\n", __func__, ret);
1375 }
1376 return ret;
1377}
1378
1379static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1380{
1381 u32 queue_idx = nvme_rdma_queue_idx(queue);
1382
1383 if (queue_idx == 0)
1384 return queue->ctrl->admin_tag_set.tags[queue_idx];
1385 return queue->ctrl->tag_set.tags[queue_idx - 1];
1386}
1387
b4b591c8
SG
1388static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1389{
1390 if (unlikely(wc->status != IB_WC_SUCCESS))
1391 nvme_rdma_wr_error(cq, wc, "ASYNC");
1392}
1393
ad22c355 1394static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
71102307
CH
1395{
1396 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1397 struct nvme_rdma_queue *queue = &ctrl->queues[0];
1398 struct ib_device *dev = queue->device->dev;
1399 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1400 struct nvme_command *cmd = sqe->data;
1401 struct ib_sge sge;
1402 int ret;
1403
71102307
CH
1404 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1405
1406 memset(cmd, 0, sizeof(*cmd));
1407 cmd->common.opcode = nvme_admin_async_event;
38dabe21 1408 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
71102307
CH
1409 cmd->common.flags |= NVME_CMD_SGL_METABUF;
1410 nvme_rdma_set_sg_null(cmd);
1411
b4b591c8
SG
1412 sqe->cqe.done = nvme_rdma_async_done;
1413
71102307
CH
1414 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1415 DMA_TO_DEVICE);
1416
b4b591c8 1417 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
71102307
CH
1418 WARN_ON_ONCE(ret);
1419}
1420
1052b8ac
JA
1421static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1422 struct nvme_completion *cqe, struct ib_wc *wc)
71102307 1423{
71102307
CH
1424 struct request *rq;
1425 struct nvme_rdma_request *req;
71102307 1426
71102307
CH
1427 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
1428 if (!rq) {
1429 dev_err(queue->ctrl->ctrl.device,
1430 "tag 0x%x on QP %#x not found\n",
1431 cqe->command_id, queue->qp->qp_num);
1432 nvme_rdma_error_recovery(queue->ctrl);
1052b8ac 1433 return;
71102307
CH
1434 }
1435 req = blk_mq_rq_to_pdu(rq);
1436
4af7f7ff
SG
1437 req->status = cqe->status;
1438 req->result = cqe->result;
71102307 1439
3ef0279b
SG
1440 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1441 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
1442 dev_err(queue->ctrl->ctrl.device,
1443 "Bogus remote invalidation for rkey %#x\n",
1444 req->mr->rkey);
1445 nvme_rdma_error_recovery(queue->ctrl);
1446 }
f41725bb 1447 } else if (req->mr) {
1052b8ac
JA
1448 int ret;
1449
2f122e4f
SG
1450 ret = nvme_rdma_inv_rkey(queue, req);
1451 if (unlikely(ret < 0)) {
1452 dev_err(queue->ctrl->ctrl.device,
1453 "Queueing INV WR for rkey %#x failed (%d)\n",
1454 req->mr->rkey, ret);
1455 nvme_rdma_error_recovery(queue->ctrl);
1456 }
1457 /* the local invalidation completion will end the request */
1052b8ac 1458 return;
2f122e4f 1459 }
71102307 1460
1052b8ac 1461 if (refcount_dec_and_test(&req->ref))
4af7f7ff 1462 nvme_end_request(rq, req->status, req->result);
71102307
CH
1463}
1464
1052b8ac 1465static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
71102307
CH
1466{
1467 struct nvme_rdma_qe *qe =
1468 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1469 struct nvme_rdma_queue *queue = cq->cq_context;
1470 struct ib_device *ibdev = queue->device->dev;
1471 struct nvme_completion *cqe = qe->data;
1472 const size_t len = sizeof(struct nvme_completion);
71102307
CH
1473
1474 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1475 nvme_rdma_wr_error(cq, wc, "RECV");
1052b8ac 1476 return;
71102307
CH
1477 }
1478
1479 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1480 /*
1481 * AEN requests are special as they don't time out and can
1482 * survive any kind of queue freeze and often don't respond to
1483 * aborts. We don't even bother to allocate a struct request
1484 * for them but rather special case them here.
1485 */
1486 if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
38dabe21 1487 cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH))
7bf58533
CH
1488 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1489 &cqe->result);
71102307 1490 else
1052b8ac 1491 nvme_rdma_process_nvme_rsp(queue, cqe, wc);
71102307
CH
1492 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1493
1494 nvme_rdma_post_recv(queue, qe);
71102307
CH
1495}
1496
1497static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1498{
1499 int ret, i;
1500
1501 for (i = 0; i < queue->queue_size; i++) {
1502 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1503 if (ret)
1504 goto out_destroy_queue_ib;
1505 }
1506
1507 return 0;
1508
1509out_destroy_queue_ib:
1510 nvme_rdma_destroy_queue_ib(queue);
1511 return ret;
1512}
1513
1514static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1515 struct rdma_cm_event *ev)
1516{
7f03953c
SW
1517 struct rdma_cm_id *cm_id = queue->cm_id;
1518 int status = ev->status;
1519 const char *rej_msg;
1520 const struct nvme_rdma_cm_rej *rej_data;
1521 u8 rej_data_len;
1522
1523 rej_msg = rdma_reject_msg(cm_id, status);
1524 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1525
1526 if (rej_data && rej_data_len >= sizeof(u16)) {
1527 u16 sts = le16_to_cpu(rej_data->sts);
71102307
CH
1528
1529 dev_err(queue->ctrl->ctrl.device,
7f03953c
SW
1530 "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1531 status, rej_msg, sts, nvme_rdma_cm_msg(sts));
71102307
CH
1532 } else {
1533 dev_err(queue->ctrl->ctrl.device,
7f03953c 1534 "Connect rejected: status %d (%s).\n", status, rej_msg);
71102307
CH
1535 }
1536
1537 return -ECONNRESET;
1538}
1539
1540static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1541{
71102307
CH
1542 int ret;
1543
ca6e95bb
SG
1544 ret = nvme_rdma_create_queue_ib(queue);
1545 if (ret)
1546 return ret;
71102307
CH
1547
1548 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1549 if (ret) {
1550 dev_err(queue->ctrl->ctrl.device,
1551 "rdma_resolve_route failed (%d).\n",
1552 queue->cm_error);
1553 goto out_destroy_queue;
1554 }
1555
1556 return 0;
1557
1558out_destroy_queue:
1559 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1560 return ret;
1561}
1562
1563static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1564{
1565 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1566 struct rdma_conn_param param = { };
0b857b44 1567 struct nvme_rdma_cm_req priv = { };
71102307
CH
1568 int ret;
1569
1570 param.qp_num = queue->qp->qp_num;
1571 param.flow_control = 1;
1572
1573 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
2ac17c28
SG
1574 /* maximum retry count */
1575 param.retry_count = 7;
71102307
CH
1576 param.rnr_retry_count = 7;
1577 param.private_data = &priv;
1578 param.private_data_len = sizeof(priv);
1579
1580 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1581 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
f994d9dc
JF
1582 /*
1583 * set the admin queue depth to the minimum size
1584 * specified by the Fabrics standard.
1585 */
1586 if (priv.qid == 0) {
7aa1f427
SG
1587 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1588 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
f994d9dc 1589 } else {
c5af8654
JF
1590 /*
1591 * current interpretation of the fabrics spec
1592 * is at minimum you make hrqsize sqsize+1, or a
1593 * 1's based representation of sqsize.
1594 */
f994d9dc 1595 priv.hrqsize = cpu_to_le16(queue->queue_size);
c5af8654 1596 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
f994d9dc 1597 }
71102307
CH
1598
1599 ret = rdma_connect(queue->cm_id, &param);
1600 if (ret) {
1601 dev_err(ctrl->ctrl.device,
1602 "rdma_connect failed (%d).\n", ret);
1603 goto out_destroy_queue_ib;
1604 }
1605
1606 return 0;
1607
1608out_destroy_queue_ib:
1609 nvme_rdma_destroy_queue_ib(queue);
1610 return ret;
1611}
1612
71102307
CH
1613static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1614 struct rdma_cm_event *ev)
1615{
1616 struct nvme_rdma_queue *queue = cm_id->context;
1617 int cm_error = 0;
1618
1619 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1620 rdma_event_msg(ev->event), ev->event,
1621 ev->status, cm_id);
1622
1623 switch (ev->event) {
1624 case RDMA_CM_EVENT_ADDR_RESOLVED:
1625 cm_error = nvme_rdma_addr_resolved(queue);
1626 break;
1627 case RDMA_CM_EVENT_ROUTE_RESOLVED:
1628 cm_error = nvme_rdma_route_resolved(queue);
1629 break;
1630 case RDMA_CM_EVENT_ESTABLISHED:
1631 queue->cm_error = nvme_rdma_conn_established(queue);
1632 /* complete cm_done regardless of success/failure */
1633 complete(&queue->cm_done);
1634 return 0;
1635 case RDMA_CM_EVENT_REJECTED:
abf87d5e 1636 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1637 cm_error = nvme_rdma_conn_rejected(queue, ev);
1638 break;
71102307
CH
1639 case RDMA_CM_EVENT_ROUTE_ERROR:
1640 case RDMA_CM_EVENT_CONNECT_ERROR:
1641 case RDMA_CM_EVENT_UNREACHABLE:
abf87d5e 1642 nvme_rdma_destroy_queue_ib(queue);
249090f9 1643 /* fall through */
abf87d5e 1644 case RDMA_CM_EVENT_ADDR_ERROR:
71102307
CH
1645 dev_dbg(queue->ctrl->ctrl.device,
1646 "CM error event %d\n", ev->event);
1647 cm_error = -ECONNRESET;
1648 break;
1649 case RDMA_CM_EVENT_DISCONNECTED:
1650 case RDMA_CM_EVENT_ADDR_CHANGE:
1651 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1652 dev_dbg(queue->ctrl->ctrl.device,
1653 "disconnect received - connection closed\n");
1654 nvme_rdma_error_recovery(queue->ctrl);
1655 break;
1656 case RDMA_CM_EVENT_DEVICE_REMOVAL:
e87a911f
SW
1657 /* device removal is handled via the ib_client API */
1658 break;
71102307
CH
1659 default:
1660 dev_err(queue->ctrl->ctrl.device,
1661 "Unexpected RDMA CM event (%d)\n", ev->event);
1662 nvme_rdma_error_recovery(queue->ctrl);
1663 break;
1664 }
1665
1666 if (cm_error) {
1667 queue->cm_error = cm_error;
1668 complete(&queue->cm_done);
1669 }
1670
1671 return 0;
1672}
1673
1674static enum blk_eh_timer_return
1675nvme_rdma_timeout(struct request *rq, bool reserved)
1676{
1677 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
4c174e63
SG
1678 struct nvme_rdma_queue *queue = req->queue;
1679 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
71102307 1680
4c174e63
SG
1681 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
1682 rq->tag, nvme_rdma_queue_idx(queue));
e62a538d 1683
4c174e63
SG
1684 if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
1685 /*
1686 * Teardown immediately if controller times out while starting
1687 * or we are already started error recovery. all outstanding
1688 * requests are completed on shutdown, so we return BLK_EH_DONE.
1689 */
1690 flush_work(&ctrl->err_work);
1691 nvme_rdma_teardown_io_queues(ctrl, false);
1692 nvme_rdma_teardown_admin_queue(ctrl, false);
1693 return BLK_EH_DONE;
1694 }
71102307 1695
4c174e63
SG
1696 dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1697 nvme_rdma_error_recovery(ctrl);
71102307 1698
4c174e63 1699 return BLK_EH_RESET_TIMER;
71102307
CH
1700}
1701
fc17b653 1702static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
71102307
CH
1703 const struct blk_mq_queue_data *bd)
1704{
1705 struct nvme_ns *ns = hctx->queue->queuedata;
1706 struct nvme_rdma_queue *queue = hctx->driver_data;
1707 struct request *rq = bd->rq;
1708 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1709 struct nvme_rdma_qe *sqe = &req->sqe;
1710 struct nvme_command *c = sqe->data;
71102307 1711 struct ib_device *dev;
3bc32bb1 1712 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
fc17b653
CH
1713 blk_status_t ret;
1714 int err;
71102307
CH
1715
1716 WARN_ON_ONCE(rq->tag < 0);
1717
3bc32bb1 1718 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
6cdefc6e 1719 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
553cd9ef 1720
71102307
CH
1721 dev = queue->device->dev;
1722 ib_dma_sync_single_for_cpu(dev, sqe->dma,
1723 sizeof(struct nvme_command), DMA_TO_DEVICE);
1724
1725 ret = nvme_setup_cmd(ns, rq, c);
fc17b653 1726 if (ret)
71102307
CH
1727 return ret;
1728
71102307
CH
1729 blk_mq_start_request(rq);
1730
fc17b653 1731 err = nvme_rdma_map_data(queue, rq, c);
a7b7c7a1 1732 if (unlikely(err < 0)) {
71102307 1733 dev_err(queue->ctrl->ctrl.device,
fc17b653 1734 "Failed to map data (%d)\n", err);
71102307
CH
1735 nvme_cleanup_cmd(rq);
1736 goto err;
1737 }
1738
b4b591c8
SG
1739 sqe->cqe.done = nvme_rdma_send_done;
1740
71102307
CH
1741 ib_dma_sync_single_for_device(dev, sqe->dma,
1742 sizeof(struct nvme_command), DMA_TO_DEVICE);
1743
fc17b653 1744 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
f41725bb 1745 req->mr ? &req->reg_wr.wr : NULL);
a7b7c7a1 1746 if (unlikely(err)) {
71102307
CH
1747 nvme_rdma_unmap_data(queue, rq);
1748 goto err;
1749 }
1750
fc17b653 1751 return BLK_STS_OK;
71102307 1752err:
fc17b653
CH
1753 if (err == -ENOMEM || err == -EAGAIN)
1754 return BLK_STS_RESOURCE;
1755 return BLK_STS_IOERR;
71102307
CH
1756}
1757
ff8519f9
SG
1758static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
1759{
1760 struct nvme_rdma_queue *queue = hctx->driver_data;
1761
1762 return ib_process_cq_direct(queue->ib_cq, -1);
1763}
1764
71102307
CH
1765static void nvme_rdma_complete_rq(struct request *rq)
1766{
1767 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307 1768
77f02a7a
CH
1769 nvme_rdma_unmap_data(req->queue, rq);
1770 nvme_complete_rq(rq);
71102307
CH
1771}
1772
0b36658c
SG
1773static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
1774{
1775 struct nvme_rdma_ctrl *ctrl = set->driver_data;
5651cd3c 1776 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 1777
5651cd3c 1778 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
b65bb777 1779 /* separate read/write queues */
5651cd3c
SG
1780 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1781 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1782 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1783 set->map[HCTX_TYPE_READ].nr_queues =
1784 ctrl->io_queues[HCTX_TYPE_READ];
b65bb777 1785 set->map[HCTX_TYPE_READ].queue_offset =
5651cd3c 1786 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777 1787 } else {
5651cd3c
SG
1788 /* shared read/write queues */
1789 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1790 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1791 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1792 set->map[HCTX_TYPE_READ].nr_queues =
1793 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777
SG
1794 set->map[HCTX_TYPE_READ].queue_offset = 0;
1795 }
1796 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
1797 ctrl->device->dev, 0);
1798 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
1799 ctrl->device->dev, 0);
ff8519f9 1800
5651cd3c
SG
1801 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
1802 /* map dedicated poll queues only if we have queues left */
ff8519f9 1803 set->map[HCTX_TYPE_POLL].nr_queues =
b1064d3e 1804 ctrl->io_queues[HCTX_TYPE_POLL];
ff8519f9 1805 set->map[HCTX_TYPE_POLL].queue_offset =
5651cd3c
SG
1806 ctrl->io_queues[HCTX_TYPE_DEFAULT] +
1807 ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
1808 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
1809 }
5651cd3c
SG
1810
1811 dev_info(ctrl->ctrl.device,
1812 "mapped %d/%d/%d default/read/poll queues.\n",
1813 ctrl->io_queues[HCTX_TYPE_DEFAULT],
1814 ctrl->io_queues[HCTX_TYPE_READ],
1815 ctrl->io_queues[HCTX_TYPE_POLL]);
1816
b65bb777 1817 return 0;
0b36658c
SG
1818}
1819
f363b089 1820static const struct blk_mq_ops nvme_rdma_mq_ops = {
71102307
CH
1821 .queue_rq = nvme_rdma_queue_rq,
1822 .complete = nvme_rdma_complete_rq,
71102307
CH
1823 .init_request = nvme_rdma_init_request,
1824 .exit_request = nvme_rdma_exit_request,
71102307 1825 .init_hctx = nvme_rdma_init_hctx,
71102307 1826 .timeout = nvme_rdma_timeout,
0b36658c 1827 .map_queues = nvme_rdma_map_queues,
ff8519f9 1828 .poll = nvme_rdma_poll,
71102307
CH
1829};
1830
f363b089 1831static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
71102307
CH
1832 .queue_rq = nvme_rdma_queue_rq,
1833 .complete = nvme_rdma_complete_rq,
385475ee
CH
1834 .init_request = nvme_rdma_init_request,
1835 .exit_request = nvme_rdma_exit_request,
71102307
CH
1836 .init_hctx = nvme_rdma_init_admin_hctx,
1837 .timeout = nvme_rdma_timeout,
1838};
1839
18398af2 1840static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
71102307 1841{
794a4cb3
SG
1842 cancel_work_sync(&ctrl->err_work);
1843 cancel_delayed_work_sync(&ctrl->reconnect_work);
1844
75862c72 1845 nvme_rdma_teardown_io_queues(ctrl, shutdown);
18398af2 1846 if (shutdown)
71102307 1847 nvme_shutdown_ctrl(&ctrl->ctrl);
18398af2
SG
1848 else
1849 nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
75862c72 1850 nvme_rdma_teardown_admin_queue(ctrl, shutdown);
71102307
CH
1851}
1852
c5017e85 1853static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2461a8dd 1854{
e9bc2587 1855 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
71102307
CH
1856}
1857
71102307
CH
1858static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
1859{
d86c4d8e
CH
1860 struct nvme_rdma_ctrl *ctrl =
1861 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
71102307 1862
d09f2b45 1863 nvme_stop_ctrl(&ctrl->ctrl);
18398af2 1864 nvme_rdma_shutdown_ctrl(ctrl, false);
71102307 1865
ad6a0a52 1866 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
d5bf4b7f
SG
1867 /* state change failure should never happen */
1868 WARN_ON_ONCE(1);
1869 return;
1870 }
1871
c66e2998 1872 if (nvme_rdma_setup_ctrl(ctrl, false))
370ae6e4 1873 goto out_fail;
71102307 1874
71102307
CH
1875 return;
1876
370ae6e4 1877out_fail:
8000d1fd
NC
1878 ++ctrl->ctrl.nr_reconnects;
1879 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1880}
1881
71102307
CH
1882static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
1883 .name = "rdma",
1884 .module = THIS_MODULE,
d3d5b87d 1885 .flags = NVME_F_FABRICS,
71102307
CH
1886 .reg_read32 = nvmf_reg_read32,
1887 .reg_read64 = nvmf_reg_read64,
1888 .reg_write32 = nvmf_reg_write32,
71102307
CH
1889 .free_ctrl = nvme_rdma_free_ctrl,
1890 .submit_async_event = nvme_rdma_submit_async_event,
c5017e85 1891 .delete_ctrl = nvme_rdma_delete_ctrl,
71102307
CH
1892 .get_address = nvmf_get_address,
1893};
1894
36e835f2
JS
1895/*
1896 * Fails a connection request if it matches an existing controller
1897 * (association) with the same tuple:
1898 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
1899 *
1900 * if local address is not specified in the request, it will match an
1901 * existing controller with all the other parameters the same and no
1902 * local port address specified as well.
1903 *
1904 * The ports don't need to be compared as they are intrinsically
1905 * already matched by the port pointers supplied.
1906 */
1907static bool
1908nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
1909{
1910 struct nvme_rdma_ctrl *ctrl;
1911 bool found = false;
1912
1913 mutex_lock(&nvme_rdma_ctrl_mutex);
1914 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
b7c7be6f 1915 found = nvmf_ip_options_match(&ctrl->ctrl, opts);
36e835f2
JS
1916 if (found)
1917 break;
1918 }
1919 mutex_unlock(&nvme_rdma_ctrl_mutex);
1920
1921 return found;
1922}
1923
71102307
CH
1924static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
1925 struct nvmf_ctrl_options *opts)
1926{
1927 struct nvme_rdma_ctrl *ctrl;
1928 int ret;
1929 bool changed;
1930
1931 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1932 if (!ctrl)
1933 return ERR_PTR(-ENOMEM);
1934 ctrl->ctrl.opts = opts;
1935 INIT_LIST_HEAD(&ctrl->list);
1936
bb59b8e5
SG
1937 if (!(opts->mask & NVMF_OPT_TRSVCID)) {
1938 opts->trsvcid =
1939 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
1940 if (!opts->trsvcid) {
1941 ret = -ENOMEM;
1942 goto out_free_ctrl;
1943 }
1944 opts->mask |= NVMF_OPT_TRSVCID;
1945 }
0928f9b4
SG
1946
1947 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
bb59b8e5 1948 opts->traddr, opts->trsvcid, &ctrl->addr);
71102307 1949 if (ret) {
bb59b8e5
SG
1950 pr_err("malformed address passed: %s:%s\n",
1951 opts->traddr, opts->trsvcid);
71102307
CH
1952 goto out_free_ctrl;
1953 }
1954
8f4e8dac 1955 if (opts->mask & NVMF_OPT_HOST_TRADDR) {
0928f9b4
SG
1956 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
1957 opts->host_traddr, NULL, &ctrl->src_addr);
8f4e8dac 1958 if (ret) {
0928f9b4 1959 pr_err("malformed src address passed: %s\n",
8f4e8dac
MG
1960 opts->host_traddr);
1961 goto out_free_ctrl;
1962 }
1963 }
1964
36e835f2
JS
1965 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
1966 ret = -EALREADY;
1967 goto out_free_ctrl;
1968 }
1969
71102307
CH
1970 INIT_DELAYED_WORK(&ctrl->reconnect_work,
1971 nvme_rdma_reconnect_ctrl_work);
1972 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
d86c4d8e 1973 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
71102307 1974
ff8519f9
SG
1975 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
1976 opts->nr_poll_queues + 1;
c5af8654 1977 ctrl->ctrl.sqsize = opts->queue_size - 1;
71102307
CH
1978 ctrl->ctrl.kato = opts->kato;
1979
1980 ret = -ENOMEM;
d858e5f0 1981 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
71102307
CH
1982 GFP_KERNEL);
1983 if (!ctrl->queues)
3d064101
SG
1984 goto out_free_ctrl;
1985
1986 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
1987 0 /* no quirks, we're perfect! */);
1988 if (ret)
1989 goto out_kfree_queues;
71102307 1990
b754a32c
MG
1991 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
1992 WARN_ON_ONCE(!changed);
1993
c66e2998 1994 ret = nvme_rdma_setup_ctrl(ctrl, true);
71102307 1995 if (ret)
3d064101 1996 goto out_uninit_ctrl;
71102307 1997
0928f9b4 1998 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
71102307
CH
1999 ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2000
d22524a4 2001 nvme_get_ctrl(&ctrl->ctrl);
71102307
CH
2002
2003 mutex_lock(&nvme_rdma_ctrl_mutex);
2004 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2005 mutex_unlock(&nvme_rdma_ctrl_mutex);
2006
71102307
CH
2007 return &ctrl->ctrl;
2008
71102307
CH
2009out_uninit_ctrl:
2010 nvme_uninit_ctrl(&ctrl->ctrl);
2011 nvme_put_ctrl(&ctrl->ctrl);
2012 if (ret > 0)
2013 ret = -EIO;
2014 return ERR_PTR(ret);
3d064101
SG
2015out_kfree_queues:
2016 kfree(ctrl->queues);
71102307
CH
2017out_free_ctrl:
2018 kfree(ctrl);
2019 return ERR_PTR(ret);
2020}
2021
2022static struct nvmf_transport_ops nvme_rdma_transport = {
2023 .name = "rdma",
0de5cd36 2024 .module = THIS_MODULE,
71102307 2025 .required_opts = NVMF_OPT_TRADDR,
8f4e8dac 2026 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
b65bb777 2027 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
ff8519f9 2028 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES,
71102307
CH
2029 .create_ctrl = nvme_rdma_create_ctrl,
2030};
2031
e87a911f
SW
2032static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2033{
2034 struct nvme_rdma_ctrl *ctrl;
9bad0404
MG
2035 struct nvme_rdma_device *ndev;
2036 bool found = false;
2037
2038 mutex_lock(&device_list_mutex);
2039 list_for_each_entry(ndev, &device_list, entry) {
2040 if (ndev->dev == ib_device) {
2041 found = true;
2042 break;
2043 }
2044 }
2045 mutex_unlock(&device_list_mutex);
2046
2047 if (!found)
2048 return;
e87a911f
SW
2049
2050 /* Delete all controllers using this device */
2051 mutex_lock(&nvme_rdma_ctrl_mutex);
2052 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2053 if (ctrl->device->dev != ib_device)
2054 continue;
c5017e85 2055 nvme_delete_ctrl(&ctrl->ctrl);
e87a911f
SW
2056 }
2057 mutex_unlock(&nvme_rdma_ctrl_mutex);
2058
b227c59b 2059 flush_workqueue(nvme_delete_wq);
e87a911f
SW
2060}
2061
2062static struct ib_client nvme_rdma_ib_client = {
2063 .name = "nvme_rdma",
e87a911f
SW
2064 .remove = nvme_rdma_remove_one
2065};
2066
71102307
CH
2067static int __init nvme_rdma_init_module(void)
2068{
e87a911f
SW
2069 int ret;
2070
e87a911f 2071 ret = ib_register_client(&nvme_rdma_ib_client);
a56c79cf 2072 if (ret)
9a6327d2 2073 return ret;
a56c79cf
SG
2074
2075 ret = nvmf_register_transport(&nvme_rdma_transport);
2076 if (ret)
2077 goto err_unreg_client;
e87a911f 2078
a56c79cf 2079 return 0;
e87a911f 2080
a56c79cf
SG
2081err_unreg_client:
2082 ib_unregister_client(&nvme_rdma_ib_client);
a56c79cf 2083 return ret;
71102307
CH
2084}
2085
2086static void __exit nvme_rdma_cleanup_module(void)
2087{
71102307 2088 nvmf_unregister_transport(&nvme_rdma_transport);
e87a911f 2089 ib_unregister_client(&nvme_rdma_ib_client);
71102307
CH
2090}
2091
2092module_init(nvme_rdma_init_module);
2093module_exit(nvme_rdma_cleanup_module);
2094
2095MODULE_LICENSE("GPL v2");