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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/string.h> | |
71102307 CH |
20 | #include <linux/atomic.h> |
21 | #include <linux/blk-mq.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/mutex.h> | |
25 | #include <linux/scatterlist.h> | |
26 | #include <linux/nvme.h> | |
71102307 CH |
27 | #include <asm/unaligned.h> |
28 | ||
29 | #include <rdma/ib_verbs.h> | |
30 | #include <rdma/rdma_cm.h> | |
71102307 CH |
31 | #include <linux/nvme-rdma.h> |
32 | ||
33 | #include "nvme.h" | |
34 | #include "fabrics.h" | |
35 | ||
36 | ||
782d820c | 37 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 CH |
38 | |
39 | #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */ | |
40 | ||
41 | #define NVME_RDMA_MAX_SEGMENTS 256 | |
42 | ||
43 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
44 | ||
71102307 CH |
45 | /* |
46 | * We handle AEN commands ourselves and don't even let the | |
47 | * block layer know about them. | |
48 | */ | |
49 | #define NVME_RDMA_NR_AEN_COMMANDS 1 | |
50 | #define NVME_RDMA_AQ_BLKMQ_DEPTH \ | |
7aa1f427 | 51 | (NVME_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS) |
71102307 CH |
52 | |
53 | struct nvme_rdma_device { | |
54 | struct ib_device *dev; | |
55 | struct ib_pd *pd; | |
71102307 CH |
56 | struct kref ref; |
57 | struct list_head entry; | |
58 | }; | |
59 | ||
60 | struct nvme_rdma_qe { | |
61 | struct ib_cqe cqe; | |
62 | void *data; | |
63 | u64 dma; | |
64 | }; | |
65 | ||
66 | struct nvme_rdma_queue; | |
67 | struct nvme_rdma_request { | |
d49187e9 | 68 | struct nvme_request req; |
71102307 CH |
69 | struct ib_mr *mr; |
70 | struct nvme_rdma_qe sqe; | |
71 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; | |
72 | u32 num_sge; | |
73 | int nents; | |
74 | bool inline_data; | |
71102307 CH |
75 | struct ib_reg_wr reg_wr; |
76 | struct ib_cqe reg_cqe; | |
77 | struct nvme_rdma_queue *queue; | |
78 | struct sg_table sg_table; | |
79 | struct scatterlist first_sgl[]; | |
80 | }; | |
81 | ||
82 | enum nvme_rdma_queue_flags { | |
b282a88d | 83 | NVME_RDMA_Q_LIVE = 0, |
abf87d5e | 84 | NVME_RDMA_Q_DELETING = 1, |
71102307 CH |
85 | }; |
86 | ||
87 | struct nvme_rdma_queue { | |
88 | struct nvme_rdma_qe *rsp_ring; | |
89 | u8 sig_count; | |
90 | int queue_size; | |
91 | size_t cmnd_capsule_len; | |
92 | struct nvme_rdma_ctrl *ctrl; | |
93 | struct nvme_rdma_device *device; | |
94 | struct ib_cq *ib_cq; | |
95 | struct ib_qp *qp; | |
96 | ||
97 | unsigned long flags; | |
98 | struct rdma_cm_id *cm_id; | |
99 | int cm_error; | |
100 | struct completion cm_done; | |
101 | }; | |
102 | ||
103 | struct nvme_rdma_ctrl { | |
71102307 CH |
104 | /* read only in the hot path */ |
105 | struct nvme_rdma_queue *queues; | |
106 | u32 queue_count; | |
107 | ||
108 | /* other member variables */ | |
71102307 CH |
109 | struct blk_mq_tag_set tag_set; |
110 | struct work_struct delete_work; | |
71102307 CH |
111 | struct work_struct err_work; |
112 | ||
113 | struct nvme_rdma_qe async_event_sqe; | |
114 | ||
71102307 CH |
115 | struct delayed_work reconnect_work; |
116 | ||
117 | struct list_head list; | |
118 | ||
119 | struct blk_mq_tag_set admin_tag_set; | |
120 | struct nvme_rdma_device *device; | |
121 | ||
122 | u64 cap; | |
123 | u32 max_fr_pages; | |
124 | ||
0928f9b4 SG |
125 | struct sockaddr_storage addr; |
126 | struct sockaddr_storage src_addr; | |
71102307 CH |
127 | |
128 | struct nvme_ctrl ctrl; | |
129 | }; | |
130 | ||
131 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
132 | { | |
133 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
134 | } | |
135 | ||
136 | static LIST_HEAD(device_list); | |
137 | static DEFINE_MUTEX(device_list_mutex); | |
138 | ||
139 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
140 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
141 | ||
71102307 CH |
142 | /* |
143 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
144 | * unsafe. With it turned off we will have to register a global rkey that | |
145 | * allows read and write access to all physical memory. | |
146 | */ | |
147 | static bool register_always = true; | |
148 | module_param(register_always, bool, 0444); | |
149 | MODULE_PARM_DESC(register_always, | |
150 | "Use memory registration even for contiguous memory regions"); | |
151 | ||
152 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
153 | struct rdma_cm_event *event); | |
154 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 CH |
155 | |
156 | /* XXX: really should move to a generic header sooner or later.. */ | |
157 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
158 | { | |
159 | *p++ = val; | |
160 | *p++ = val >> 8; | |
161 | *p++ = val >> 16; | |
162 | } | |
163 | ||
164 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
165 | { | |
166 | return queue - queue->ctrl->queues; | |
167 | } | |
168 | ||
169 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
170 | { | |
171 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
172 | } | |
173 | ||
174 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
175 | size_t capsule_size, enum dma_data_direction dir) | |
176 | { | |
177 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
178 | kfree(qe->data); | |
179 | } | |
180 | ||
181 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
182 | size_t capsule_size, enum dma_data_direction dir) | |
183 | { | |
184 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
185 | if (!qe->data) | |
186 | return -ENOMEM; | |
187 | ||
188 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
189 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
190 | kfree(qe->data); | |
191 | return -ENOMEM; | |
192 | } | |
193 | ||
194 | return 0; | |
195 | } | |
196 | ||
197 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
198 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
199 | size_t capsule_size, enum dma_data_direction dir) | |
200 | { | |
201 | int i; | |
202 | ||
203 | for (i = 0; i < ib_queue_size; i++) | |
204 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
205 | kfree(ring); | |
206 | } | |
207 | ||
208 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
209 | size_t ib_queue_size, size_t capsule_size, | |
210 | enum dma_data_direction dir) | |
211 | { | |
212 | struct nvme_rdma_qe *ring; | |
213 | int i; | |
214 | ||
215 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
216 | if (!ring) | |
217 | return NULL; | |
218 | ||
219 | for (i = 0; i < ib_queue_size; i++) { | |
220 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
221 | goto out_free_ring; | |
222 | } | |
223 | ||
224 | return ring; | |
225 | ||
226 | out_free_ring: | |
227 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
228 | return NULL; | |
229 | } | |
230 | ||
231 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
232 | { | |
27a4beef MG |
233 | pr_debug("QP event %s (%d)\n", |
234 | ib_event_msg(event->event), event->event); | |
235 | ||
71102307 CH |
236 | } |
237 | ||
238 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
239 | { | |
240 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
241 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
242 | return queue->cm_error; | |
243 | } | |
244 | ||
245 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
246 | { | |
247 | struct nvme_rdma_device *dev = queue->device; | |
248 | struct ib_qp_init_attr init_attr; | |
249 | int ret; | |
250 | ||
251 | memset(&init_attr, 0, sizeof(init_attr)); | |
252 | init_attr.event_handler = nvme_rdma_qp_event; | |
253 | /* +1 for drain */ | |
254 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
255 | /* +1 for drain */ | |
256 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
257 | init_attr.cap.max_recv_sge = 1; | |
258 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
259 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
260 | init_attr.qp_type = IB_QPT_RC; | |
261 | init_attr.send_cq = queue->ib_cq; | |
262 | init_attr.recv_cq = queue->ib_cq; | |
263 | ||
264 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
265 | ||
266 | queue->qp = queue->cm_id->qp; | |
267 | return ret; | |
268 | } | |
269 | ||
270 | static int nvme_rdma_reinit_request(void *data, struct request *rq) | |
271 | { | |
272 | struct nvme_rdma_ctrl *ctrl = data; | |
273 | struct nvme_rdma_device *dev = ctrl->device; | |
274 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
275 | int ret = 0; | |
276 | ||
f5b7b559 | 277 | if (!req->mr->need_inval) |
71102307 CH |
278 | goto out; |
279 | ||
280 | ib_dereg_mr(req->mr); | |
281 | ||
282 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
283 | ctrl->max_fr_pages); | |
284 | if (IS_ERR(req->mr)) { | |
71102307 | 285 | ret = PTR_ERR(req->mr); |
458a9632 | 286 | req->mr = NULL; |
1bda18de | 287 | goto out; |
71102307 CH |
288 | } |
289 | ||
f5b7b559 | 290 | req->mr->need_inval = false; |
71102307 CH |
291 | |
292 | out: | |
293 | return ret; | |
294 | } | |
295 | ||
385475ee CH |
296 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
297 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 298 | { |
385475ee | 299 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 300 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 301 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
302 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
303 | struct nvme_rdma_device *dev = queue->device; | |
304 | ||
305 | if (req->mr) | |
306 | ib_dereg_mr(req->mr); | |
307 | ||
308 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
309 | DMA_TO_DEVICE); | |
310 | } | |
311 | ||
385475ee CH |
312 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
313 | struct request *rq, unsigned int hctx_idx, | |
314 | unsigned int numa_node) | |
71102307 | 315 | { |
385475ee | 316 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 317 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 318 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
319 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
320 | struct nvme_rdma_device *dev = queue->device; | |
321 | struct ib_device *ibdev = dev->dev; | |
322 | int ret; | |
323 | ||
71102307 CH |
324 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
325 | DMA_TO_DEVICE); | |
326 | if (ret) | |
327 | return ret; | |
328 | ||
329 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
330 | ctrl->max_fr_pages); | |
331 | if (IS_ERR(req->mr)) { | |
332 | ret = PTR_ERR(req->mr); | |
333 | goto out_free_qe; | |
334 | } | |
335 | ||
336 | req->queue = queue; | |
337 | ||
338 | return 0; | |
339 | ||
340 | out_free_qe: | |
341 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
342 | DMA_TO_DEVICE); | |
343 | return -ENOMEM; | |
344 | } | |
345 | ||
71102307 CH |
346 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
347 | unsigned int hctx_idx) | |
348 | { | |
349 | struct nvme_rdma_ctrl *ctrl = data; | |
350 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
351 | ||
352 | BUG_ON(hctx_idx >= ctrl->queue_count); | |
353 | ||
354 | hctx->driver_data = queue; | |
355 | return 0; | |
356 | } | |
357 | ||
358 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
359 | unsigned int hctx_idx) | |
360 | { | |
361 | struct nvme_rdma_ctrl *ctrl = data; | |
362 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
363 | ||
364 | BUG_ON(hctx_idx != 0); | |
365 | ||
366 | hctx->driver_data = queue; | |
367 | return 0; | |
368 | } | |
369 | ||
370 | static void nvme_rdma_free_dev(struct kref *ref) | |
371 | { | |
372 | struct nvme_rdma_device *ndev = | |
373 | container_of(ref, struct nvme_rdma_device, ref); | |
374 | ||
375 | mutex_lock(&device_list_mutex); | |
376 | list_del(&ndev->entry); | |
377 | mutex_unlock(&device_list_mutex); | |
378 | ||
71102307 | 379 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
380 | kfree(ndev); |
381 | } | |
382 | ||
383 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
384 | { | |
385 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
386 | } | |
387 | ||
388 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
389 | { | |
390 | return kref_get_unless_zero(&dev->ref); | |
391 | } | |
392 | ||
393 | static struct nvme_rdma_device * | |
394 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
395 | { | |
396 | struct nvme_rdma_device *ndev; | |
397 | ||
398 | mutex_lock(&device_list_mutex); | |
399 | list_for_each_entry(ndev, &device_list, entry) { | |
400 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
401 | nvme_rdma_dev_get(ndev)) | |
402 | goto out_unlock; | |
403 | } | |
404 | ||
405 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
406 | if (!ndev) | |
407 | goto out_err; | |
408 | ||
409 | ndev->dev = cm_id->device; | |
410 | kref_init(&ndev->ref); | |
411 | ||
11975e01 CH |
412 | ndev->pd = ib_alloc_pd(ndev->dev, |
413 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
414 | if (IS_ERR(ndev->pd)) |
415 | goto out_free_dev; | |
416 | ||
71102307 CH |
417 | if (!(ndev->dev->attrs.device_cap_flags & |
418 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
419 | dev_err(&ndev->dev->dev, | |
420 | "Memory registrations not supported.\n"); | |
11975e01 | 421 | goto out_free_pd; |
71102307 CH |
422 | } |
423 | ||
424 | list_add(&ndev->entry, &device_list); | |
425 | out_unlock: | |
426 | mutex_unlock(&device_list_mutex); | |
427 | return ndev; | |
428 | ||
71102307 CH |
429 | out_free_pd: |
430 | ib_dealloc_pd(ndev->pd); | |
431 | out_free_dev: | |
432 | kfree(ndev); | |
433 | out_err: | |
434 | mutex_unlock(&device_list_mutex); | |
435 | return NULL; | |
436 | } | |
437 | ||
438 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
439 | { | |
f361e5a0 SW |
440 | struct nvme_rdma_device *dev; |
441 | struct ib_device *ibdev; | |
71102307 | 442 | |
f361e5a0 SW |
443 | dev = queue->device; |
444 | ibdev = dev->dev; | |
71102307 CH |
445 | rdma_destroy_qp(queue->cm_id); |
446 | ib_free_cq(queue->ib_cq); | |
447 | ||
448 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
449 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
450 | ||
451 | nvme_rdma_dev_put(dev); | |
452 | } | |
453 | ||
ca6e95bb | 454 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 455 | { |
ca6e95bb | 456 | struct ib_device *ibdev; |
71102307 CH |
457 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
458 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
459 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
460 | int ret; |
461 | ||
ca6e95bb SG |
462 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
463 | if (!queue->device) { | |
464 | dev_err(queue->cm_id->device->dev.parent, | |
465 | "no client data found!\n"); | |
466 | return -ECONNREFUSED; | |
467 | } | |
468 | ibdev = queue->device->dev; | |
71102307 CH |
469 | |
470 | /* | |
471 | * The admin queue is barely used once the controller is live, so don't | |
472 | * bother to spread it out. | |
473 | */ | |
474 | if (idx == 0) | |
475 | comp_vector = 0; | |
476 | else | |
477 | comp_vector = idx % ibdev->num_comp_vectors; | |
478 | ||
479 | ||
480 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
481 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
482 | cq_factor * queue->queue_size + 1, | |
483 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
484 | if (IS_ERR(queue->ib_cq)) { |
485 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 486 | goto out_put_dev; |
71102307 CH |
487 | } |
488 | ||
489 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
490 | if (ret) | |
491 | goto out_destroy_ib_cq; | |
492 | ||
493 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
494 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
495 | if (!queue->rsp_ring) { | |
496 | ret = -ENOMEM; | |
497 | goto out_destroy_qp; | |
498 | } | |
499 | ||
500 | return 0; | |
501 | ||
502 | out_destroy_qp: | |
503 | ib_destroy_qp(queue->qp); | |
504 | out_destroy_ib_cq: | |
505 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
506 | out_put_dev: |
507 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
508 | return ret; |
509 | } | |
510 | ||
511 | static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl, | |
512 | int idx, size_t queue_size) | |
513 | { | |
514 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 515 | struct sockaddr *src_addr = NULL; |
71102307 CH |
516 | int ret; |
517 | ||
518 | queue = &ctrl->queues[idx]; | |
519 | queue->ctrl = ctrl; | |
520 | init_completion(&queue->cm_done); | |
521 | ||
522 | if (idx > 0) | |
523 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
524 | else | |
525 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
526 | ||
527 | queue->queue_size = queue_size; | |
528 | ||
529 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
530 | RDMA_PS_TCP, IB_QPT_RC); | |
531 | if (IS_ERR(queue->cm_id)) { | |
532 | dev_info(ctrl->ctrl.device, | |
533 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
534 | return PTR_ERR(queue->cm_id); | |
535 | } | |
536 | ||
8f4e8dac | 537 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 538 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 539 | |
0928f9b4 SG |
540 | queue->cm_error = -ETIMEDOUT; |
541 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
542 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
543 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
544 | if (ret) { | |
545 | dev_info(ctrl->ctrl.device, | |
546 | "rdma_resolve_addr failed (%d).\n", ret); | |
547 | goto out_destroy_cm_id; | |
548 | } | |
549 | ||
550 | ret = nvme_rdma_wait_for_cm(queue); | |
551 | if (ret) { | |
552 | dev_info(ctrl->ctrl.device, | |
553 | "rdma_resolve_addr wait failed (%d).\n", ret); | |
554 | goto out_destroy_cm_id; | |
555 | } | |
556 | ||
3b4ac786 | 557 | clear_bit(NVME_RDMA_Q_DELETING, &queue->flags); |
71102307 CH |
558 | |
559 | return 0; | |
560 | ||
561 | out_destroy_cm_id: | |
562 | rdma_destroy_id(queue->cm_id); | |
563 | return ret; | |
564 | } | |
565 | ||
566 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
567 | { | |
568 | rdma_disconnect(queue->cm_id); | |
569 | ib_drain_qp(queue->qp); | |
570 | } | |
571 | ||
572 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
573 | { | |
574 | nvme_rdma_destroy_queue_ib(queue); | |
575 | rdma_destroy_id(queue->cm_id); | |
576 | } | |
577 | ||
578 | static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue) | |
579 | { | |
e89ca58f | 580 | if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags)) |
71102307 CH |
581 | return; |
582 | nvme_rdma_stop_queue(queue); | |
583 | nvme_rdma_free_queue(queue); | |
584 | } | |
585 | ||
586 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) | |
587 | { | |
588 | int i; | |
589 | ||
590 | for (i = 1; i < ctrl->queue_count; i++) | |
591 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); | |
592 | } | |
593 | ||
594 | static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl) | |
595 | { | |
596 | int i, ret = 0; | |
597 | ||
598 | for (i = 1; i < ctrl->queue_count; i++) { | |
599 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); | |
c8dbc37c SW |
600 | if (ret) { |
601 | dev_info(ctrl->ctrl.device, | |
602 | "failed to connect i/o queue: %d\n", ret); | |
603 | goto out_free_queues; | |
604 | } | |
553cd9ef | 605 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
71102307 CH |
606 | } |
607 | ||
c8dbc37c SW |
608 | return 0; |
609 | ||
610 | out_free_queues: | |
611 | nvme_rdma_free_io_queues(ctrl); | |
71102307 CH |
612 | return ret; |
613 | } | |
614 | ||
615 | static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl) | |
616 | { | |
c248c643 SG |
617 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
618 | unsigned int nr_io_queues; | |
71102307 CH |
619 | int i, ret; |
620 | ||
c248c643 SG |
621 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
622 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
623 | if (ret) | |
624 | return ret; | |
625 | ||
626 | ctrl->queue_count = nr_io_queues + 1; | |
627 | if (ctrl->queue_count < 2) | |
628 | return 0; | |
629 | ||
630 | dev_info(ctrl->ctrl.device, | |
631 | "creating %d I/O queues.\n", nr_io_queues); | |
632 | ||
71102307 | 633 | for (i = 1; i < ctrl->queue_count; i++) { |
c5af8654 JF |
634 | ret = nvme_rdma_init_queue(ctrl, i, |
635 | ctrl->ctrl.opts->queue_size); | |
71102307 CH |
636 | if (ret) { |
637 | dev_info(ctrl->ctrl.device, | |
638 | "failed to initialize i/o queue: %d\n", ret); | |
639 | goto out_free_queues; | |
640 | } | |
641 | } | |
642 | ||
643 | return 0; | |
644 | ||
645 | out_free_queues: | |
f361e5a0 | 646 | for (i--; i >= 1; i--) |
71102307 CH |
647 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
648 | ||
649 | return ret; | |
650 | } | |
651 | ||
652 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
653 | { | |
654 | nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe, | |
655 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
656 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
657 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
658 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
659 | nvme_rdma_dev_put(ctrl->device); | |
660 | } | |
661 | ||
662 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) | |
663 | { | |
664 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
665 | ||
666 | if (list_empty(&ctrl->list)) | |
667 | goto free_ctrl; | |
668 | ||
669 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
670 | list_del(&ctrl->list); | |
671 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
672 | ||
71102307 CH |
673 | kfree(ctrl->queues); |
674 | nvmf_free_options(nctrl->opts); | |
675 | free_ctrl: | |
676 | kfree(ctrl); | |
677 | } | |
678 | ||
fd8563ce SG |
679 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
680 | { | |
681 | /* If we are resetting/deleting then do nothing */ | |
682 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
683 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
684 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
685 | return; | |
686 | } | |
687 | ||
688 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
689 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
690 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 691 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
692 | ctrl->ctrl.opts->reconnect_delay * HZ); |
693 | } else { | |
694 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
9a6327d2 | 695 | queue_work(nvme_wq, &ctrl->delete_work); |
fd8563ce SG |
696 | } |
697 | } | |
698 | ||
71102307 CH |
699 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
700 | { | |
701 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
702 | struct nvme_rdma_ctrl, reconnect_work); | |
703 | bool changed; | |
704 | int ret; | |
705 | ||
fdf9dfa8 | 706 | ++ctrl->ctrl.nr_reconnects; |
fd8563ce | 707 | |
71102307 CH |
708 | if (ctrl->queue_count > 1) { |
709 | nvme_rdma_free_io_queues(ctrl); | |
710 | ||
711 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); | |
712 | if (ret) | |
713 | goto requeue; | |
714 | } | |
715 | ||
716 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
717 | ||
718 | ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set); | |
719 | if (ret) | |
720 | goto requeue; | |
721 | ||
7aa1f427 | 722 | ret = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
723 | if (ret) |
724 | goto requeue; | |
725 | ||
71102307 CH |
726 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
727 | if (ret) | |
e818a5b4 | 728 | goto requeue; |
71102307 | 729 | |
553cd9ef CH |
730 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
731 | ||
71102307 CH |
732 | ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap); |
733 | if (ret) | |
e818a5b4 | 734 | goto requeue; |
71102307 CH |
735 | |
736 | nvme_start_keep_alive(&ctrl->ctrl); | |
737 | ||
738 | if (ctrl->queue_count > 1) { | |
739 | ret = nvme_rdma_init_io_queues(ctrl); | |
740 | if (ret) | |
e818a5b4 | 741 | goto requeue; |
71102307 CH |
742 | |
743 | ret = nvme_rdma_connect_io_queues(ctrl); | |
744 | if (ret) | |
e818a5b4 | 745 | goto requeue; |
71102307 CH |
746 | } |
747 | ||
748 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
749 | WARN_ON_ONCE(!changed); | |
fdf9dfa8 | 750 | ctrl->ctrl.nr_reconnects = 0; |
71102307 | 751 | |
5f372eb3 | 752 | if (ctrl->queue_count > 1) { |
5f372eb3 | 753 | nvme_queue_scan(&ctrl->ctrl); |
3ef1b4b2 | 754 | nvme_queue_async_events(&ctrl->ctrl); |
5f372eb3 | 755 | } |
71102307 CH |
756 | |
757 | dev_info(ctrl->ctrl.device, "Successfully reconnected\n"); | |
758 | ||
759 | return; | |
760 | ||
71102307 | 761 | requeue: |
fd8563ce | 762 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 763 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 764 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
765 | } |
766 | ||
767 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
768 | { | |
769 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
770 | struct nvme_rdma_ctrl, err_work); | |
e89ca58f | 771 | int i; |
71102307 CH |
772 | |
773 | nvme_stop_keep_alive(&ctrl->ctrl); | |
e89ca58f | 774 | |
b282a88d | 775 | for (i = 0; i < ctrl->queue_count; i++) |
553cd9ef | 776 | clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
e89ca58f | 777 | |
71102307 CH |
778 | if (ctrl->queue_count > 1) |
779 | nvme_stop_queues(&ctrl->ctrl); | |
780 | blk_mq_stop_hw_queues(ctrl->ctrl.admin_q); | |
781 | ||
782 | /* We must take care of fastfail/requeue all our inflight requests */ | |
783 | if (ctrl->queue_count > 1) | |
784 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
785 | nvme_cancel_request, &ctrl->ctrl); | |
786 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
787 | nvme_cancel_request, &ctrl->ctrl); | |
788 | ||
e818a5b4 SG |
789 | /* |
790 | * queues are not a live anymore, so restart the queues to fail fast | |
791 | * new IO | |
792 | */ | |
793 | blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true); | |
794 | nvme_start_queues(&ctrl->ctrl); | |
795 | ||
fd8563ce | 796 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
797 | } |
798 | ||
799 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
800 | { | |
801 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
802 | return; | |
803 | ||
9a6327d2 | 804 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
805 | } |
806 | ||
807 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
808 | const char *op) | |
809 | { | |
810 | struct nvme_rdma_queue *queue = cq->cq_context; | |
811 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
812 | ||
813 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
814 | dev_info(ctrl->ctrl.device, | |
815 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
816 | op, wc->wr_cqe, | |
817 | ib_wc_status_msg(wc->status), wc->status); | |
818 | nvme_rdma_error_recovery(ctrl); | |
819 | } | |
820 | ||
821 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
822 | { | |
823 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
824 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
825 | } | |
826 | ||
827 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
828 | { | |
829 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
830 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); | |
831 | } | |
832 | ||
833 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
834 | struct nvme_rdma_request *req) | |
835 | { | |
836 | struct ib_send_wr *bad_wr; | |
837 | struct ib_send_wr wr = { | |
838 | .opcode = IB_WR_LOCAL_INV, | |
839 | .next = NULL, | |
840 | .num_sge = 0, | |
841 | .send_flags = 0, | |
842 | .ex.invalidate_rkey = req->mr->rkey, | |
843 | }; | |
844 | ||
845 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
846 | wr.wr_cqe = &req->reg_cqe; | |
847 | ||
848 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
849 | } | |
850 | ||
851 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
852 | struct request *rq) | |
853 | { | |
854 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
855 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
856 | struct nvme_rdma_device *dev = queue->device; | |
857 | struct ib_device *ibdev = dev->dev; | |
858 | int res; | |
859 | ||
860 | if (!blk_rq_bytes(rq)) | |
861 | return; | |
862 | ||
f5b7b559 | 863 | if (req->mr->need_inval) { |
71102307 CH |
864 | res = nvme_rdma_inv_rkey(queue, req); |
865 | if (res < 0) { | |
866 | dev_err(ctrl->ctrl.device, | |
867 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
868 | req->mr->rkey, res); | |
869 | nvme_rdma_error_recovery(queue->ctrl); | |
870 | } | |
871 | } | |
872 | ||
873 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
874 | req->nents, rq_data_dir(rq) == | |
875 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
876 | ||
877 | nvme_cleanup_cmd(rq); | |
878 | sg_free_table_chained(&req->sg_table, true); | |
879 | } | |
880 | ||
881 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
882 | { | |
883 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
884 | ||
885 | sg->addr = 0; | |
886 | put_unaligned_le24(0, sg->length); | |
887 | put_unaligned_le32(0, sg->key); | |
888 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
889 | return 0; | |
890 | } | |
891 | ||
892 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
893 | struct nvme_rdma_request *req, struct nvme_command *c) | |
894 | { | |
895 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
896 | ||
897 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
898 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
899 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
900 | ||
901 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
902 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
903 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
904 | ||
905 | req->inline_data = true; | |
906 | req->num_sge++; | |
907 | return 0; | |
908 | } | |
909 | ||
910 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
911 | struct nvme_rdma_request *req, struct nvme_command *c) | |
912 | { | |
913 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
914 | ||
915 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
916 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 917 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
918 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
919 | return 0; | |
920 | } | |
921 | ||
922 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
923 | struct nvme_rdma_request *req, struct nvme_command *c, | |
924 | int count) | |
925 | { | |
926 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
927 | int nr; | |
928 | ||
929 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE); | |
930 | if (nr < count) { | |
931 | if (nr < 0) | |
932 | return nr; | |
933 | return -EINVAL; | |
934 | } | |
935 | ||
936 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
937 | ||
938 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
939 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
940 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
941 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
942 | req->reg_wr.wr.num_sge = 0; | |
943 | req->reg_wr.mr = req->mr; | |
944 | req->reg_wr.key = req->mr->rkey; | |
945 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
946 | IB_ACCESS_REMOTE_READ | | |
947 | IB_ACCESS_REMOTE_WRITE; | |
948 | ||
f5b7b559 | 949 | req->mr->need_inval = true; |
71102307 CH |
950 | |
951 | sg->addr = cpu_to_le64(req->mr->iova); | |
952 | put_unaligned_le24(req->mr->length, sg->length); | |
953 | put_unaligned_le32(req->mr->rkey, sg->key); | |
954 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
955 | NVME_SGL_FMT_INVALIDATE; | |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
960 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 961 | struct request *rq, struct nvme_command *c) |
71102307 CH |
962 | { |
963 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
964 | struct nvme_rdma_device *dev = queue->device; | |
965 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 966 | int count, ret; |
71102307 CH |
967 | |
968 | req->num_sge = 1; | |
969 | req->inline_data = false; | |
f5b7b559 | 970 | req->mr->need_inval = false; |
71102307 CH |
971 | |
972 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
973 | ||
974 | if (!blk_rq_bytes(rq)) | |
975 | return nvme_rdma_set_sg_null(c); | |
976 | ||
977 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
978 | ret = sg_alloc_table_chained(&req->sg_table, |
979 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
980 | if (ret) |
981 | return -ENOMEM; | |
982 | ||
f9d03f96 | 983 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 984 | |
f9d03f96 | 985 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
986 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
987 | if (unlikely(count <= 0)) { | |
988 | sg_free_table_chained(&req->sg_table, true); | |
989 | return -EIO; | |
990 | } | |
991 | ||
992 | if (count == 1) { | |
b131c61d CH |
993 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
994 | blk_rq_payload_bytes(rq) <= | |
995 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
996 | return nvme_rdma_map_sg_inline(queue, req, c); |
997 | ||
11975e01 | 998 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
999 | return nvme_rdma_map_sg_single(queue, req, c); |
1000 | } | |
1001 | ||
1002 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
1003 | } | |
1004 | ||
1005 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1006 | { | |
1007 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1008 | nvme_rdma_wr_error(cq, wc, "SEND"); | |
1009 | } | |
1010 | ||
0544f549 MR |
1011 | static inline int nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue) |
1012 | { | |
1013 | int sig_limit; | |
1014 | ||
1015 | /* | |
1016 | * We signal completion every queue depth/2 and also handle the | |
1017 | * degenerated case of a device with queue_depth=1, where we | |
1018 | * would need to signal every message. | |
1019 | */ | |
1020 | sig_limit = max(queue->queue_size / 2, 1); | |
1021 | return (++queue->sig_count % sig_limit) == 0; | |
1022 | } | |
1023 | ||
71102307 CH |
1024 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
1025 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
1026 | struct ib_send_wr *first, bool flush) | |
1027 | { | |
1028 | struct ib_send_wr wr, *bad_wr; | |
1029 | int ret; | |
1030 | ||
1031 | sge->addr = qe->dma; | |
1032 | sge->length = sizeof(struct nvme_command), | |
1033 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1034 | ||
1035 | qe->cqe.done = nvme_rdma_send_done; | |
1036 | ||
1037 | wr.next = NULL; | |
1038 | wr.wr_cqe = &qe->cqe; | |
1039 | wr.sg_list = sge; | |
1040 | wr.num_sge = num_sge; | |
1041 | wr.opcode = IB_WR_SEND; | |
1042 | wr.send_flags = 0; | |
1043 | ||
1044 | /* | |
1045 | * Unsignalled send completions are another giant desaster in the | |
1046 | * IB Verbs spec: If we don't regularly post signalled sends | |
1047 | * the send queue will fill up and only a QP reset will rescue us. | |
1048 | * Would have been way to obvious to handle this in hardware or | |
1049 | * at least the RDMA stack.. | |
1050 | * | |
71102307 CH |
1051 | * Always signal the flushes. The magic request used for the flush |
1052 | * sequencer is not allocated in our driver's tagset and it's | |
1053 | * triggered to be freed by blk_cleanup_queue(). So we need to | |
1054 | * always mark it as signaled to ensure that the "wr_cqe", which is | |
b43daedc | 1055 | * embedded in request's payload, is not freed when __ib_process_cq() |
71102307 CH |
1056 | * calls wr_cqe->done(). |
1057 | */ | |
0544f549 | 1058 | if (nvme_rdma_queue_sig_limit(queue) || flush) |
71102307 CH |
1059 | wr.send_flags |= IB_SEND_SIGNALED; |
1060 | ||
1061 | if (first) | |
1062 | first->next = ≀ | |
1063 | else | |
1064 | first = ≀ | |
1065 | ||
1066 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
1067 | if (ret) { | |
1068 | dev_err(queue->ctrl->ctrl.device, | |
1069 | "%s failed with error code %d\n", __func__, ret); | |
1070 | } | |
1071 | return ret; | |
1072 | } | |
1073 | ||
1074 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1075 | struct nvme_rdma_qe *qe) | |
1076 | { | |
1077 | struct ib_recv_wr wr, *bad_wr; | |
1078 | struct ib_sge list; | |
1079 | int ret; | |
1080 | ||
1081 | list.addr = qe->dma; | |
1082 | list.length = sizeof(struct nvme_completion); | |
1083 | list.lkey = queue->device->pd->local_dma_lkey; | |
1084 | ||
1085 | qe->cqe.done = nvme_rdma_recv_done; | |
1086 | ||
1087 | wr.next = NULL; | |
1088 | wr.wr_cqe = &qe->cqe; | |
1089 | wr.sg_list = &list; | |
1090 | wr.num_sge = 1; | |
1091 | ||
1092 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
1093 | if (ret) { | |
1094 | dev_err(queue->ctrl->ctrl.device, | |
1095 | "%s failed with error code %d\n", __func__, ret); | |
1096 | } | |
1097 | return ret; | |
1098 | } | |
1099 | ||
1100 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1101 | { | |
1102 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1103 | ||
1104 | if (queue_idx == 0) | |
1105 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1106 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1107 | } | |
1108 | ||
1109 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx) | |
1110 | { | |
1111 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1112 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1113 | struct ib_device *dev = queue->device->dev; | |
1114 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1115 | struct nvme_command *cmd = sqe->data; | |
1116 | struct ib_sge sge; | |
1117 | int ret; | |
1118 | ||
1119 | if (WARN_ON_ONCE(aer_idx != 0)) | |
1120 | return; | |
1121 | ||
1122 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); | |
1123 | ||
1124 | memset(cmd, 0, sizeof(*cmd)); | |
1125 | cmd->common.opcode = nvme_admin_async_event; | |
1126 | cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1127 | cmd->common.flags |= NVME_CMD_SGL_METABUF; | |
1128 | nvme_rdma_set_sg_null(cmd); | |
1129 | ||
1130 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), | |
1131 | DMA_TO_DEVICE); | |
1132 | ||
1133 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false); | |
1134 | WARN_ON_ONCE(ret); | |
1135 | } | |
1136 | ||
1137 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1138 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1139 | { | |
71102307 CH |
1140 | struct request *rq; |
1141 | struct nvme_rdma_request *req; | |
1142 | int ret = 0; | |
1143 | ||
71102307 CH |
1144 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1145 | if (!rq) { | |
1146 | dev_err(queue->ctrl->ctrl.device, | |
1147 | "tag 0x%x on QP %#x not found\n", | |
1148 | cqe->command_id, queue->qp->qp_num); | |
1149 | nvme_rdma_error_recovery(queue->ctrl); | |
1150 | return ret; | |
1151 | } | |
1152 | req = blk_mq_rq_to_pdu(rq); | |
1153 | ||
71102307 CH |
1154 | if (rq->tag == tag) |
1155 | ret = 1; | |
1156 | ||
1157 | if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) && | |
1158 | wc->ex.invalidate_rkey == req->mr->rkey) | |
f5b7b559 | 1159 | req->mr->need_inval = false; |
71102307 | 1160 | |
27fa9bc5 | 1161 | nvme_end_request(rq, cqe->status, cqe->result); |
71102307 CH |
1162 | return ret; |
1163 | } | |
1164 | ||
1165 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1166 | { | |
1167 | struct nvme_rdma_qe *qe = | |
1168 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1169 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1170 | struct ib_device *ibdev = queue->device->dev; | |
1171 | struct nvme_completion *cqe = qe->data; | |
1172 | const size_t len = sizeof(struct nvme_completion); | |
1173 | int ret = 0; | |
1174 | ||
1175 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1176 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1177 | return 0; | |
1178 | } | |
1179 | ||
1180 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1181 | /* | |
1182 | * AEN requests are special as they don't time out and can | |
1183 | * survive any kind of queue freeze and often don't respond to | |
1184 | * aborts. We don't even bother to allocate a struct request | |
1185 | * for them but rather special case them here. | |
1186 | */ | |
1187 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
1188 | cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH)) | |
7bf58533 CH |
1189 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1190 | &cqe->result); | |
71102307 CH |
1191 | else |
1192 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1193 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1194 | ||
1195 | nvme_rdma_post_recv(queue, qe); | |
1196 | return ret; | |
1197 | } | |
1198 | ||
1199 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1200 | { | |
1201 | __nvme_rdma_recv_done(cq, wc, -1); | |
1202 | } | |
1203 | ||
1204 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1205 | { | |
1206 | int ret, i; | |
1207 | ||
1208 | for (i = 0; i < queue->queue_size; i++) { | |
1209 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1210 | if (ret) | |
1211 | goto out_destroy_queue_ib; | |
1212 | } | |
1213 | ||
1214 | return 0; | |
1215 | ||
1216 | out_destroy_queue_ib: | |
1217 | nvme_rdma_destroy_queue_ib(queue); | |
1218 | return ret; | |
1219 | } | |
1220 | ||
1221 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1222 | struct rdma_cm_event *ev) | |
1223 | { | |
7f03953c SW |
1224 | struct rdma_cm_id *cm_id = queue->cm_id; |
1225 | int status = ev->status; | |
1226 | const char *rej_msg; | |
1227 | const struct nvme_rdma_cm_rej *rej_data; | |
1228 | u8 rej_data_len; | |
1229 | ||
1230 | rej_msg = rdma_reject_msg(cm_id, status); | |
1231 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1232 | ||
1233 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1234 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1235 | |
1236 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1237 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1238 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1239 | } else { |
1240 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1241 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1242 | } |
1243 | ||
1244 | return -ECONNRESET; | |
1245 | } | |
1246 | ||
1247 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1248 | { | |
71102307 CH |
1249 | int ret; |
1250 | ||
ca6e95bb SG |
1251 | ret = nvme_rdma_create_queue_ib(queue); |
1252 | if (ret) | |
1253 | return ret; | |
71102307 CH |
1254 | |
1255 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1256 | if (ret) { | |
1257 | dev_err(queue->ctrl->ctrl.device, | |
1258 | "rdma_resolve_route failed (%d).\n", | |
1259 | queue->cm_error); | |
1260 | goto out_destroy_queue; | |
1261 | } | |
1262 | ||
1263 | return 0; | |
1264 | ||
1265 | out_destroy_queue: | |
1266 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1267 | return ret; |
1268 | } | |
1269 | ||
1270 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1271 | { | |
1272 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1273 | struct rdma_conn_param param = { }; | |
0b857b44 | 1274 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1275 | int ret; |
1276 | ||
1277 | param.qp_num = queue->qp->qp_num; | |
1278 | param.flow_control = 1; | |
1279 | ||
1280 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1281 | /* maximum retry count */ |
1282 | param.retry_count = 7; | |
71102307 CH |
1283 | param.rnr_retry_count = 7; |
1284 | param.private_data = &priv; | |
1285 | param.private_data_len = sizeof(priv); | |
1286 | ||
1287 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1288 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1289 | /* |
1290 | * set the admin queue depth to the minimum size | |
1291 | * specified by the Fabrics standard. | |
1292 | */ | |
1293 | if (priv.qid == 0) { | |
7aa1f427 SG |
1294 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1295 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1296 | } else { |
c5af8654 JF |
1297 | /* |
1298 | * current interpretation of the fabrics spec | |
1299 | * is at minimum you make hrqsize sqsize+1, or a | |
1300 | * 1's based representation of sqsize. | |
1301 | */ | |
f994d9dc | 1302 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1303 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1304 | } |
71102307 CH |
1305 | |
1306 | ret = rdma_connect(queue->cm_id, ¶m); | |
1307 | if (ret) { | |
1308 | dev_err(ctrl->ctrl.device, | |
1309 | "rdma_connect failed (%d).\n", ret); | |
1310 | goto out_destroy_queue_ib; | |
1311 | } | |
1312 | ||
1313 | return 0; | |
1314 | ||
1315 | out_destroy_queue_ib: | |
1316 | nvme_rdma_destroy_queue_ib(queue); | |
1317 | return ret; | |
1318 | } | |
1319 | ||
71102307 CH |
1320 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1321 | struct rdma_cm_event *ev) | |
1322 | { | |
1323 | struct nvme_rdma_queue *queue = cm_id->context; | |
1324 | int cm_error = 0; | |
1325 | ||
1326 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1327 | rdma_event_msg(ev->event), ev->event, | |
1328 | ev->status, cm_id); | |
1329 | ||
1330 | switch (ev->event) { | |
1331 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1332 | cm_error = nvme_rdma_addr_resolved(queue); | |
1333 | break; | |
1334 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1335 | cm_error = nvme_rdma_route_resolved(queue); | |
1336 | break; | |
1337 | case RDMA_CM_EVENT_ESTABLISHED: | |
1338 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1339 | /* complete cm_done regardless of success/failure */ | |
1340 | complete(&queue->cm_done); | |
1341 | return 0; | |
1342 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1343 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1344 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1345 | break; | |
71102307 CH |
1346 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1347 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1348 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e SG |
1349 | nvme_rdma_destroy_queue_ib(queue); |
1350 | case RDMA_CM_EVENT_ADDR_ERROR: | |
71102307 CH |
1351 | dev_dbg(queue->ctrl->ctrl.device, |
1352 | "CM error event %d\n", ev->event); | |
1353 | cm_error = -ECONNRESET; | |
1354 | break; | |
1355 | case RDMA_CM_EVENT_DISCONNECTED: | |
1356 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1357 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1358 | dev_dbg(queue->ctrl->ctrl.device, | |
1359 | "disconnect received - connection closed\n"); | |
1360 | nvme_rdma_error_recovery(queue->ctrl); | |
1361 | break; | |
1362 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1363 | /* device removal is handled via the ib_client API */ |
1364 | break; | |
71102307 CH |
1365 | default: |
1366 | dev_err(queue->ctrl->ctrl.device, | |
1367 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1368 | nvme_rdma_error_recovery(queue->ctrl); | |
1369 | break; | |
1370 | } | |
1371 | ||
1372 | if (cm_error) { | |
1373 | queue->cm_error = cm_error; | |
1374 | complete(&queue->cm_done); | |
1375 | } | |
1376 | ||
1377 | return 0; | |
1378 | } | |
1379 | ||
1380 | static enum blk_eh_timer_return | |
1381 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1382 | { | |
1383 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1384 | ||
1385 | /* queue error recovery */ | |
1386 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1387 | ||
1388 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1389 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1390 | |
1391 | return BLK_EH_HANDLED; | |
1392 | } | |
1393 | ||
553cd9ef CH |
1394 | /* |
1395 | * We cannot accept any other command until the Connect command has completed. | |
1396 | */ | |
a104c9f2 CH |
1397 | static inline blk_status_t |
1398 | nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq) | |
553cd9ef CH |
1399 | { |
1400 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { | |
1392370e | 1401 | struct nvme_command *cmd = nvme_req(rq)->cmd; |
553cd9ef | 1402 | |
57292b58 | 1403 | if (!blk_rq_is_passthrough(rq) || |
553cd9ef | 1404 | cmd->common.opcode != nvme_fabrics_command || |
e818a5b4 SG |
1405 | cmd->fabrics.fctype != nvme_fabrics_type_connect) { |
1406 | /* | |
1407 | * reconnecting state means transport disruption, which | |
1408 | * can take a long time and even might fail permanently, | |
1409 | * so we can't let incoming I/O be requeued forever. | |
1410 | * fail it fast to allow upper layers a chance to | |
1411 | * failover. | |
1412 | */ | |
1413 | if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
a104c9f2 CH |
1414 | return BLK_STS_IOERR; |
1415 | return BLK_STS_RESOURCE; /* try again later */ | |
e818a5b4 | 1416 | } |
553cd9ef CH |
1417 | } |
1418 | ||
e818a5b4 | 1419 | return 0; |
553cd9ef CH |
1420 | } |
1421 | ||
fc17b653 | 1422 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1423 | const struct blk_mq_queue_data *bd) |
1424 | { | |
1425 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1426 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1427 | struct request *rq = bd->rq; | |
1428 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1429 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1430 | struct nvme_command *c = sqe->data; | |
1431 | bool flush = false; | |
1432 | struct ib_device *dev; | |
fc17b653 CH |
1433 | blk_status_t ret; |
1434 | int err; | |
71102307 CH |
1435 | |
1436 | WARN_ON_ONCE(rq->tag < 0); | |
1437 | ||
e818a5b4 SG |
1438 | ret = nvme_rdma_queue_is_ready(queue, rq); |
1439 | if (unlikely(ret)) | |
a104c9f2 | 1440 | return ret; |
553cd9ef | 1441 | |
71102307 CH |
1442 | dev = queue->device->dev; |
1443 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1444 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1445 | ||
1446 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1447 | if (ret) |
71102307 CH |
1448 | return ret; |
1449 | ||
71102307 CH |
1450 | blk_mq_start_request(rq); |
1451 | ||
fc17b653 CH |
1452 | err = nvme_rdma_map_data(queue, rq, c); |
1453 | if (err < 0) { | |
71102307 | 1454 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1455 | "Failed to map data (%d)\n", err); |
71102307 CH |
1456 | nvme_cleanup_cmd(rq); |
1457 | goto err; | |
1458 | } | |
1459 | ||
1460 | ib_dma_sync_single_for_device(dev, sqe->dma, | |
1461 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1462 | ||
aebf526b | 1463 | if (req_op(rq) == REQ_OP_FLUSH) |
71102307 | 1464 | flush = true; |
fc17b653 | 1465 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f5b7b559 | 1466 | req->mr->need_inval ? &req->reg_wr.wr : NULL, flush); |
fc17b653 | 1467 | if (err) { |
71102307 CH |
1468 | nvme_rdma_unmap_data(queue, rq); |
1469 | goto err; | |
1470 | } | |
1471 | ||
fc17b653 | 1472 | return BLK_STS_OK; |
71102307 | 1473 | err: |
fc17b653 CH |
1474 | if (err == -ENOMEM || err == -EAGAIN) |
1475 | return BLK_STS_RESOURCE; | |
1476 | return BLK_STS_IOERR; | |
71102307 CH |
1477 | } |
1478 | ||
1479 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1480 | { | |
1481 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1482 | struct ib_cq *cq = queue->ib_cq; | |
1483 | struct ib_wc wc; | |
1484 | int found = 0; | |
1485 | ||
71102307 CH |
1486 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1487 | struct ib_cqe *cqe = wc.wr_cqe; | |
1488 | ||
1489 | if (cqe) { | |
1490 | if (cqe->done == nvme_rdma_recv_done) | |
1491 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1492 | else | |
1493 | cqe->done(cq, &wc); | |
1494 | } | |
1495 | } | |
1496 | ||
1497 | return found; | |
1498 | } | |
1499 | ||
1500 | static void nvme_rdma_complete_rq(struct request *rq) | |
1501 | { | |
1502 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1503 | |
77f02a7a CH |
1504 | nvme_rdma_unmap_data(req->queue, rq); |
1505 | nvme_complete_rq(rq); | |
71102307 CH |
1506 | } |
1507 | ||
f363b089 | 1508 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1509 | .queue_rq = nvme_rdma_queue_rq, |
1510 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1511 | .init_request = nvme_rdma_init_request, |
1512 | .exit_request = nvme_rdma_exit_request, | |
1513 | .reinit_request = nvme_rdma_reinit_request, | |
1514 | .init_hctx = nvme_rdma_init_hctx, | |
1515 | .poll = nvme_rdma_poll, | |
1516 | .timeout = nvme_rdma_timeout, | |
1517 | }; | |
1518 | ||
f363b089 | 1519 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1520 | .queue_rq = nvme_rdma_queue_rq, |
1521 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1522 | .init_request = nvme_rdma_init_request, |
1523 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1524 | .reinit_request = nvme_rdma_reinit_request, |
1525 | .init_hctx = nvme_rdma_init_admin_hctx, | |
1526 | .timeout = nvme_rdma_timeout, | |
1527 | }; | |
1528 | ||
1529 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
1530 | { | |
1531 | int error; | |
1532 | ||
7aa1f427 | 1533 | error = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
1534 | if (error) |
1535 | return error; | |
1536 | ||
1537 | ctrl->device = ctrl->queues[0].device; | |
1538 | ||
1539 | /* | |
1540 | * We need a reference on the device as long as the tag_set is alive, | |
1541 | * as the MRs in the request structures need a valid ib_device. | |
1542 | */ | |
1543 | error = -EINVAL; | |
1544 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1545 | goto out_free_queue; | |
1546 | ||
1547 | ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS, | |
1548 | ctrl->device->dev->attrs.max_fast_reg_page_list_len); | |
1549 | ||
1550 | memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set)); | |
1551 | ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops; | |
1552 | ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1553 | ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */ | |
1554 | ctrl->admin_tag_set.numa_node = NUMA_NO_NODE; | |
1555 | ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1556 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1557 | ctrl->admin_tag_set.driver_data = ctrl; | |
1558 | ctrl->admin_tag_set.nr_hw_queues = 1; | |
1559 | ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT; | |
1560 | ||
1561 | error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set); | |
1562 | if (error) | |
1563 | goto out_put_dev; | |
1564 | ||
1565 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); | |
1566 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
1567 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
1568 | goto out_free_tagset; | |
1569 | } | |
1570 | ||
1571 | error = nvmf_connect_admin_queue(&ctrl->ctrl); | |
1572 | if (error) | |
1573 | goto out_cleanup_queue; | |
1574 | ||
553cd9ef CH |
1575 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
1576 | ||
71102307 CH |
1577 | error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap); |
1578 | if (error) { | |
1579 | dev_err(ctrl->ctrl.device, | |
1580 | "prop_get NVME_REG_CAP failed\n"); | |
1581 | goto out_cleanup_queue; | |
1582 | } | |
1583 | ||
1584 | ctrl->ctrl.sqsize = | |
1af76dda | 1585 | min_t(int, NVME_CAP_MQES(ctrl->cap), ctrl->ctrl.sqsize); |
71102307 CH |
1586 | |
1587 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap); | |
1588 | if (error) | |
1589 | goto out_cleanup_queue; | |
1590 | ||
1591 | ctrl->ctrl.max_hw_sectors = | |
1592 | (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9); | |
1593 | ||
1594 | error = nvme_init_identify(&ctrl->ctrl); | |
1595 | if (error) | |
1596 | goto out_cleanup_queue; | |
1597 | ||
1598 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
1599 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
1600 | DMA_TO_DEVICE); | |
1601 | if (error) | |
1602 | goto out_cleanup_queue; | |
1603 | ||
1604 | nvme_start_keep_alive(&ctrl->ctrl); | |
1605 | ||
1606 | return 0; | |
1607 | ||
1608 | out_cleanup_queue: | |
1609 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
1610 | out_free_tagset: | |
1611 | /* disconnect and drain the queue before freeing the tagset */ | |
1612 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
1613 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
1614 | out_put_dev: | |
1615 | nvme_rdma_dev_put(ctrl->device); | |
1616 | out_free_queue: | |
1617 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
1618 | return error; | |
1619 | } | |
1620 | ||
1621 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1622 | { | |
1623 | nvme_stop_keep_alive(&ctrl->ctrl); | |
1624 | cancel_work_sync(&ctrl->err_work); | |
1625 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1626 | ||
1627 | if (ctrl->queue_count > 1) { | |
1628 | nvme_stop_queues(&ctrl->ctrl); | |
1629 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1630 | nvme_cancel_request, &ctrl->ctrl); | |
1631 | nvme_rdma_free_io_queues(ctrl); | |
1632 | } | |
1633 | ||
b282a88d | 1634 | if (test_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags)) |
71102307 CH |
1635 | nvme_shutdown_ctrl(&ctrl->ctrl); |
1636 | ||
1637 | blk_mq_stop_hw_queues(ctrl->ctrl.admin_q); | |
1638 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
1639 | nvme_cancel_request, &ctrl->ctrl); | |
1640 | nvme_rdma_destroy_admin_queue(ctrl); | |
1641 | } | |
1642 | ||
2461a8dd SG |
1643 | static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
1644 | { | |
1645 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1646 | if (shutdown) | |
1647 | nvme_rdma_shutdown_ctrl(ctrl); | |
a34ca17a SG |
1648 | |
1649 | if (ctrl->ctrl.tagset) { | |
1650 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1651 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1652 | nvme_rdma_dev_put(ctrl->device); | |
1653 | } | |
1654 | ||
2461a8dd SG |
1655 | nvme_put_ctrl(&ctrl->ctrl); |
1656 | } | |
1657 | ||
71102307 CH |
1658 | static void nvme_rdma_del_ctrl_work(struct work_struct *work) |
1659 | { | |
1660 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1661 | struct nvme_rdma_ctrl, delete_work); | |
1662 | ||
2461a8dd | 1663 | __nvme_rdma_remove_ctrl(ctrl, true); |
71102307 CH |
1664 | } |
1665 | ||
1666 | static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1667 | { | |
1668 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING)) | |
1669 | return -EBUSY; | |
1670 | ||
9a6327d2 | 1671 | if (!queue_work(nvme_wq, &ctrl->delete_work)) |
71102307 CH |
1672 | return -EBUSY; |
1673 | ||
1674 | return 0; | |
1675 | } | |
1676 | ||
1677 | static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl) | |
1678 | { | |
1679 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
cdbecc8d | 1680 | int ret = 0; |
71102307 | 1681 | |
cdbecc8d SW |
1682 | /* |
1683 | * Keep a reference until all work is flushed since | |
1684 | * __nvme_rdma_del_ctrl can free the ctrl mem | |
1685 | */ | |
1686 | if (!kref_get_unless_zero(&ctrl->ctrl.kref)) | |
1687 | return -EBUSY; | |
71102307 | 1688 | ret = __nvme_rdma_del_ctrl(ctrl); |
cdbecc8d SW |
1689 | if (!ret) |
1690 | flush_work(&ctrl->delete_work); | |
1691 | nvme_put_ctrl(&ctrl->ctrl); | |
1692 | return ret; | |
71102307 CH |
1693 | } |
1694 | ||
1695 | static void nvme_rdma_remove_ctrl_work(struct work_struct *work) | |
1696 | { | |
1697 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1698 | struct nvme_rdma_ctrl, delete_work); | |
1699 | ||
2461a8dd | 1700 | __nvme_rdma_remove_ctrl(ctrl, false); |
71102307 CH |
1701 | } |
1702 | ||
1703 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) | |
1704 | { | |
d86c4d8e CH |
1705 | struct nvme_rdma_ctrl *ctrl = |
1706 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 CH |
1707 | int ret; |
1708 | bool changed; | |
1709 | ||
1710 | nvme_rdma_shutdown_ctrl(ctrl); | |
1711 | ||
1712 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1713 | if (ret) { | |
1714 | /* ctrl is already shutdown, just remove the ctrl */ | |
1715 | INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work); | |
1716 | goto del_dead_ctrl; | |
1717 | } | |
1718 | ||
1719 | if (ctrl->queue_count > 1) { | |
1720 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); | |
1721 | if (ret) | |
1722 | goto del_dead_ctrl; | |
1723 | ||
1724 | ret = nvme_rdma_init_io_queues(ctrl); | |
1725 | if (ret) | |
1726 | goto del_dead_ctrl; | |
1727 | ||
1728 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1729 | if (ret) | |
1730 | goto del_dead_ctrl; | |
1731 | } | |
1732 | ||
1733 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1734 | WARN_ON_ONCE(!changed); | |
1735 | ||
1736 | if (ctrl->queue_count > 1) { | |
1737 | nvme_start_queues(&ctrl->ctrl); | |
1738 | nvme_queue_scan(&ctrl->ctrl); | |
3ef1b4b2 | 1739 | nvme_queue_async_events(&ctrl->ctrl); |
71102307 CH |
1740 | } |
1741 | ||
1742 | return; | |
1743 | ||
1744 | del_dead_ctrl: | |
1745 | /* Deleting this dead controller... */ | |
1746 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); | |
9a6327d2 | 1747 | WARN_ON(!queue_work(nvme_wq, &ctrl->delete_work)); |
71102307 CH |
1748 | } |
1749 | ||
71102307 CH |
1750 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1751 | .name = "rdma", | |
1752 | .module = THIS_MODULE, | |
d3d5b87d | 1753 | .flags = NVME_F_FABRICS, |
71102307 CH |
1754 | .reg_read32 = nvmf_reg_read32, |
1755 | .reg_read64 = nvmf_reg_read64, | |
1756 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1757 | .free_ctrl = nvme_rdma_free_ctrl, |
1758 | .submit_async_event = nvme_rdma_submit_async_event, | |
1759 | .delete_ctrl = nvme_rdma_del_ctrl, | |
71102307 CH |
1760 | .get_address = nvmf_get_address, |
1761 | }; | |
1762 | ||
1763 | static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl) | |
1764 | { | |
71102307 CH |
1765 | int ret; |
1766 | ||
71102307 CH |
1767 | ret = nvme_rdma_init_io_queues(ctrl); |
1768 | if (ret) | |
1769 | return ret; | |
1770 | ||
1771 | /* | |
1772 | * We need a reference on the device as long as the tag_set is alive, | |
1773 | * as the MRs in the request structures need a valid ib_device. | |
1774 | */ | |
1775 | ret = -EINVAL; | |
1776 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1777 | goto out_free_io_queues; | |
1778 | ||
1779 | memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set)); | |
1780 | ctrl->tag_set.ops = &nvme_rdma_mq_ops; | |
c5af8654 | 1781 | ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size; |
71102307 CH |
1782 | ctrl->tag_set.reserved_tags = 1; /* fabric connect */ |
1783 | ctrl->tag_set.numa_node = NUMA_NO_NODE; | |
1784 | ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE; | |
1785 | ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1786 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1787 | ctrl->tag_set.driver_data = ctrl; | |
1788 | ctrl->tag_set.nr_hw_queues = ctrl->queue_count - 1; | |
1789 | ctrl->tag_set.timeout = NVME_IO_TIMEOUT; | |
1790 | ||
1791 | ret = blk_mq_alloc_tag_set(&ctrl->tag_set); | |
1792 | if (ret) | |
1793 | goto out_put_dev; | |
1794 | ctrl->ctrl.tagset = &ctrl->tag_set; | |
1795 | ||
1796 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
1797 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
1798 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
1799 | goto out_free_tag_set; | |
1800 | } | |
1801 | ||
1802 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1803 | if (ret) | |
1804 | goto out_cleanup_connect_q; | |
1805 | ||
1806 | return 0; | |
1807 | ||
1808 | out_cleanup_connect_q: | |
1809 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1810 | out_free_tag_set: | |
1811 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1812 | out_put_dev: | |
1813 | nvme_rdma_dev_put(ctrl->device); | |
1814 | out_free_io_queues: | |
1815 | nvme_rdma_free_io_queues(ctrl); | |
1816 | return ret; | |
1817 | } | |
1818 | ||
71102307 CH |
1819 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1820 | struct nvmf_ctrl_options *opts) | |
1821 | { | |
1822 | struct nvme_rdma_ctrl *ctrl; | |
1823 | int ret; | |
1824 | bool changed; | |
0928f9b4 | 1825 | char *port; |
71102307 CH |
1826 | |
1827 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1828 | if (!ctrl) | |
1829 | return ERR_PTR(-ENOMEM); | |
1830 | ctrl->ctrl.opts = opts; | |
1831 | INIT_LIST_HEAD(&ctrl->list); | |
1832 | ||
0928f9b4 SG |
1833 | if (opts->mask & NVMF_OPT_TRSVCID) |
1834 | port = opts->trsvcid; | |
1835 | else | |
1836 | port = __stringify(NVME_RDMA_IP_PORT); | |
1837 | ||
1838 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1839 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1840 | if (ret) { |
0928f9b4 | 1841 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1842 | goto out_free_ctrl; |
1843 | } | |
1844 | ||
8f4e8dac | 1845 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1846 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1847 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1848 | if (ret) { |
0928f9b4 | 1849 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1850 | opts->host_traddr); |
1851 | goto out_free_ctrl; | |
1852 | } | |
1853 | } | |
1854 | ||
71102307 CH |
1855 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1856 | 0 /* no quirks, we're perfect! */); | |
1857 | if (ret) | |
1858 | goto out_free_ctrl; | |
1859 | ||
71102307 CH |
1860 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1861 | nvme_rdma_reconnect_ctrl_work); | |
1862 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
1863 | INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work); | |
d86c4d8e | 1864 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 CH |
1865 | |
1866 | ctrl->queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ | |
c5af8654 | 1867 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1868 | ctrl->ctrl.kato = opts->kato; |
1869 | ||
1870 | ret = -ENOMEM; | |
1871 | ctrl->queues = kcalloc(ctrl->queue_count, sizeof(*ctrl->queues), | |
1872 | GFP_KERNEL); | |
1873 | if (!ctrl->queues) | |
1874 | goto out_uninit_ctrl; | |
1875 | ||
1876 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1877 | if (ret) | |
1878 | goto out_kfree_queues; | |
1879 | ||
1880 | /* sanity check icdoff */ | |
1881 | if (ctrl->ctrl.icdoff) { | |
1882 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
bb472baa | 1883 | ret = -EINVAL; |
71102307 CH |
1884 | goto out_remove_admin_queue; |
1885 | } | |
1886 | ||
1887 | /* sanity check keyed sgls */ | |
1888 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1889 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
bb472baa | 1890 | ret = -EINVAL; |
71102307 CH |
1891 | goto out_remove_admin_queue; |
1892 | } | |
1893 | ||
1894 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1895 | /* warn if maxcmd is lower than queue_size */ | |
1896 | dev_warn(ctrl->ctrl.device, | |
1897 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1898 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1899 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1900 | } | |
1901 | ||
76c08bf4 SJ |
1902 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1903 | /* warn if sqsize is lower than queue_size */ | |
1904 | dev_warn(ctrl->ctrl.device, | |
1905 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1906 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1907 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1908 | } | |
1909 | ||
71102307 CH |
1910 | if (opts->nr_io_queues) { |
1911 | ret = nvme_rdma_create_io_queues(ctrl); | |
1912 | if (ret) | |
1913 | goto out_remove_admin_queue; | |
1914 | } | |
1915 | ||
1916 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1917 | WARN_ON_ONCE(!changed); | |
1918 | ||
0928f9b4 | 1919 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1920 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1921 | ||
1922 | kref_get(&ctrl->ctrl.kref); | |
1923 | ||
1924 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1925 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1926 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1927 | ||
1928 | if (opts->nr_io_queues) { | |
1929 | nvme_queue_scan(&ctrl->ctrl); | |
1930 | nvme_queue_async_events(&ctrl->ctrl); | |
1931 | } | |
1932 | ||
1933 | return &ctrl->ctrl; | |
1934 | ||
1935 | out_remove_admin_queue: | |
1936 | nvme_stop_keep_alive(&ctrl->ctrl); | |
1937 | nvme_rdma_destroy_admin_queue(ctrl); | |
1938 | out_kfree_queues: | |
1939 | kfree(ctrl->queues); | |
1940 | out_uninit_ctrl: | |
1941 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1942 | nvme_put_ctrl(&ctrl->ctrl); | |
1943 | if (ret > 0) | |
1944 | ret = -EIO; | |
1945 | return ERR_PTR(ret); | |
1946 | out_free_ctrl: | |
1947 | kfree(ctrl); | |
1948 | return ERR_PTR(ret); | |
1949 | } | |
1950 | ||
1951 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
1952 | .name = "rdma", | |
1953 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 1954 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 1955 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
1956 | .create_ctrl = nvme_rdma_create_ctrl, |
1957 | }; | |
1958 | ||
e87a911f SW |
1959 | static void nvme_rdma_add_one(struct ib_device *ib_device) |
1960 | { | |
1961 | } | |
1962 | ||
1963 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) | |
1964 | { | |
1965 | struct nvme_rdma_ctrl *ctrl; | |
1966 | ||
1967 | /* Delete all controllers using this device */ | |
1968 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1969 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1970 | if (ctrl->device->dev != ib_device) | |
1971 | continue; | |
1972 | dev_info(ctrl->ctrl.device, | |
1973 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
1974 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
1975 | __nvme_rdma_del_ctrl(ctrl); | |
1976 | } | |
1977 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1978 | ||
9a6327d2 | 1979 | flush_workqueue(nvme_wq); |
e87a911f SW |
1980 | } |
1981 | ||
1982 | static struct ib_client nvme_rdma_ib_client = { | |
1983 | .name = "nvme_rdma", | |
1984 | .add = nvme_rdma_add_one, | |
1985 | .remove = nvme_rdma_remove_one | |
1986 | }; | |
1987 | ||
71102307 CH |
1988 | static int __init nvme_rdma_init_module(void) |
1989 | { | |
e87a911f SW |
1990 | int ret; |
1991 | ||
e87a911f | 1992 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 1993 | if (ret) |
9a6327d2 | 1994 | return ret; |
a56c79cf SG |
1995 | |
1996 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
1997 | if (ret) | |
1998 | goto err_unreg_client; | |
e87a911f | 1999 | |
a56c79cf | 2000 | return 0; |
e87a911f | 2001 | |
a56c79cf SG |
2002 | err_unreg_client: |
2003 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 2004 | return ret; |
71102307 CH |
2005 | } |
2006 | ||
2007 | static void __exit nvme_rdma_cleanup_module(void) | |
2008 | { | |
71102307 | 2009 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2010 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2011 | } |
2012 | ||
2013 | module_init(nvme_rdma_init_module); | |
2014 | module_exit(nvme_rdma_cleanup_module); | |
2015 | ||
2016 | MODULE_LICENSE("GPL v2"); |