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nvme: Move ctrl sqsize to generic space
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CommitLineData
5d8762d5 1// SPDX-License-Identifier: GPL-2.0
71102307
CH
2/*
3 * NVMe over Fabrics RDMA host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
71102307
CH
5 */
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
71102307
CH
7#include <linux/module.h>
8#include <linux/init.h>
9#include <linux/slab.h>
f41725bb 10#include <rdma/mr_pool.h>
71102307
CH
11#include <linux/err.h>
12#include <linux/string.h>
71102307
CH
13#include <linux/atomic.h>
14#include <linux/blk-mq.h>
0b36658c 15#include <linux/blk-mq-rdma.h>
71102307
CH
16#include <linux/types.h>
17#include <linux/list.h>
18#include <linux/mutex.h>
19#include <linux/scatterlist.h>
20#include <linux/nvme.h>
71102307
CH
21#include <asm/unaligned.h>
22
23#include <rdma/ib_verbs.h>
24#include <rdma/rdma_cm.h>
71102307
CH
25#include <linux/nvme-rdma.h>
26
27#include "nvme.h"
28#include "fabrics.h"
29
30
782d820c 31#define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
71102307 32
71102307
CH
33#define NVME_RDMA_MAX_SEGMENTS 256
34
64a741c1 35#define NVME_RDMA_MAX_INLINE_SEGMENTS 4
71102307 36
71102307 37struct nvme_rdma_device {
f87c89ad
MG
38 struct ib_device *dev;
39 struct ib_pd *pd;
71102307
CH
40 struct kref ref;
41 struct list_head entry;
64a741c1 42 unsigned int num_inline_segments;
71102307
CH
43};
44
45struct nvme_rdma_qe {
46 struct ib_cqe cqe;
47 void *data;
48 u64 dma;
49};
50
51struct nvme_rdma_queue;
52struct nvme_rdma_request {
d49187e9 53 struct nvme_request req;
71102307
CH
54 struct ib_mr *mr;
55 struct nvme_rdma_qe sqe;
4af7f7ff
SG
56 union nvme_result result;
57 __le16 status;
58 refcount_t ref;
71102307
CH
59 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
60 u32 num_sge;
61 int nents;
71102307
CH
62 struct ib_reg_wr reg_wr;
63 struct ib_cqe reg_cqe;
64 struct nvme_rdma_queue *queue;
65 struct sg_table sg_table;
66 struct scatterlist first_sgl[];
67};
68
69enum nvme_rdma_queue_flags {
5013e98b
SG
70 NVME_RDMA_Q_ALLOCATED = 0,
71 NVME_RDMA_Q_LIVE = 1,
eb1bd249 72 NVME_RDMA_Q_TR_READY = 2,
71102307
CH
73};
74
75struct nvme_rdma_queue {
76 struct nvme_rdma_qe *rsp_ring;
71102307
CH
77 int queue_size;
78 size_t cmnd_capsule_len;
79 struct nvme_rdma_ctrl *ctrl;
80 struct nvme_rdma_device *device;
81 struct ib_cq *ib_cq;
82 struct ib_qp *qp;
83
84 unsigned long flags;
85 struct rdma_cm_id *cm_id;
86 int cm_error;
87 struct completion cm_done;
88};
89
90struct nvme_rdma_ctrl {
71102307
CH
91 /* read only in the hot path */
92 struct nvme_rdma_queue *queues;
71102307
CH
93
94 /* other member variables */
71102307 95 struct blk_mq_tag_set tag_set;
71102307
CH
96 struct work_struct err_work;
97
98 struct nvme_rdma_qe async_event_sqe;
99
71102307
CH
100 struct delayed_work reconnect_work;
101
102 struct list_head list;
103
104 struct blk_mq_tag_set admin_tag_set;
105 struct nvme_rdma_device *device;
106
71102307
CH
107 u32 max_fr_pages;
108
0928f9b4
SG
109 struct sockaddr_storage addr;
110 struct sockaddr_storage src_addr;
71102307
CH
111
112 struct nvme_ctrl ctrl;
64a741c1 113 bool use_inline_data;
b1064d3e 114 u32 io_queues[HCTX_MAX_TYPES];
71102307
CH
115};
116
117static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
118{
119 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
120}
121
122static LIST_HEAD(device_list);
123static DEFINE_MUTEX(device_list_mutex);
124
125static LIST_HEAD(nvme_rdma_ctrl_list);
126static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
127
71102307
CH
128/*
129 * Disabling this option makes small I/O goes faster, but is fundamentally
130 * unsafe. With it turned off we will have to register a global rkey that
131 * allows read and write access to all physical memory.
132 */
133static bool register_always = true;
134module_param(register_always, bool, 0444);
135MODULE_PARM_DESC(register_always,
136 "Use memory registration even for contiguous memory regions");
137
138static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
139 struct rdma_cm_event *event);
140static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
71102307 141
90af3512
SG
142static const struct blk_mq_ops nvme_rdma_mq_ops;
143static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
144
71102307
CH
145/* XXX: really should move to a generic header sooner or later.. */
146static inline void put_unaligned_le24(u32 val, u8 *p)
147{
148 *p++ = val;
149 *p++ = val >> 8;
150 *p++ = val >> 16;
151}
152
153static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
154{
155 return queue - queue->ctrl->queues;
156}
157
ff8519f9
SG
158static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
159{
160 return nvme_rdma_queue_idx(queue) >
b1064d3e
SG
161 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
162 queue->ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
163}
164
71102307
CH
165static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
166{
167 return queue->cmnd_capsule_len - sizeof(struct nvme_command);
168}
169
170static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
171 size_t capsule_size, enum dma_data_direction dir)
172{
173 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
174 kfree(qe->data);
175}
176
177static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 size_t capsule_size, enum dma_data_direction dir)
179{
180 qe->data = kzalloc(capsule_size, GFP_KERNEL);
181 if (!qe->data)
182 return -ENOMEM;
183
184 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
185 if (ib_dma_mapping_error(ibdev, qe->dma)) {
186 kfree(qe->data);
6344d02d 187 qe->data = NULL;
71102307
CH
188 return -ENOMEM;
189 }
190
191 return 0;
192}
193
194static void nvme_rdma_free_ring(struct ib_device *ibdev,
195 struct nvme_rdma_qe *ring, size_t ib_queue_size,
196 size_t capsule_size, enum dma_data_direction dir)
197{
198 int i;
199
200 for (i = 0; i < ib_queue_size; i++)
201 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
202 kfree(ring);
203}
204
205static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
206 size_t ib_queue_size, size_t capsule_size,
207 enum dma_data_direction dir)
208{
209 struct nvme_rdma_qe *ring;
210 int i;
211
212 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
213 if (!ring)
214 return NULL;
215
62f99b62
MG
216 /*
217 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
218 * lifetime. It's safe, since any chage in the underlying RDMA device
219 * will issue error recovery and queue re-creation.
220 */
71102307
CH
221 for (i = 0; i < ib_queue_size; i++) {
222 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
223 goto out_free_ring;
224 }
225
226 return ring;
227
228out_free_ring:
229 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
230 return NULL;
231}
232
233static void nvme_rdma_qp_event(struct ib_event *event, void *context)
234{
27a4beef
MG
235 pr_debug("QP event %s (%d)\n",
236 ib_event_msg(event->event), event->event);
237
71102307
CH
238}
239
240static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
241{
35da77d5
BVA
242 int ret;
243
244 ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
71102307 245 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
35da77d5
BVA
246 if (ret < 0)
247 return ret;
248 if (ret == 0)
249 return -ETIMEDOUT;
250 WARN_ON_ONCE(queue->cm_error > 0);
71102307
CH
251 return queue->cm_error;
252}
253
254static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
255{
256 struct nvme_rdma_device *dev = queue->device;
257 struct ib_qp_init_attr init_attr;
258 int ret;
259
260 memset(&init_attr, 0, sizeof(init_attr));
261 init_attr.event_handler = nvme_rdma_qp_event;
262 /* +1 for drain */
263 init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
264 /* +1 for drain */
265 init_attr.cap.max_recv_wr = queue->queue_size + 1;
266 init_attr.cap.max_recv_sge = 1;
64a741c1 267 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
71102307
CH
268 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
269 init_attr.qp_type = IB_QPT_RC;
270 init_attr.send_cq = queue->ib_cq;
271 init_attr.recv_cq = queue->ib_cq;
272
273 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
274
275 queue->qp = queue->cm_id->qp;
276 return ret;
277}
278
385475ee
CH
279static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
280 struct request *rq, unsigned int hctx_idx)
71102307
CH
281{
282 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307 283
62f99b62 284 kfree(req->sqe.data);
71102307
CH
285}
286
385475ee
CH
287static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
288 struct request *rq, unsigned int hctx_idx,
289 unsigned int numa_node)
71102307 290{
385475ee 291 struct nvme_rdma_ctrl *ctrl = set->driver_data;
71102307 292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
385475ee 293 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
71102307 294 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
71102307 295
59e29ce6 296 nvme_req(rq)->ctrl = &ctrl->ctrl;
62f99b62
MG
297 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
298 if (!req->sqe.data)
299 return -ENOMEM;
71102307 300
71102307
CH
301 req->queue = queue;
302
303 return 0;
71102307
CH
304}
305
71102307
CH
306static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
307 unsigned int hctx_idx)
308{
309 struct nvme_rdma_ctrl *ctrl = data;
310 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
311
d858e5f0 312 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
71102307
CH
313
314 hctx->driver_data = queue;
315 return 0;
316}
317
318static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
319 unsigned int hctx_idx)
320{
321 struct nvme_rdma_ctrl *ctrl = data;
322 struct nvme_rdma_queue *queue = &ctrl->queues[0];
323
324 BUG_ON(hctx_idx != 0);
325
326 hctx->driver_data = queue;
327 return 0;
328}
329
330static void nvme_rdma_free_dev(struct kref *ref)
331{
332 struct nvme_rdma_device *ndev =
333 container_of(ref, struct nvme_rdma_device, ref);
334
335 mutex_lock(&device_list_mutex);
336 list_del(&ndev->entry);
337 mutex_unlock(&device_list_mutex);
338
71102307 339 ib_dealloc_pd(ndev->pd);
71102307
CH
340 kfree(ndev);
341}
342
343static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
344{
345 kref_put(&dev->ref, nvme_rdma_free_dev);
346}
347
348static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
349{
350 return kref_get_unless_zero(&dev->ref);
351}
352
353static struct nvme_rdma_device *
354nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
355{
356 struct nvme_rdma_device *ndev;
357
358 mutex_lock(&device_list_mutex);
359 list_for_each_entry(ndev, &device_list, entry) {
360 if (ndev->dev->node_guid == cm_id->device->node_guid &&
361 nvme_rdma_dev_get(ndev))
362 goto out_unlock;
363 }
364
365 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
366 if (!ndev)
367 goto out_err;
368
369 ndev->dev = cm_id->device;
370 kref_init(&ndev->ref);
371
11975e01
CH
372 ndev->pd = ib_alloc_pd(ndev->dev,
373 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
71102307
CH
374 if (IS_ERR(ndev->pd))
375 goto out_free_dev;
376
71102307
CH
377 if (!(ndev->dev->attrs.device_cap_flags &
378 IB_DEVICE_MEM_MGT_EXTENSIONS)) {
379 dev_err(&ndev->dev->dev,
380 "Memory registrations not supported.\n");
11975e01 381 goto out_free_pd;
71102307
CH
382 }
383
64a741c1 384 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
0a3173a5 385 ndev->dev->attrs.max_send_sge - 1);
71102307
CH
386 list_add(&ndev->entry, &device_list);
387out_unlock:
388 mutex_unlock(&device_list_mutex);
389 return ndev;
390
71102307
CH
391out_free_pd:
392 ib_dealloc_pd(ndev->pd);
393out_free_dev:
394 kfree(ndev);
395out_err:
396 mutex_unlock(&device_list_mutex);
397 return NULL;
398}
399
400static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
401{
eb1bd249
MG
402 struct nvme_rdma_device *dev;
403 struct ib_device *ibdev;
404
405 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
406 return;
407
408 dev = queue->device;
409 ibdev = dev->dev;
71102307 410
f41725bb
IR
411 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
412
eb1bd249
MG
413 /*
414 * The cm_id object might have been destroyed during RDMA connection
415 * establishment error flow to avoid getting other cma events, thus
416 * the destruction of the QP shouldn't use rdma_cm API.
417 */
418 ib_destroy_qp(queue->qp);
71102307
CH
419 ib_free_cq(queue->ib_cq);
420
421 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
422 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
423
424 nvme_rdma_dev_put(dev);
425}
426
f41725bb
IR
427static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
428{
429 return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
ff13c1b8 430 ibdev->attrs.max_fast_reg_page_list_len - 1);
f41725bb
IR
431}
432
ca6e95bb 433static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
71102307 434{
ca6e95bb 435 struct ib_device *ibdev;
71102307
CH
436 const int send_wr_factor = 3; /* MR, SEND, INV */
437 const int cq_factor = send_wr_factor + 1; /* + RECV */
438 int comp_vector, idx = nvme_rdma_queue_idx(queue);
ff8519f9 439 enum ib_poll_context poll_ctx;
ff13c1b8 440 int ret, pages_per_mr;
71102307 441
ca6e95bb
SG
442 queue->device = nvme_rdma_find_get_device(queue->cm_id);
443 if (!queue->device) {
444 dev_err(queue->cm_id->device->dev.parent,
445 "no client data found!\n");
446 return -ECONNREFUSED;
447 }
448 ibdev = queue->device->dev;
71102307
CH
449
450 /*
0b36658c
SG
451 * Spread I/O queues completion vectors according their queue index.
452 * Admin queues can always go on completion vector 0.
71102307 453 */
0b36658c 454 comp_vector = idx == 0 ? idx : idx - 1;
71102307 455
ff8519f9
SG
456 /* Polling queues need direct cq polling context */
457 if (nvme_rdma_poll_queue(queue))
458 poll_ctx = IB_POLL_DIRECT;
459 else
460 poll_ctx = IB_POLL_SOFTIRQ;
461
71102307 462 /* +1 for ib_stop_cq */
ca6e95bb
SG
463 queue->ib_cq = ib_alloc_cq(ibdev, queue,
464 cq_factor * queue->queue_size + 1,
ff8519f9 465 comp_vector, poll_ctx);
71102307
CH
466 if (IS_ERR(queue->ib_cq)) {
467 ret = PTR_ERR(queue->ib_cq);
ca6e95bb 468 goto out_put_dev;
71102307
CH
469 }
470
471 ret = nvme_rdma_create_qp(queue, send_wr_factor);
472 if (ret)
473 goto out_destroy_ib_cq;
474
475 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
476 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
477 if (!queue->rsp_ring) {
478 ret = -ENOMEM;
479 goto out_destroy_qp;
480 }
481
ff13c1b8
MG
482 /*
483 * Currently we don't use SG_GAPS MR's so if the first entry is
484 * misaligned we'll end up using two entries for a single data page,
485 * so one additional entry is required.
486 */
487 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev) + 1;
f41725bb
IR
488 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
489 queue->queue_size,
490 IB_MR_TYPE_MEM_REG,
ff13c1b8 491 pages_per_mr, 0);
f41725bb
IR
492 if (ret) {
493 dev_err(queue->ctrl->ctrl.device,
494 "failed to initialize MR pool sized %d for QID %d\n",
495 queue->queue_size, idx);
496 goto out_destroy_ring;
497 }
498
eb1bd249
MG
499 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
500
71102307
CH
501 return 0;
502
f41725bb
IR
503out_destroy_ring:
504 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
505 sizeof(struct nvme_completion), DMA_FROM_DEVICE);
71102307 506out_destroy_qp:
1f61def9 507 rdma_destroy_qp(queue->cm_id);
71102307
CH
508out_destroy_ib_cq:
509 ib_free_cq(queue->ib_cq);
ca6e95bb
SG
510out_put_dev:
511 nvme_rdma_dev_put(queue->device);
71102307
CH
512 return ret;
513}
514
41e8cfa1 515static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
71102307
CH
516 int idx, size_t queue_size)
517{
518 struct nvme_rdma_queue *queue;
8f4e8dac 519 struct sockaddr *src_addr = NULL;
71102307
CH
520 int ret;
521
522 queue = &ctrl->queues[idx];
523 queue->ctrl = ctrl;
524 init_completion(&queue->cm_done);
525
526 if (idx > 0)
527 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
528 else
529 queue->cmnd_capsule_len = sizeof(struct nvme_command);
530
531 queue->queue_size = queue_size;
532
533 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
534 RDMA_PS_TCP, IB_QPT_RC);
535 if (IS_ERR(queue->cm_id)) {
536 dev_info(ctrl->ctrl.device,
537 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
538 return PTR_ERR(queue->cm_id);
539 }
540
8f4e8dac 541 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
0928f9b4 542 src_addr = (struct sockaddr *)&ctrl->src_addr;
8f4e8dac 543
0928f9b4
SG
544 queue->cm_error = -ETIMEDOUT;
545 ret = rdma_resolve_addr(queue->cm_id, src_addr,
546 (struct sockaddr *)&ctrl->addr,
71102307
CH
547 NVME_RDMA_CONNECT_TIMEOUT_MS);
548 if (ret) {
549 dev_info(ctrl->ctrl.device,
550 "rdma_resolve_addr failed (%d).\n", ret);
551 goto out_destroy_cm_id;
552 }
553
554 ret = nvme_rdma_wait_for_cm(queue);
555 if (ret) {
556 dev_info(ctrl->ctrl.device,
d8bfceeb 557 "rdma connection establishment failed (%d)\n", ret);
71102307
CH
558 goto out_destroy_cm_id;
559 }
560
5013e98b 561 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
71102307
CH
562
563 return 0;
564
565out_destroy_cm_id:
566 rdma_destroy_id(queue->cm_id);
eb1bd249 567 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
568 return ret;
569}
570
d94211b8
SG
571static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
572{
573 rdma_disconnect(queue->cm_id);
574 ib_drain_qp(queue->qp);
575}
576
71102307
CH
577static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
578{
a57bd541
SG
579 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
580 return;
d94211b8 581 __nvme_rdma_stop_queue(queue);
71102307
CH
582}
583
584static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
585{
5013e98b 586 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
a57bd541
SG
587 return;
588
71102307
CH
589 nvme_rdma_destroy_queue_ib(queue);
590 rdma_destroy_id(queue->cm_id);
591}
592
a57bd541 593static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 594{
a57bd541
SG
595 int i;
596
597 for (i = 1; i < ctrl->ctrl.queue_count; i++)
598 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
599}
600
a57bd541 601static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
602{
603 int i;
604
d858e5f0 605 for (i = 1; i < ctrl->ctrl.queue_count; i++)
a57bd541 606 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
607}
608
68e16fcf
SG
609static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
610{
ff8519f9
SG
611 struct nvme_rdma_queue *queue = &ctrl->queues[idx];
612 bool poll = nvme_rdma_poll_queue(queue);
68e16fcf
SG
613 int ret;
614
615 if (idx)
ff8519f9 616 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
68e16fcf
SG
617 else
618 ret = nvmf_connect_admin_queue(&ctrl->ctrl);
619
d94211b8 620 if (!ret) {
ff8519f9 621 set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
d94211b8
SG
622 } else {
623 __nvme_rdma_stop_queue(queue);
68e16fcf
SG
624 dev_info(ctrl->ctrl.device,
625 "failed to connect queue: %d ret=%d\n", idx, ret);
d94211b8 626 }
68e16fcf
SG
627 return ret;
628}
629
630static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307
CH
631{
632 int i, ret = 0;
633
d858e5f0 634 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
68e16fcf
SG
635 ret = nvme_rdma_start_queue(ctrl, i);
636 if (ret)
a57bd541 637 goto out_stop_queues;
71102307
CH
638 }
639
c8dbc37c
SW
640 return 0;
641
a57bd541 642out_stop_queues:
68e16fcf
SG
643 for (i--; i >= 1; i--)
644 nvme_rdma_stop_queue(&ctrl->queues[i]);
71102307
CH
645 return ret;
646}
647
41e8cfa1 648static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
71102307 649{
c248c643 650 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 651 struct ib_device *ibdev = ctrl->device->dev;
5651cd3c
SG
652 unsigned int nr_io_queues, nr_default_queues;
653 unsigned int nr_read_queues, nr_poll_queues;
71102307
CH
654 int i, ret;
655
5651cd3c
SG
656 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
657 min(opts->nr_io_queues, num_online_cpus()));
658 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors,
659 min(opts->nr_write_queues, num_online_cpus()));
660 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
661 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
b65bb777 662
c248c643
SG
663 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
664 if (ret)
665 return ret;
666
d858e5f0
SG
667 ctrl->ctrl.queue_count = nr_io_queues + 1;
668 if (ctrl->ctrl.queue_count < 2)
c248c643
SG
669 return 0;
670
671 dev_info(ctrl->ctrl.device,
672 "creating %d I/O queues.\n", nr_io_queues);
673
5651cd3c
SG
674 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
675 /*
676 * separate read/write queues
677 * hand out dedicated default queues only after we have
678 * sufficient read queues.
679 */
680 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
681 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
682 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
683 min(nr_default_queues, nr_io_queues);
684 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
685 } else {
686 /*
687 * shared read/write queues
688 * either no write queues were requested, or we don't have
689 * sufficient queue count to have dedicated default queues.
690 */
691 ctrl->io_queues[HCTX_TYPE_DEFAULT] =
692 min(nr_read_queues, nr_io_queues);
693 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
694 }
695
696 if (opts->nr_poll_queues && nr_io_queues) {
697 /* map dedicated poll queues only if we have queues left */
698 ctrl->io_queues[HCTX_TYPE_POLL] =
699 min(nr_poll_queues, nr_io_queues);
700 }
701
d858e5f0 702 for (i = 1; i < ctrl->ctrl.queue_count; i++) {
41e8cfa1
SG
703 ret = nvme_rdma_alloc_queue(ctrl, i,
704 ctrl->ctrl.sqsize + 1);
705 if (ret)
71102307 706 goto out_free_queues;
71102307
CH
707 }
708
709 return 0;
710
711out_free_queues:
f361e5a0 712 for (i--; i >= 1; i--)
a57bd541 713 nvme_rdma_free_queue(&ctrl->queues[i]);
71102307
CH
714
715 return ret;
716}
717
b28a308e
SG
718static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
719 bool admin)
720{
721 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
722 struct blk_mq_tag_set *set;
723 int ret;
724
725 if (admin) {
726 set = &ctrl->admin_tag_set;
727 memset(set, 0, sizeof(*set));
728 set->ops = &nvme_rdma_admin_mq_ops;
38dabe21 729 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
b28a308e 730 set->reserved_tags = 2; /* connect + keep-alive */
103e515e 731 set->numa_node = nctrl->numa_node;
b28a308e
SG
732 set->cmd_size = sizeof(struct nvme_rdma_request) +
733 SG_CHUNK_SIZE * sizeof(struct scatterlist);
734 set->driver_data = ctrl;
735 set->nr_hw_queues = 1;
736 set->timeout = ADMIN_TIMEOUT;
94f29d4f 737 set->flags = BLK_MQ_F_NO_SCHED;
b28a308e
SG
738 } else {
739 set = &ctrl->tag_set;
740 memset(set, 0, sizeof(*set));
741 set->ops = &nvme_rdma_mq_ops;
5e77d61c 742 set->queue_depth = nctrl->sqsize + 1;
b28a308e 743 set->reserved_tags = 1; /* fabric connect */
103e515e 744 set->numa_node = nctrl->numa_node;
b28a308e
SG
745 set->flags = BLK_MQ_F_SHOULD_MERGE;
746 set->cmd_size = sizeof(struct nvme_rdma_request) +
747 SG_CHUNK_SIZE * sizeof(struct scatterlist);
748 set->driver_data = ctrl;
749 set->nr_hw_queues = nctrl->queue_count - 1;
750 set->timeout = NVME_IO_TIMEOUT;
ff8519f9 751 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
b28a308e
SG
752 }
753
754 ret = blk_mq_alloc_tag_set(set);
755 if (ret)
87fd1253 756 return ERR_PTR(ret);
b28a308e
SG
757
758 return set;
b28a308e
SG
759}
760
3f02fffb
SG
761static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
762 bool remove)
71102307 763{
3f02fffb
SG
764 if (remove) {
765 blk_cleanup_queue(ctrl->ctrl.admin_q);
e7832cb4 766 blk_cleanup_queue(ctrl->ctrl.fabrics_q);
87fd1253 767 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
3f02fffb 768 }
682630f0
SG
769 if (ctrl->async_event_sqe.data) {
770 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
771 sizeof(struct nvme_command), DMA_TO_DEVICE);
772 ctrl->async_event_sqe.data = NULL;
773 }
a57bd541 774 nvme_rdma_free_queue(&ctrl->queues[0]);
71102307
CH
775}
776
3f02fffb
SG
777static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
778 bool new)
90af3512
SG
779{
780 int error;
781
41e8cfa1 782 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
90af3512
SG
783 if (error)
784 return error;
785
786 ctrl->device = ctrl->queues[0].device;
103e515e 787 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device);
90af3512 788
f41725bb 789 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
90af3512 790
62f99b62
MG
791 /*
792 * Bind the async event SQE DMA mapping to the admin queue lifetime.
793 * It's safe, since any chage in the underlying RDMA device will issue
794 * error recovery and queue re-creation.
795 */
94e42213
SG
796 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
797 sizeof(struct nvme_command), DMA_TO_DEVICE);
798 if (error)
799 goto out_free_queue;
800
3f02fffb
SG
801 if (new) {
802 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
f04b9cc8
SG
803 if (IS_ERR(ctrl->ctrl.admin_tagset)) {
804 error = PTR_ERR(ctrl->ctrl.admin_tagset);
94e42213 805 goto out_free_async_qe;
f04b9cc8 806 }
90af3512 807
e7832cb4
SG
808 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
809 if (IS_ERR(ctrl->ctrl.fabrics_q)) {
810 error = PTR_ERR(ctrl->ctrl.fabrics_q);
811 goto out_free_tagset;
812 }
813
3f02fffb
SG
814 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
815 if (IS_ERR(ctrl->ctrl.admin_q)) {
816 error = PTR_ERR(ctrl->ctrl.admin_q);
e7832cb4 817 goto out_cleanup_fabrics_q;
3f02fffb 818 }
90af3512
SG
819 }
820
68e16fcf 821 error = nvme_rdma_start_queue(ctrl, 0);
90af3512
SG
822 if (error)
823 goto out_cleanup_queue;
824
c0f2f45b 825 error = nvme_enable_ctrl(&ctrl->ctrl);
90af3512 826 if (error)
2e050f00 827 goto out_stop_queue;
90af3512 828
ff13c1b8
MG
829 ctrl->ctrl.max_segments = ctrl->max_fr_pages;
830 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
90af3512 831
e7832cb4
SG
832 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
833
90af3512
SG
834 error = nvme_init_identify(&ctrl->ctrl);
835 if (error)
2e050f00 836 goto out_stop_queue;
90af3512 837
90af3512
SG
838 return 0;
839
2e050f00
JW
840out_stop_queue:
841 nvme_rdma_stop_queue(&ctrl->queues[0]);
90af3512 842out_cleanup_queue:
3f02fffb
SG
843 if (new)
844 blk_cleanup_queue(ctrl->ctrl.admin_q);
e7832cb4
SG
845out_cleanup_fabrics_q:
846 if (new)
847 blk_cleanup_queue(ctrl->ctrl.fabrics_q);
90af3512 848out_free_tagset:
3f02fffb 849 if (new)
87fd1253 850 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
94e42213
SG
851out_free_async_qe:
852 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
853 sizeof(struct nvme_command), DMA_TO_DEVICE);
6344d02d 854 ctrl->async_event_sqe.data = NULL;
90af3512
SG
855out_free_queue:
856 nvme_rdma_free_queue(&ctrl->queues[0]);
857 return error;
858}
859
a57bd541
SG
860static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
861 bool remove)
862{
a57bd541
SG
863 if (remove) {
864 blk_cleanup_queue(ctrl->ctrl.connect_q);
87fd1253 865 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
866 }
867 nvme_rdma_free_io_queues(ctrl);
868}
869
870static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
871{
872 int ret;
873
41e8cfa1 874 ret = nvme_rdma_alloc_io_queues(ctrl);
a57bd541
SG
875 if (ret)
876 return ret;
877
878 if (new) {
879 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
f04b9cc8
SG
880 if (IS_ERR(ctrl->ctrl.tagset)) {
881 ret = PTR_ERR(ctrl->ctrl.tagset);
a57bd541 882 goto out_free_io_queues;
f04b9cc8 883 }
a57bd541
SG
884
885 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
886 if (IS_ERR(ctrl->ctrl.connect_q)) {
887 ret = PTR_ERR(ctrl->ctrl.connect_q);
888 goto out_free_tag_set;
889 }
890 } else {
a57bd541
SG
891 blk_mq_update_nr_hw_queues(&ctrl->tag_set,
892 ctrl->ctrl.queue_count - 1);
893 }
894
68e16fcf 895 ret = nvme_rdma_start_io_queues(ctrl);
a57bd541
SG
896 if (ret)
897 goto out_cleanup_connect_q;
898
899 return 0;
900
901out_cleanup_connect_q:
902 if (new)
903 blk_cleanup_queue(ctrl->ctrl.connect_q);
904out_free_tag_set:
905 if (new)
87fd1253 906 blk_mq_free_tag_set(ctrl->ctrl.tagset);
a57bd541
SG
907out_free_io_queues:
908 nvme_rdma_free_io_queues(ctrl);
909 return ret;
71102307
CH
910}
911
75862c72
SG
912static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
913 bool remove)
914{
915 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
916 nvme_rdma_stop_queue(&ctrl->queues[0]);
622b8b68 917 if (ctrl->ctrl.admin_tagset) {
1007709d
SG
918 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset,
919 nvme_cancel_request, &ctrl->ctrl);
622b8b68
ML
920 blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset);
921 }
e7832cb4
SG
922 if (remove)
923 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
75862c72
SG
924 nvme_rdma_destroy_admin_queue(ctrl, remove);
925}
926
927static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
928 bool remove)
929{
930 if (ctrl->ctrl.queue_count > 1) {
931 nvme_stop_queues(&ctrl->ctrl);
932 nvme_rdma_stop_io_queues(ctrl);
622b8b68 933 if (ctrl->ctrl.tagset) {
1007709d
SG
934 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset,
935 nvme_cancel_request, &ctrl->ctrl);
622b8b68
ML
936 blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset);
937 }
75862c72
SG
938 if (remove)
939 nvme_start_queues(&ctrl->ctrl);
940 nvme_rdma_destroy_io_queues(ctrl, remove);
941 }
942}
943
71102307
CH
944static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
945{
946 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
947
948 if (list_empty(&ctrl->list))
949 goto free_ctrl;
950
951 mutex_lock(&nvme_rdma_ctrl_mutex);
952 list_del(&ctrl->list);
953 mutex_unlock(&nvme_rdma_ctrl_mutex);
954
71102307
CH
955 nvmf_free_options(nctrl->opts);
956free_ctrl:
3d064101 957 kfree(ctrl->queues);
71102307
CH
958 kfree(ctrl);
959}
960
fd8563ce
SG
961static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
962{
963 /* If we are resetting/deleting then do nothing */
ad6a0a52 964 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
fd8563ce
SG
965 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
966 ctrl->ctrl.state == NVME_CTRL_LIVE);
967 return;
968 }
969
970 if (nvmf_should_reconnect(&ctrl->ctrl)) {
971 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
972 ctrl->ctrl.opts->reconnect_delay);
9a6327d2 973 queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
fd8563ce
SG
974 ctrl->ctrl.opts->reconnect_delay * HZ);
975 } else {
12fa1304 976 nvme_delete_ctrl(&ctrl->ctrl);
fd8563ce
SG
977 }
978}
979
c66e2998 980static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
71102307 981{
c66e2998 982 int ret = -EINVAL;
71102307 983 bool changed;
71102307 984
c66e2998 985 ret = nvme_rdma_configure_admin_queue(ctrl, new);
71102307 986 if (ret)
c66e2998
SG
987 return ret;
988
989 if (ctrl->ctrl.icdoff) {
990 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
991 goto destroy_admin;
992 }
993
994 if (!(ctrl->ctrl.sgls & (1 << 2))) {
995 dev_err(ctrl->ctrl.device,
996 "Mandatory keyed sgls are not supported!\n");
997 goto destroy_admin;
998 }
999
1000 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1001 dev_warn(ctrl->ctrl.device,
1002 "queue_size %zu > ctrl sqsize %u, clamping down\n",
1003 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1004 }
1005
1006 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1007 dev_warn(ctrl->ctrl.device,
1008 "sqsize %u > ctrl maxcmd %u, clamping down\n",
1009 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1010 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1011 }
71102307 1012
64a741c1
SW
1013 if (ctrl->ctrl.sgls & (1 << 20))
1014 ctrl->use_inline_data = true;
71102307 1015
d858e5f0 1016 if (ctrl->ctrl.queue_count > 1) {
c66e2998 1017 ret = nvme_rdma_configure_io_queues(ctrl, new);
71102307 1018 if (ret)
5e1fe61d 1019 goto destroy_admin;
71102307
CH
1020 }
1021
1022 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
0a960afd
SG
1023 if (!changed) {
1024 /* state change failure is ok if we're in DELETING state */
1025 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
c66e2998
SG
1026 ret = -EINVAL;
1027 goto destroy_io;
0a960afd
SG
1028 }
1029
d09f2b45 1030 nvme_start_ctrl(&ctrl->ctrl);
c66e2998
SG
1031 return 0;
1032
1033destroy_io:
1034 if (ctrl->ctrl.queue_count > 1)
1035 nvme_rdma_destroy_io_queues(ctrl, new);
1036destroy_admin:
1037 nvme_rdma_stop_queue(&ctrl->queues[0]);
1038 nvme_rdma_destroy_admin_queue(ctrl, new);
1039 return ret;
1040}
1041
1042static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1043{
1044 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1045 struct nvme_rdma_ctrl, reconnect_work);
1046
1047 ++ctrl->ctrl.nr_reconnects;
1048
1049 if (nvme_rdma_setup_ctrl(ctrl, false))
1050 goto requeue;
71102307 1051
5e1fe61d
SG
1052 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1053 ctrl->ctrl.nr_reconnects);
1054
1055 ctrl->ctrl.nr_reconnects = 0;
71102307
CH
1056
1057 return;
1058
71102307 1059requeue:
fd8563ce 1060 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
fdf9dfa8 1061 ctrl->ctrl.nr_reconnects);
fd8563ce 1062 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1063}
1064
1065static void nvme_rdma_error_recovery_work(struct work_struct *work)
1066{
1067 struct nvme_rdma_ctrl *ctrl = container_of(work,
1068 struct nvme_rdma_ctrl, err_work);
1069
e4d753d7 1070 nvme_stop_keep_alive(&ctrl->ctrl);
75862c72 1071 nvme_rdma_teardown_io_queues(ctrl, false);
e818a5b4 1072 nvme_start_queues(&ctrl->ctrl);
75862c72 1073 nvme_rdma_teardown_admin_queue(ctrl, false);
e7832cb4 1074 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
e818a5b4 1075
ad6a0a52 1076 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
187c0832
NC
1077 /* state change failure is ok if we're in DELETING state */
1078 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
d5bf4b7f
SG
1079 return;
1080 }
1081
fd8563ce 1082 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1083}
1084
1085static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1086{
d5bf4b7f 1087 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
71102307
CH
1088 return;
1089
9a6327d2 1090 queue_work(nvme_wq, &ctrl->err_work);
71102307
CH
1091}
1092
1093static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1094 const char *op)
1095{
1096 struct nvme_rdma_queue *queue = cq->cq_context;
1097 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1098
1099 if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1100 dev_info(ctrl->ctrl.device,
1101 "%s for CQE 0x%p failed with status %s (%d)\n",
1102 op, wc->wr_cqe,
1103 ib_wc_status_msg(wc->status), wc->status);
1104 nvme_rdma_error_recovery(ctrl);
1105}
1106
1107static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1108{
1109 if (unlikely(wc->status != IB_WC_SUCCESS))
1110 nvme_rdma_wr_error(cq, wc, "MEMREG");
1111}
1112
1113static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1114{
2f122e4f
SG
1115 struct nvme_rdma_request *req =
1116 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1117 struct request *rq = blk_mq_rq_from_pdu(req);
1118
1119 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1120 nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
2f122e4f
SG
1121 return;
1122 }
1123
1124 if (refcount_dec_and_test(&req->ref))
1125 nvme_end_request(rq, req->status, req->result);
1126
71102307
CH
1127}
1128
1129static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1130 struct nvme_rdma_request *req)
1131{
71102307
CH
1132 struct ib_send_wr wr = {
1133 .opcode = IB_WR_LOCAL_INV,
1134 .next = NULL,
1135 .num_sge = 0,
2f122e4f 1136 .send_flags = IB_SEND_SIGNALED,
71102307
CH
1137 .ex.invalidate_rkey = req->mr->rkey,
1138 };
1139
1140 req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1141 wr.wr_cqe = &req->reg_cqe;
1142
45e3cc1a 1143 return ib_post_send(queue->qp, &wr, NULL);
71102307
CH
1144}
1145
1146static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1147 struct request *rq)
1148{
1149 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
71102307
CH
1150 struct nvme_rdma_device *dev = queue->device;
1151 struct ib_device *ibdev = dev->dev;
71102307 1152
34e08191 1153 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1154 return;
1155
f41725bb
IR
1156 if (req->mr) {
1157 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1158 req->mr = NULL;
1159 }
1160
bc31c1ee 1161 ib_dma_unmap_sg(ibdev, req->sg_table.sgl, req->nents, rq_dma_dir(rq));
71102307
CH
1162
1163 nvme_cleanup_cmd(rq);
4635873c 1164 sg_free_table_chained(&req->sg_table, SG_CHUNK_SIZE);
71102307
CH
1165}
1166
1167static int nvme_rdma_set_sg_null(struct nvme_command *c)
1168{
1169 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1170
1171 sg->addr = 0;
1172 put_unaligned_le24(0, sg->length);
1173 put_unaligned_le32(0, sg->key);
1174 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1175 return 0;
1176}
1177
1178static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
64a741c1
SW
1179 struct nvme_rdma_request *req, struct nvme_command *c,
1180 int count)
71102307
CH
1181{
1182 struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
64a741c1
SW
1183 struct scatterlist *sgl = req->sg_table.sgl;
1184 struct ib_sge *sge = &req->sge[1];
1185 u32 len = 0;
1186 int i;
71102307 1187
64a741c1
SW
1188 for (i = 0; i < count; i++, sgl++, sge++) {
1189 sge->addr = sg_dma_address(sgl);
1190 sge->length = sg_dma_len(sgl);
1191 sge->lkey = queue->device->pd->local_dma_lkey;
1192 len += sge->length;
1193 }
71102307
CH
1194
1195 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
64a741c1 1196 sg->length = cpu_to_le32(len);
71102307
CH
1197 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1198
64a741c1 1199 req->num_sge += count;
71102307
CH
1200 return 0;
1201}
1202
1203static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1204 struct nvme_rdma_request *req, struct nvme_command *c)
1205{
1206 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1207
1208 sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
1209 put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
11975e01 1210 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
71102307
CH
1211 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1212 return 0;
1213}
1214
1215static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1216 struct nvme_rdma_request *req, struct nvme_command *c,
1217 int count)
1218{
1219 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1220 int nr;
1221
f41725bb
IR
1222 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1223 if (WARN_ON_ONCE(!req->mr))
1224 return -EAGAIN;
1225
b925a2dc
MG
1226 /*
1227 * Align the MR to a 4K page size to match the ctrl page size and
1228 * the block virtual boundary.
1229 */
1230 nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
a7b7c7a1 1231 if (unlikely(nr < count)) {
f41725bb
IR
1232 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1233 req->mr = NULL;
71102307
CH
1234 if (nr < 0)
1235 return nr;
1236 return -EINVAL;
1237 }
1238
1239 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1240
1241 req->reg_cqe.done = nvme_rdma_memreg_done;
1242 memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1243 req->reg_wr.wr.opcode = IB_WR_REG_MR;
1244 req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1245 req->reg_wr.wr.num_sge = 0;
1246 req->reg_wr.mr = req->mr;
1247 req->reg_wr.key = req->mr->rkey;
1248 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1249 IB_ACCESS_REMOTE_READ |
1250 IB_ACCESS_REMOTE_WRITE;
1251
71102307
CH
1252 sg->addr = cpu_to_le64(req->mr->iova);
1253 put_unaligned_le24(req->mr->length, sg->length);
1254 put_unaligned_le32(req->mr->rkey, sg->key);
1255 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1256 NVME_SGL_FMT_INVALIDATE;
1257
1258 return 0;
1259}
1260
1261static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
b131c61d 1262 struct request *rq, struct nvme_command *c)
71102307
CH
1263{
1264 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1265 struct nvme_rdma_device *dev = queue->device;
1266 struct ib_device *ibdev = dev->dev;
f9d03f96 1267 int count, ret;
71102307
CH
1268
1269 req->num_sge = 1;
4af7f7ff 1270 refcount_set(&req->ref, 2); /* send and recv completions */
71102307
CH
1271
1272 c->common.flags |= NVME_CMD_SGL_METABUF;
1273
34e08191 1274 if (!blk_rq_nr_phys_segments(rq))
71102307
CH
1275 return nvme_rdma_set_sg_null(c);
1276
1277 req->sg_table.sgl = req->first_sgl;
f9d03f96 1278 ret = sg_alloc_table_chained(&req->sg_table,
4635873c
ML
1279 blk_rq_nr_phys_segments(rq), req->sg_table.sgl,
1280 SG_CHUNK_SIZE);
71102307
CH
1281 if (ret)
1282 return -ENOMEM;
1283
f9d03f96 1284 req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
71102307 1285
f9d03f96 1286 count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
bc31c1ee 1287 rq_dma_dir(rq));
71102307 1288 if (unlikely(count <= 0)) {
94423a8f
MG
1289 ret = -EIO;
1290 goto out_free_table;
71102307
CH
1291 }
1292
64a741c1 1293 if (count <= dev->num_inline_segments) {
b131c61d 1294 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
64a741c1 1295 queue->ctrl->use_inline_data &&
b131c61d 1296 blk_rq_payload_bytes(rq) <=
94423a8f 1297 nvme_rdma_inline_data_size(queue)) {
64a741c1 1298 ret = nvme_rdma_map_sg_inline(queue, req, c, count);
94423a8f
MG
1299 goto out;
1300 }
71102307 1301
64a741c1 1302 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
94423a8f
MG
1303 ret = nvme_rdma_map_sg_single(queue, req, c);
1304 goto out;
1305 }
71102307
CH
1306 }
1307
94423a8f
MG
1308 ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1309out:
1310 if (unlikely(ret))
1311 goto out_unmap_sg;
1312
1313 return 0;
1314
1315out_unmap_sg:
bc31c1ee 1316 ib_dma_unmap_sg(ibdev, req->sg_table.sgl, req->nents, rq_dma_dir(rq));
94423a8f 1317out_free_table:
4635873c 1318 sg_free_table_chained(&req->sg_table, SG_CHUNK_SIZE);
94423a8f 1319 return ret;
71102307
CH
1320}
1321
1322static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1323{
4af7f7ff
SG
1324 struct nvme_rdma_qe *qe =
1325 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1326 struct nvme_rdma_request *req =
1327 container_of(qe, struct nvme_rdma_request, sqe);
1328 struct request *rq = blk_mq_rq_from_pdu(req);
1329
1330 if (unlikely(wc->status != IB_WC_SUCCESS)) {
71102307 1331 nvme_rdma_wr_error(cq, wc, "SEND");
4af7f7ff
SG
1332 return;
1333 }
1334
1335 if (refcount_dec_and_test(&req->ref))
1336 nvme_end_request(rq, req->status, req->result);
71102307
CH
1337}
1338
1339static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1340 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
b4b591c8 1341 struct ib_send_wr *first)
71102307 1342{
45e3cc1a 1343 struct ib_send_wr wr;
71102307
CH
1344 int ret;
1345
1346 sge->addr = qe->dma;
1347 sge->length = sizeof(struct nvme_command),
1348 sge->lkey = queue->device->pd->local_dma_lkey;
1349
71102307
CH
1350 wr.next = NULL;
1351 wr.wr_cqe = &qe->cqe;
1352 wr.sg_list = sge;
1353 wr.num_sge = num_sge;
1354 wr.opcode = IB_WR_SEND;
b4b591c8 1355 wr.send_flags = IB_SEND_SIGNALED;
71102307
CH
1356
1357 if (first)
1358 first->next = &wr;
1359 else
1360 first = &wr;
1361
45e3cc1a 1362 ret = ib_post_send(queue->qp, first, NULL);
a7b7c7a1 1363 if (unlikely(ret)) {
71102307
CH
1364 dev_err(queue->ctrl->ctrl.device,
1365 "%s failed with error code %d\n", __func__, ret);
1366 }
1367 return ret;
1368}
1369
1370static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1371 struct nvme_rdma_qe *qe)
1372{
45e3cc1a 1373 struct ib_recv_wr wr;
71102307
CH
1374 struct ib_sge list;
1375 int ret;
1376
1377 list.addr = qe->dma;
1378 list.length = sizeof(struct nvme_completion);
1379 list.lkey = queue->device->pd->local_dma_lkey;
1380
1381 qe->cqe.done = nvme_rdma_recv_done;
1382
1383 wr.next = NULL;
1384 wr.wr_cqe = &qe->cqe;
1385 wr.sg_list = &list;
1386 wr.num_sge = 1;
1387
45e3cc1a 1388 ret = ib_post_recv(queue->qp, &wr, NULL);
a7b7c7a1 1389 if (unlikely(ret)) {
71102307
CH
1390 dev_err(queue->ctrl->ctrl.device,
1391 "%s failed with error code %d\n", __func__, ret);
1392 }
1393 return ret;
1394}
1395
1396static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1397{
1398 u32 queue_idx = nvme_rdma_queue_idx(queue);
1399
1400 if (queue_idx == 0)
1401 return queue->ctrl->admin_tag_set.tags[queue_idx];
1402 return queue->ctrl->tag_set.tags[queue_idx - 1];
1403}
1404
b4b591c8
SG
1405static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1406{
1407 if (unlikely(wc->status != IB_WC_SUCCESS))
1408 nvme_rdma_wr_error(cq, wc, "ASYNC");
1409}
1410
ad22c355 1411static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
71102307
CH
1412{
1413 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1414 struct nvme_rdma_queue *queue = &ctrl->queues[0];
1415 struct ib_device *dev = queue->device->dev;
1416 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1417 struct nvme_command *cmd = sqe->data;
1418 struct ib_sge sge;
1419 int ret;
1420
71102307
CH
1421 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1422
1423 memset(cmd, 0, sizeof(*cmd));
1424 cmd->common.opcode = nvme_admin_async_event;
38dabe21 1425 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
71102307
CH
1426 cmd->common.flags |= NVME_CMD_SGL_METABUF;
1427 nvme_rdma_set_sg_null(cmd);
1428
b4b591c8
SG
1429 sqe->cqe.done = nvme_rdma_async_done;
1430
71102307
CH
1431 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1432 DMA_TO_DEVICE);
1433
b4b591c8 1434 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
71102307
CH
1435 WARN_ON_ONCE(ret);
1436}
1437
1052b8ac
JA
1438static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1439 struct nvme_completion *cqe, struct ib_wc *wc)
71102307 1440{
71102307
CH
1441 struct request *rq;
1442 struct nvme_rdma_request *req;
71102307 1443
71102307
CH
1444 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
1445 if (!rq) {
1446 dev_err(queue->ctrl->ctrl.device,
1447 "tag 0x%x on QP %#x not found\n",
1448 cqe->command_id, queue->qp->qp_num);
1449 nvme_rdma_error_recovery(queue->ctrl);
1052b8ac 1450 return;
71102307
CH
1451 }
1452 req = blk_mq_rq_to_pdu(rq);
1453
4af7f7ff
SG
1454 req->status = cqe->status;
1455 req->result = cqe->result;
71102307 1456
3ef0279b
SG
1457 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1458 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
1459 dev_err(queue->ctrl->ctrl.device,
1460 "Bogus remote invalidation for rkey %#x\n",
1461 req->mr->rkey);
1462 nvme_rdma_error_recovery(queue->ctrl);
1463 }
f41725bb 1464 } else if (req->mr) {
1052b8ac
JA
1465 int ret;
1466
2f122e4f
SG
1467 ret = nvme_rdma_inv_rkey(queue, req);
1468 if (unlikely(ret < 0)) {
1469 dev_err(queue->ctrl->ctrl.device,
1470 "Queueing INV WR for rkey %#x failed (%d)\n",
1471 req->mr->rkey, ret);
1472 nvme_rdma_error_recovery(queue->ctrl);
1473 }
1474 /* the local invalidation completion will end the request */
1052b8ac 1475 return;
2f122e4f 1476 }
71102307 1477
1052b8ac 1478 if (refcount_dec_and_test(&req->ref))
4af7f7ff 1479 nvme_end_request(rq, req->status, req->result);
71102307
CH
1480}
1481
1052b8ac 1482static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
71102307
CH
1483{
1484 struct nvme_rdma_qe *qe =
1485 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1486 struct nvme_rdma_queue *queue = cq->cq_context;
1487 struct ib_device *ibdev = queue->device->dev;
1488 struct nvme_completion *cqe = qe->data;
1489 const size_t len = sizeof(struct nvme_completion);
71102307
CH
1490
1491 if (unlikely(wc->status != IB_WC_SUCCESS)) {
1492 nvme_rdma_wr_error(cq, wc, "RECV");
1052b8ac 1493 return;
71102307
CH
1494 }
1495
1496 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1497 /*
1498 * AEN requests are special as they don't time out and can
1499 * survive any kind of queue freeze and often don't respond to
1500 * aborts. We don't even bother to allocate a struct request
1501 * for them but rather special case them here.
1502 */
1503 if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
38dabe21 1504 cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH))
7bf58533
CH
1505 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1506 &cqe->result);
71102307 1507 else
1052b8ac 1508 nvme_rdma_process_nvme_rsp(queue, cqe, wc);
71102307
CH
1509 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1510
1511 nvme_rdma_post_recv(queue, qe);
71102307
CH
1512}
1513
1514static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1515{
1516 int ret, i;
1517
1518 for (i = 0; i < queue->queue_size; i++) {
1519 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1520 if (ret)
1521 goto out_destroy_queue_ib;
1522 }
1523
1524 return 0;
1525
1526out_destroy_queue_ib:
1527 nvme_rdma_destroy_queue_ib(queue);
1528 return ret;
1529}
1530
1531static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1532 struct rdma_cm_event *ev)
1533{
7f03953c
SW
1534 struct rdma_cm_id *cm_id = queue->cm_id;
1535 int status = ev->status;
1536 const char *rej_msg;
1537 const struct nvme_rdma_cm_rej *rej_data;
1538 u8 rej_data_len;
1539
1540 rej_msg = rdma_reject_msg(cm_id, status);
1541 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1542
1543 if (rej_data && rej_data_len >= sizeof(u16)) {
1544 u16 sts = le16_to_cpu(rej_data->sts);
71102307
CH
1545
1546 dev_err(queue->ctrl->ctrl.device,
7f03953c
SW
1547 "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1548 status, rej_msg, sts, nvme_rdma_cm_msg(sts));
71102307
CH
1549 } else {
1550 dev_err(queue->ctrl->ctrl.device,
7f03953c 1551 "Connect rejected: status %d (%s).\n", status, rej_msg);
71102307
CH
1552 }
1553
1554 return -ECONNRESET;
1555}
1556
1557static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1558{
e63440d6 1559 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
71102307
CH
1560 int ret;
1561
ca6e95bb
SG
1562 ret = nvme_rdma_create_queue_ib(queue);
1563 if (ret)
1564 return ret;
71102307 1565
e63440d6
IR
1566 if (ctrl->opts->tos >= 0)
1567 rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
71102307
CH
1568 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1569 if (ret) {
e63440d6 1570 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
71102307
CH
1571 queue->cm_error);
1572 goto out_destroy_queue;
1573 }
1574
1575 return 0;
1576
1577out_destroy_queue:
1578 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1579 return ret;
1580}
1581
1582static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1583{
1584 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1585 struct rdma_conn_param param = { };
0b857b44 1586 struct nvme_rdma_cm_req priv = { };
71102307
CH
1587 int ret;
1588
1589 param.qp_num = queue->qp->qp_num;
1590 param.flow_control = 1;
1591
1592 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
2ac17c28
SG
1593 /* maximum retry count */
1594 param.retry_count = 7;
71102307
CH
1595 param.rnr_retry_count = 7;
1596 param.private_data = &priv;
1597 param.private_data_len = sizeof(priv);
1598
1599 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1600 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
f994d9dc
JF
1601 /*
1602 * set the admin queue depth to the minimum size
1603 * specified by the Fabrics standard.
1604 */
1605 if (priv.qid == 0) {
7aa1f427
SG
1606 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1607 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
f994d9dc 1608 } else {
c5af8654
JF
1609 /*
1610 * current interpretation of the fabrics spec
1611 * is at minimum you make hrqsize sqsize+1, or a
1612 * 1's based representation of sqsize.
1613 */
f994d9dc 1614 priv.hrqsize = cpu_to_le16(queue->queue_size);
c5af8654 1615 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
f994d9dc 1616 }
71102307
CH
1617
1618 ret = rdma_connect(queue->cm_id, &param);
1619 if (ret) {
1620 dev_err(ctrl->ctrl.device,
1621 "rdma_connect failed (%d).\n", ret);
1622 goto out_destroy_queue_ib;
1623 }
1624
1625 return 0;
1626
1627out_destroy_queue_ib:
1628 nvme_rdma_destroy_queue_ib(queue);
1629 return ret;
1630}
1631
71102307
CH
1632static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1633 struct rdma_cm_event *ev)
1634{
1635 struct nvme_rdma_queue *queue = cm_id->context;
1636 int cm_error = 0;
1637
1638 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1639 rdma_event_msg(ev->event), ev->event,
1640 ev->status, cm_id);
1641
1642 switch (ev->event) {
1643 case RDMA_CM_EVENT_ADDR_RESOLVED:
1644 cm_error = nvme_rdma_addr_resolved(queue);
1645 break;
1646 case RDMA_CM_EVENT_ROUTE_RESOLVED:
1647 cm_error = nvme_rdma_route_resolved(queue);
1648 break;
1649 case RDMA_CM_EVENT_ESTABLISHED:
1650 queue->cm_error = nvme_rdma_conn_established(queue);
1651 /* complete cm_done regardless of success/failure */
1652 complete(&queue->cm_done);
1653 return 0;
1654 case RDMA_CM_EVENT_REJECTED:
abf87d5e 1655 nvme_rdma_destroy_queue_ib(queue);
71102307
CH
1656 cm_error = nvme_rdma_conn_rejected(queue, ev);
1657 break;
71102307
CH
1658 case RDMA_CM_EVENT_ROUTE_ERROR:
1659 case RDMA_CM_EVENT_CONNECT_ERROR:
1660 case RDMA_CM_EVENT_UNREACHABLE:
abf87d5e 1661 nvme_rdma_destroy_queue_ib(queue);
249090f9 1662 /* fall through */
abf87d5e 1663 case RDMA_CM_EVENT_ADDR_ERROR:
71102307
CH
1664 dev_dbg(queue->ctrl->ctrl.device,
1665 "CM error event %d\n", ev->event);
1666 cm_error = -ECONNRESET;
1667 break;
1668 case RDMA_CM_EVENT_DISCONNECTED:
1669 case RDMA_CM_EVENT_ADDR_CHANGE:
1670 case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1671 dev_dbg(queue->ctrl->ctrl.device,
1672 "disconnect received - connection closed\n");
1673 nvme_rdma_error_recovery(queue->ctrl);
1674 break;
1675 case RDMA_CM_EVENT_DEVICE_REMOVAL:
e87a911f
SW
1676 /* device removal is handled via the ib_client API */
1677 break;
71102307
CH
1678 default:
1679 dev_err(queue->ctrl->ctrl.device,
1680 "Unexpected RDMA CM event (%d)\n", ev->event);
1681 nvme_rdma_error_recovery(queue->ctrl);
1682 break;
1683 }
1684
1685 if (cm_error) {
1686 queue->cm_error = cm_error;
1687 complete(&queue->cm_done);
1688 }
1689
1690 return 0;
1691}
1692
1693static enum blk_eh_timer_return
1694nvme_rdma_timeout(struct request *rq, bool reserved)
1695{
1696 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
4c174e63
SG
1697 struct nvme_rdma_queue *queue = req->queue;
1698 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
71102307 1699
4c174e63
SG
1700 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
1701 rq->tag, nvme_rdma_queue_idx(queue));
e62a538d 1702
4c174e63
SG
1703 if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
1704 /*
1705 * Teardown immediately if controller times out while starting
1706 * or we are already started error recovery. all outstanding
1707 * requests are completed on shutdown, so we return BLK_EH_DONE.
1708 */
1709 flush_work(&ctrl->err_work);
1710 nvme_rdma_teardown_io_queues(ctrl, false);
1711 nvme_rdma_teardown_admin_queue(ctrl, false);
1712 return BLK_EH_DONE;
1713 }
71102307 1714
4c174e63
SG
1715 dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1716 nvme_rdma_error_recovery(ctrl);
71102307 1717
4c174e63 1718 return BLK_EH_RESET_TIMER;
71102307
CH
1719}
1720
fc17b653 1721static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
71102307
CH
1722 const struct blk_mq_queue_data *bd)
1723{
1724 struct nvme_ns *ns = hctx->queue->queuedata;
1725 struct nvme_rdma_queue *queue = hctx->driver_data;
1726 struct request *rq = bd->rq;
1727 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1728 struct nvme_rdma_qe *sqe = &req->sqe;
1729 struct nvme_command *c = sqe->data;
71102307 1730 struct ib_device *dev;
3bc32bb1 1731 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
fc17b653
CH
1732 blk_status_t ret;
1733 int err;
71102307
CH
1734
1735 WARN_ON_ONCE(rq->tag < 0);
1736
3bc32bb1 1737 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
6cdefc6e 1738 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
553cd9ef 1739
71102307 1740 dev = queue->device->dev;
62f99b62
MG
1741
1742 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
1743 sizeof(struct nvme_command),
1744 DMA_TO_DEVICE);
1745 err = ib_dma_mapping_error(dev, req->sqe.dma);
1746 if (unlikely(err))
1747 return BLK_STS_RESOURCE;
1748
71102307
CH
1749 ib_dma_sync_single_for_cpu(dev, sqe->dma,
1750 sizeof(struct nvme_command), DMA_TO_DEVICE);
1751
1752 ret = nvme_setup_cmd(ns, rq, c);
fc17b653 1753 if (ret)
62f99b62 1754 goto unmap_qe;
71102307 1755
71102307
CH
1756 blk_mq_start_request(rq);
1757
fc17b653 1758 err = nvme_rdma_map_data(queue, rq, c);
a7b7c7a1 1759 if (unlikely(err < 0)) {
71102307 1760 dev_err(queue->ctrl->ctrl.device,
fc17b653 1761 "Failed to map data (%d)\n", err);
71102307
CH
1762 nvme_cleanup_cmd(rq);
1763 goto err;
1764 }
1765
b4b591c8
SG
1766 sqe->cqe.done = nvme_rdma_send_done;
1767
71102307
CH
1768 ib_dma_sync_single_for_device(dev, sqe->dma,
1769 sizeof(struct nvme_command), DMA_TO_DEVICE);
1770
fc17b653 1771 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
f41725bb 1772 req->mr ? &req->reg_wr.wr : NULL);
a7b7c7a1 1773 if (unlikely(err)) {
71102307
CH
1774 nvme_rdma_unmap_data(queue, rq);
1775 goto err;
1776 }
1777
fc17b653 1778 return BLK_STS_OK;
62f99b62 1779
71102307 1780err:
fc17b653 1781 if (err == -ENOMEM || err == -EAGAIN)
62f99b62
MG
1782 ret = BLK_STS_RESOURCE;
1783 else
1784 ret = BLK_STS_IOERR;
1785unmap_qe:
1786 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
1787 DMA_TO_DEVICE);
1788 return ret;
71102307
CH
1789}
1790
ff8519f9
SG
1791static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
1792{
1793 struct nvme_rdma_queue *queue = hctx->driver_data;
1794
1795 return ib_process_cq_direct(queue->ib_cq, -1);
1796}
1797
71102307
CH
1798static void nvme_rdma_complete_rq(struct request *rq)
1799{
1800 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
62f99b62
MG
1801 struct nvme_rdma_queue *queue = req->queue;
1802 struct ib_device *ibdev = queue->device->dev;
71102307 1803
62f99b62
MG
1804 nvme_rdma_unmap_data(queue, rq);
1805 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
1806 DMA_TO_DEVICE);
77f02a7a 1807 nvme_complete_rq(rq);
71102307
CH
1808}
1809
0b36658c
SG
1810static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
1811{
1812 struct nvme_rdma_ctrl *ctrl = set->driver_data;
5651cd3c 1813 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
0b36658c 1814
5651cd3c 1815 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
b65bb777 1816 /* separate read/write queues */
5651cd3c
SG
1817 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1818 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1819 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1820 set->map[HCTX_TYPE_READ].nr_queues =
1821 ctrl->io_queues[HCTX_TYPE_READ];
b65bb777 1822 set->map[HCTX_TYPE_READ].queue_offset =
5651cd3c 1823 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777 1824 } else {
5651cd3c
SG
1825 /* shared read/write queues */
1826 set->map[HCTX_TYPE_DEFAULT].nr_queues =
1827 ctrl->io_queues[HCTX_TYPE_DEFAULT];
1828 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
1829 set->map[HCTX_TYPE_READ].nr_queues =
1830 ctrl->io_queues[HCTX_TYPE_DEFAULT];
b65bb777
SG
1831 set->map[HCTX_TYPE_READ].queue_offset = 0;
1832 }
1833 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
1834 ctrl->device->dev, 0);
1835 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
1836 ctrl->device->dev, 0);
ff8519f9 1837
5651cd3c
SG
1838 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
1839 /* map dedicated poll queues only if we have queues left */
ff8519f9 1840 set->map[HCTX_TYPE_POLL].nr_queues =
b1064d3e 1841 ctrl->io_queues[HCTX_TYPE_POLL];
ff8519f9 1842 set->map[HCTX_TYPE_POLL].queue_offset =
5651cd3c
SG
1843 ctrl->io_queues[HCTX_TYPE_DEFAULT] +
1844 ctrl->io_queues[HCTX_TYPE_READ];
ff8519f9
SG
1845 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
1846 }
5651cd3c
SG
1847
1848 dev_info(ctrl->ctrl.device,
1849 "mapped %d/%d/%d default/read/poll queues.\n",
1850 ctrl->io_queues[HCTX_TYPE_DEFAULT],
1851 ctrl->io_queues[HCTX_TYPE_READ],
1852 ctrl->io_queues[HCTX_TYPE_POLL]);
1853
b65bb777 1854 return 0;
0b36658c
SG
1855}
1856
f363b089 1857static const struct blk_mq_ops nvme_rdma_mq_ops = {
71102307
CH
1858 .queue_rq = nvme_rdma_queue_rq,
1859 .complete = nvme_rdma_complete_rq,
71102307
CH
1860 .init_request = nvme_rdma_init_request,
1861 .exit_request = nvme_rdma_exit_request,
71102307 1862 .init_hctx = nvme_rdma_init_hctx,
71102307 1863 .timeout = nvme_rdma_timeout,
0b36658c 1864 .map_queues = nvme_rdma_map_queues,
ff8519f9 1865 .poll = nvme_rdma_poll,
71102307
CH
1866};
1867
f363b089 1868static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
71102307
CH
1869 .queue_rq = nvme_rdma_queue_rq,
1870 .complete = nvme_rdma_complete_rq,
385475ee
CH
1871 .init_request = nvme_rdma_init_request,
1872 .exit_request = nvme_rdma_exit_request,
71102307
CH
1873 .init_hctx = nvme_rdma_init_admin_hctx,
1874 .timeout = nvme_rdma_timeout,
1875};
1876
18398af2 1877static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
71102307 1878{
794a4cb3
SG
1879 cancel_work_sync(&ctrl->err_work);
1880 cancel_delayed_work_sync(&ctrl->reconnect_work);
1881
75862c72 1882 nvme_rdma_teardown_io_queues(ctrl, shutdown);
e7832cb4 1883 blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
18398af2 1884 if (shutdown)
71102307 1885 nvme_shutdown_ctrl(&ctrl->ctrl);
18398af2 1886 else
b5b05048 1887 nvme_disable_ctrl(&ctrl->ctrl);
75862c72 1888 nvme_rdma_teardown_admin_queue(ctrl, shutdown);
71102307
CH
1889}
1890
c5017e85 1891static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2461a8dd 1892{
e9bc2587 1893 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
71102307
CH
1894}
1895
71102307
CH
1896static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
1897{
d86c4d8e
CH
1898 struct nvme_rdma_ctrl *ctrl =
1899 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
71102307 1900
d09f2b45 1901 nvme_stop_ctrl(&ctrl->ctrl);
18398af2 1902 nvme_rdma_shutdown_ctrl(ctrl, false);
71102307 1903
ad6a0a52 1904 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
d5bf4b7f
SG
1905 /* state change failure should never happen */
1906 WARN_ON_ONCE(1);
1907 return;
1908 }
1909
c66e2998 1910 if (nvme_rdma_setup_ctrl(ctrl, false))
370ae6e4 1911 goto out_fail;
71102307 1912
71102307
CH
1913 return;
1914
370ae6e4 1915out_fail:
8000d1fd
NC
1916 ++ctrl->ctrl.nr_reconnects;
1917 nvme_rdma_reconnect_or_remove(ctrl);
71102307
CH
1918}
1919
71102307
CH
1920static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
1921 .name = "rdma",
1922 .module = THIS_MODULE,
d3d5b87d 1923 .flags = NVME_F_FABRICS,
71102307
CH
1924 .reg_read32 = nvmf_reg_read32,
1925 .reg_read64 = nvmf_reg_read64,
1926 .reg_write32 = nvmf_reg_write32,
71102307
CH
1927 .free_ctrl = nvme_rdma_free_ctrl,
1928 .submit_async_event = nvme_rdma_submit_async_event,
c5017e85 1929 .delete_ctrl = nvme_rdma_delete_ctrl,
71102307
CH
1930 .get_address = nvmf_get_address,
1931};
1932
36e835f2
JS
1933/*
1934 * Fails a connection request if it matches an existing controller
1935 * (association) with the same tuple:
1936 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
1937 *
1938 * if local address is not specified in the request, it will match an
1939 * existing controller with all the other parameters the same and no
1940 * local port address specified as well.
1941 *
1942 * The ports don't need to be compared as they are intrinsically
1943 * already matched by the port pointers supplied.
1944 */
1945static bool
1946nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
1947{
1948 struct nvme_rdma_ctrl *ctrl;
1949 bool found = false;
1950
1951 mutex_lock(&nvme_rdma_ctrl_mutex);
1952 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
b7c7be6f 1953 found = nvmf_ip_options_match(&ctrl->ctrl, opts);
36e835f2
JS
1954 if (found)
1955 break;
1956 }
1957 mutex_unlock(&nvme_rdma_ctrl_mutex);
1958
1959 return found;
1960}
1961
71102307
CH
1962static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
1963 struct nvmf_ctrl_options *opts)
1964{
1965 struct nvme_rdma_ctrl *ctrl;
1966 int ret;
1967 bool changed;
1968
1969 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
1970 if (!ctrl)
1971 return ERR_PTR(-ENOMEM);
1972 ctrl->ctrl.opts = opts;
1973 INIT_LIST_HEAD(&ctrl->list);
1974
bb59b8e5
SG
1975 if (!(opts->mask & NVMF_OPT_TRSVCID)) {
1976 opts->trsvcid =
1977 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
1978 if (!opts->trsvcid) {
1979 ret = -ENOMEM;
1980 goto out_free_ctrl;
1981 }
1982 opts->mask |= NVMF_OPT_TRSVCID;
1983 }
0928f9b4
SG
1984
1985 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
bb59b8e5 1986 opts->traddr, opts->trsvcid, &ctrl->addr);
71102307 1987 if (ret) {
bb59b8e5
SG
1988 pr_err("malformed address passed: %s:%s\n",
1989 opts->traddr, opts->trsvcid);
71102307
CH
1990 goto out_free_ctrl;
1991 }
1992
8f4e8dac 1993 if (opts->mask & NVMF_OPT_HOST_TRADDR) {
0928f9b4
SG
1994 ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
1995 opts->host_traddr, NULL, &ctrl->src_addr);
8f4e8dac 1996 if (ret) {
0928f9b4 1997 pr_err("malformed src address passed: %s\n",
8f4e8dac
MG
1998 opts->host_traddr);
1999 goto out_free_ctrl;
2000 }
2001 }
2002
36e835f2
JS
2003 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2004 ret = -EALREADY;
2005 goto out_free_ctrl;
2006 }
2007
71102307
CH
2008 INIT_DELAYED_WORK(&ctrl->reconnect_work,
2009 nvme_rdma_reconnect_ctrl_work);
2010 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
d86c4d8e 2011 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
71102307 2012
ff8519f9
SG
2013 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2014 opts->nr_poll_queues + 1;
c5af8654 2015 ctrl->ctrl.sqsize = opts->queue_size - 1;
71102307
CH
2016 ctrl->ctrl.kato = opts->kato;
2017
2018 ret = -ENOMEM;
d858e5f0 2019 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
71102307
CH
2020 GFP_KERNEL);
2021 if (!ctrl->queues)
3d064101
SG
2022 goto out_free_ctrl;
2023
2024 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2025 0 /* no quirks, we're perfect! */);
2026 if (ret)
2027 goto out_kfree_queues;
71102307 2028
b754a32c
MG
2029 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2030 WARN_ON_ONCE(!changed);
2031
c66e2998 2032 ret = nvme_rdma_setup_ctrl(ctrl, true);
71102307 2033 if (ret)
3d064101 2034 goto out_uninit_ctrl;
71102307 2035
0928f9b4 2036 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
71102307
CH
2037 ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2038
d22524a4 2039 nvme_get_ctrl(&ctrl->ctrl);
71102307
CH
2040
2041 mutex_lock(&nvme_rdma_ctrl_mutex);
2042 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2043 mutex_unlock(&nvme_rdma_ctrl_mutex);
2044
71102307
CH
2045 return &ctrl->ctrl;
2046
71102307
CH
2047out_uninit_ctrl:
2048 nvme_uninit_ctrl(&ctrl->ctrl);
2049 nvme_put_ctrl(&ctrl->ctrl);
2050 if (ret > 0)
2051 ret = -EIO;
2052 return ERR_PTR(ret);
3d064101
SG
2053out_kfree_queues:
2054 kfree(ctrl->queues);
71102307
CH
2055out_free_ctrl:
2056 kfree(ctrl);
2057 return ERR_PTR(ret);
2058}
2059
2060static struct nvmf_transport_ops nvme_rdma_transport = {
2061 .name = "rdma",
0de5cd36 2062 .module = THIS_MODULE,
71102307 2063 .required_opts = NVMF_OPT_TRADDR,
8f4e8dac 2064 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
b65bb777 2065 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
e63440d6
IR
2066 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2067 NVMF_OPT_TOS,
71102307
CH
2068 .create_ctrl = nvme_rdma_create_ctrl,
2069};
2070
e87a911f
SW
2071static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2072{
2073 struct nvme_rdma_ctrl *ctrl;
9bad0404
MG
2074 struct nvme_rdma_device *ndev;
2075 bool found = false;
2076
2077 mutex_lock(&device_list_mutex);
2078 list_for_each_entry(ndev, &device_list, entry) {
2079 if (ndev->dev == ib_device) {
2080 found = true;
2081 break;
2082 }
2083 }
2084 mutex_unlock(&device_list_mutex);
2085
2086 if (!found)
2087 return;
e87a911f
SW
2088
2089 /* Delete all controllers using this device */
2090 mutex_lock(&nvme_rdma_ctrl_mutex);
2091 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2092 if (ctrl->device->dev != ib_device)
2093 continue;
c5017e85 2094 nvme_delete_ctrl(&ctrl->ctrl);
e87a911f
SW
2095 }
2096 mutex_unlock(&nvme_rdma_ctrl_mutex);
2097
b227c59b 2098 flush_workqueue(nvme_delete_wq);
e87a911f
SW
2099}
2100
2101static struct ib_client nvme_rdma_ib_client = {
2102 .name = "nvme_rdma",
e87a911f
SW
2103 .remove = nvme_rdma_remove_one
2104};
2105
71102307
CH
2106static int __init nvme_rdma_init_module(void)
2107{
e87a911f
SW
2108 int ret;
2109
e87a911f 2110 ret = ib_register_client(&nvme_rdma_ib_client);
a56c79cf 2111 if (ret)
9a6327d2 2112 return ret;
a56c79cf
SG
2113
2114 ret = nvmf_register_transport(&nvme_rdma_transport);
2115 if (ret)
2116 goto err_unreg_client;
e87a911f 2117
a56c79cf 2118 return 0;
e87a911f 2119
a56c79cf
SG
2120err_unreg_client:
2121 ib_unregister_client(&nvme_rdma_ib_client);
a56c79cf 2122 return ret;
71102307
CH
2123}
2124
2125static void __exit nvme_rdma_cleanup_module(void)
2126{
71102307 2127 nvmf_unregister_transport(&nvme_rdma_transport);
e87a911f 2128 ib_unregister_client(&nvme_rdma_ib_client);
71102307
CH
2129}
2130
2131module_init(nvme_rdma_init_module);
2132module_exit(nvme_rdma_cleanup_module);
2133
2134MODULE_LICENSE("GPL v2");