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Commit | Line | Data |
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71102307 CH |
1 | /* |
2 | * NVMe over Fabrics RDMA host code. | |
3 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | */ | |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
71102307 CH |
15 | #include <linux/module.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/string.h> | |
71102307 CH |
20 | #include <linux/atomic.h> |
21 | #include <linux/blk-mq.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/mutex.h> | |
25 | #include <linux/scatterlist.h> | |
26 | #include <linux/nvme.h> | |
71102307 CH |
27 | #include <asm/unaligned.h> |
28 | ||
29 | #include <rdma/ib_verbs.h> | |
30 | #include <rdma/rdma_cm.h> | |
71102307 CH |
31 | #include <linux/nvme-rdma.h> |
32 | ||
33 | #include "nvme.h" | |
34 | #include "fabrics.h" | |
35 | ||
36 | ||
782d820c | 37 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
71102307 CH |
38 | |
39 | #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */ | |
40 | ||
41 | #define NVME_RDMA_MAX_SEGMENTS 256 | |
42 | ||
43 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 1 | |
44 | ||
71102307 CH |
45 | /* |
46 | * We handle AEN commands ourselves and don't even let the | |
47 | * block layer know about them. | |
48 | */ | |
49 | #define NVME_RDMA_NR_AEN_COMMANDS 1 | |
50 | #define NVME_RDMA_AQ_BLKMQ_DEPTH \ | |
7aa1f427 | 51 | (NVME_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS) |
71102307 CH |
52 | |
53 | struct nvme_rdma_device { | |
54 | struct ib_device *dev; | |
55 | struct ib_pd *pd; | |
71102307 CH |
56 | struct kref ref; |
57 | struct list_head entry; | |
58 | }; | |
59 | ||
60 | struct nvme_rdma_qe { | |
61 | struct ib_cqe cqe; | |
62 | void *data; | |
63 | u64 dma; | |
64 | }; | |
65 | ||
66 | struct nvme_rdma_queue; | |
67 | struct nvme_rdma_request { | |
d49187e9 | 68 | struct nvme_request req; |
71102307 CH |
69 | struct ib_mr *mr; |
70 | struct nvme_rdma_qe sqe; | |
71 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; | |
72 | u32 num_sge; | |
73 | int nents; | |
74 | bool inline_data; | |
71102307 CH |
75 | struct ib_reg_wr reg_wr; |
76 | struct ib_cqe reg_cqe; | |
77 | struct nvme_rdma_queue *queue; | |
78 | struct sg_table sg_table; | |
79 | struct scatterlist first_sgl[]; | |
80 | }; | |
81 | ||
82 | enum nvme_rdma_queue_flags { | |
b282a88d | 83 | NVME_RDMA_Q_LIVE = 0, |
abf87d5e | 84 | NVME_RDMA_Q_DELETING = 1, |
71102307 CH |
85 | }; |
86 | ||
87 | struct nvme_rdma_queue { | |
88 | struct nvme_rdma_qe *rsp_ring; | |
5e599d73 | 89 | atomic_t sig_count; |
71102307 CH |
90 | int queue_size; |
91 | size_t cmnd_capsule_len; | |
92 | struct nvme_rdma_ctrl *ctrl; | |
93 | struct nvme_rdma_device *device; | |
94 | struct ib_cq *ib_cq; | |
95 | struct ib_qp *qp; | |
96 | ||
97 | unsigned long flags; | |
98 | struct rdma_cm_id *cm_id; | |
99 | int cm_error; | |
100 | struct completion cm_done; | |
101 | }; | |
102 | ||
103 | struct nvme_rdma_ctrl { | |
71102307 CH |
104 | /* read only in the hot path */ |
105 | struct nvme_rdma_queue *queues; | |
71102307 CH |
106 | |
107 | /* other member variables */ | |
71102307 CH |
108 | struct blk_mq_tag_set tag_set; |
109 | struct work_struct delete_work; | |
71102307 CH |
110 | struct work_struct err_work; |
111 | ||
112 | struct nvme_rdma_qe async_event_sqe; | |
113 | ||
71102307 CH |
114 | struct delayed_work reconnect_work; |
115 | ||
116 | struct list_head list; | |
117 | ||
118 | struct blk_mq_tag_set admin_tag_set; | |
119 | struct nvme_rdma_device *device; | |
120 | ||
71102307 CH |
121 | u32 max_fr_pages; |
122 | ||
0928f9b4 SG |
123 | struct sockaddr_storage addr; |
124 | struct sockaddr_storage src_addr; | |
71102307 CH |
125 | |
126 | struct nvme_ctrl ctrl; | |
127 | }; | |
128 | ||
129 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) | |
130 | { | |
131 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); | |
132 | } | |
133 | ||
134 | static LIST_HEAD(device_list); | |
135 | static DEFINE_MUTEX(device_list_mutex); | |
136 | ||
137 | static LIST_HEAD(nvme_rdma_ctrl_list); | |
138 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); | |
139 | ||
71102307 CH |
140 | /* |
141 | * Disabling this option makes small I/O goes faster, but is fundamentally | |
142 | * unsafe. With it turned off we will have to register a global rkey that | |
143 | * allows read and write access to all physical memory. | |
144 | */ | |
145 | static bool register_always = true; | |
146 | module_param(register_always, bool, 0444); | |
147 | MODULE_PARM_DESC(register_always, | |
148 | "Use memory registration even for contiguous memory regions"); | |
149 | ||
150 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, | |
151 | struct rdma_cm_event *event); | |
152 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); | |
71102307 CH |
153 | |
154 | /* XXX: really should move to a generic header sooner or later.. */ | |
155 | static inline void put_unaligned_le24(u32 val, u8 *p) | |
156 | { | |
157 | *p++ = val; | |
158 | *p++ = val >> 8; | |
159 | *p++ = val >> 16; | |
160 | } | |
161 | ||
162 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) | |
163 | { | |
164 | return queue - queue->ctrl->queues; | |
165 | } | |
166 | ||
167 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) | |
168 | { | |
169 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); | |
170 | } | |
171 | ||
172 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
173 | size_t capsule_size, enum dma_data_direction dir) | |
174 | { | |
175 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); | |
176 | kfree(qe->data); | |
177 | } | |
178 | ||
179 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, | |
180 | size_t capsule_size, enum dma_data_direction dir) | |
181 | { | |
182 | qe->data = kzalloc(capsule_size, GFP_KERNEL); | |
183 | if (!qe->data) | |
184 | return -ENOMEM; | |
185 | ||
186 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); | |
187 | if (ib_dma_mapping_error(ibdev, qe->dma)) { | |
188 | kfree(qe->data); | |
189 | return -ENOMEM; | |
190 | } | |
191 | ||
192 | return 0; | |
193 | } | |
194 | ||
195 | static void nvme_rdma_free_ring(struct ib_device *ibdev, | |
196 | struct nvme_rdma_qe *ring, size_t ib_queue_size, | |
197 | size_t capsule_size, enum dma_data_direction dir) | |
198 | { | |
199 | int i; | |
200 | ||
201 | for (i = 0; i < ib_queue_size; i++) | |
202 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); | |
203 | kfree(ring); | |
204 | } | |
205 | ||
206 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, | |
207 | size_t ib_queue_size, size_t capsule_size, | |
208 | enum dma_data_direction dir) | |
209 | { | |
210 | struct nvme_rdma_qe *ring; | |
211 | int i; | |
212 | ||
213 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); | |
214 | if (!ring) | |
215 | return NULL; | |
216 | ||
217 | for (i = 0; i < ib_queue_size; i++) { | |
218 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) | |
219 | goto out_free_ring; | |
220 | } | |
221 | ||
222 | return ring; | |
223 | ||
224 | out_free_ring: | |
225 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); | |
226 | return NULL; | |
227 | } | |
228 | ||
229 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) | |
230 | { | |
27a4beef MG |
231 | pr_debug("QP event %s (%d)\n", |
232 | ib_event_msg(event->event), event->event); | |
233 | ||
71102307 CH |
234 | } |
235 | ||
236 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) | |
237 | { | |
238 | wait_for_completion_interruptible_timeout(&queue->cm_done, | |
239 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); | |
240 | return queue->cm_error; | |
241 | } | |
242 | ||
243 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) | |
244 | { | |
245 | struct nvme_rdma_device *dev = queue->device; | |
246 | struct ib_qp_init_attr init_attr; | |
247 | int ret; | |
248 | ||
249 | memset(&init_attr, 0, sizeof(init_attr)); | |
250 | init_attr.event_handler = nvme_rdma_qp_event; | |
251 | /* +1 for drain */ | |
252 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; | |
253 | /* +1 for drain */ | |
254 | init_attr.cap.max_recv_wr = queue->queue_size + 1; | |
255 | init_attr.cap.max_recv_sge = 1; | |
256 | init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS; | |
257 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; | |
258 | init_attr.qp_type = IB_QPT_RC; | |
259 | init_attr.send_cq = queue->ib_cq; | |
260 | init_attr.recv_cq = queue->ib_cq; | |
261 | ||
262 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); | |
263 | ||
264 | queue->qp = queue->cm_id->qp; | |
265 | return ret; | |
266 | } | |
267 | ||
268 | static int nvme_rdma_reinit_request(void *data, struct request *rq) | |
269 | { | |
270 | struct nvme_rdma_ctrl *ctrl = data; | |
271 | struct nvme_rdma_device *dev = ctrl->device; | |
272 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
273 | int ret = 0; | |
274 | ||
f5b7b559 | 275 | if (!req->mr->need_inval) |
71102307 CH |
276 | goto out; |
277 | ||
278 | ib_dereg_mr(req->mr); | |
279 | ||
280 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
281 | ctrl->max_fr_pages); | |
282 | if (IS_ERR(req->mr)) { | |
71102307 | 283 | ret = PTR_ERR(req->mr); |
458a9632 | 284 | req->mr = NULL; |
1bda18de | 285 | goto out; |
71102307 CH |
286 | } |
287 | ||
f5b7b559 | 288 | req->mr->need_inval = false; |
71102307 CH |
289 | |
290 | out: | |
291 | return ret; | |
292 | } | |
293 | ||
385475ee CH |
294 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
295 | struct request *rq, unsigned int hctx_idx) | |
71102307 | 296 | { |
385475ee | 297 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 298 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 299 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
300 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
301 | struct nvme_rdma_device *dev = queue->device; | |
302 | ||
303 | if (req->mr) | |
304 | ib_dereg_mr(req->mr); | |
305 | ||
306 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
307 | DMA_TO_DEVICE); | |
308 | } | |
309 | ||
385475ee CH |
310 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
311 | struct request *rq, unsigned int hctx_idx, | |
312 | unsigned int numa_node) | |
71102307 | 313 | { |
385475ee | 314 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
71102307 | 315 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
385475ee | 316 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
71102307 CH |
317 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
318 | struct nvme_rdma_device *dev = queue->device; | |
319 | struct ib_device *ibdev = dev->dev; | |
320 | int ret; | |
321 | ||
71102307 CH |
322 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
323 | DMA_TO_DEVICE); | |
324 | if (ret) | |
325 | return ret; | |
326 | ||
327 | req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG, | |
328 | ctrl->max_fr_pages); | |
329 | if (IS_ERR(req->mr)) { | |
330 | ret = PTR_ERR(req->mr); | |
331 | goto out_free_qe; | |
332 | } | |
333 | ||
334 | req->queue = queue; | |
335 | ||
336 | return 0; | |
337 | ||
338 | out_free_qe: | |
339 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), | |
340 | DMA_TO_DEVICE); | |
341 | return -ENOMEM; | |
342 | } | |
343 | ||
71102307 CH |
344 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
345 | unsigned int hctx_idx) | |
346 | { | |
347 | struct nvme_rdma_ctrl *ctrl = data; | |
348 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; | |
349 | ||
d858e5f0 | 350 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
71102307 CH |
351 | |
352 | hctx->driver_data = queue; | |
353 | return 0; | |
354 | } | |
355 | ||
356 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, | |
357 | unsigned int hctx_idx) | |
358 | { | |
359 | struct nvme_rdma_ctrl *ctrl = data; | |
360 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
361 | ||
362 | BUG_ON(hctx_idx != 0); | |
363 | ||
364 | hctx->driver_data = queue; | |
365 | return 0; | |
366 | } | |
367 | ||
368 | static void nvme_rdma_free_dev(struct kref *ref) | |
369 | { | |
370 | struct nvme_rdma_device *ndev = | |
371 | container_of(ref, struct nvme_rdma_device, ref); | |
372 | ||
373 | mutex_lock(&device_list_mutex); | |
374 | list_del(&ndev->entry); | |
375 | mutex_unlock(&device_list_mutex); | |
376 | ||
71102307 | 377 | ib_dealloc_pd(ndev->pd); |
71102307 CH |
378 | kfree(ndev); |
379 | } | |
380 | ||
381 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) | |
382 | { | |
383 | kref_put(&dev->ref, nvme_rdma_free_dev); | |
384 | } | |
385 | ||
386 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) | |
387 | { | |
388 | return kref_get_unless_zero(&dev->ref); | |
389 | } | |
390 | ||
391 | static struct nvme_rdma_device * | |
392 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) | |
393 | { | |
394 | struct nvme_rdma_device *ndev; | |
395 | ||
396 | mutex_lock(&device_list_mutex); | |
397 | list_for_each_entry(ndev, &device_list, entry) { | |
398 | if (ndev->dev->node_guid == cm_id->device->node_guid && | |
399 | nvme_rdma_dev_get(ndev)) | |
400 | goto out_unlock; | |
401 | } | |
402 | ||
403 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); | |
404 | if (!ndev) | |
405 | goto out_err; | |
406 | ||
407 | ndev->dev = cm_id->device; | |
408 | kref_init(&ndev->ref); | |
409 | ||
11975e01 CH |
410 | ndev->pd = ib_alloc_pd(ndev->dev, |
411 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); | |
71102307 CH |
412 | if (IS_ERR(ndev->pd)) |
413 | goto out_free_dev; | |
414 | ||
71102307 CH |
415 | if (!(ndev->dev->attrs.device_cap_flags & |
416 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { | |
417 | dev_err(&ndev->dev->dev, | |
418 | "Memory registrations not supported.\n"); | |
11975e01 | 419 | goto out_free_pd; |
71102307 CH |
420 | } |
421 | ||
422 | list_add(&ndev->entry, &device_list); | |
423 | out_unlock: | |
424 | mutex_unlock(&device_list_mutex); | |
425 | return ndev; | |
426 | ||
71102307 CH |
427 | out_free_pd: |
428 | ib_dealloc_pd(ndev->pd); | |
429 | out_free_dev: | |
430 | kfree(ndev); | |
431 | out_err: | |
432 | mutex_unlock(&device_list_mutex); | |
433 | return NULL; | |
434 | } | |
435 | ||
436 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) | |
437 | { | |
f361e5a0 SW |
438 | struct nvme_rdma_device *dev; |
439 | struct ib_device *ibdev; | |
71102307 | 440 | |
f361e5a0 SW |
441 | dev = queue->device; |
442 | ibdev = dev->dev; | |
71102307 CH |
443 | rdma_destroy_qp(queue->cm_id); |
444 | ib_free_cq(queue->ib_cq); | |
445 | ||
446 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, | |
447 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
448 | ||
449 | nvme_rdma_dev_put(dev); | |
450 | } | |
451 | ||
ca6e95bb | 452 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
71102307 | 453 | { |
ca6e95bb | 454 | struct ib_device *ibdev; |
71102307 CH |
455 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
456 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | |
457 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | |
71102307 CH |
458 | int ret; |
459 | ||
ca6e95bb SG |
460 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
461 | if (!queue->device) { | |
462 | dev_err(queue->cm_id->device->dev.parent, | |
463 | "no client data found!\n"); | |
464 | return -ECONNREFUSED; | |
465 | } | |
466 | ibdev = queue->device->dev; | |
71102307 CH |
467 | |
468 | /* | |
469 | * The admin queue is barely used once the controller is live, so don't | |
470 | * bother to spread it out. | |
471 | */ | |
472 | if (idx == 0) | |
473 | comp_vector = 0; | |
474 | else | |
475 | comp_vector = idx % ibdev->num_comp_vectors; | |
476 | ||
477 | ||
478 | /* +1 for ib_stop_cq */ | |
ca6e95bb SG |
479 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
480 | cq_factor * queue->queue_size + 1, | |
481 | comp_vector, IB_POLL_SOFTIRQ); | |
71102307 CH |
482 | if (IS_ERR(queue->ib_cq)) { |
483 | ret = PTR_ERR(queue->ib_cq); | |
ca6e95bb | 484 | goto out_put_dev; |
71102307 CH |
485 | } |
486 | ||
487 | ret = nvme_rdma_create_qp(queue, send_wr_factor); | |
488 | if (ret) | |
489 | goto out_destroy_ib_cq; | |
490 | ||
491 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, | |
492 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); | |
493 | if (!queue->rsp_ring) { | |
494 | ret = -ENOMEM; | |
495 | goto out_destroy_qp; | |
496 | } | |
497 | ||
498 | return 0; | |
499 | ||
500 | out_destroy_qp: | |
501 | ib_destroy_qp(queue->qp); | |
502 | out_destroy_ib_cq: | |
503 | ib_free_cq(queue->ib_cq); | |
ca6e95bb SG |
504 | out_put_dev: |
505 | nvme_rdma_dev_put(queue->device); | |
71102307 CH |
506 | return ret; |
507 | } | |
508 | ||
509 | static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl, | |
510 | int idx, size_t queue_size) | |
511 | { | |
512 | struct nvme_rdma_queue *queue; | |
8f4e8dac | 513 | struct sockaddr *src_addr = NULL; |
71102307 CH |
514 | int ret; |
515 | ||
516 | queue = &ctrl->queues[idx]; | |
517 | queue->ctrl = ctrl; | |
518 | init_completion(&queue->cm_done); | |
519 | ||
520 | if (idx > 0) | |
521 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; | |
522 | else | |
523 | queue->cmnd_capsule_len = sizeof(struct nvme_command); | |
524 | ||
525 | queue->queue_size = queue_size; | |
5e599d73 | 526 | atomic_set(&queue->sig_count, 0); |
71102307 CH |
527 | |
528 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, | |
529 | RDMA_PS_TCP, IB_QPT_RC); | |
530 | if (IS_ERR(queue->cm_id)) { | |
531 | dev_info(ctrl->ctrl.device, | |
532 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); | |
533 | return PTR_ERR(queue->cm_id); | |
534 | } | |
535 | ||
8f4e8dac | 536 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
0928f9b4 | 537 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
8f4e8dac | 538 | |
0928f9b4 SG |
539 | queue->cm_error = -ETIMEDOUT; |
540 | ret = rdma_resolve_addr(queue->cm_id, src_addr, | |
541 | (struct sockaddr *)&ctrl->addr, | |
71102307 CH |
542 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
543 | if (ret) { | |
544 | dev_info(ctrl->ctrl.device, | |
545 | "rdma_resolve_addr failed (%d).\n", ret); | |
546 | goto out_destroy_cm_id; | |
547 | } | |
548 | ||
549 | ret = nvme_rdma_wait_for_cm(queue); | |
550 | if (ret) { | |
551 | dev_info(ctrl->ctrl.device, | |
552 | "rdma_resolve_addr wait failed (%d).\n", ret); | |
553 | goto out_destroy_cm_id; | |
554 | } | |
555 | ||
3b4ac786 | 556 | clear_bit(NVME_RDMA_Q_DELETING, &queue->flags); |
71102307 CH |
557 | |
558 | return 0; | |
559 | ||
560 | out_destroy_cm_id: | |
561 | rdma_destroy_id(queue->cm_id); | |
562 | return ret; | |
563 | } | |
564 | ||
565 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) | |
566 | { | |
567 | rdma_disconnect(queue->cm_id); | |
568 | ib_drain_qp(queue->qp); | |
569 | } | |
570 | ||
571 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) | |
572 | { | |
573 | nvme_rdma_destroy_queue_ib(queue); | |
574 | rdma_destroy_id(queue->cm_id); | |
575 | } | |
576 | ||
577 | static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue) | |
578 | { | |
e89ca58f | 579 | if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags)) |
71102307 CH |
580 | return; |
581 | nvme_rdma_stop_queue(queue); | |
582 | nvme_rdma_free_queue(queue); | |
583 | } | |
584 | ||
585 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) | |
586 | { | |
587 | int i; | |
588 | ||
d858e5f0 | 589 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
71102307 CH |
590 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
591 | } | |
592 | ||
593 | static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl) | |
594 | { | |
595 | int i, ret = 0; | |
596 | ||
d858e5f0 | 597 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
71102307 | 598 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); |
c8dbc37c SW |
599 | if (ret) { |
600 | dev_info(ctrl->ctrl.device, | |
601 | "failed to connect i/o queue: %d\n", ret); | |
602 | goto out_free_queues; | |
603 | } | |
553cd9ef | 604 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
71102307 CH |
605 | } |
606 | ||
c8dbc37c SW |
607 | return 0; |
608 | ||
609 | out_free_queues: | |
610 | nvme_rdma_free_io_queues(ctrl); | |
71102307 CH |
611 | return ret; |
612 | } | |
613 | ||
614 | static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl) | |
615 | { | |
c248c643 SG |
616 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
617 | unsigned int nr_io_queues; | |
71102307 CH |
618 | int i, ret; |
619 | ||
c248c643 SG |
620 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
621 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
622 | if (ret) | |
623 | return ret; | |
624 | ||
d858e5f0 SG |
625 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
626 | if (ctrl->ctrl.queue_count < 2) | |
c248c643 SG |
627 | return 0; |
628 | ||
629 | dev_info(ctrl->ctrl.device, | |
630 | "creating %d I/O queues.\n", nr_io_queues); | |
631 | ||
d858e5f0 | 632 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
c5af8654 JF |
633 | ret = nvme_rdma_init_queue(ctrl, i, |
634 | ctrl->ctrl.opts->queue_size); | |
71102307 CH |
635 | if (ret) { |
636 | dev_info(ctrl->ctrl.device, | |
637 | "failed to initialize i/o queue: %d\n", ret); | |
638 | goto out_free_queues; | |
639 | } | |
640 | } | |
641 | ||
642 | return 0; | |
643 | ||
644 | out_free_queues: | |
f361e5a0 | 645 | for (i--; i >= 1; i--) |
71102307 CH |
646 | nvme_rdma_stop_and_free_queue(&ctrl->queues[i]); |
647 | ||
648 | return ret; | |
649 | } | |
650 | ||
651 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
652 | { | |
653 | nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe, | |
654 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
655 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
656 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
657 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
658 | nvme_rdma_dev_put(ctrl->device); | |
659 | } | |
660 | ||
661 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) | |
662 | { | |
663 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
664 | ||
665 | if (list_empty(&ctrl->list)) | |
666 | goto free_ctrl; | |
667 | ||
668 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
669 | list_del(&ctrl->list); | |
670 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
671 | ||
71102307 CH |
672 | kfree(ctrl->queues); |
673 | nvmf_free_options(nctrl->opts); | |
674 | free_ctrl: | |
675 | kfree(ctrl); | |
676 | } | |
677 | ||
fd8563ce SG |
678 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
679 | { | |
680 | /* If we are resetting/deleting then do nothing */ | |
681 | if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) { | |
682 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || | |
683 | ctrl->ctrl.state == NVME_CTRL_LIVE); | |
684 | return; | |
685 | } | |
686 | ||
687 | if (nvmf_should_reconnect(&ctrl->ctrl)) { | |
688 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", | |
689 | ctrl->ctrl.opts->reconnect_delay); | |
9a6327d2 | 690 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
fd8563ce SG |
691 | ctrl->ctrl.opts->reconnect_delay * HZ); |
692 | } else { | |
693 | dev_info(ctrl->ctrl.device, "Removing controller...\n"); | |
9a6327d2 | 694 | queue_work(nvme_wq, &ctrl->delete_work); |
fd8563ce SG |
695 | } |
696 | } | |
697 | ||
71102307 CH |
698 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
699 | { | |
700 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), | |
701 | struct nvme_rdma_ctrl, reconnect_work); | |
702 | bool changed; | |
703 | int ret; | |
704 | ||
fdf9dfa8 | 705 | ++ctrl->ctrl.nr_reconnects; |
fd8563ce | 706 | |
d858e5f0 | 707 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
708 | nvme_rdma_free_io_queues(ctrl); |
709 | ||
710 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); | |
711 | if (ret) | |
712 | goto requeue; | |
713 | } | |
714 | ||
715 | nvme_rdma_stop_and_free_queue(&ctrl->queues[0]); | |
716 | ||
717 | ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set); | |
718 | if (ret) | |
719 | goto requeue; | |
720 | ||
7aa1f427 | 721 | ret = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
722 | if (ret) |
723 | goto requeue; | |
724 | ||
71102307 CH |
725 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
726 | if (ret) | |
e818a5b4 | 727 | goto requeue; |
71102307 | 728 | |
553cd9ef CH |
729 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
730 | ||
20d0dfe6 | 731 | ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
71102307 | 732 | if (ret) |
e818a5b4 | 733 | goto requeue; |
71102307 CH |
734 | |
735 | nvme_start_keep_alive(&ctrl->ctrl); | |
736 | ||
d858e5f0 | 737 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
738 | ret = nvme_rdma_init_io_queues(ctrl); |
739 | if (ret) | |
e818a5b4 | 740 | goto requeue; |
71102307 CH |
741 | |
742 | ret = nvme_rdma_connect_io_queues(ctrl); | |
743 | if (ret) | |
e818a5b4 | 744 | goto requeue; |
4c8b99f6 SG |
745 | |
746 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
747 | ctrl->ctrl.queue_count - 1); | |
71102307 CH |
748 | } |
749 | ||
750 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
751 | WARN_ON_ONCE(!changed); | |
fdf9dfa8 | 752 | ctrl->ctrl.nr_reconnects = 0; |
71102307 | 753 | |
d858e5f0 | 754 | if (ctrl->ctrl.queue_count > 1) { |
5f372eb3 | 755 | nvme_queue_scan(&ctrl->ctrl); |
3ef1b4b2 | 756 | nvme_queue_async_events(&ctrl->ctrl); |
5f372eb3 | 757 | } |
71102307 CH |
758 | |
759 | dev_info(ctrl->ctrl.device, "Successfully reconnected\n"); | |
760 | ||
761 | return; | |
762 | ||
71102307 | 763 | requeue: |
fd8563ce | 764 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
fdf9dfa8 | 765 | ctrl->ctrl.nr_reconnects); |
fd8563ce | 766 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
767 | } |
768 | ||
769 | static void nvme_rdma_error_recovery_work(struct work_struct *work) | |
770 | { | |
771 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
772 | struct nvme_rdma_ctrl, err_work); | |
e89ca58f | 773 | int i; |
71102307 CH |
774 | |
775 | nvme_stop_keep_alive(&ctrl->ctrl); | |
e89ca58f | 776 | |
d858e5f0 | 777 | for (i = 0; i < ctrl->ctrl.queue_count; i++) |
553cd9ef | 778 | clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags); |
e89ca58f | 779 | |
d858e5f0 | 780 | if (ctrl->ctrl.queue_count > 1) |
71102307 | 781 | nvme_stop_queues(&ctrl->ctrl); |
fb051339 | 782 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
783 | |
784 | /* We must take care of fastfail/requeue all our inflight requests */ | |
d858e5f0 | 785 | if (ctrl->ctrl.queue_count > 1) |
71102307 CH |
786 | blk_mq_tagset_busy_iter(&ctrl->tag_set, |
787 | nvme_cancel_request, &ctrl->ctrl); | |
788 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, | |
789 | nvme_cancel_request, &ctrl->ctrl); | |
790 | ||
e818a5b4 SG |
791 | /* |
792 | * queues are not a live anymore, so restart the queues to fail fast | |
793 | * new IO | |
794 | */ | |
fb051339 | 795 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
e818a5b4 SG |
796 | nvme_start_queues(&ctrl->ctrl); |
797 | ||
fd8563ce | 798 | nvme_rdma_reconnect_or_remove(ctrl); |
71102307 CH |
799 | } |
800 | ||
801 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) | |
802 | { | |
803 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING)) | |
804 | return; | |
805 | ||
9a6327d2 | 806 | queue_work(nvme_wq, &ctrl->err_work); |
71102307 CH |
807 | } |
808 | ||
809 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, | |
810 | const char *op) | |
811 | { | |
812 | struct nvme_rdma_queue *queue = cq->cq_context; | |
813 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
814 | ||
815 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) | |
816 | dev_info(ctrl->ctrl.device, | |
817 | "%s for CQE 0x%p failed with status %s (%d)\n", | |
818 | op, wc->wr_cqe, | |
819 | ib_wc_status_msg(wc->status), wc->status); | |
820 | nvme_rdma_error_recovery(ctrl); | |
821 | } | |
822 | ||
823 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) | |
824 | { | |
825 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
826 | nvme_rdma_wr_error(cq, wc, "MEMREG"); | |
827 | } | |
828 | ||
829 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) | |
830 | { | |
831 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
832 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); | |
833 | } | |
834 | ||
835 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, | |
836 | struct nvme_rdma_request *req) | |
837 | { | |
838 | struct ib_send_wr *bad_wr; | |
839 | struct ib_send_wr wr = { | |
840 | .opcode = IB_WR_LOCAL_INV, | |
841 | .next = NULL, | |
842 | .num_sge = 0, | |
843 | .send_flags = 0, | |
844 | .ex.invalidate_rkey = req->mr->rkey, | |
845 | }; | |
846 | ||
847 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; | |
848 | wr.wr_cqe = &req->reg_cqe; | |
849 | ||
850 | return ib_post_send(queue->qp, &wr, &bad_wr); | |
851 | } | |
852 | ||
853 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, | |
854 | struct request *rq) | |
855 | { | |
856 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
857 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
858 | struct nvme_rdma_device *dev = queue->device; | |
859 | struct ib_device *ibdev = dev->dev; | |
860 | int res; | |
861 | ||
862 | if (!blk_rq_bytes(rq)) | |
863 | return; | |
864 | ||
f5b7b559 | 865 | if (req->mr->need_inval) { |
71102307 CH |
866 | res = nvme_rdma_inv_rkey(queue, req); |
867 | if (res < 0) { | |
868 | dev_err(ctrl->ctrl.device, | |
869 | "Queueing INV WR for rkey %#x failed (%d)\n", | |
870 | req->mr->rkey, res); | |
871 | nvme_rdma_error_recovery(queue->ctrl); | |
872 | } | |
873 | } | |
874 | ||
875 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, | |
876 | req->nents, rq_data_dir(rq) == | |
877 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
878 | ||
879 | nvme_cleanup_cmd(rq); | |
880 | sg_free_table_chained(&req->sg_table, true); | |
881 | } | |
882 | ||
883 | static int nvme_rdma_set_sg_null(struct nvme_command *c) | |
884 | { | |
885 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
886 | ||
887 | sg->addr = 0; | |
888 | put_unaligned_le24(0, sg->length); | |
889 | put_unaligned_le32(0, sg->key); | |
890 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; | |
891 | return 0; | |
892 | } | |
893 | ||
894 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, | |
895 | struct nvme_rdma_request *req, struct nvme_command *c) | |
896 | { | |
897 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; | |
898 | ||
899 | req->sge[1].addr = sg_dma_address(req->sg_table.sgl); | |
900 | req->sge[1].length = sg_dma_len(req->sg_table.sgl); | |
901 | req->sge[1].lkey = queue->device->pd->local_dma_lkey; | |
902 | ||
903 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); | |
904 | sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl)); | |
905 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; | |
906 | ||
907 | req->inline_data = true; | |
908 | req->num_sge++; | |
909 | return 0; | |
910 | } | |
911 | ||
912 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, | |
913 | struct nvme_rdma_request *req, struct nvme_command *c) | |
914 | { | |
915 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
916 | ||
917 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); | |
918 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); | |
11975e01 | 919 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
71102307 CH |
920 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
921 | return 0; | |
922 | } | |
923 | ||
924 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, | |
925 | struct nvme_rdma_request *req, struct nvme_command *c, | |
926 | int count) | |
927 | { | |
928 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; | |
929 | int nr; | |
930 | ||
931 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE); | |
932 | if (nr < count) { | |
933 | if (nr < 0) | |
934 | return nr; | |
935 | return -EINVAL; | |
936 | } | |
937 | ||
938 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); | |
939 | ||
940 | req->reg_cqe.done = nvme_rdma_memreg_done; | |
941 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); | |
942 | req->reg_wr.wr.opcode = IB_WR_REG_MR; | |
943 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; | |
944 | req->reg_wr.wr.num_sge = 0; | |
945 | req->reg_wr.mr = req->mr; | |
946 | req->reg_wr.key = req->mr->rkey; | |
947 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | | |
948 | IB_ACCESS_REMOTE_READ | | |
949 | IB_ACCESS_REMOTE_WRITE; | |
950 | ||
f5b7b559 | 951 | req->mr->need_inval = true; |
71102307 CH |
952 | |
953 | sg->addr = cpu_to_le64(req->mr->iova); | |
954 | put_unaligned_le24(req->mr->length, sg->length); | |
955 | put_unaligned_le32(req->mr->rkey, sg->key); | |
956 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | | |
957 | NVME_SGL_FMT_INVALIDATE; | |
958 | ||
959 | return 0; | |
960 | } | |
961 | ||
962 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, | |
b131c61d | 963 | struct request *rq, struct nvme_command *c) |
71102307 CH |
964 | { |
965 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
966 | struct nvme_rdma_device *dev = queue->device; | |
967 | struct ib_device *ibdev = dev->dev; | |
f9d03f96 | 968 | int count, ret; |
71102307 CH |
969 | |
970 | req->num_sge = 1; | |
971 | req->inline_data = false; | |
f5b7b559 | 972 | req->mr->need_inval = false; |
71102307 CH |
973 | |
974 | c->common.flags |= NVME_CMD_SGL_METABUF; | |
975 | ||
976 | if (!blk_rq_bytes(rq)) | |
977 | return nvme_rdma_set_sg_null(c); | |
978 | ||
979 | req->sg_table.sgl = req->first_sgl; | |
f9d03f96 CH |
980 | ret = sg_alloc_table_chained(&req->sg_table, |
981 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); | |
71102307 CH |
982 | if (ret) |
983 | return -ENOMEM; | |
984 | ||
f9d03f96 | 985 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
71102307 | 986 | |
f9d03f96 | 987 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
71102307 CH |
988 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
989 | if (unlikely(count <= 0)) { | |
990 | sg_free_table_chained(&req->sg_table, true); | |
991 | return -EIO; | |
992 | } | |
993 | ||
994 | if (count == 1) { | |
b131c61d CH |
995 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
996 | blk_rq_payload_bytes(rq) <= | |
997 | nvme_rdma_inline_data_size(queue)) | |
71102307 CH |
998 | return nvme_rdma_map_sg_inline(queue, req, c); |
999 | ||
11975e01 | 1000 | if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) |
71102307 CH |
1001 | return nvme_rdma_map_sg_single(queue, req, c); |
1002 | } | |
1003 | ||
1004 | return nvme_rdma_map_sg_fr(queue, req, c, count); | |
1005 | } | |
1006 | ||
1007 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) | |
1008 | { | |
1009 | if (unlikely(wc->status != IB_WC_SUCCESS)) | |
1010 | nvme_rdma_wr_error(cq, wc, "SEND"); | |
1011 | } | |
1012 | ||
5e599d73 MR |
1013 | /* |
1014 | * We want to signal completion at least every queue depth/2. This returns the | |
1015 | * largest power of two that is not above half of (queue size + 1) to optimize | |
1016 | * (avoid divisions). | |
1017 | */ | |
1018 | static inline bool nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue) | |
0544f549 | 1019 | { |
5e599d73 | 1020 | int limit = 1 << ilog2((queue->queue_size + 1) / 2); |
0544f549 | 1021 | |
5e599d73 | 1022 | return (atomic_inc_return(&queue->sig_count) & (limit - 1)) == 0; |
0544f549 MR |
1023 | } |
1024 | ||
71102307 CH |
1025 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
1026 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, | |
1027 | struct ib_send_wr *first, bool flush) | |
1028 | { | |
1029 | struct ib_send_wr wr, *bad_wr; | |
1030 | int ret; | |
1031 | ||
1032 | sge->addr = qe->dma; | |
1033 | sge->length = sizeof(struct nvme_command), | |
1034 | sge->lkey = queue->device->pd->local_dma_lkey; | |
1035 | ||
1036 | qe->cqe.done = nvme_rdma_send_done; | |
1037 | ||
1038 | wr.next = NULL; | |
1039 | wr.wr_cqe = &qe->cqe; | |
1040 | wr.sg_list = sge; | |
1041 | wr.num_sge = num_sge; | |
1042 | wr.opcode = IB_WR_SEND; | |
1043 | wr.send_flags = 0; | |
1044 | ||
1045 | /* | |
1046 | * Unsignalled send completions are another giant desaster in the | |
1047 | * IB Verbs spec: If we don't regularly post signalled sends | |
1048 | * the send queue will fill up and only a QP reset will rescue us. | |
1049 | * Would have been way to obvious to handle this in hardware or | |
1050 | * at least the RDMA stack.. | |
1051 | * | |
71102307 CH |
1052 | * Always signal the flushes. The magic request used for the flush |
1053 | * sequencer is not allocated in our driver's tagset and it's | |
1054 | * triggered to be freed by blk_cleanup_queue(). So we need to | |
1055 | * always mark it as signaled to ensure that the "wr_cqe", which is | |
b43daedc | 1056 | * embedded in request's payload, is not freed when __ib_process_cq() |
71102307 CH |
1057 | * calls wr_cqe->done(). |
1058 | */ | |
0544f549 | 1059 | if (nvme_rdma_queue_sig_limit(queue) || flush) |
71102307 CH |
1060 | wr.send_flags |= IB_SEND_SIGNALED; |
1061 | ||
1062 | if (first) | |
1063 | first->next = ≀ | |
1064 | else | |
1065 | first = ≀ | |
1066 | ||
1067 | ret = ib_post_send(queue->qp, first, &bad_wr); | |
1068 | if (ret) { | |
1069 | dev_err(queue->ctrl->ctrl.device, | |
1070 | "%s failed with error code %d\n", __func__, ret); | |
1071 | } | |
1072 | return ret; | |
1073 | } | |
1074 | ||
1075 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, | |
1076 | struct nvme_rdma_qe *qe) | |
1077 | { | |
1078 | struct ib_recv_wr wr, *bad_wr; | |
1079 | struct ib_sge list; | |
1080 | int ret; | |
1081 | ||
1082 | list.addr = qe->dma; | |
1083 | list.length = sizeof(struct nvme_completion); | |
1084 | list.lkey = queue->device->pd->local_dma_lkey; | |
1085 | ||
1086 | qe->cqe.done = nvme_rdma_recv_done; | |
1087 | ||
1088 | wr.next = NULL; | |
1089 | wr.wr_cqe = &qe->cqe; | |
1090 | wr.sg_list = &list; | |
1091 | wr.num_sge = 1; | |
1092 | ||
1093 | ret = ib_post_recv(queue->qp, &wr, &bad_wr); | |
1094 | if (ret) { | |
1095 | dev_err(queue->ctrl->ctrl.device, | |
1096 | "%s failed with error code %d\n", __func__, ret); | |
1097 | } | |
1098 | return ret; | |
1099 | } | |
1100 | ||
1101 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) | |
1102 | { | |
1103 | u32 queue_idx = nvme_rdma_queue_idx(queue); | |
1104 | ||
1105 | if (queue_idx == 0) | |
1106 | return queue->ctrl->admin_tag_set.tags[queue_idx]; | |
1107 | return queue->ctrl->tag_set.tags[queue_idx - 1]; | |
1108 | } | |
1109 | ||
1110 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx) | |
1111 | { | |
1112 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); | |
1113 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; | |
1114 | struct ib_device *dev = queue->device->dev; | |
1115 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; | |
1116 | struct nvme_command *cmd = sqe->data; | |
1117 | struct ib_sge sge; | |
1118 | int ret; | |
1119 | ||
1120 | if (WARN_ON_ONCE(aer_idx != 0)) | |
1121 | return; | |
1122 | ||
1123 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); | |
1124 | ||
1125 | memset(cmd, 0, sizeof(*cmd)); | |
1126 | cmd->common.opcode = nvme_admin_async_event; | |
1127 | cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1128 | cmd->common.flags |= NVME_CMD_SGL_METABUF; | |
1129 | nvme_rdma_set_sg_null(cmd); | |
1130 | ||
1131 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), | |
1132 | DMA_TO_DEVICE); | |
1133 | ||
1134 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false); | |
1135 | WARN_ON_ONCE(ret); | |
1136 | } | |
1137 | ||
1138 | static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, | |
1139 | struct nvme_completion *cqe, struct ib_wc *wc, int tag) | |
1140 | { | |
71102307 CH |
1141 | struct request *rq; |
1142 | struct nvme_rdma_request *req; | |
1143 | int ret = 0; | |
1144 | ||
71102307 CH |
1145 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
1146 | if (!rq) { | |
1147 | dev_err(queue->ctrl->ctrl.device, | |
1148 | "tag 0x%x on QP %#x not found\n", | |
1149 | cqe->command_id, queue->qp->qp_num); | |
1150 | nvme_rdma_error_recovery(queue->ctrl); | |
1151 | return ret; | |
1152 | } | |
1153 | req = blk_mq_rq_to_pdu(rq); | |
1154 | ||
71102307 CH |
1155 | if (rq->tag == tag) |
1156 | ret = 1; | |
1157 | ||
1158 | if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) && | |
1159 | wc->ex.invalidate_rkey == req->mr->rkey) | |
f5b7b559 | 1160 | req->mr->need_inval = false; |
71102307 | 1161 | |
27fa9bc5 | 1162 | nvme_end_request(rq, cqe->status, cqe->result); |
71102307 CH |
1163 | return ret; |
1164 | } | |
1165 | ||
1166 | static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag) | |
1167 | { | |
1168 | struct nvme_rdma_qe *qe = | |
1169 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); | |
1170 | struct nvme_rdma_queue *queue = cq->cq_context; | |
1171 | struct ib_device *ibdev = queue->device->dev; | |
1172 | struct nvme_completion *cqe = qe->data; | |
1173 | const size_t len = sizeof(struct nvme_completion); | |
1174 | int ret = 0; | |
1175 | ||
1176 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | |
1177 | nvme_rdma_wr_error(cq, wc, "RECV"); | |
1178 | return 0; | |
1179 | } | |
1180 | ||
1181 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1182 | /* | |
1183 | * AEN requests are special as they don't time out and can | |
1184 | * survive any kind of queue freeze and often don't respond to | |
1185 | * aborts. We don't even bother to allocate a struct request | |
1186 | * for them but rather special case them here. | |
1187 | */ | |
1188 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && | |
1189 | cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH)) | |
7bf58533 CH |
1190 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
1191 | &cqe->result); | |
71102307 CH |
1192 | else |
1193 | ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag); | |
1194 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); | |
1195 | ||
1196 | nvme_rdma_post_recv(queue, qe); | |
1197 | return ret; | |
1198 | } | |
1199 | ||
1200 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) | |
1201 | { | |
1202 | __nvme_rdma_recv_done(cq, wc, -1); | |
1203 | } | |
1204 | ||
1205 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) | |
1206 | { | |
1207 | int ret, i; | |
1208 | ||
1209 | for (i = 0; i < queue->queue_size; i++) { | |
1210 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); | |
1211 | if (ret) | |
1212 | goto out_destroy_queue_ib; | |
1213 | } | |
1214 | ||
1215 | return 0; | |
1216 | ||
1217 | out_destroy_queue_ib: | |
1218 | nvme_rdma_destroy_queue_ib(queue); | |
1219 | return ret; | |
1220 | } | |
1221 | ||
1222 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, | |
1223 | struct rdma_cm_event *ev) | |
1224 | { | |
7f03953c SW |
1225 | struct rdma_cm_id *cm_id = queue->cm_id; |
1226 | int status = ev->status; | |
1227 | const char *rej_msg; | |
1228 | const struct nvme_rdma_cm_rej *rej_data; | |
1229 | u8 rej_data_len; | |
1230 | ||
1231 | rej_msg = rdma_reject_msg(cm_id, status); | |
1232 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); | |
1233 | ||
1234 | if (rej_data && rej_data_len >= sizeof(u16)) { | |
1235 | u16 sts = le16_to_cpu(rej_data->sts); | |
71102307 CH |
1236 | |
1237 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c SW |
1238 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
1239 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); | |
71102307 CH |
1240 | } else { |
1241 | dev_err(queue->ctrl->ctrl.device, | |
7f03953c | 1242 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
71102307 CH |
1243 | } |
1244 | ||
1245 | return -ECONNRESET; | |
1246 | } | |
1247 | ||
1248 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) | |
1249 | { | |
71102307 CH |
1250 | int ret; |
1251 | ||
ca6e95bb SG |
1252 | ret = nvme_rdma_create_queue_ib(queue); |
1253 | if (ret) | |
1254 | return ret; | |
71102307 CH |
1255 | |
1256 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); | |
1257 | if (ret) { | |
1258 | dev_err(queue->ctrl->ctrl.device, | |
1259 | "rdma_resolve_route failed (%d).\n", | |
1260 | queue->cm_error); | |
1261 | goto out_destroy_queue; | |
1262 | } | |
1263 | ||
1264 | return 0; | |
1265 | ||
1266 | out_destroy_queue: | |
1267 | nvme_rdma_destroy_queue_ib(queue); | |
71102307 CH |
1268 | return ret; |
1269 | } | |
1270 | ||
1271 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) | |
1272 | { | |
1273 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; | |
1274 | struct rdma_conn_param param = { }; | |
0b857b44 | 1275 | struct nvme_rdma_cm_req priv = { }; |
71102307 CH |
1276 | int ret; |
1277 | ||
1278 | param.qp_num = queue->qp->qp_num; | |
1279 | param.flow_control = 1; | |
1280 | ||
1281 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; | |
2ac17c28 SG |
1282 | /* maximum retry count */ |
1283 | param.retry_count = 7; | |
71102307 CH |
1284 | param.rnr_retry_count = 7; |
1285 | param.private_data = &priv; | |
1286 | param.private_data_len = sizeof(priv); | |
1287 | ||
1288 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); | |
1289 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); | |
f994d9dc JF |
1290 | /* |
1291 | * set the admin queue depth to the minimum size | |
1292 | * specified by the Fabrics standard. | |
1293 | */ | |
1294 | if (priv.qid == 0) { | |
7aa1f427 SG |
1295 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
1296 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); | |
f994d9dc | 1297 | } else { |
c5af8654 JF |
1298 | /* |
1299 | * current interpretation of the fabrics spec | |
1300 | * is at minimum you make hrqsize sqsize+1, or a | |
1301 | * 1's based representation of sqsize. | |
1302 | */ | |
f994d9dc | 1303 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
c5af8654 | 1304 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
f994d9dc | 1305 | } |
71102307 CH |
1306 | |
1307 | ret = rdma_connect(queue->cm_id, ¶m); | |
1308 | if (ret) { | |
1309 | dev_err(ctrl->ctrl.device, | |
1310 | "rdma_connect failed (%d).\n", ret); | |
1311 | goto out_destroy_queue_ib; | |
1312 | } | |
1313 | ||
1314 | return 0; | |
1315 | ||
1316 | out_destroy_queue_ib: | |
1317 | nvme_rdma_destroy_queue_ib(queue); | |
1318 | return ret; | |
1319 | } | |
1320 | ||
71102307 CH |
1321 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
1322 | struct rdma_cm_event *ev) | |
1323 | { | |
1324 | struct nvme_rdma_queue *queue = cm_id->context; | |
1325 | int cm_error = 0; | |
1326 | ||
1327 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", | |
1328 | rdma_event_msg(ev->event), ev->event, | |
1329 | ev->status, cm_id); | |
1330 | ||
1331 | switch (ev->event) { | |
1332 | case RDMA_CM_EVENT_ADDR_RESOLVED: | |
1333 | cm_error = nvme_rdma_addr_resolved(queue); | |
1334 | break; | |
1335 | case RDMA_CM_EVENT_ROUTE_RESOLVED: | |
1336 | cm_error = nvme_rdma_route_resolved(queue); | |
1337 | break; | |
1338 | case RDMA_CM_EVENT_ESTABLISHED: | |
1339 | queue->cm_error = nvme_rdma_conn_established(queue); | |
1340 | /* complete cm_done regardless of success/failure */ | |
1341 | complete(&queue->cm_done); | |
1342 | return 0; | |
1343 | case RDMA_CM_EVENT_REJECTED: | |
abf87d5e | 1344 | nvme_rdma_destroy_queue_ib(queue); |
71102307 CH |
1345 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
1346 | break; | |
71102307 CH |
1347 | case RDMA_CM_EVENT_ROUTE_ERROR: |
1348 | case RDMA_CM_EVENT_CONNECT_ERROR: | |
1349 | case RDMA_CM_EVENT_UNREACHABLE: | |
abf87d5e SG |
1350 | nvme_rdma_destroy_queue_ib(queue); |
1351 | case RDMA_CM_EVENT_ADDR_ERROR: | |
71102307 CH |
1352 | dev_dbg(queue->ctrl->ctrl.device, |
1353 | "CM error event %d\n", ev->event); | |
1354 | cm_error = -ECONNRESET; | |
1355 | break; | |
1356 | case RDMA_CM_EVENT_DISCONNECTED: | |
1357 | case RDMA_CM_EVENT_ADDR_CHANGE: | |
1358 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: | |
1359 | dev_dbg(queue->ctrl->ctrl.device, | |
1360 | "disconnect received - connection closed\n"); | |
1361 | nvme_rdma_error_recovery(queue->ctrl); | |
1362 | break; | |
1363 | case RDMA_CM_EVENT_DEVICE_REMOVAL: | |
e87a911f SW |
1364 | /* device removal is handled via the ib_client API */ |
1365 | break; | |
71102307 CH |
1366 | default: |
1367 | dev_err(queue->ctrl->ctrl.device, | |
1368 | "Unexpected RDMA CM event (%d)\n", ev->event); | |
1369 | nvme_rdma_error_recovery(queue->ctrl); | |
1370 | break; | |
1371 | } | |
1372 | ||
1373 | if (cm_error) { | |
1374 | queue->cm_error = cm_error; | |
1375 | complete(&queue->cm_done); | |
1376 | } | |
1377 | ||
1378 | return 0; | |
1379 | } | |
1380 | ||
1381 | static enum blk_eh_timer_return | |
1382 | nvme_rdma_timeout(struct request *rq, bool reserved) | |
1383 | { | |
1384 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1385 | ||
1386 | /* queue error recovery */ | |
1387 | nvme_rdma_error_recovery(req->queue->ctrl); | |
1388 | ||
1389 | /* fail with DNR on cmd timeout */ | |
27fa9bc5 | 1390 | nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR; |
71102307 CH |
1391 | |
1392 | return BLK_EH_HANDLED; | |
1393 | } | |
1394 | ||
553cd9ef CH |
1395 | /* |
1396 | * We cannot accept any other command until the Connect command has completed. | |
1397 | */ | |
a104c9f2 CH |
1398 | static inline blk_status_t |
1399 | nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq) | |
553cd9ef CH |
1400 | { |
1401 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { | |
1392370e | 1402 | struct nvme_command *cmd = nvme_req(rq)->cmd; |
553cd9ef | 1403 | |
57292b58 | 1404 | if (!blk_rq_is_passthrough(rq) || |
553cd9ef | 1405 | cmd->common.opcode != nvme_fabrics_command || |
e818a5b4 SG |
1406 | cmd->fabrics.fctype != nvme_fabrics_type_connect) { |
1407 | /* | |
1408 | * reconnecting state means transport disruption, which | |
1409 | * can take a long time and even might fail permanently, | |
1410 | * so we can't let incoming I/O be requeued forever. | |
1411 | * fail it fast to allow upper layers a chance to | |
1412 | * failover. | |
1413 | */ | |
1414 | if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
a104c9f2 CH |
1415 | return BLK_STS_IOERR; |
1416 | return BLK_STS_RESOURCE; /* try again later */ | |
e818a5b4 | 1417 | } |
553cd9ef CH |
1418 | } |
1419 | ||
e818a5b4 | 1420 | return 0; |
553cd9ef CH |
1421 | } |
1422 | ||
fc17b653 | 1423 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
71102307 CH |
1424 | const struct blk_mq_queue_data *bd) |
1425 | { | |
1426 | struct nvme_ns *ns = hctx->queue->queuedata; | |
1427 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1428 | struct request *rq = bd->rq; | |
1429 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
1430 | struct nvme_rdma_qe *sqe = &req->sqe; | |
1431 | struct nvme_command *c = sqe->data; | |
1432 | bool flush = false; | |
1433 | struct ib_device *dev; | |
fc17b653 CH |
1434 | blk_status_t ret; |
1435 | int err; | |
71102307 CH |
1436 | |
1437 | WARN_ON_ONCE(rq->tag < 0); | |
1438 | ||
e818a5b4 SG |
1439 | ret = nvme_rdma_queue_is_ready(queue, rq); |
1440 | if (unlikely(ret)) | |
a104c9f2 | 1441 | return ret; |
553cd9ef | 1442 | |
71102307 CH |
1443 | dev = queue->device->dev; |
1444 | ib_dma_sync_single_for_cpu(dev, sqe->dma, | |
1445 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1446 | ||
1447 | ret = nvme_setup_cmd(ns, rq, c); | |
fc17b653 | 1448 | if (ret) |
71102307 CH |
1449 | return ret; |
1450 | ||
71102307 CH |
1451 | blk_mq_start_request(rq); |
1452 | ||
fc17b653 CH |
1453 | err = nvme_rdma_map_data(queue, rq, c); |
1454 | if (err < 0) { | |
71102307 | 1455 | dev_err(queue->ctrl->ctrl.device, |
fc17b653 | 1456 | "Failed to map data (%d)\n", err); |
71102307 CH |
1457 | nvme_cleanup_cmd(rq); |
1458 | goto err; | |
1459 | } | |
1460 | ||
1461 | ib_dma_sync_single_for_device(dev, sqe->dma, | |
1462 | sizeof(struct nvme_command), DMA_TO_DEVICE); | |
1463 | ||
aebf526b | 1464 | if (req_op(rq) == REQ_OP_FLUSH) |
71102307 | 1465 | flush = true; |
fc17b653 | 1466 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
f5b7b559 | 1467 | req->mr->need_inval ? &req->reg_wr.wr : NULL, flush); |
fc17b653 | 1468 | if (err) { |
71102307 CH |
1469 | nvme_rdma_unmap_data(queue, rq); |
1470 | goto err; | |
1471 | } | |
1472 | ||
fc17b653 | 1473 | return BLK_STS_OK; |
71102307 | 1474 | err: |
fc17b653 CH |
1475 | if (err == -ENOMEM || err == -EAGAIN) |
1476 | return BLK_STS_RESOURCE; | |
1477 | return BLK_STS_IOERR; | |
71102307 CH |
1478 | } |
1479 | ||
1480 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) | |
1481 | { | |
1482 | struct nvme_rdma_queue *queue = hctx->driver_data; | |
1483 | struct ib_cq *cq = queue->ib_cq; | |
1484 | struct ib_wc wc; | |
1485 | int found = 0; | |
1486 | ||
71102307 CH |
1487 | while (ib_poll_cq(cq, 1, &wc) > 0) { |
1488 | struct ib_cqe *cqe = wc.wr_cqe; | |
1489 | ||
1490 | if (cqe) { | |
1491 | if (cqe->done == nvme_rdma_recv_done) | |
1492 | found |= __nvme_rdma_recv_done(cq, &wc, tag); | |
1493 | else | |
1494 | cqe->done(cq, &wc); | |
1495 | } | |
1496 | } | |
1497 | ||
1498 | return found; | |
1499 | } | |
1500 | ||
1501 | static void nvme_rdma_complete_rq(struct request *rq) | |
1502 | { | |
1503 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); | |
71102307 | 1504 | |
77f02a7a CH |
1505 | nvme_rdma_unmap_data(req->queue, rq); |
1506 | nvme_complete_rq(rq); | |
71102307 CH |
1507 | } |
1508 | ||
f363b089 | 1509 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
71102307 CH |
1510 | .queue_rq = nvme_rdma_queue_rq, |
1511 | .complete = nvme_rdma_complete_rq, | |
71102307 CH |
1512 | .init_request = nvme_rdma_init_request, |
1513 | .exit_request = nvme_rdma_exit_request, | |
1514 | .reinit_request = nvme_rdma_reinit_request, | |
1515 | .init_hctx = nvme_rdma_init_hctx, | |
1516 | .poll = nvme_rdma_poll, | |
1517 | .timeout = nvme_rdma_timeout, | |
1518 | }; | |
1519 | ||
f363b089 | 1520 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
71102307 CH |
1521 | .queue_rq = nvme_rdma_queue_rq, |
1522 | .complete = nvme_rdma_complete_rq, | |
385475ee CH |
1523 | .init_request = nvme_rdma_init_request, |
1524 | .exit_request = nvme_rdma_exit_request, | |
71102307 CH |
1525 | .reinit_request = nvme_rdma_reinit_request, |
1526 | .init_hctx = nvme_rdma_init_admin_hctx, | |
1527 | .timeout = nvme_rdma_timeout, | |
1528 | }; | |
1529 | ||
1530 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) | |
1531 | { | |
1532 | int error; | |
1533 | ||
7aa1f427 | 1534 | error = nvme_rdma_init_queue(ctrl, 0, NVME_AQ_DEPTH); |
71102307 CH |
1535 | if (error) |
1536 | return error; | |
1537 | ||
1538 | ctrl->device = ctrl->queues[0].device; | |
1539 | ||
1540 | /* | |
1541 | * We need a reference on the device as long as the tag_set is alive, | |
1542 | * as the MRs in the request structures need a valid ib_device. | |
1543 | */ | |
1544 | error = -EINVAL; | |
1545 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1546 | goto out_free_queue; | |
1547 | ||
1548 | ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS, | |
1549 | ctrl->device->dev->attrs.max_fast_reg_page_list_len); | |
1550 | ||
1551 | memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set)); | |
1552 | ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops; | |
1553 | ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH; | |
1554 | ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */ | |
1555 | ctrl->admin_tag_set.numa_node = NUMA_NO_NODE; | |
1556 | ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1557 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1558 | ctrl->admin_tag_set.driver_data = ctrl; | |
1559 | ctrl->admin_tag_set.nr_hw_queues = 1; | |
1560 | ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT; | |
1561 | ||
1562 | error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set); | |
1563 | if (error) | |
1564 | goto out_put_dev; | |
1565 | ||
1566 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); | |
1567 | if (IS_ERR(ctrl->ctrl.admin_q)) { | |
1568 | error = PTR_ERR(ctrl->ctrl.admin_q); | |
1569 | goto out_free_tagset; | |
1570 | } | |
1571 | ||
1572 | error = nvmf_connect_admin_queue(&ctrl->ctrl); | |
1573 | if (error) | |
1574 | goto out_cleanup_queue; | |
1575 | ||
553cd9ef CH |
1576 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
1577 | ||
20d0dfe6 SG |
1578 | error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, |
1579 | &ctrl->ctrl.cap); | |
71102307 CH |
1580 | if (error) { |
1581 | dev_err(ctrl->ctrl.device, | |
1582 | "prop_get NVME_REG_CAP failed\n"); | |
1583 | goto out_cleanup_queue; | |
1584 | } | |
1585 | ||
1586 | ctrl->ctrl.sqsize = | |
20d0dfe6 | 1587 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); |
71102307 | 1588 | |
20d0dfe6 | 1589 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
71102307 CH |
1590 | if (error) |
1591 | goto out_cleanup_queue; | |
1592 | ||
1593 | ctrl->ctrl.max_hw_sectors = | |
1594 | (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9); | |
1595 | ||
1596 | error = nvme_init_identify(&ctrl->ctrl); | |
1597 | if (error) | |
1598 | goto out_cleanup_queue; | |
1599 | ||
1600 | error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev, | |
1601 | &ctrl->async_event_sqe, sizeof(struct nvme_command), | |
1602 | DMA_TO_DEVICE); | |
1603 | if (error) | |
1604 | goto out_cleanup_queue; | |
1605 | ||
1606 | nvme_start_keep_alive(&ctrl->ctrl); | |
1607 | ||
1608 | return 0; | |
1609 | ||
1610 | out_cleanup_queue: | |
1611 | blk_cleanup_queue(ctrl->ctrl.admin_q); | |
1612 | out_free_tagset: | |
1613 | /* disconnect and drain the queue before freeing the tagset */ | |
1614 | nvme_rdma_stop_queue(&ctrl->queues[0]); | |
1615 | blk_mq_free_tag_set(&ctrl->admin_tag_set); | |
1616 | out_put_dev: | |
1617 | nvme_rdma_dev_put(ctrl->device); | |
1618 | out_free_queue: | |
1619 | nvme_rdma_free_queue(&ctrl->queues[0]); | |
1620 | return error; | |
1621 | } | |
1622 | ||
1623 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1624 | { | |
1625 | nvme_stop_keep_alive(&ctrl->ctrl); | |
1626 | cancel_work_sync(&ctrl->err_work); | |
1627 | cancel_delayed_work_sync(&ctrl->reconnect_work); | |
1628 | ||
d858e5f0 | 1629 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1630 | nvme_stop_queues(&ctrl->ctrl); |
1631 | blk_mq_tagset_busy_iter(&ctrl->tag_set, | |
1632 | nvme_cancel_request, &ctrl->ctrl); | |
1633 | nvme_rdma_free_io_queues(ctrl); | |
1634 | } | |
1635 | ||
b282a88d | 1636 | if (test_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags)) |
71102307 CH |
1637 | nvme_shutdown_ctrl(&ctrl->ctrl); |
1638 | ||
fb051339 | 1639 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1640 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
1641 | nvme_cancel_request, &ctrl->ctrl); | |
fb051339 | 1642 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
71102307 CH |
1643 | nvme_rdma_destroy_admin_queue(ctrl); |
1644 | } | |
1645 | ||
2461a8dd SG |
1646 | static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
1647 | { | |
1648 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1649 | if (shutdown) | |
1650 | nvme_rdma_shutdown_ctrl(ctrl); | |
a34ca17a SG |
1651 | |
1652 | if (ctrl->ctrl.tagset) { | |
1653 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1654 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1655 | nvme_rdma_dev_put(ctrl->device); | |
1656 | } | |
1657 | ||
2461a8dd SG |
1658 | nvme_put_ctrl(&ctrl->ctrl); |
1659 | } | |
1660 | ||
71102307 CH |
1661 | static void nvme_rdma_del_ctrl_work(struct work_struct *work) |
1662 | { | |
1663 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1664 | struct nvme_rdma_ctrl, delete_work); | |
1665 | ||
2461a8dd | 1666 | __nvme_rdma_remove_ctrl(ctrl, true); |
71102307 CH |
1667 | } |
1668 | ||
1669 | static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl) | |
1670 | { | |
1671 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING)) | |
1672 | return -EBUSY; | |
1673 | ||
9a6327d2 | 1674 | if (!queue_work(nvme_wq, &ctrl->delete_work)) |
71102307 CH |
1675 | return -EBUSY; |
1676 | ||
1677 | return 0; | |
1678 | } | |
1679 | ||
1680 | static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl) | |
1681 | { | |
1682 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); | |
cdbecc8d | 1683 | int ret = 0; |
71102307 | 1684 | |
cdbecc8d SW |
1685 | /* |
1686 | * Keep a reference until all work is flushed since | |
1687 | * __nvme_rdma_del_ctrl can free the ctrl mem | |
1688 | */ | |
1689 | if (!kref_get_unless_zero(&ctrl->ctrl.kref)) | |
1690 | return -EBUSY; | |
71102307 | 1691 | ret = __nvme_rdma_del_ctrl(ctrl); |
cdbecc8d SW |
1692 | if (!ret) |
1693 | flush_work(&ctrl->delete_work); | |
1694 | nvme_put_ctrl(&ctrl->ctrl); | |
1695 | return ret; | |
71102307 CH |
1696 | } |
1697 | ||
1698 | static void nvme_rdma_remove_ctrl_work(struct work_struct *work) | |
1699 | { | |
1700 | struct nvme_rdma_ctrl *ctrl = container_of(work, | |
1701 | struct nvme_rdma_ctrl, delete_work); | |
1702 | ||
2461a8dd | 1703 | __nvme_rdma_remove_ctrl(ctrl, false); |
71102307 CH |
1704 | } |
1705 | ||
1706 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) | |
1707 | { | |
d86c4d8e CH |
1708 | struct nvme_rdma_ctrl *ctrl = |
1709 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); | |
71102307 CH |
1710 | int ret; |
1711 | bool changed; | |
1712 | ||
1713 | nvme_rdma_shutdown_ctrl(ctrl); | |
1714 | ||
1715 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1716 | if (ret) { | |
1717 | /* ctrl is already shutdown, just remove the ctrl */ | |
1718 | INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work); | |
1719 | goto del_dead_ctrl; | |
1720 | } | |
1721 | ||
d858e5f0 | 1722 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1723 | ret = blk_mq_reinit_tagset(&ctrl->tag_set); |
1724 | if (ret) | |
1725 | goto del_dead_ctrl; | |
1726 | ||
1727 | ret = nvme_rdma_init_io_queues(ctrl); | |
1728 | if (ret) | |
1729 | goto del_dead_ctrl; | |
1730 | ||
1731 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1732 | if (ret) | |
1733 | goto del_dead_ctrl; | |
4c8b99f6 SG |
1734 | |
1735 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, | |
1736 | ctrl->ctrl.queue_count - 1); | |
71102307 CH |
1737 | } |
1738 | ||
1739 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1740 | WARN_ON_ONCE(!changed); | |
1741 | ||
d858e5f0 | 1742 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1743 | nvme_start_queues(&ctrl->ctrl); |
1744 | nvme_queue_scan(&ctrl->ctrl); | |
3ef1b4b2 | 1745 | nvme_queue_async_events(&ctrl->ctrl); |
71102307 CH |
1746 | } |
1747 | ||
1748 | return; | |
1749 | ||
1750 | del_dead_ctrl: | |
1751 | /* Deleting this dead controller... */ | |
1752 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); | |
9a6327d2 | 1753 | WARN_ON(!queue_work(nvme_wq, &ctrl->delete_work)); |
71102307 CH |
1754 | } |
1755 | ||
71102307 CH |
1756 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
1757 | .name = "rdma", | |
1758 | .module = THIS_MODULE, | |
d3d5b87d | 1759 | .flags = NVME_F_FABRICS, |
71102307 CH |
1760 | .reg_read32 = nvmf_reg_read32, |
1761 | .reg_read64 = nvmf_reg_read64, | |
1762 | .reg_write32 = nvmf_reg_write32, | |
71102307 CH |
1763 | .free_ctrl = nvme_rdma_free_ctrl, |
1764 | .submit_async_event = nvme_rdma_submit_async_event, | |
1765 | .delete_ctrl = nvme_rdma_del_ctrl, | |
71102307 CH |
1766 | .get_address = nvmf_get_address, |
1767 | }; | |
1768 | ||
1769 | static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl) | |
1770 | { | |
71102307 CH |
1771 | int ret; |
1772 | ||
71102307 CH |
1773 | ret = nvme_rdma_init_io_queues(ctrl); |
1774 | if (ret) | |
1775 | return ret; | |
1776 | ||
1777 | /* | |
1778 | * We need a reference on the device as long as the tag_set is alive, | |
1779 | * as the MRs in the request structures need a valid ib_device. | |
1780 | */ | |
1781 | ret = -EINVAL; | |
1782 | if (!nvme_rdma_dev_get(ctrl->device)) | |
1783 | goto out_free_io_queues; | |
1784 | ||
1785 | memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set)); | |
1786 | ctrl->tag_set.ops = &nvme_rdma_mq_ops; | |
c5af8654 | 1787 | ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size; |
71102307 CH |
1788 | ctrl->tag_set.reserved_tags = 1; /* fabric connect */ |
1789 | ctrl->tag_set.numa_node = NUMA_NO_NODE; | |
1790 | ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE; | |
1791 | ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) + | |
1792 | SG_CHUNK_SIZE * sizeof(struct scatterlist); | |
1793 | ctrl->tag_set.driver_data = ctrl; | |
d858e5f0 | 1794 | ctrl->tag_set.nr_hw_queues = ctrl->ctrl.queue_count - 1; |
71102307 CH |
1795 | ctrl->tag_set.timeout = NVME_IO_TIMEOUT; |
1796 | ||
1797 | ret = blk_mq_alloc_tag_set(&ctrl->tag_set); | |
1798 | if (ret) | |
1799 | goto out_put_dev; | |
1800 | ctrl->ctrl.tagset = &ctrl->tag_set; | |
1801 | ||
1802 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); | |
1803 | if (IS_ERR(ctrl->ctrl.connect_q)) { | |
1804 | ret = PTR_ERR(ctrl->ctrl.connect_q); | |
1805 | goto out_free_tag_set; | |
1806 | } | |
1807 | ||
1808 | ret = nvme_rdma_connect_io_queues(ctrl); | |
1809 | if (ret) | |
1810 | goto out_cleanup_connect_q; | |
1811 | ||
1812 | return 0; | |
1813 | ||
1814 | out_cleanup_connect_q: | |
1815 | blk_cleanup_queue(ctrl->ctrl.connect_q); | |
1816 | out_free_tag_set: | |
1817 | blk_mq_free_tag_set(&ctrl->tag_set); | |
1818 | out_put_dev: | |
1819 | nvme_rdma_dev_put(ctrl->device); | |
1820 | out_free_io_queues: | |
1821 | nvme_rdma_free_io_queues(ctrl); | |
1822 | return ret; | |
1823 | } | |
1824 | ||
71102307 CH |
1825 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
1826 | struct nvmf_ctrl_options *opts) | |
1827 | { | |
1828 | struct nvme_rdma_ctrl *ctrl; | |
1829 | int ret; | |
1830 | bool changed; | |
0928f9b4 | 1831 | char *port; |
71102307 CH |
1832 | |
1833 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | |
1834 | if (!ctrl) | |
1835 | return ERR_PTR(-ENOMEM); | |
1836 | ctrl->ctrl.opts = opts; | |
1837 | INIT_LIST_HEAD(&ctrl->list); | |
1838 | ||
0928f9b4 SG |
1839 | if (opts->mask & NVMF_OPT_TRSVCID) |
1840 | port = opts->trsvcid; | |
1841 | else | |
1842 | port = __stringify(NVME_RDMA_IP_PORT); | |
1843 | ||
1844 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, | |
1845 | opts->traddr, port, &ctrl->addr); | |
71102307 | 1846 | if (ret) { |
0928f9b4 | 1847 | pr_err("malformed address passed: %s:%s\n", opts->traddr, port); |
71102307 CH |
1848 | goto out_free_ctrl; |
1849 | } | |
1850 | ||
8f4e8dac | 1851 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
0928f9b4 SG |
1852 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
1853 | opts->host_traddr, NULL, &ctrl->src_addr); | |
8f4e8dac | 1854 | if (ret) { |
0928f9b4 | 1855 | pr_err("malformed src address passed: %s\n", |
8f4e8dac MG |
1856 | opts->host_traddr); |
1857 | goto out_free_ctrl; | |
1858 | } | |
1859 | } | |
1860 | ||
71102307 CH |
1861 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
1862 | 0 /* no quirks, we're perfect! */); | |
1863 | if (ret) | |
1864 | goto out_free_ctrl; | |
1865 | ||
71102307 CH |
1866 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
1867 | nvme_rdma_reconnect_ctrl_work); | |
1868 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); | |
1869 | INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work); | |
d86c4d8e | 1870 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
71102307 | 1871 | |
d858e5f0 | 1872 | ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */ |
c5af8654 | 1873 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
71102307 CH |
1874 | ctrl->ctrl.kato = opts->kato; |
1875 | ||
1876 | ret = -ENOMEM; | |
d858e5f0 | 1877 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
71102307 CH |
1878 | GFP_KERNEL); |
1879 | if (!ctrl->queues) | |
1880 | goto out_uninit_ctrl; | |
1881 | ||
1882 | ret = nvme_rdma_configure_admin_queue(ctrl); | |
1883 | if (ret) | |
1884 | goto out_kfree_queues; | |
1885 | ||
1886 | /* sanity check icdoff */ | |
1887 | if (ctrl->ctrl.icdoff) { | |
1888 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); | |
bb472baa | 1889 | ret = -EINVAL; |
71102307 CH |
1890 | goto out_remove_admin_queue; |
1891 | } | |
1892 | ||
1893 | /* sanity check keyed sgls */ | |
1894 | if (!(ctrl->ctrl.sgls & (1 << 20))) { | |
1895 | dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n"); | |
bb472baa | 1896 | ret = -EINVAL; |
71102307 CH |
1897 | goto out_remove_admin_queue; |
1898 | } | |
1899 | ||
1900 | if (opts->queue_size > ctrl->ctrl.maxcmd) { | |
1901 | /* warn if maxcmd is lower than queue_size */ | |
1902 | dev_warn(ctrl->ctrl.device, | |
1903 | "queue_size %zu > ctrl maxcmd %u, clamping down\n", | |
1904 | opts->queue_size, ctrl->ctrl.maxcmd); | |
1905 | opts->queue_size = ctrl->ctrl.maxcmd; | |
1906 | } | |
1907 | ||
76c08bf4 SJ |
1908 | if (opts->queue_size > ctrl->ctrl.sqsize + 1) { |
1909 | /* warn if sqsize is lower than queue_size */ | |
1910 | dev_warn(ctrl->ctrl.device, | |
1911 | "queue_size %zu > ctrl sqsize %u, clamping down\n", | |
1912 | opts->queue_size, ctrl->ctrl.sqsize + 1); | |
1913 | opts->queue_size = ctrl->ctrl.sqsize + 1; | |
1914 | } | |
1915 | ||
71102307 CH |
1916 | if (opts->nr_io_queues) { |
1917 | ret = nvme_rdma_create_io_queues(ctrl); | |
1918 | if (ret) | |
1919 | goto out_remove_admin_queue; | |
1920 | } | |
1921 | ||
1922 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); | |
1923 | WARN_ON_ONCE(!changed); | |
1924 | ||
0928f9b4 | 1925 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
71102307 CH |
1926 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
1927 | ||
1928 | kref_get(&ctrl->ctrl.kref); | |
1929 | ||
1930 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1931 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); | |
1932 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1933 | ||
d858e5f0 | 1934 | if (ctrl->ctrl.queue_count > 1) { |
71102307 CH |
1935 | nvme_queue_scan(&ctrl->ctrl); |
1936 | nvme_queue_async_events(&ctrl->ctrl); | |
1937 | } | |
1938 | ||
1939 | return &ctrl->ctrl; | |
1940 | ||
1941 | out_remove_admin_queue: | |
1942 | nvme_stop_keep_alive(&ctrl->ctrl); | |
1943 | nvme_rdma_destroy_admin_queue(ctrl); | |
1944 | out_kfree_queues: | |
1945 | kfree(ctrl->queues); | |
1946 | out_uninit_ctrl: | |
1947 | nvme_uninit_ctrl(&ctrl->ctrl); | |
1948 | nvme_put_ctrl(&ctrl->ctrl); | |
1949 | if (ret > 0) | |
1950 | ret = -EIO; | |
1951 | return ERR_PTR(ret); | |
1952 | out_free_ctrl: | |
1953 | kfree(ctrl); | |
1954 | return ERR_PTR(ret); | |
1955 | } | |
1956 | ||
1957 | static struct nvmf_transport_ops nvme_rdma_transport = { | |
1958 | .name = "rdma", | |
1959 | .required_opts = NVMF_OPT_TRADDR, | |
8f4e8dac | 1960 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
fd8563ce | 1961 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO, |
71102307 CH |
1962 | .create_ctrl = nvme_rdma_create_ctrl, |
1963 | }; | |
1964 | ||
e87a911f SW |
1965 | static void nvme_rdma_add_one(struct ib_device *ib_device) |
1966 | { | |
1967 | } | |
1968 | ||
1969 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) | |
1970 | { | |
1971 | struct nvme_rdma_ctrl *ctrl; | |
1972 | ||
1973 | /* Delete all controllers using this device */ | |
1974 | mutex_lock(&nvme_rdma_ctrl_mutex); | |
1975 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { | |
1976 | if (ctrl->device->dev != ib_device) | |
1977 | continue; | |
1978 | dev_info(ctrl->ctrl.device, | |
1979 | "Removing ctrl: NQN \"%s\", addr %pISp\n", | |
1980 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); | |
1981 | __nvme_rdma_del_ctrl(ctrl); | |
1982 | } | |
1983 | mutex_unlock(&nvme_rdma_ctrl_mutex); | |
1984 | ||
9a6327d2 | 1985 | flush_workqueue(nvme_wq); |
e87a911f SW |
1986 | } |
1987 | ||
1988 | static struct ib_client nvme_rdma_ib_client = { | |
1989 | .name = "nvme_rdma", | |
1990 | .add = nvme_rdma_add_one, | |
1991 | .remove = nvme_rdma_remove_one | |
1992 | }; | |
1993 | ||
71102307 CH |
1994 | static int __init nvme_rdma_init_module(void) |
1995 | { | |
e87a911f SW |
1996 | int ret; |
1997 | ||
e87a911f | 1998 | ret = ib_register_client(&nvme_rdma_ib_client); |
a56c79cf | 1999 | if (ret) |
9a6327d2 | 2000 | return ret; |
a56c79cf SG |
2001 | |
2002 | ret = nvmf_register_transport(&nvme_rdma_transport); | |
2003 | if (ret) | |
2004 | goto err_unreg_client; | |
e87a911f | 2005 | |
a56c79cf | 2006 | return 0; |
e87a911f | 2007 | |
a56c79cf SG |
2008 | err_unreg_client: |
2009 | ib_unregister_client(&nvme_rdma_ib_client); | |
a56c79cf | 2010 | return ret; |
71102307 CH |
2011 | } |
2012 | ||
2013 | static void __exit nvme_rdma_cleanup_module(void) | |
2014 | { | |
71102307 | 2015 | nvmf_unregister_transport(&nvme_rdma_transport); |
e87a911f | 2016 | ib_unregister_client(&nvme_rdma_ib_client); |
71102307 CH |
2017 | } |
2018 | ||
2019 | module_init(nvme_rdma_init_module); | |
2020 | module_exit(nvme_rdma_cleanup_module); | |
2021 | ||
2022 | MODULE_LICENSE("GPL v2"); |