[mirror_ubuntu-bionic-kernel.git] / drivers / nvmem / sunxi_sid.c

/*
 * Allwinner sunXi SoCs Security ID support.
 *
 * Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/device.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/nvmem-provider.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/random.h>

/* Registers and special values for doing register-based SID readout on H3 */
#define SUN8I_SID_PRCTL		0x40
#define SUN8I_SID_RDKEY		0x60

#define SUN8I_SID_OFFSET_MASK	0x1FF
#define SUN8I_SID_OFFSET_SHIFT	16
#define SUN8I_SID_OP_LOCK	(0xAC << 8)
#define SUN8I_SID_READ		BIT(1)

static struct nvmem_config econfig = {
	.name = "sunxi-sid",
	.read_only = true,
	.stride = 4,
	.word_size = 1,
};

struct sunxi_sid_cfg {
	u32	value_offset;
	u32	size;
	bool	need_register_readout;
};

struct sunxi_sid {
	void __iomem		*base;
	u32			value_offset;
};

/* We read the entire key, due to a 32 bit read alignment requirement. Since we
 * want to return the requested byte, this results in somewhat slower code and
 * uses 4 times more reads as needed but keeps code simpler. Since the SID is
 * only very rarely probed, this is not really an issue.
 */
static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid,
			      const unsigned int offset)
{
	u32 sid_key;

	sid_key = ioread32be(sid->base + round_down(offset, 4));
	sid_key >>= (offset % 4) * 8;

	return sid_key; /* Only return the last byte */
}

static int sunxi_sid_read(void *context, unsigned int offset,
			  void *val, size_t bytes)
{
	struct sunxi_sid *sid = context;
	u8 *buf = val;

	/* Offset the read operation to the real position of SID */
	offset += sid->value_offset;

	while (bytes--)
		*buf++ = sunxi_sid_read_byte(sid, offset++);

	return 0;
}

static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
				      const unsigned int word)
{
	u32 reg_val;
	int ret;

	/* Set word, lock access, and set read command */
	reg_val = (word & SUN8I_SID_OFFSET_MASK)
		  << SUN8I_SID_OFFSET_SHIFT;
	reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
	writel(reg_val, sid->base + SUN8I_SID_PRCTL);

	ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
				 !(reg_val & SUN8I_SID_READ), 100, 250000);
	if (ret)
		return ret;

	writel(0, sid->base + SUN8I_SID_PRCTL);
	return 0;
}

static int sunxi_sid_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct resource *res;
	struct nvmem_device *nvmem;
	struct sunxi_sid *sid;
	int ret, i, size;
	char *randomness;
	const struct sunxi_sid_cfg *cfg;

	sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
	if (!sid)
		return -ENOMEM;

	cfg = of_device_get_match_data(dev);
	if (!cfg)
		return -EINVAL;
	sid->value_offset = cfg->value_offset;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	sid->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(sid->base))
		return PTR_ERR(sid->base);

	size = cfg->size;

	if (cfg->need_register_readout) {
		/*
		 * H3's SID controller have a bug that the value at 0x200
		 * offset is not the correct value when the hardware is reseted.
		 * However, after doing a register-based read operation, the
		 * value become right.
		 * Do a full read operation here, but ignore its value
		 * (as it's more fast to read by direct MMIO value than
		 * with registers)
		 */
		for (i = 0; i < (size >> 2); i++) {
			ret = sun8i_sid_register_readout(sid, i);
			if (ret)
				return ret;
		}
	}

	econfig.size = size;
	econfig.dev = dev;
	econfig.reg_read = sunxi_sid_read;
	econfig.priv = sid;
	nvmem = nvmem_register(&econfig);
	if (IS_ERR(nvmem))
		return PTR_ERR(nvmem);

	randomness = kzalloc(sizeof(u8) * (size), GFP_KERNEL);
	if (!randomness) {
		ret = -EINVAL;
		goto err_unreg_nvmem;
	}

	for (i = 0; i < size; i++)
		randomness[i] = sunxi_sid_read_byte(sid, i);

	add_device_randomness(randomness, size);
	kfree(randomness);

	platform_set_drvdata(pdev, nvmem);

	return 0;

err_unreg_nvmem:
	nvmem_unregister(nvmem);
	return ret;
}

static int sunxi_sid_remove(struct platform_device *pdev)
{
	struct nvmem_device *nvmem = platform_get_drvdata(pdev);

	return nvmem_unregister(nvmem);
}

static const struct sunxi_sid_cfg sun4i_a10_cfg = {
	.size = 0x10,
};

static const struct sunxi_sid_cfg sun7i_a20_cfg = {
	.size = 0x200,
};

static const struct sunxi_sid_cfg sun8i_h3_cfg = {
	.value_offset = 0x200,
	.size = 0x100,
	.need_register_readout = true,
};

static const struct sunxi_sid_cfg sun50i_a64_cfg = {
	.value_offset = 0x200,
	.size = 0x100,
};

static const struct of_device_id sunxi_sid_of_match[] = {
	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
	{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
	{/* sentinel */},
};
MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);

static struct platform_driver sunxi_sid_driver = {
	.probe = sunxi_sid_probe,
	.remove = sunxi_sid_remove,
	.driver = {
		.name = "eeprom-sunxi-sid",
		.of_match_table = sunxi_sid_of_match,
	},
};
module_platform_driver(sunxi_sid_driver);

MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
MODULE_DESCRIPTION("Allwinner sunxi security id driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
3d0b16a6 MR	1	/*
	2	* Allwinner sunXi SoCs Security ID support.
	3	*
	4	* Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
	5	* Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
3d0b16a6 MR	16	*/
3d0b16a6 MR	17
3d0b16a6 MR	18	#include <linux/device.h>
3d0b16a6 MR	19	#include <linux/io.h>
1a963642	20	#include <linux/iopoll.h>
3d0b16a6 MR	21	#include <linux/module.h>
	22	#include <linux/nvmem-provider.h>
	23	#include <linux/of.h>
4a72cda5	24	#include <linux/of_device.h>
3d0b16a6	25	#include <linux/platform_device.h>
3d0b16a6 MR	26	#include <linux/slab.h>
	27	#include <linux/random.h>
	28
1a963642 IZ	29	/* Registers and special values for doing register-based SID readout on H3 */
	30	#define SUN8I_SID_PRCTL 0x40
	31	#define SUN8I_SID_RDKEY 0x60
	32
	33	#define SUN8I_SID_OFFSET_MASK 0x1FF
	34	#define SUN8I_SID_OFFSET_SHIFT 16
	35	#define SUN8I_SID_OP_LOCK (0xAC << 8)
	36	#define SUN8I_SID_READ BIT(1)
	37
3d0b16a6 MR	38	static struct nvmem_config econfig = {
	39	.name = "sunxi-sid",
	40	.read_only = true,
9c7b16eb SK	41	.stride = 4,
9c7b16eb SK	42	.word_size = 1,
3d0b16a6 MR	43	};
3d0b16a6 MR	44
4a72cda5	45	struct sunxi_sid_cfg {
1a963642	46	u32 value_offset;
4a72cda5	47	u32 size;
1a963642	48	bool need_register_readout;
4a72cda5 IZ	49	};
4a72cda5 IZ	50
3d0b16a6 MR	51	struct sunxi_sid {
3d0b16a6 MR	52	void __iomem *base;
1a963642	53	u32 value_offset;
3d0b16a6 MR	54	};
	55
	56	/* We read the entire key, due to a 32 bit read alignment requirement. Since we
	57	* want to return the requested byte, this results in somewhat slower code and
	58	* uses 4 times more reads as needed but keeps code simpler. Since the SID is
	59	* only very rarely probed, this is not really an issue.
	60	*/
	61	static u8 sunxi_sid_read_byte(const struct sunxi_sid *sid,
	62	const unsigned int offset)
	63	{
	64	u32 sid_key;
	65
	66	sid_key = ioread32be(sid->base + round_down(offset, 4));
	67	sid_key >>= (offset % 4) * 8;
	68
	69	return sid_key; /* Only return the last byte */
	70	}
	71
9c7b16eb SK	72	static int sunxi_sid_read(void *context, unsigned int offset,
9c7b16eb SK	73	void *val, size_t bytes)
3d0b16a6 MR	74	{
3d0b16a6 MR	75	struct sunxi_sid *sid = context;
3d0b16a6 MR	76	u8 *buf = val;
3d0b16a6 MR	77
1a963642 IZ	78	/* Offset the read operation to the real position of SID */
	79	offset += sid->value_offset;
	80
9c7b16eb SK	81	while (bytes--)
9c7b16eb SK	82	*buf++ = sunxi_sid_read_byte(sid, offset++);
3d0b16a6 MR	83
	84	return 0;
	85	}
	86
1a963642 IZ	87	static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
	88	const unsigned int word)
	89	{
	90	u32 reg_val;
	91	int ret;
	92
	93	/* Set word, lock access, and set read command */
	94	reg_val = (word & SUN8I_SID_OFFSET_MASK)
	95	<< SUN8I_SID_OFFSET_SHIFT;
	96	reg_val \|= SUN8I_SID_OP_LOCK \| SUN8I_SID_READ;
	97	writel(reg_val, sid->base + SUN8I_SID_PRCTL);
	98
	99	ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
	100	!(reg_val & SUN8I_SID_READ), 100, 250000);
	101	if (ret)
	102	return ret;
	103
	104	writel(0, sid->base + SUN8I_SID_PRCTL);
	105	return 0;
	106	}
	107
3d0b16a6 MR	108	static int sunxi_sid_probe(struct platform_device *pdev)
	109	{
	110	struct device *dev = &pdev->dev;
	111	struct resource *res;
	112	struct nvmem_device *nvmem;
3d0b16a6	113	struct sunxi_sid *sid;
fb727077	114	int ret, i, size;
3d0b16a6	115	char *randomness;
4a72cda5	116	const struct sunxi_sid_cfg *cfg;
3d0b16a6 MR	117
	118	sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
	119	if (!sid)
	120	return -ENOMEM;
	121
4a72cda5 IZ	122	cfg = of_device_get_match_data(dev);
	123	if (!cfg)
	124	return -EINVAL;
1a963642	125	sid->value_offset = cfg->value_offset;
4a72cda5	126
3d0b16a6 MR	127	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	128	sid->base = devm_ioremap_resource(dev, res);
	129	if (IS_ERR(sid->base))
	130	return PTR_ERR(sid->base);
	131
4a72cda5 IZ	132	size = cfg->size;
4a72cda5 IZ	133
1a963642 IZ	134	if (cfg->need_register_readout) {
	135	/*
	136	* H3's SID controller have a bug that the value at 0x200
	137	* offset is not the correct value when the hardware is reseted.
	138	* However, after doing a register-based read operation, the
	139	* value become right.
	140	* Do a full read operation here, but ignore its value
	141	* (as it's more fast to read by direct MMIO value than
	142	* with registers)
	143	*/
	144	for (i = 0; i < (size >> 2); i++) {
	145	ret = sun8i_sid_register_readout(sid, i);
	146	if (ret)
	147	return ret;
	148	}
	149	}
	150
4a72cda5	151	econfig.size = size;
3d0b16a6	152	econfig.dev = dev;
9c7b16eb SK	153	econfig.reg_read = sunxi_sid_read;
9c7b16eb SK	154	econfig.priv = sid;
3d0b16a6 MR	155	nvmem = nvmem_register(&econfig);
	156	if (IS_ERR(nvmem))
	157	return PTR_ERR(nvmem);
	158
d16abd30	159	randomness = kzalloc(sizeof(u8) * (size), GFP_KERNEL);
fb727077 MR	160	if (!randomness) {
	161	ret = -EINVAL;
	162	goto err_unreg_nvmem;
	163	}
	164
3d0b16a6 MR	165	for (i = 0; i < size; i++)
	166	randomness[i] = sunxi_sid_read_byte(sid, i);
	167
	168	add_device_randomness(randomness, size);
	169	kfree(randomness);
	170
	171	platform_set_drvdata(pdev, nvmem);
	172
	173	return 0;
fb727077 MR	174
	175	err_unreg_nvmem:
	176	nvmem_unregister(nvmem);
	177	return ret;
3d0b16a6 MR	178	}
	179
	180	static int sunxi_sid_remove(struct platform_device *pdev)
	181	{
	182	struct nvmem_device *nvmem = platform_get_drvdata(pdev);
	183
	184	return nvmem_unregister(nvmem);
	185	}
	186
4a72cda5 IZ	187	static const struct sunxi_sid_cfg sun4i_a10_cfg = {
	188	.size = 0x10,
	189	};
	190
	191	static const struct sunxi_sid_cfg sun7i_a20_cfg = {
	192	.size = 0x200,
	193	};
	194
1a963642 IZ	195	static const struct sunxi_sid_cfg sun8i_h3_cfg = {
	196	.value_offset = 0x200,
	197	.size = 0x100,
	198	.need_register_readout = true,
	199	};
	200
b7fe57b8 IZ	201	static const struct sunxi_sid_cfg sun50i_a64_cfg = {
	202	.value_offset = 0x200,
	203	.size = 0x100,
	204	};
	205
3d0b16a6	206	static const struct of_device_id sunxi_sid_of_match[] = {
4a72cda5 IZ	207	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
4a72cda5 IZ	208	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
1a963642	209	{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
b7fe57b8	210	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
3d0b16a6 MR	211	{/* sentinel */},
	212	};
	213	MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
	214
	215	static struct platform_driver sunxi_sid_driver = {
	216	.probe = sunxi_sid_probe,
	217	.remove = sunxi_sid_remove,
	218	.driver = {
	219	.name = "eeprom-sunxi-sid",
	220	.of_match_table = sunxi_sid_of_match,
	221	},
	222	};
	223	module_platform_driver(sunxi_sid_driver);
	224
	225	MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
	226	MODULE_DESCRIPTION("Allwinner sunxi security id driver");
	227	MODULE_LICENSE("GPL");