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CommitLineData
6b884a8d 1
606ad42a
RH
2#define pr_fmt(fmt) "OF: " fmt
3
5019f0b1 4#include <linux/device.h>
36e6f3d4 5#include <linux/fwnode.h>
6b884a8d
GL
6#include <linux/io.h>
7#include <linux/ioport.h>
287b3345 8#include <linux/logic_pio.h>
dbbdee94 9#include <linux/module.h>
6b884a8d 10#include <linux/of_address.h>
c5076cfe 11#include <linux/pci.h>
dbbdee94 12#include <linux/pci_regs.h>
41f8bba7
LD
13#include <linux/sizes.h>
14#include <linux/slab.h>
dbbdee94 15#include <linux/string.h>
6b884a8d 16
dbbdee94
GL
17/* Max address size we deal with */
18#define OF_MAX_ADDR_CELLS 4
5d61b165
SW
19#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
20#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
dbbdee94
GL
21
22static struct of_bus *of_match_bus(struct device_node *np);
0131d897
SAS
23static int __of_address_to_resource(struct device_node *dev,
24 const __be32 *addrp, u64 size, unsigned int flags,
35f3da32 25 const char *name, struct resource *r);
dbbdee94
GL
26
27/* Debug utility */
28#ifdef DEBUG
0131d897 29static void of_dump_addr(const char *s, const __be32 *addr, int na)
dbbdee94 30{
606ad42a 31 pr_debug("%s", s);
dbbdee94 32 while (na--)
606ad42a
RH
33 pr_cont(" %08x", be32_to_cpu(*(addr++)));
34 pr_cont("\n");
dbbdee94
GL
35}
36#else
0131d897 37static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
dbbdee94
GL
38#endif
39
40/* Callbacks for bus specific translators */
41struct of_bus {
42 const char *name;
43 const char *addresses;
44 int (*match)(struct device_node *parent);
45 void (*count_cells)(struct device_node *child,
46 int *addrc, int *sizec);
47b1e689 47 u64 (*map)(__be32 *addr, const __be32 *range,
dbbdee94 48 int na, int ns, int pna);
47b1e689 49 int (*translate)(__be32 *addr, u64 offset, int na);
0131d897 50 unsigned int (*get_flags)(const __be32 *addr);
dbbdee94
GL
51};
52
53/*
54 * Default translator (generic bus)
55 */
56
57static void of_bus_default_count_cells(struct device_node *dev,
58 int *addrc, int *sizec)
59{
60 if (addrc)
61 *addrc = of_n_addr_cells(dev);
62 if (sizec)
63 *sizec = of_n_size_cells(dev);
64}
65
47b1e689 66static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
dbbdee94
GL
67 int na, int ns, int pna)
68{
69 u64 cp, s, da;
70
71 cp = of_read_number(range, na);
72 s = of_read_number(range + na + pna, ns);
73 da = of_read_number(addr, na);
74
606ad42a 75 pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
dbbdee94
GL
76 (unsigned long long)cp, (unsigned long long)s,
77 (unsigned long long)da);
78
79 if (da < cp || da >= (cp + s))
80 return OF_BAD_ADDR;
81 return da - cp;
82}
83
47b1e689 84static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
85{
86 u64 a = of_read_number(addr, na);
87 memset(addr, 0, na * 4);
88 a += offset;
89 if (na > 1)
154063a9
GL
90 addr[na - 2] = cpu_to_be32(a >> 32);
91 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
dbbdee94
GL
92
93 return 0;
94}
95
0131d897 96static unsigned int of_bus_default_get_flags(const __be32 *addr)
dbbdee94
GL
97{
98 return IORESOURCE_MEM;
99}
100
25a31579 101#ifdef CONFIG_OF_ADDRESS_PCI
dbbdee94
GL
102/*
103 * PCI bus specific translator
104 */
105
106static int of_bus_pci_match(struct device_node *np)
107{
6dd18e46 108 /*
14e2abb7 109 * "pciex" is PCI Express
6dd18e46
BH
110 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
111 * "ht" is hypertransport
112 */
14e2abb7
KSS
113 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") ||
114 !strcmp(np->type, "vci") || !strcmp(np->type, "ht");
dbbdee94
GL
115}
116
117static void of_bus_pci_count_cells(struct device_node *np,
118 int *addrc, int *sizec)
119{
120 if (addrc)
121 *addrc = 3;
122 if (sizec)
123 *sizec = 2;
124}
125
0131d897 126static unsigned int of_bus_pci_get_flags(const __be32 *addr)
dbbdee94
GL
127{
128 unsigned int flags = 0;
0131d897 129 u32 w = be32_to_cpup(addr);
dbbdee94
GL
130
131 switch((w >> 24) & 0x03) {
132 case 0x01:
133 flags |= IORESOURCE_IO;
134 break;
135 case 0x02: /* 32 bits */
136 case 0x03: /* 64 bits */
137 flags |= IORESOURCE_MEM;
138 break;
139 }
140 if (w & 0x40000000)
141 flags |= IORESOURCE_PREFETCH;
142 return flags;
143}
144
47b1e689 145static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
0131d897 146 int pna)
dbbdee94
GL
147{
148 u64 cp, s, da;
149 unsigned int af, rf;
150
151 af = of_bus_pci_get_flags(addr);
152 rf = of_bus_pci_get_flags(range);
153
154 /* Check address type match */
155 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
156 return OF_BAD_ADDR;
157
158 /* Read address values, skipping high cell */
159 cp = of_read_number(range + 1, na - 1);
160 s = of_read_number(range + na + pna, ns);
161 da = of_read_number(addr + 1, na - 1);
162
606ad42a 163 pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n",
dbbdee94
GL
164 (unsigned long long)cp, (unsigned long long)s,
165 (unsigned long long)da);
166
167 if (da < cp || da >= (cp + s))
168 return OF_BAD_ADDR;
169 return da - cp;
170}
171
47b1e689 172static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
173{
174 return of_bus_default_translate(addr + 1, offset, na - 1);
175}
25a31579 176#endif /* CONFIG_OF_ADDRESS_PCI */
dbbdee94 177
25a31579 178#ifdef CONFIG_PCI
0131d897 179const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
dbbdee94
GL
180 unsigned int *flags)
181{
a9fadeef 182 const __be32 *prop;
dbbdee94
GL
183 unsigned int psize;
184 struct device_node *parent;
185 struct of_bus *bus;
186 int onesize, i, na, ns;
187
188 /* Get parent & match bus type */
189 parent = of_get_parent(dev);
190 if (parent == NULL)
191 return NULL;
192 bus = of_match_bus(parent);
193 if (strcmp(bus->name, "pci")) {
194 of_node_put(parent);
195 return NULL;
196 }
197 bus->count_cells(dev, &na, &ns);
198 of_node_put(parent);
5d61b165 199 if (!OF_CHECK_ADDR_COUNT(na))
dbbdee94
GL
200 return NULL;
201
202 /* Get "reg" or "assigned-addresses" property */
203 prop = of_get_property(dev, bus->addresses, &psize);
204 if (prop == NULL)
205 return NULL;
206 psize /= 4;
207
208 onesize = na + ns;
154063a9
GL
209 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
210 u32 val = be32_to_cpu(prop[0]);
211 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
dbbdee94
GL
212 if (size)
213 *size = of_read_number(prop + na, ns);
214 if (flags)
215 *flags = bus->get_flags(prop);
216 return prop;
217 }
154063a9 218 }
dbbdee94
GL
219 return NULL;
220}
221EXPORT_SYMBOL(of_get_pci_address);
222
223int of_pci_address_to_resource(struct device_node *dev, int bar,
224 struct resource *r)
225{
0131d897 226 const __be32 *addrp;
dbbdee94
GL
227 u64 size;
228 unsigned int flags;
229
230 addrp = of_get_pci_address(dev, bar, &size, &flags);
231 if (addrp == NULL)
232 return -EINVAL;
35f3da32 233 return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
dbbdee94
GL
234}
235EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
29b635c0 236
a060c210
MG
237static int parser_init(struct of_pci_range_parser *parser,
238 struct device_node *node, const char *name)
29b635c0
AM
239{
240 const int na = 3, ns = 2;
241 int rlen;
242
243 parser->node = node;
244 parser->pna = of_n_addr_cells(node);
245 parser->np = parser->pna + na + ns;
246
a060c210 247 parser->range = of_get_property(node, name, &rlen);
29b635c0
AM
248 if (parser->range == NULL)
249 return -ENOENT;
250
251 parser->end = parser->range + rlen / sizeof(__be32);
252
253 return 0;
254}
a060c210
MG
255
256int of_pci_range_parser_init(struct of_pci_range_parser *parser,
257 struct device_node *node)
258{
259 return parser_init(parser, node, "ranges");
260}
29b635c0
AM
261EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
262
a060c210
MG
263int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
264 struct device_node *node)
265{
266 return parser_init(parser, node, "dma-ranges");
267}
268EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
269
29b635c0
AM
270struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
271 struct of_pci_range *range)
272{
273 const int na = 3, ns = 2;
274
275 if (!range)
276 return NULL;
277
278 if (!parser->range || parser->range + parser->np > parser->end)
279 return NULL;
280
eb310036 281 range->pci_space = be32_to_cpup(parser->range);
29b635c0
AM
282 range->flags = of_bus_pci_get_flags(parser->range);
283 range->pci_addr = of_read_number(parser->range + 1, ns);
284 range->cpu_addr = of_translate_address(parser->node,
285 parser->range + na);
286 range->size = of_read_number(parser->range + parser->pna + na, ns);
287
288 parser->range += parser->np;
289
290 /* Now consume following elements while they are contiguous */
291 while (parser->range + parser->np <= parser->end) {
fda9f5d4 292 u32 flags;
29b635c0
AM
293 u64 pci_addr, cpu_addr, size;
294
29b635c0
AM
295 flags = of_bus_pci_get_flags(parser->range);
296 pci_addr = of_read_number(parser->range + 1, ns);
297 cpu_addr = of_translate_address(parser->node,
298 parser->range + na);
299 size = of_read_number(parser->range + parser->pna + na, ns);
300
301 if (flags != range->flags)
302 break;
303 if (pci_addr != range->pci_addr + range->size ||
304 cpu_addr != range->cpu_addr + range->size)
305 break;
306
307 range->size += size;
308 parser->range += parser->np;
309 }
310
311 return range;
312}
313EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
314
0b0b0893
LD
315/*
316 * of_pci_range_to_resource - Create a resource from an of_pci_range
317 * @range: the PCI range that describes the resource
318 * @np: device node where the range belongs to
319 * @res: pointer to a valid resource that will be updated to
320 * reflect the values contained in the range.
321 *
322 * Returns EINVAL if the range cannot be converted to resource.
323 *
324 * Note that if the range is an IO range, the resource will be converted
325 * using pci_address_to_pio() which can fail if it is called too early or
326 * if the range cannot be matched to any host bridge IO space (our case here).
327 * To guard against that we try to register the IO range first.
328 * If that fails we know that pci_address_to_pio() will do too.
329 */
330int of_pci_range_to_resource(struct of_pci_range *range,
331 struct device_node *np, struct resource *res)
83bbde1c 332{
0b0b0893 333 int err;
83bbde1c 334 res->flags = range->flags;
83bbde1c
LD
335 res->parent = res->child = res->sibling = NULL;
336 res->name = np->full_name;
0b0b0893
LD
337
338 if (res->flags & IORESOURCE_IO) {
339 unsigned long port;
36e6f3d4
GP
340 err = pci_register_io_range(&np->fwnode, range->cpu_addr,
341 range->size);
0b0b0893
LD
342 if (err)
343 goto invalid_range;
344 port = pci_address_to_pio(range->cpu_addr);
345 if (port == (unsigned long)-1) {
346 err = -EINVAL;
347 goto invalid_range;
348 }
349 res->start = port;
350 } else {
4af97106
PF
351 if ((sizeof(resource_size_t) < 8) &&
352 upper_32_bits(range->cpu_addr)) {
353 err = -EINVAL;
354 goto invalid_range;
355 }
356
0b0b0893
LD
357 res->start = range->cpu_addr;
358 }
359 res->end = res->start + range->size - 1;
360 return 0;
361
362invalid_range:
363 res->start = (resource_size_t)OF_BAD_ADDR;
364 res->end = (resource_size_t)OF_BAD_ADDR;
365 return err;
83bbde1c 366}
dbbdee94
GL
367#endif /* CONFIG_PCI */
368
369/*
370 * ISA bus specific translator
371 */
372
373static int of_bus_isa_match(struct device_node *np)
374{
375 return !strcmp(np->name, "isa");
376}
377
378static void of_bus_isa_count_cells(struct device_node *child,
379 int *addrc, int *sizec)
380{
381 if (addrc)
382 *addrc = 2;
383 if (sizec)
384 *sizec = 1;
385}
386
47b1e689 387static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
0131d897 388 int pna)
dbbdee94
GL
389{
390 u64 cp, s, da;
391
392 /* Check address type match */
0131d897 393 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
dbbdee94
GL
394 return OF_BAD_ADDR;
395
396 /* Read address values, skipping high cell */
397 cp = of_read_number(range + 1, na - 1);
398 s = of_read_number(range + na + pna, ns);
399 da = of_read_number(addr + 1, na - 1);
400
606ad42a 401 pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n",
dbbdee94
GL
402 (unsigned long long)cp, (unsigned long long)s,
403 (unsigned long long)da);
404
405 if (da < cp || da >= (cp + s))
406 return OF_BAD_ADDR;
407 return da - cp;
408}
409
47b1e689 410static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
411{
412 return of_bus_default_translate(addr + 1, offset, na - 1);
413}
414
0131d897 415static unsigned int of_bus_isa_get_flags(const __be32 *addr)
dbbdee94
GL
416{
417 unsigned int flags = 0;
0131d897 418 u32 w = be32_to_cpup(addr);
dbbdee94
GL
419
420 if (w & 1)
421 flags |= IORESOURCE_IO;
422 else
423 flags |= IORESOURCE_MEM;
424 return flags;
425}
426
427/*
428 * Array of bus specific translators
429 */
430
431static struct of_bus of_busses[] = {
25a31579 432#ifdef CONFIG_OF_ADDRESS_PCI
dbbdee94
GL
433 /* PCI */
434 {
435 .name = "pci",
436 .addresses = "assigned-addresses",
437 .match = of_bus_pci_match,
438 .count_cells = of_bus_pci_count_cells,
439 .map = of_bus_pci_map,
440 .translate = of_bus_pci_translate,
441 .get_flags = of_bus_pci_get_flags,
442 },
25a31579 443#endif /* CONFIG_OF_ADDRESS_PCI */
dbbdee94
GL
444 /* ISA */
445 {
446 .name = "isa",
447 .addresses = "reg",
448 .match = of_bus_isa_match,
449 .count_cells = of_bus_isa_count_cells,
450 .map = of_bus_isa_map,
451 .translate = of_bus_isa_translate,
452 .get_flags = of_bus_isa_get_flags,
453 },
454 /* Default */
455 {
456 .name = "default",
457 .addresses = "reg",
458 .match = NULL,
459 .count_cells = of_bus_default_count_cells,
460 .map = of_bus_default_map,
461 .translate = of_bus_default_translate,
462 .get_flags = of_bus_default_get_flags,
463 },
464};
465
466static struct of_bus *of_match_bus(struct device_node *np)
467{
468 int i;
469
470 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
471 if (!of_busses[i].match || of_busses[i].match(np))
472 return &of_busses[i];
473 BUG();
474 return NULL;
475}
476
41d94893 477static int of_empty_ranges_quirk(struct device_node *np)
746c9e9f
BH
478{
479 if (IS_ENABLED(CONFIG_PPC)) {
41d94893 480 /* To save cycles, we cache the result for global "Mac" setting */
746c9e9f
BH
481 static int quirk_state = -1;
482
41d94893
BH
483 /* PA-SEMI sdc DT bug */
484 if (of_device_is_compatible(np, "1682m-sdc"))
485 return true;
486
487 /* Make quirk cached */
746c9e9f
BH
488 if (quirk_state < 0)
489 quirk_state =
490 of_machine_is_compatible("Power Macintosh") ||
491 of_machine_is_compatible("MacRISC");
492 return quirk_state;
493 }
494 return false;
495}
496
dbbdee94 497static int of_translate_one(struct device_node *parent, struct of_bus *bus,
47b1e689 498 struct of_bus *pbus, __be32 *addr,
dbbdee94
GL
499 int na, int ns, int pna, const char *rprop)
500{
0131d897 501 const __be32 *ranges;
dbbdee94
GL
502 unsigned int rlen;
503 int rone;
504 u64 offset = OF_BAD_ADDR;
505
ba85edbe
MY
506 /*
507 * Normally, an absence of a "ranges" property means we are
dbbdee94 508 * crossing a non-translatable boundary, and thus the addresses
ba85edbe 509 * below the current cannot be converted to CPU physical ones.
dbbdee94
GL
510 * Unfortunately, while this is very clear in the spec, it's not
511 * what Apple understood, and they do have things like /uni-n or
512 * /ht nodes with no "ranges" property and a lot of perfectly
513 * useable mapped devices below them. Thus we treat the absence of
514 * "ranges" as equivalent to an empty "ranges" property which means
515 * a 1:1 translation at that level. It's up to the caller not to try
516 * to translate addresses that aren't supposed to be translated in
517 * the first place. --BenH.
3930f294
GL
518 *
519 * As far as we know, this damage only exists on Apple machines, so
520 * This code is only enabled on powerpc. --gcl
dbbdee94
GL
521 */
522 ranges = of_get_property(parent, rprop, &rlen);
41d94893 523 if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
606ad42a 524 pr_debug("no ranges; cannot translate\n");
3930f294
GL
525 return 1;
526 }
dbbdee94
GL
527 if (ranges == NULL || rlen == 0) {
528 offset = of_read_number(addr, na);
529 memset(addr, 0, pna * 4);
606ad42a 530 pr_debug("empty ranges; 1:1 translation\n");
dbbdee94
GL
531 goto finish;
532 }
533
606ad42a 534 pr_debug("walking ranges...\n");
dbbdee94
GL
535
536 /* Now walk through the ranges */
537 rlen /= 4;
538 rone = na + pna + ns;
539 for (; rlen >= rone; rlen -= rone, ranges += rone) {
540 offset = bus->map(addr, ranges, na, ns, pna);
541 if (offset != OF_BAD_ADDR)
542 break;
543 }
544 if (offset == OF_BAD_ADDR) {
606ad42a 545 pr_debug("not found !\n");
dbbdee94
GL
546 return 1;
547 }
548 memcpy(addr, ranges + na, 4 * pna);
549
550 finish:
606ad42a
RH
551 of_dump_addr("parent translation for:", addr, pna);
552 pr_debug("with offset: %llx\n", (unsigned long long)offset);
dbbdee94
GL
553
554 /* Translate it into parent bus space */
555 return pbus->translate(addr, offset, pna);
556}
557
558/*
559 * Translate an address from the device-tree into a CPU physical address,
560 * this walks up the tree and applies the various bus mappings on the
561 * way.
562 *
563 * Note: We consider that crossing any level with #size-cells == 0 to mean
564 * that translation is impossible (that is we are not dealing with a value
565 * that can be mapped to a cpu physical address). This is not really specified
566 * that way, but this is traditionally the way IBM at least do things
287b3345
ZY
567 *
568 * Whenever the translation fails, the *host pointer will be set to the
569 * device that had registered logical PIO mapping, and the return code is
570 * relative to that node.
dbbdee94 571 */
47b1e689 572static u64 __of_translate_address(struct device_node *dev,
287b3345
ZY
573 const __be32 *in_addr, const char *rprop,
574 struct device_node **host)
dbbdee94
GL
575{
576 struct device_node *parent = NULL;
577 struct of_bus *bus, *pbus;
47b1e689 578 __be32 addr[OF_MAX_ADDR_CELLS];
dbbdee94
GL
579 int na, ns, pna, pns;
580 u64 result = OF_BAD_ADDR;
581
0d638a07 582 pr_debug("** translation for device %pOF **\n", dev);
dbbdee94
GL
583
584 /* Increase refcount at current level */
585 of_node_get(dev);
586
287b3345 587 *host = NULL;
dbbdee94
GL
588 /* Get parent & match bus type */
589 parent = of_get_parent(dev);
590 if (parent == NULL)
591 goto bail;
592 bus = of_match_bus(parent);
593
59f5ca48 594 /* Count address cells & copy address locally */
dbbdee94
GL
595 bus->count_cells(dev, &na, &ns);
596 if (!OF_CHECK_COUNTS(na, ns)) {
0d638a07 597 pr_debug("Bad cell count for %pOF\n", dev);
dbbdee94
GL
598 goto bail;
599 }
600 memcpy(addr, in_addr, na * 4);
601
0d638a07
RH
602 pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n",
603 bus->name, na, ns, parent);
606ad42a 604 of_dump_addr("translating address:", addr, na);
dbbdee94
GL
605
606 /* Translate */
607 for (;;) {
287b3345
ZY
608 struct logic_pio_hwaddr *iorange;
609
dbbdee94
GL
610 /* Switch to parent bus */
611 of_node_put(dev);
612 dev = parent;
613 parent = of_get_parent(dev);
614
615 /* If root, we have finished */
616 if (parent == NULL) {
606ad42a 617 pr_debug("reached root node\n");
dbbdee94
GL
618 result = of_read_number(addr, na);
619 break;
620 }
621
287b3345
ZY
622 /*
623 * For indirectIO device which has no ranges property, get
624 * the address from reg directly.
625 */
626 iorange = find_io_range_by_fwnode(&dev->fwnode);
627 if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) {
628 result = of_read_number(addr + 1, na - 1);
629 pr_debug("indirectIO matched(%pOF) 0x%llx\n",
630 dev, result);
631 *host = of_node_get(dev);
632 break;
633 }
634
dbbdee94
GL
635 /* Get new parent bus and counts */
636 pbus = of_match_bus(parent);
637 pbus->count_cells(dev, &pna, &pns);
638 if (!OF_CHECK_COUNTS(pna, pns)) {
0d638a07 639 pr_err("Bad cell count for %pOF\n", dev);
dbbdee94
GL
640 break;
641 }
642
0d638a07
RH
643 pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n",
644 pbus->name, pna, pns, parent);
dbbdee94
GL
645
646 /* Apply bus translation */
647 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
648 break;
649
650 /* Complete the move up one level */
651 na = pna;
652 ns = pns;
653 bus = pbus;
654
606ad42a 655 of_dump_addr("one level translation:", addr, na);
dbbdee94
GL
656 }
657 bail:
658 of_node_put(parent);
659 of_node_put(dev);
660
661 return result;
662}
663
0131d897 664u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94 665{
287b3345
ZY
666 struct device_node *host;
667 u64 ret;
668
669 ret = __of_translate_address(dev, in_addr, "ranges", &host);
670 if (host) {
671 of_node_put(host);
672 return OF_BAD_ADDR;
673 }
674
675 return ret;
dbbdee94
GL
676}
677EXPORT_SYMBOL(of_translate_address);
678
0131d897 679u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94 680{
287b3345
ZY
681 struct device_node *host;
682 u64 ret;
683
684 ret = __of_translate_address(dev, in_addr, "dma-ranges", &host);
685
686 if (host) {
687 of_node_put(host);
688 return OF_BAD_ADDR;
689 }
690
691 return ret;
dbbdee94
GL
692}
693EXPORT_SYMBOL(of_translate_dma_address);
694
0131d897 695const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
dbbdee94
GL
696 unsigned int *flags)
697{
0131d897 698 const __be32 *prop;
dbbdee94
GL
699 unsigned int psize;
700 struct device_node *parent;
701 struct of_bus *bus;
702 int onesize, i, na, ns;
703
704 /* Get parent & match bus type */
705 parent = of_get_parent(dev);
706 if (parent == NULL)
707 return NULL;
708 bus = of_match_bus(parent);
709 bus->count_cells(dev, &na, &ns);
710 of_node_put(parent);
5d61b165 711 if (!OF_CHECK_ADDR_COUNT(na))
dbbdee94
GL
712 return NULL;
713
714 /* Get "reg" or "assigned-addresses" property */
715 prop = of_get_property(dev, bus->addresses, &psize);
716 if (prop == NULL)
717 return NULL;
718 psize /= 4;
719
720 onesize = na + ns;
721 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
722 if (i == index) {
723 if (size)
724 *size = of_read_number(prop + na, ns);
725 if (flags)
726 *flags = bus->get_flags(prop);
727 return prop;
728 }
729 return NULL;
730}
731EXPORT_SYMBOL(of_get_address);
732
287b3345
ZY
733static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr,
734 u64 size)
735{
736 u64 taddr;
737 unsigned long port;
738 struct device_node *host;
739
740 taddr = __of_translate_address(dev, in_addr, "ranges", &host);
741 if (host) {
742 /* host-specific port access */
743 port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size);
744 of_node_put(host);
745 } else {
746 /* memory-mapped I/O range */
747 port = pci_address_to_pio(taddr);
748 }
749
750 if (port == (unsigned long)-1)
751 return OF_BAD_ADDR;
752
753 return port;
754}
755
0131d897
SAS
756static int __of_address_to_resource(struct device_node *dev,
757 const __be32 *addrp, u64 size, unsigned int flags,
35f3da32 758 const char *name, struct resource *r)
1f5bef30
GL
759{
760 u64 taddr;
761
287b3345
ZY
762 if (flags & IORESOURCE_MEM)
763 taddr = of_translate_address(dev, addrp);
764 else if (flags & IORESOURCE_IO)
765 taddr = of_translate_ioport(dev, addrp, size);
766 else
1f5bef30 767 return -EINVAL;
287b3345 768
1f5bef30
GL
769 if (taddr == OF_BAD_ADDR)
770 return -EINVAL;
771 memset(r, 0, sizeof(struct resource));
287b3345
ZY
772
773 r->start = taddr;
774 r->end = taddr + size - 1;
1f5bef30 775 r->flags = flags;
35f3da32
BC
776 r->name = name ? name : dev->full_name;
777
1f5bef30
GL
778 return 0;
779}
780
781/**
782 * of_address_to_resource - Translate device tree address and return as resource
783 *
784 * Note that if your address is a PIO address, the conversion will fail if
785 * the physical address can't be internally converted to an IO token with
7602f422 786 * pci_address_to_pio(), that is because it's either called too early or it
1f5bef30
GL
787 * can't be matched to any host bridge IO space
788 */
789int of_address_to_resource(struct device_node *dev, int index,
790 struct resource *r)
791{
0131d897 792 const __be32 *addrp;
1f5bef30
GL
793 u64 size;
794 unsigned int flags;
35f3da32 795 const char *name = NULL;
1f5bef30
GL
796
797 addrp = of_get_address(dev, index, &size, &flags);
798 if (addrp == NULL)
799 return -EINVAL;
35f3da32
BC
800
801 /* Get optional "reg-names" property to add a name to a resource */
802 of_property_read_string_index(dev, "reg-names", index, &name);
803
804 return __of_address_to_resource(dev, addrp, size, flags, name, r);
1f5bef30
GL
805}
806EXPORT_SYMBOL_GPL(of_address_to_resource);
807
90e33f62
GL
808struct device_node *of_find_matching_node_by_address(struct device_node *from,
809 const struct of_device_id *matches,
810 u64 base_address)
811{
812 struct device_node *dn = of_find_matching_node(from, matches);
813 struct resource res;
814
815 while (dn) {
3a496b00
DD
816 if (!of_address_to_resource(dn, 0, &res) &&
817 res.start == base_address)
90e33f62 818 return dn;
3a496b00 819
90e33f62
GL
820 dn = of_find_matching_node(dn, matches);
821 }
822
823 return NULL;
824}
825
1f5bef30 826
6b884a8d
GL
827/**
828 * of_iomap - Maps the memory mapped IO for a given device_node
829 * @device: the device whose io range will be mapped
830 * @index: index of the io range
831 *
832 * Returns a pointer to the mapped memory
833 */
834void __iomem *of_iomap(struct device_node *np, int index)
835{
836 struct resource res;
837
838 if (of_address_to_resource(np, index, &res))
839 return NULL;
840
28c1b6d6 841 return ioremap(res.start, resource_size(&res));
6b884a8d
GL
842}
843EXPORT_SYMBOL(of_iomap);
18308c94 844
efd342fb
MB
845/*
846 * of_io_request_and_map - Requests a resource and maps the memory mapped IO
847 * for a given device_node
848 * @device: the device whose io range will be mapped
849 * @index: index of the io range
850 * @name: name of the resource
851 *
852 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
853 * error code on failure. Usage example:
854 *
855 * base = of_io_request_and_map(node, 0, "foo");
856 * if (IS_ERR(base))
857 * return PTR_ERR(base);
858 */
859void __iomem *of_io_request_and_map(struct device_node *np, int index,
b75b276b 860 const char *name)
efd342fb
MB
861{
862 struct resource res;
863 void __iomem *mem;
864
865 if (of_address_to_resource(np, index, &res))
866 return IOMEM_ERR_PTR(-EINVAL);
867
868 if (!request_mem_region(res.start, resource_size(&res), name))
869 return IOMEM_ERR_PTR(-EBUSY);
870
871 mem = ioremap(res.start, resource_size(&res));
872 if (!mem) {
873 release_mem_region(res.start, resource_size(&res));
874 return IOMEM_ERR_PTR(-ENOMEM);
875 }
876
877 return mem;
878}
879EXPORT_SYMBOL(of_io_request_and_map);
880
18308c94
GS
881/**
882 * of_dma_get_range - Get DMA range info
883 * @np: device node to get DMA range info
884 * @dma_addr: pointer to store initial DMA address of DMA range
885 * @paddr: pointer to store initial CPU address of DMA range
886 * @size: pointer to store size of DMA range
887 *
888 * Look in bottom up direction for the first "dma-ranges" property
889 * and parse it.
890 * dma-ranges format:
891 * DMA addr (dma_addr) : naddr cells
892 * CPU addr (phys_addr_t) : pna cells
893 * size : nsize cells
894 *
895 * It returns -ENODEV if "dma-ranges" property was not found
896 * for this device in DT.
897 */
898int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
899{
900 struct device_node *node = of_node_get(np);
901 const __be32 *ranges = NULL;
902 int len, naddr, nsize, pna;
903 int ret = 0;
904 u64 dmaaddr;
905
906 if (!node)
907 return -EINVAL;
908
909 while (1) {
910 naddr = of_n_addr_cells(node);
911 nsize = of_n_size_cells(node);
912 node = of_get_next_parent(node);
913 if (!node)
914 break;
915
916 ranges = of_get_property(node, "dma-ranges", &len);
917
918 /* Ignore empty ranges, they imply no translation required */
919 if (ranges && len > 0)
920 break;
921
922 /*
923 * At least empty ranges has to be defined for parent node if
924 * DMA is supported
925 */
926 if (!ranges)
927 break;
928 }
929
930 if (!ranges) {
0d638a07 931 pr_debug("no dma-ranges found for node(%pOF)\n", np);
18308c94
GS
932 ret = -ENODEV;
933 goto out;
934 }
935
936 len /= sizeof(u32);
937
938 pna = of_n_addr_cells(node);
939
940 /* dma-ranges format:
941 * DMA addr : naddr cells
942 * CPU addr : pna cells
943 * size : nsize cells
944 */
945 dmaaddr = of_read_number(ranges, naddr);
946 *paddr = of_translate_dma_address(np, ranges);
947 if (*paddr == OF_BAD_ADDR) {
0d638a07
RH
948 pr_err("translation of DMA address(%pad) to CPU address failed node(%pOF)\n",
949 dma_addr, np);
18308c94
GS
950 ret = -EINVAL;
951 goto out;
952 }
953 *dma_addr = dmaaddr;
954
955 *size = of_read_number(ranges + naddr + pna, nsize);
956
957 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
958 *dma_addr, *paddr, *size);
959
960out:
961 of_node_put(node);
962
963 return ret;
964}
965EXPORT_SYMBOL_GPL(of_dma_get_range);
92ea637e
SS
966
967/**
968 * of_dma_is_coherent - Check if device is coherent
969 * @np: device node
970 *
971 * It returns true if "dma-coherent" property was found
972 * for this device in DT.
973 */
974bool of_dma_is_coherent(struct device_node *np)
975{
976 struct device_node *node = of_node_get(np);
977
978 while (node) {
979 if (of_property_read_bool(node, "dma-coherent")) {
980 of_node_put(node);
981 return true;
982 }
983 node = of_get_next_parent(node);
984 }
985 of_node_put(node);
986 return false;
987}
eb3d3ec5 988EXPORT_SYMBOL_GPL(of_dma_is_coherent);