]>
Commit | Line | Data |
---|---|---|
6b884a8d | 1 | |
5019f0b1 | 2 | #include <linux/device.h> |
6b884a8d GL |
3 | #include <linux/io.h> |
4 | #include <linux/ioport.h> | |
dbbdee94 | 5 | #include <linux/module.h> |
6b884a8d | 6 | #include <linux/of_address.h> |
dbbdee94 GL |
7 | #include <linux/pci_regs.h> |
8 | #include <linux/string.h> | |
6b884a8d | 9 | |
dbbdee94 GL |
10 | /* Max address size we deal with */ |
11 | #define OF_MAX_ADDR_CELLS 4 | |
5d61b165 SW |
12 | #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) |
13 | #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) | |
dbbdee94 GL |
14 | |
15 | static struct of_bus *of_match_bus(struct device_node *np); | |
0131d897 SAS |
16 | static int __of_address_to_resource(struct device_node *dev, |
17 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 18 | const char *name, struct resource *r); |
dbbdee94 GL |
19 | |
20 | /* Debug utility */ | |
21 | #ifdef DEBUG | |
0131d897 | 22 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 GL |
23 | { |
24 | printk(KERN_DEBUG "%s", s); | |
25 | while (na--) | |
154063a9 | 26 | printk(" %08x", be32_to_cpu(*(addr++))); |
dbbdee94 GL |
27 | printk("\n"); |
28 | } | |
29 | #else | |
0131d897 | 30 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
31 | #endif |
32 | ||
33 | /* Callbacks for bus specific translators */ | |
34 | struct of_bus { | |
35 | const char *name; | |
36 | const char *addresses; | |
37 | int (*match)(struct device_node *parent); | |
38 | void (*count_cells)(struct device_node *child, | |
39 | int *addrc, int *sizec); | |
47b1e689 | 40 | u64 (*map)(__be32 *addr, const __be32 *range, |
dbbdee94 | 41 | int na, int ns, int pna); |
47b1e689 | 42 | int (*translate)(__be32 *addr, u64 offset, int na); |
0131d897 | 43 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
44 | }; |
45 | ||
46 | /* | |
47 | * Default translator (generic bus) | |
48 | */ | |
49 | ||
50 | static void of_bus_default_count_cells(struct device_node *dev, | |
51 | int *addrc, int *sizec) | |
52 | { | |
53 | if (addrc) | |
54 | *addrc = of_n_addr_cells(dev); | |
55 | if (sizec) | |
56 | *sizec = of_n_size_cells(dev); | |
57 | } | |
58 | ||
47b1e689 | 59 | static u64 of_bus_default_map(__be32 *addr, const __be32 *range, |
dbbdee94 GL |
60 | int na, int ns, int pna) |
61 | { | |
62 | u64 cp, s, da; | |
63 | ||
64 | cp = of_read_number(range, na); | |
65 | s = of_read_number(range + na + pna, ns); | |
66 | da = of_read_number(addr, na); | |
67 | ||
68 | pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", | |
69 | (unsigned long long)cp, (unsigned long long)s, | |
70 | (unsigned long long)da); | |
71 | ||
72 | if (da < cp || da >= (cp + s)) | |
73 | return OF_BAD_ADDR; | |
74 | return da - cp; | |
75 | } | |
76 | ||
47b1e689 | 77 | static int of_bus_default_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
78 | { |
79 | u64 a = of_read_number(addr, na); | |
80 | memset(addr, 0, na * 4); | |
81 | a += offset; | |
82 | if (na > 1) | |
154063a9 GL |
83 | addr[na - 2] = cpu_to_be32(a >> 32); |
84 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
85 | |
86 | return 0; | |
87 | } | |
88 | ||
0131d897 | 89 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
90 | { |
91 | return IORESOURCE_MEM; | |
92 | } | |
93 | ||
25a31579 | 94 | #ifdef CONFIG_OF_ADDRESS_PCI |
dbbdee94 GL |
95 | /* |
96 | * PCI bus specific translator | |
97 | */ | |
98 | ||
99 | static int of_bus_pci_match(struct device_node *np) | |
100 | { | |
6dd18e46 | 101 | /* |
14e2abb7 | 102 | * "pciex" is PCI Express |
6dd18e46 BH |
103 | * "vci" is for the /chaos bridge on 1st-gen PCI powermacs |
104 | * "ht" is hypertransport | |
105 | */ | |
14e2abb7 KSS |
106 | return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") || |
107 | !strcmp(np->type, "vci") || !strcmp(np->type, "ht"); | |
dbbdee94 GL |
108 | } |
109 | ||
110 | static void of_bus_pci_count_cells(struct device_node *np, | |
111 | int *addrc, int *sizec) | |
112 | { | |
113 | if (addrc) | |
114 | *addrc = 3; | |
115 | if (sizec) | |
116 | *sizec = 2; | |
117 | } | |
118 | ||
0131d897 | 119 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
dbbdee94 GL |
120 | { |
121 | unsigned int flags = 0; | |
0131d897 | 122 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
123 | |
124 | switch((w >> 24) & 0x03) { | |
125 | case 0x01: | |
126 | flags |= IORESOURCE_IO; | |
127 | break; | |
128 | case 0x02: /* 32 bits */ | |
129 | case 0x03: /* 64 bits */ | |
130 | flags |= IORESOURCE_MEM; | |
131 | break; | |
132 | } | |
133 | if (w & 0x40000000) | |
134 | flags |= IORESOURCE_PREFETCH; | |
135 | return flags; | |
136 | } | |
137 | ||
47b1e689 | 138 | static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 139 | int pna) |
dbbdee94 GL |
140 | { |
141 | u64 cp, s, da; | |
142 | unsigned int af, rf; | |
143 | ||
144 | af = of_bus_pci_get_flags(addr); | |
145 | rf = of_bus_pci_get_flags(range); | |
146 | ||
147 | /* Check address type match */ | |
148 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
149 | return OF_BAD_ADDR; | |
150 | ||
151 | /* Read address values, skipping high cell */ | |
152 | cp = of_read_number(range + 1, na - 1); | |
153 | s = of_read_number(range + na + pna, ns); | |
154 | da = of_read_number(addr + 1, na - 1); | |
155 | ||
156 | pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n", | |
157 | (unsigned long long)cp, (unsigned long long)s, | |
158 | (unsigned long long)da); | |
159 | ||
160 | if (da < cp || da >= (cp + s)) | |
161 | return OF_BAD_ADDR; | |
162 | return da - cp; | |
163 | } | |
164 | ||
47b1e689 | 165 | static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
166 | { |
167 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
168 | } | |
25a31579 | 169 | #endif /* CONFIG_OF_ADDRESS_PCI */ |
dbbdee94 | 170 | |
25a31579 | 171 | #ifdef CONFIG_PCI |
0131d897 | 172 | const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, |
dbbdee94 GL |
173 | unsigned int *flags) |
174 | { | |
a9fadeef | 175 | const __be32 *prop; |
dbbdee94 GL |
176 | unsigned int psize; |
177 | struct device_node *parent; | |
178 | struct of_bus *bus; | |
179 | int onesize, i, na, ns; | |
180 | ||
181 | /* Get parent & match bus type */ | |
182 | parent = of_get_parent(dev); | |
183 | if (parent == NULL) | |
184 | return NULL; | |
185 | bus = of_match_bus(parent); | |
186 | if (strcmp(bus->name, "pci")) { | |
187 | of_node_put(parent); | |
188 | return NULL; | |
189 | } | |
190 | bus->count_cells(dev, &na, &ns); | |
191 | of_node_put(parent); | |
5d61b165 | 192 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
193 | return NULL; |
194 | ||
195 | /* Get "reg" or "assigned-addresses" property */ | |
196 | prop = of_get_property(dev, bus->addresses, &psize); | |
197 | if (prop == NULL) | |
198 | return NULL; | |
199 | psize /= 4; | |
200 | ||
201 | onesize = na + ns; | |
154063a9 GL |
202 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
203 | u32 val = be32_to_cpu(prop[0]); | |
204 | if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | |
dbbdee94 GL |
205 | if (size) |
206 | *size = of_read_number(prop + na, ns); | |
207 | if (flags) | |
208 | *flags = bus->get_flags(prop); | |
209 | return prop; | |
210 | } | |
154063a9 | 211 | } |
dbbdee94 GL |
212 | return NULL; |
213 | } | |
214 | EXPORT_SYMBOL(of_get_pci_address); | |
215 | ||
216 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
217 | struct resource *r) | |
218 | { | |
0131d897 | 219 | const __be32 *addrp; |
dbbdee94 GL |
220 | u64 size; |
221 | unsigned int flags; | |
222 | ||
223 | addrp = of_get_pci_address(dev, bar, &size, &flags); | |
224 | if (addrp == NULL) | |
225 | return -EINVAL; | |
35f3da32 | 226 | return __of_address_to_resource(dev, addrp, size, flags, NULL, r); |
dbbdee94 GL |
227 | } |
228 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
29b635c0 AM |
229 | |
230 | int of_pci_range_parser_init(struct of_pci_range_parser *parser, | |
231 | struct device_node *node) | |
232 | { | |
233 | const int na = 3, ns = 2; | |
234 | int rlen; | |
235 | ||
236 | parser->node = node; | |
237 | parser->pna = of_n_addr_cells(node); | |
238 | parser->np = parser->pna + na + ns; | |
239 | ||
240 | parser->range = of_get_property(node, "ranges", &rlen); | |
241 | if (parser->range == NULL) | |
242 | return -ENOENT; | |
243 | ||
244 | parser->end = parser->range + rlen / sizeof(__be32); | |
245 | ||
246 | return 0; | |
247 | } | |
248 | EXPORT_SYMBOL_GPL(of_pci_range_parser_init); | |
249 | ||
250 | struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, | |
251 | struct of_pci_range *range) | |
252 | { | |
253 | const int na = 3, ns = 2; | |
254 | ||
255 | if (!range) | |
256 | return NULL; | |
257 | ||
258 | if (!parser->range || parser->range + parser->np > parser->end) | |
259 | return NULL; | |
260 | ||
261 | range->pci_space = parser->range[0]; | |
262 | range->flags = of_bus_pci_get_flags(parser->range); | |
263 | range->pci_addr = of_read_number(parser->range + 1, ns); | |
264 | range->cpu_addr = of_translate_address(parser->node, | |
265 | parser->range + na); | |
266 | range->size = of_read_number(parser->range + parser->pna + na, ns); | |
267 | ||
268 | parser->range += parser->np; | |
269 | ||
270 | /* Now consume following elements while they are contiguous */ | |
271 | while (parser->range + parser->np <= parser->end) { | |
272 | u32 flags, pci_space; | |
273 | u64 pci_addr, cpu_addr, size; | |
274 | ||
275 | pci_space = be32_to_cpup(parser->range); | |
276 | flags = of_bus_pci_get_flags(parser->range); | |
277 | pci_addr = of_read_number(parser->range + 1, ns); | |
278 | cpu_addr = of_translate_address(parser->node, | |
279 | parser->range + na); | |
280 | size = of_read_number(parser->range + parser->pna + na, ns); | |
281 | ||
282 | if (flags != range->flags) | |
283 | break; | |
284 | if (pci_addr != range->pci_addr + range->size || | |
285 | cpu_addr != range->cpu_addr + range->size) | |
286 | break; | |
287 | ||
288 | range->size += size; | |
289 | parser->range += parser->np; | |
290 | } | |
291 | ||
292 | return range; | |
293 | } | |
294 | EXPORT_SYMBOL_GPL(of_pci_range_parser_one); | |
295 | ||
dbbdee94 GL |
296 | #endif /* CONFIG_PCI */ |
297 | ||
298 | /* | |
299 | * ISA bus specific translator | |
300 | */ | |
301 | ||
302 | static int of_bus_isa_match(struct device_node *np) | |
303 | { | |
304 | return !strcmp(np->name, "isa"); | |
305 | } | |
306 | ||
307 | static void of_bus_isa_count_cells(struct device_node *child, | |
308 | int *addrc, int *sizec) | |
309 | { | |
310 | if (addrc) | |
311 | *addrc = 2; | |
312 | if (sizec) | |
313 | *sizec = 1; | |
314 | } | |
315 | ||
47b1e689 | 316 | static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 317 | int pna) |
dbbdee94 GL |
318 | { |
319 | u64 cp, s, da; | |
320 | ||
321 | /* Check address type match */ | |
0131d897 | 322 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
323 | return OF_BAD_ADDR; |
324 | ||
325 | /* Read address values, skipping high cell */ | |
326 | cp = of_read_number(range + 1, na - 1); | |
327 | s = of_read_number(range + na + pna, ns); | |
328 | da = of_read_number(addr + 1, na - 1); | |
329 | ||
330 | pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", | |
331 | (unsigned long long)cp, (unsigned long long)s, | |
332 | (unsigned long long)da); | |
333 | ||
334 | if (da < cp || da >= (cp + s)) | |
335 | return OF_BAD_ADDR; | |
336 | return da - cp; | |
337 | } | |
338 | ||
47b1e689 | 339 | static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
340 | { |
341 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
342 | } | |
343 | ||
0131d897 | 344 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
345 | { |
346 | unsigned int flags = 0; | |
0131d897 | 347 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
348 | |
349 | if (w & 1) | |
350 | flags |= IORESOURCE_IO; | |
351 | else | |
352 | flags |= IORESOURCE_MEM; | |
353 | return flags; | |
354 | } | |
355 | ||
356 | /* | |
357 | * Array of bus specific translators | |
358 | */ | |
359 | ||
360 | static struct of_bus of_busses[] = { | |
25a31579 | 361 | #ifdef CONFIG_OF_ADDRESS_PCI |
dbbdee94 GL |
362 | /* PCI */ |
363 | { | |
364 | .name = "pci", | |
365 | .addresses = "assigned-addresses", | |
366 | .match = of_bus_pci_match, | |
367 | .count_cells = of_bus_pci_count_cells, | |
368 | .map = of_bus_pci_map, | |
369 | .translate = of_bus_pci_translate, | |
370 | .get_flags = of_bus_pci_get_flags, | |
371 | }, | |
25a31579 | 372 | #endif /* CONFIG_OF_ADDRESS_PCI */ |
dbbdee94 GL |
373 | /* ISA */ |
374 | { | |
375 | .name = "isa", | |
376 | .addresses = "reg", | |
377 | .match = of_bus_isa_match, | |
378 | .count_cells = of_bus_isa_count_cells, | |
379 | .map = of_bus_isa_map, | |
380 | .translate = of_bus_isa_translate, | |
381 | .get_flags = of_bus_isa_get_flags, | |
382 | }, | |
383 | /* Default */ | |
384 | { | |
385 | .name = "default", | |
386 | .addresses = "reg", | |
387 | .match = NULL, | |
388 | .count_cells = of_bus_default_count_cells, | |
389 | .map = of_bus_default_map, | |
390 | .translate = of_bus_default_translate, | |
391 | .get_flags = of_bus_default_get_flags, | |
392 | }, | |
393 | }; | |
394 | ||
395 | static struct of_bus *of_match_bus(struct device_node *np) | |
396 | { | |
397 | int i; | |
398 | ||
399 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
400 | if (!of_busses[i].match || of_busses[i].match(np)) | |
401 | return &of_busses[i]; | |
402 | BUG(); | |
403 | return NULL; | |
404 | } | |
405 | ||
406 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, | |
47b1e689 | 407 | struct of_bus *pbus, __be32 *addr, |
dbbdee94 GL |
408 | int na, int ns, int pna, const char *rprop) |
409 | { | |
0131d897 | 410 | const __be32 *ranges; |
dbbdee94 GL |
411 | unsigned int rlen; |
412 | int rone; | |
413 | u64 offset = OF_BAD_ADDR; | |
414 | ||
415 | /* Normally, an absence of a "ranges" property means we are | |
416 | * crossing a non-translatable boundary, and thus the addresses | |
417 | * below the current not cannot be converted to CPU physical ones. | |
418 | * Unfortunately, while this is very clear in the spec, it's not | |
419 | * what Apple understood, and they do have things like /uni-n or | |
420 | * /ht nodes with no "ranges" property and a lot of perfectly | |
421 | * useable mapped devices below them. Thus we treat the absence of | |
422 | * "ranges" as equivalent to an empty "ranges" property which means | |
423 | * a 1:1 translation at that level. It's up to the caller not to try | |
424 | * to translate addresses that aren't supposed to be translated in | |
425 | * the first place. --BenH. | |
3930f294 GL |
426 | * |
427 | * As far as we know, this damage only exists on Apple machines, so | |
428 | * This code is only enabled on powerpc. --gcl | |
dbbdee94 GL |
429 | */ |
430 | ranges = of_get_property(parent, rprop, &rlen); | |
3930f294 GL |
431 | #if !defined(CONFIG_PPC) |
432 | if (ranges == NULL) { | |
433 | pr_err("OF: no ranges; cannot translate\n"); | |
434 | return 1; | |
435 | } | |
436 | #endif /* !defined(CONFIG_PPC) */ | |
dbbdee94 GL |
437 | if (ranges == NULL || rlen == 0) { |
438 | offset = of_read_number(addr, na); | |
439 | memset(addr, 0, pna * 4); | |
3930f294 | 440 | pr_debug("OF: empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
441 | goto finish; |
442 | } | |
443 | ||
444 | pr_debug("OF: walking ranges...\n"); | |
445 | ||
446 | /* Now walk through the ranges */ | |
447 | rlen /= 4; | |
448 | rone = na + pna + ns; | |
449 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
450 | offset = bus->map(addr, ranges, na, ns, pna); | |
451 | if (offset != OF_BAD_ADDR) | |
452 | break; | |
453 | } | |
454 | if (offset == OF_BAD_ADDR) { | |
455 | pr_debug("OF: not found !\n"); | |
456 | return 1; | |
457 | } | |
458 | memcpy(addr, ranges + na, 4 * pna); | |
459 | ||
460 | finish: | |
461 | of_dump_addr("OF: parent translation for:", addr, pna); | |
462 | pr_debug("OF: with offset: %llx\n", (unsigned long long)offset); | |
463 | ||
464 | /* Translate it into parent bus space */ | |
465 | return pbus->translate(addr, offset, pna); | |
466 | } | |
467 | ||
468 | /* | |
469 | * Translate an address from the device-tree into a CPU physical address, | |
470 | * this walks up the tree and applies the various bus mappings on the | |
471 | * way. | |
472 | * | |
473 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
474 | * that translation is impossible (that is we are not dealing with a value | |
475 | * that can be mapped to a cpu physical address). This is not really specified | |
476 | * that way, but this is traditionally the way IBM at least do things | |
477 | */ | |
47b1e689 KP |
478 | static u64 __of_translate_address(struct device_node *dev, |
479 | const __be32 *in_addr, const char *rprop) | |
dbbdee94 GL |
480 | { |
481 | struct device_node *parent = NULL; | |
482 | struct of_bus *bus, *pbus; | |
47b1e689 | 483 | __be32 addr[OF_MAX_ADDR_CELLS]; |
dbbdee94 GL |
484 | int na, ns, pna, pns; |
485 | u64 result = OF_BAD_ADDR; | |
486 | ||
8804827b | 487 | pr_debug("OF: ** translation for device %s **\n", of_node_full_name(dev)); |
dbbdee94 GL |
488 | |
489 | /* Increase refcount at current level */ | |
490 | of_node_get(dev); | |
491 | ||
492 | /* Get parent & match bus type */ | |
493 | parent = of_get_parent(dev); | |
494 | if (parent == NULL) | |
495 | goto bail; | |
496 | bus = of_match_bus(parent); | |
497 | ||
59f5ca48 | 498 | /* Count address cells & copy address locally */ |
dbbdee94 GL |
499 | bus->count_cells(dev, &na, &ns); |
500 | if (!OF_CHECK_COUNTS(na, ns)) { | |
501 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
8804827b | 502 | of_node_full_name(dev)); |
dbbdee94 GL |
503 | goto bail; |
504 | } | |
505 | memcpy(addr, in_addr, na * 4); | |
506 | ||
507 | pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
8804827b | 508 | bus->name, na, ns, of_node_full_name(parent)); |
dbbdee94 GL |
509 | of_dump_addr("OF: translating address:", addr, na); |
510 | ||
511 | /* Translate */ | |
512 | for (;;) { | |
513 | /* Switch to parent bus */ | |
514 | of_node_put(dev); | |
515 | dev = parent; | |
516 | parent = of_get_parent(dev); | |
517 | ||
518 | /* If root, we have finished */ | |
519 | if (parent == NULL) { | |
520 | pr_debug("OF: reached root node\n"); | |
521 | result = of_read_number(addr, na); | |
522 | break; | |
523 | } | |
524 | ||
525 | /* Get new parent bus and counts */ | |
526 | pbus = of_match_bus(parent); | |
527 | pbus->count_cells(dev, &pna, &pns); | |
528 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
529 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
0c02c800 | 530 | of_node_full_name(dev)); |
dbbdee94 GL |
531 | break; |
532 | } | |
533 | ||
534 | pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
0c02c800 | 535 | pbus->name, pna, pns, of_node_full_name(parent)); |
dbbdee94 GL |
536 | |
537 | /* Apply bus translation */ | |
538 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
539 | break; | |
540 | ||
541 | /* Complete the move up one level */ | |
542 | na = pna; | |
543 | ns = pns; | |
544 | bus = pbus; | |
545 | ||
546 | of_dump_addr("OF: one level translation:", addr, na); | |
547 | } | |
548 | bail: | |
549 | of_node_put(parent); | |
550 | of_node_put(dev); | |
551 | ||
552 | return result; | |
553 | } | |
554 | ||
0131d897 | 555 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
556 | { |
557 | return __of_translate_address(dev, in_addr, "ranges"); | |
558 | } | |
559 | EXPORT_SYMBOL(of_translate_address); | |
560 | ||
0131d897 | 561 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
562 | { |
563 | return __of_translate_address(dev, in_addr, "dma-ranges"); | |
564 | } | |
565 | EXPORT_SYMBOL(of_translate_dma_address); | |
566 | ||
5d61b165 SW |
567 | bool of_can_translate_address(struct device_node *dev) |
568 | { | |
569 | struct device_node *parent; | |
570 | struct of_bus *bus; | |
571 | int na, ns; | |
572 | ||
573 | parent = of_get_parent(dev); | |
574 | if (parent == NULL) | |
575 | return false; | |
576 | ||
577 | bus = of_match_bus(parent); | |
578 | bus->count_cells(dev, &na, &ns); | |
579 | ||
580 | of_node_put(parent); | |
581 | ||
582 | return OF_CHECK_COUNTS(na, ns); | |
583 | } | |
584 | EXPORT_SYMBOL(of_can_translate_address); | |
585 | ||
0131d897 | 586 | const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, |
dbbdee94 GL |
587 | unsigned int *flags) |
588 | { | |
0131d897 | 589 | const __be32 *prop; |
dbbdee94 GL |
590 | unsigned int psize; |
591 | struct device_node *parent; | |
592 | struct of_bus *bus; | |
593 | int onesize, i, na, ns; | |
594 | ||
595 | /* Get parent & match bus type */ | |
596 | parent = of_get_parent(dev); | |
597 | if (parent == NULL) | |
598 | return NULL; | |
599 | bus = of_match_bus(parent); | |
600 | bus->count_cells(dev, &na, &ns); | |
601 | of_node_put(parent); | |
5d61b165 | 602 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
603 | return NULL; |
604 | ||
605 | /* Get "reg" or "assigned-addresses" property */ | |
606 | prop = of_get_property(dev, bus->addresses, &psize); | |
607 | if (prop == NULL) | |
608 | return NULL; | |
609 | psize /= 4; | |
610 | ||
611 | onesize = na + ns; | |
612 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | |
613 | if (i == index) { | |
614 | if (size) | |
615 | *size = of_read_number(prop + na, ns); | |
616 | if (flags) | |
617 | *flags = bus->get_flags(prop); | |
618 | return prop; | |
619 | } | |
620 | return NULL; | |
621 | } | |
622 | EXPORT_SYMBOL(of_get_address); | |
623 | ||
25ff7944 RH |
624 | unsigned long __weak pci_address_to_pio(phys_addr_t address) |
625 | { | |
626 | if (address > IO_SPACE_LIMIT) | |
627 | return (unsigned long)-1; | |
628 | ||
629 | return (unsigned long) address; | |
630 | } | |
631 | ||
0131d897 SAS |
632 | static int __of_address_to_resource(struct device_node *dev, |
633 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 634 | const char *name, struct resource *r) |
1f5bef30 GL |
635 | { |
636 | u64 taddr; | |
637 | ||
638 | if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) | |
639 | return -EINVAL; | |
640 | taddr = of_translate_address(dev, addrp); | |
641 | if (taddr == OF_BAD_ADDR) | |
642 | return -EINVAL; | |
643 | memset(r, 0, sizeof(struct resource)); | |
644 | if (flags & IORESOURCE_IO) { | |
645 | unsigned long port; | |
646 | port = pci_address_to_pio(taddr); | |
647 | if (port == (unsigned long)-1) | |
648 | return -EINVAL; | |
649 | r->start = port; | |
650 | r->end = port + size - 1; | |
651 | } else { | |
652 | r->start = taddr; | |
653 | r->end = taddr + size - 1; | |
654 | } | |
655 | r->flags = flags; | |
35f3da32 BC |
656 | r->name = name ? name : dev->full_name; |
657 | ||
1f5bef30 GL |
658 | return 0; |
659 | } | |
660 | ||
661 | /** | |
662 | * of_address_to_resource - Translate device tree address and return as resource | |
663 | * | |
664 | * Note that if your address is a PIO address, the conversion will fail if | |
665 | * the physical address can't be internally converted to an IO token with | |
666 | * pci_address_to_pio(), that is because it's either called to early or it | |
667 | * can't be matched to any host bridge IO space | |
668 | */ | |
669 | int of_address_to_resource(struct device_node *dev, int index, | |
670 | struct resource *r) | |
671 | { | |
0131d897 | 672 | const __be32 *addrp; |
1f5bef30 GL |
673 | u64 size; |
674 | unsigned int flags; | |
35f3da32 | 675 | const char *name = NULL; |
1f5bef30 GL |
676 | |
677 | addrp = of_get_address(dev, index, &size, &flags); | |
678 | if (addrp == NULL) | |
679 | return -EINVAL; | |
35f3da32 BC |
680 | |
681 | /* Get optional "reg-names" property to add a name to a resource */ | |
682 | of_property_read_string_index(dev, "reg-names", index, &name); | |
683 | ||
684 | return __of_address_to_resource(dev, addrp, size, flags, name, r); | |
1f5bef30 GL |
685 | } |
686 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
687 | ||
90e33f62 GL |
688 | struct device_node *of_find_matching_node_by_address(struct device_node *from, |
689 | const struct of_device_id *matches, | |
690 | u64 base_address) | |
691 | { | |
692 | struct device_node *dn = of_find_matching_node(from, matches); | |
693 | struct resource res; | |
694 | ||
695 | while (dn) { | |
696 | if (of_address_to_resource(dn, 0, &res)) | |
697 | continue; | |
698 | if (res.start == base_address) | |
699 | return dn; | |
700 | dn = of_find_matching_node(dn, matches); | |
701 | } | |
702 | ||
703 | return NULL; | |
704 | } | |
705 | ||
1f5bef30 | 706 | |
6b884a8d GL |
707 | /** |
708 | * of_iomap - Maps the memory mapped IO for a given device_node | |
709 | * @device: the device whose io range will be mapped | |
710 | * @index: index of the io range | |
711 | * | |
712 | * Returns a pointer to the mapped memory | |
713 | */ | |
714 | void __iomem *of_iomap(struct device_node *np, int index) | |
715 | { | |
716 | struct resource res; | |
717 | ||
718 | if (of_address_to_resource(np, index, &res)) | |
719 | return NULL; | |
720 | ||
28c1b6d6 | 721 | return ioremap(res.start, resource_size(&res)); |
6b884a8d GL |
722 | } |
723 | EXPORT_SYMBOL(of_iomap); |