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UBUNTU: SAUCE: OF: Add missing I/O range exception for indirect-IO devices
[mirror_ubuntu-zesty-kernel.git] / drivers / of / address.c
CommitLineData
6b884a8d 1
606ad42a
RH
2#define pr_fmt(fmt) "OF: " fmt
3
5019f0b1 4#include <linux/device.h>
6b884a8d
GL
5#include <linux/io.h>
6#include <linux/ioport.h>
37807639 7#include <linux/libio.h>
dbbdee94 8#include <linux/module.h>
6b884a8d 9#include <linux/of_address.h>
c5076cfe 10#include <linux/pci.h>
dbbdee94 11#include <linux/pci_regs.h>
41f8bba7
LD
12#include <linux/sizes.h>
13#include <linux/slab.h>
dbbdee94 14#include <linux/string.h>
6b884a8d 15
dbbdee94
GL
16/* Max address size we deal with */
17#define OF_MAX_ADDR_CELLS 4
5d61b165
SW
18#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
19#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
dbbdee94
GL
20
21static struct of_bus *of_match_bus(struct device_node *np);
0131d897
SAS
22static int __of_address_to_resource(struct device_node *dev,
23 const __be32 *addrp, u64 size, unsigned int flags,
35f3da32 24 const char *name, struct resource *r);
dbbdee94
GL
25
26/* Debug utility */
27#ifdef DEBUG
0131d897 28static void of_dump_addr(const char *s, const __be32 *addr, int na)
dbbdee94 29{
606ad42a 30 pr_debug("%s", s);
dbbdee94 31 while (na--)
606ad42a
RH
32 pr_cont(" %08x", be32_to_cpu(*(addr++)));
33 pr_cont("\n");
dbbdee94
GL
34}
35#else
0131d897 36static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
dbbdee94
GL
37#endif
38
39/* Callbacks for bus specific translators */
40struct of_bus {
41 const char *name;
42 const char *addresses;
43 int (*match)(struct device_node *parent);
44 void (*count_cells)(struct device_node *child,
45 int *addrc, int *sizec);
47b1e689 46 u64 (*map)(__be32 *addr, const __be32 *range,
dbbdee94 47 int na, int ns, int pna);
47b1e689 48 int (*translate)(__be32 *addr, u64 offset, int na);
0131d897 49 unsigned int (*get_flags)(const __be32 *addr);
dbbdee94
GL
50};
51
52/*
53 * Default translator (generic bus)
54 */
55
56static void of_bus_default_count_cells(struct device_node *dev,
57 int *addrc, int *sizec)
58{
59 if (addrc)
60 *addrc = of_n_addr_cells(dev);
61 if (sizec)
62 *sizec = of_n_size_cells(dev);
63}
64
47b1e689 65static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
dbbdee94
GL
66 int na, int ns, int pna)
67{
68 u64 cp, s, da;
69
70 cp = of_read_number(range, na);
71 s = of_read_number(range + na + pna, ns);
72 da = of_read_number(addr, na);
73
606ad42a 74 pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
dbbdee94
GL
75 (unsigned long long)cp, (unsigned long long)s,
76 (unsigned long long)da);
77
78 if (da < cp || da >= (cp + s))
79 return OF_BAD_ADDR;
80 return da - cp;
81}
82
47b1e689 83static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
84{
85 u64 a = of_read_number(addr, na);
86 memset(addr, 0, na * 4);
87 a += offset;
88 if (na > 1)
154063a9
GL
89 addr[na - 2] = cpu_to_be32(a >> 32);
90 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
dbbdee94
GL
91
92 return 0;
93}
94
0131d897 95static unsigned int of_bus_default_get_flags(const __be32 *addr)
dbbdee94
GL
96{
97 return IORESOURCE_MEM;
98}
99
25a31579 100#ifdef CONFIG_OF_ADDRESS_PCI
dbbdee94
GL
101/*
102 * PCI bus specific translator
103 */
104
105static int of_bus_pci_match(struct device_node *np)
106{
6dd18e46 107 /*
14e2abb7 108 * "pciex" is PCI Express
6dd18e46
BH
109 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
110 * "ht" is hypertransport
111 */
14e2abb7
KSS
112 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") ||
113 !strcmp(np->type, "vci") || !strcmp(np->type, "ht");
dbbdee94
GL
114}
115
116static void of_bus_pci_count_cells(struct device_node *np,
117 int *addrc, int *sizec)
118{
119 if (addrc)
120 *addrc = 3;
121 if (sizec)
122 *sizec = 2;
123}
124
0131d897 125static unsigned int of_bus_pci_get_flags(const __be32 *addr)
dbbdee94
GL
126{
127 unsigned int flags = 0;
0131d897 128 u32 w = be32_to_cpup(addr);
dbbdee94
GL
129
130 switch((w >> 24) & 0x03) {
131 case 0x01:
132 flags |= IORESOURCE_IO;
133 break;
134 case 0x02: /* 32 bits */
135 case 0x03: /* 64 bits */
136 flags |= IORESOURCE_MEM;
137 break;
138 }
139 if (w & 0x40000000)
140 flags |= IORESOURCE_PREFETCH;
141 return flags;
142}
143
47b1e689 144static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
0131d897 145 int pna)
dbbdee94
GL
146{
147 u64 cp, s, da;
148 unsigned int af, rf;
149
150 af = of_bus_pci_get_flags(addr);
151 rf = of_bus_pci_get_flags(range);
152
153 /* Check address type match */
154 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
155 return OF_BAD_ADDR;
156
157 /* Read address values, skipping high cell */
158 cp = of_read_number(range + 1, na - 1);
159 s = of_read_number(range + na + pna, ns);
160 da = of_read_number(addr + 1, na - 1);
161
606ad42a 162 pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n",
dbbdee94
GL
163 (unsigned long long)cp, (unsigned long long)s,
164 (unsigned long long)da);
165
166 if (da < cp || da >= (cp + s))
167 return OF_BAD_ADDR;
168 return da - cp;
169}
170
47b1e689 171static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
172{
173 return of_bus_default_translate(addr + 1, offset, na - 1);
174}
25a31579 175#endif /* CONFIG_OF_ADDRESS_PCI */
dbbdee94 176
25a31579 177#ifdef CONFIG_PCI
0131d897 178const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
dbbdee94
GL
179 unsigned int *flags)
180{
a9fadeef 181 const __be32 *prop;
dbbdee94
GL
182 unsigned int psize;
183 struct device_node *parent;
184 struct of_bus *bus;
185 int onesize, i, na, ns;
186
187 /* Get parent & match bus type */
188 parent = of_get_parent(dev);
189 if (parent == NULL)
190 return NULL;
191 bus = of_match_bus(parent);
192 if (strcmp(bus->name, "pci")) {
193 of_node_put(parent);
194 return NULL;
195 }
196 bus->count_cells(dev, &na, &ns);
197 of_node_put(parent);
5d61b165 198 if (!OF_CHECK_ADDR_COUNT(na))
dbbdee94
GL
199 return NULL;
200
201 /* Get "reg" or "assigned-addresses" property */
202 prop = of_get_property(dev, bus->addresses, &psize);
203 if (prop == NULL)
204 return NULL;
205 psize /= 4;
206
207 onesize = na + ns;
154063a9
GL
208 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
209 u32 val = be32_to_cpu(prop[0]);
210 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
dbbdee94
GL
211 if (size)
212 *size = of_read_number(prop + na, ns);
213 if (flags)
214 *flags = bus->get_flags(prop);
215 return prop;
216 }
154063a9 217 }
dbbdee94
GL
218 return NULL;
219}
220EXPORT_SYMBOL(of_get_pci_address);
221
222int of_pci_address_to_resource(struct device_node *dev, int bar,
223 struct resource *r)
224{
0131d897 225 const __be32 *addrp;
dbbdee94
GL
226 u64 size;
227 unsigned int flags;
228
229 addrp = of_get_pci_address(dev, bar, &size, &flags);
230 if (addrp == NULL)
231 return -EINVAL;
35f3da32 232 return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
dbbdee94
GL
233}
234EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
29b635c0
AM
235
236int of_pci_range_parser_init(struct of_pci_range_parser *parser,
237 struct device_node *node)
238{
239 const int na = 3, ns = 2;
240 int rlen;
241
242 parser->node = node;
243 parser->pna = of_n_addr_cells(node);
244 parser->np = parser->pna + na + ns;
245
246 parser->range = of_get_property(node, "ranges", &rlen);
247 if (parser->range == NULL)
248 return -ENOENT;
249
250 parser->end = parser->range + rlen / sizeof(__be32);
251
252 return 0;
253}
254EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
255
256struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
257 struct of_pci_range *range)
258{
259 const int na = 3, ns = 2;
260
261 if (!range)
262 return NULL;
263
264 if (!parser->range || parser->range + parser->np > parser->end)
265 return NULL;
266
267 range->pci_space = parser->range[0];
268 range->flags = of_bus_pci_get_flags(parser->range);
269 range->pci_addr = of_read_number(parser->range + 1, ns);
270 range->cpu_addr = of_translate_address(parser->node,
271 parser->range + na);
272 range->size = of_read_number(parser->range + parser->pna + na, ns);
273
274 parser->range += parser->np;
275
276 /* Now consume following elements while they are contiguous */
277 while (parser->range + parser->np <= parser->end) {
278 u32 flags, pci_space;
279 u64 pci_addr, cpu_addr, size;
280
281 pci_space = be32_to_cpup(parser->range);
282 flags = of_bus_pci_get_flags(parser->range);
283 pci_addr = of_read_number(parser->range + 1, ns);
284 cpu_addr = of_translate_address(parser->node,
285 parser->range + na);
286 size = of_read_number(parser->range + parser->pna + na, ns);
287
288 if (flags != range->flags)
289 break;
290 if (pci_addr != range->pci_addr + range->size ||
291 cpu_addr != range->cpu_addr + range->size)
292 break;
293
294 range->size += size;
295 parser->range += parser->np;
296 }
297
298 return range;
299}
300EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
301
0b0b0893
LD
302/*
303 * of_pci_range_to_resource - Create a resource from an of_pci_range
304 * @range: the PCI range that describes the resource
305 * @np: device node where the range belongs to
306 * @res: pointer to a valid resource that will be updated to
307 * reflect the values contained in the range.
308 *
309 * Returns EINVAL if the range cannot be converted to resource.
310 *
311 * Note that if the range is an IO range, the resource will be converted
312 * using pci_address_to_pio() which can fail if it is called too early or
313 * if the range cannot be matched to any host bridge IO space (our case here).
314 * To guard against that we try to register the IO range first.
315 * If that fails we know that pci_address_to_pio() will do too.
316 */
317int of_pci_range_to_resource(struct of_pci_range *range,
318 struct device_node *np, struct resource *res)
83bbde1c 319{
0b0b0893 320 int err;
83bbde1c 321 res->flags = range->flags;
83bbde1c
LD
322 res->parent = res->child = res->sibling = NULL;
323 res->name = np->full_name;
0b0b0893
LD
324
325 if (res->flags & IORESOURCE_IO) {
326 unsigned long port;
327 err = pci_register_io_range(range->cpu_addr, range->size);
328 if (err)
329 goto invalid_range;
330 port = pci_address_to_pio(range->cpu_addr);
331 if (port == (unsigned long)-1) {
332 err = -EINVAL;
333 goto invalid_range;
334 }
335 res->start = port;
336 } else {
4af97106
PF
337 if ((sizeof(resource_size_t) < 8) &&
338 upper_32_bits(range->cpu_addr)) {
339 err = -EINVAL;
340 goto invalid_range;
341 }
342
0b0b0893
LD
343 res->start = range->cpu_addr;
344 }
345 res->end = res->start + range->size - 1;
346 return 0;
347
348invalid_range:
349 res->start = (resource_size_t)OF_BAD_ADDR;
350 res->end = (resource_size_t)OF_BAD_ADDR;
351 return err;
83bbde1c 352}
dbbdee94
GL
353#endif /* CONFIG_PCI */
354
355/*
356 * ISA bus specific translator
357 */
358
359static int of_bus_isa_match(struct device_node *np)
360{
361 return !strcmp(np->name, "isa");
362}
363
364static void of_bus_isa_count_cells(struct device_node *child,
365 int *addrc, int *sizec)
366{
367 if (addrc)
368 *addrc = 2;
369 if (sizec)
370 *sizec = 1;
371}
372
47b1e689 373static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
0131d897 374 int pna)
dbbdee94
GL
375{
376 u64 cp, s, da;
377
378 /* Check address type match */
0131d897 379 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
dbbdee94
GL
380 return OF_BAD_ADDR;
381
382 /* Read address values, skipping high cell */
383 cp = of_read_number(range + 1, na - 1);
384 s = of_read_number(range + na + pna, ns);
385 da = of_read_number(addr + 1, na - 1);
386
606ad42a 387 pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n",
dbbdee94
GL
388 (unsigned long long)cp, (unsigned long long)s,
389 (unsigned long long)da);
390
391 if (da < cp || da >= (cp + s))
392 return OF_BAD_ADDR;
393 return da - cp;
394}
395
47b1e689 396static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
dbbdee94
GL
397{
398 return of_bus_default_translate(addr + 1, offset, na - 1);
399}
400
0131d897 401static unsigned int of_bus_isa_get_flags(const __be32 *addr)
dbbdee94
GL
402{
403 unsigned int flags = 0;
0131d897 404 u32 w = be32_to_cpup(addr);
dbbdee94
GL
405
406 if (w & 1)
407 flags |= IORESOURCE_IO;
408 else
409 flags |= IORESOURCE_MEM;
410 return flags;
411}
412
413/*
414 * Array of bus specific translators
415 */
416
417static struct of_bus of_busses[] = {
25a31579 418#ifdef CONFIG_OF_ADDRESS_PCI
dbbdee94
GL
419 /* PCI */
420 {
421 .name = "pci",
422 .addresses = "assigned-addresses",
423 .match = of_bus_pci_match,
424 .count_cells = of_bus_pci_count_cells,
425 .map = of_bus_pci_map,
426 .translate = of_bus_pci_translate,
427 .get_flags = of_bus_pci_get_flags,
428 },
25a31579 429#endif /* CONFIG_OF_ADDRESS_PCI */
dbbdee94
GL
430 /* ISA */
431 {
432 .name = "isa",
433 .addresses = "reg",
434 .match = of_bus_isa_match,
435 .count_cells = of_bus_isa_count_cells,
436 .map = of_bus_isa_map,
437 .translate = of_bus_isa_translate,
438 .get_flags = of_bus_isa_get_flags,
439 },
440 /* Default */
441 {
442 .name = "default",
443 .addresses = "reg",
444 .match = NULL,
445 .count_cells = of_bus_default_count_cells,
446 .map = of_bus_default_map,
447 .translate = of_bus_default_translate,
448 .get_flags = of_bus_default_get_flags,
449 },
450};
451
452static struct of_bus *of_match_bus(struct device_node *np)
453{
454 int i;
455
456 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
457 if (!of_busses[i].match || of_busses[i].match(np))
458 return &of_busses[i];
459 BUG();
460 return NULL;
461}
462
41d94893 463static int of_empty_ranges_quirk(struct device_node *np)
746c9e9f
BH
464{
465 if (IS_ENABLED(CONFIG_PPC)) {
41d94893 466 /* To save cycles, we cache the result for global "Mac" setting */
746c9e9f
BH
467 static int quirk_state = -1;
468
41d94893
BH
469 /* PA-SEMI sdc DT bug */
470 if (of_device_is_compatible(np, "1682m-sdc"))
471 return true;
472
473 /* Make quirk cached */
746c9e9f
BH
474 if (quirk_state < 0)
475 quirk_state =
476 of_machine_is_compatible("Power Macintosh") ||
477 of_machine_is_compatible("MacRISC");
478 return quirk_state;
479 }
480 return false;
481}
482
dbbdee94 483static int of_translate_one(struct device_node *parent, struct of_bus *bus,
47b1e689 484 struct of_bus *pbus, __be32 *addr,
dbbdee94
GL
485 int na, int ns, int pna, const char *rprop)
486{
0131d897 487 const __be32 *ranges;
dbbdee94
GL
488 unsigned int rlen;
489 int rone;
490 u64 offset = OF_BAD_ADDR;
491
ba85edbe
MY
492 /*
493 * Normally, an absence of a "ranges" property means we are
dbbdee94 494 * crossing a non-translatable boundary, and thus the addresses
ba85edbe 495 * below the current cannot be converted to CPU physical ones.
dbbdee94
GL
496 * Unfortunately, while this is very clear in the spec, it's not
497 * what Apple understood, and they do have things like /uni-n or
498 * /ht nodes with no "ranges" property and a lot of perfectly
499 * useable mapped devices below them. Thus we treat the absence of
500 * "ranges" as equivalent to an empty "ranges" property which means
501 * a 1:1 translation at that level. It's up to the caller not to try
502 * to translate addresses that aren't supposed to be translated in
503 * the first place. --BenH.
3930f294
GL
504 *
505 * As far as we know, this damage only exists on Apple machines, so
506 * This code is only enabled on powerpc. --gcl
dbbdee94
GL
507 */
508 ranges = of_get_property(parent, rprop, &rlen);
41d94893 509 if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
606ad42a 510 pr_debug("no ranges; cannot translate\n");
3930f294
GL
511 return 1;
512 }
dbbdee94
GL
513 if (ranges == NULL || rlen == 0) {
514 offset = of_read_number(addr, na);
515 memset(addr, 0, pna * 4);
606ad42a 516 pr_debug("empty ranges; 1:1 translation\n");
dbbdee94
GL
517 goto finish;
518 }
519
606ad42a 520 pr_debug("walking ranges...\n");
dbbdee94
GL
521
522 /* Now walk through the ranges */
523 rlen /= 4;
524 rone = na + pna + ns;
525 for (; rlen >= rone; rlen -= rone, ranges += rone) {
526 offset = bus->map(addr, ranges, na, ns, pna);
527 if (offset != OF_BAD_ADDR)
528 break;
529 }
530 if (offset == OF_BAD_ADDR) {
606ad42a 531 pr_debug("not found !\n");
dbbdee94
GL
532 return 1;
533 }
534 memcpy(addr, ranges + na, 4 * pna);
535
536 finish:
606ad42a
RH
537 of_dump_addr("parent translation for:", addr, pna);
538 pr_debug("with offset: %llx\n", (unsigned long long)offset);
dbbdee94
GL
539
540 /* Translate it into parent bus space */
541 return pbus->translate(addr, offset, pna);
542}
543
544/*
545 * Translate an address from the device-tree into a CPU physical address,
546 * this walks up the tree and applies the various bus mappings on the
547 * way.
548 *
549 * Note: We consider that crossing any level with #size-cells == 0 to mean
550 * that translation is impossible (that is we are not dealing with a value
551 * that can be mapped to a cpu physical address). This is not really specified
552 * that way, but this is traditionally the way IBM at least do things
37807639 553 *
554 * Whenever the translation fails, the *host pointer will be set to the
555 * device that had registered logical PIO mapping, and the return code is relative to
556 * that node.
dbbdee94 557 */
47b1e689 558static u64 __of_translate_address(struct device_node *dev,
37807639 559 const __be32 *in_addr, const char *rprop,
560 struct device_node **host)
dbbdee94
GL
561{
562 struct device_node *parent = NULL;
563 struct of_bus *bus, *pbus;
47b1e689 564 __be32 addr[OF_MAX_ADDR_CELLS];
dbbdee94
GL
565 int na, ns, pna, pns;
566 u64 result = OF_BAD_ADDR;
567
606ad42a 568 pr_debug("** translation for device %s **\n", of_node_full_name(dev));
dbbdee94
GL
569
570 /* Increase refcount at current level */
571 of_node_get(dev);
572
37807639 573 *host = NULL;
dbbdee94
GL
574 /* Get parent & match bus type */
575 parent = of_get_parent(dev);
576 if (parent == NULL)
577 goto bail;
578 bus = of_match_bus(parent);
579
59f5ca48 580 /* Count address cells & copy address locally */
dbbdee94
GL
581 bus->count_cells(dev, &na, &ns);
582 if (!OF_CHECK_COUNTS(na, ns)) {
606ad42a 583 pr_debug("Bad cell count for %s\n", of_node_full_name(dev));
dbbdee94
GL
584 goto bail;
585 }
586 memcpy(addr, in_addr, na * 4);
587
606ad42a 588 pr_debug("bus is %s (na=%d, ns=%d) on %s\n",
8804827b 589 bus->name, na, ns, of_node_full_name(parent));
606ad42a 590 of_dump_addr("translating address:", addr, na);
dbbdee94
GL
591
592 /* Translate */
593 for (;;) {
37807639 594 struct libio_range *iorange;
595
dbbdee94
GL
596 /* Switch to parent bus */
597 of_node_put(dev);
598 dev = parent;
599 parent = of_get_parent(dev);
600
601 /* If root, we have finished */
602 if (parent == NULL) {
606ad42a 603 pr_debug("reached root node\n");
dbbdee94
GL
604 result = of_read_number(addr, na);
605 break;
606 }
607
37807639 608 /*
609 * For indirectIO device which has no ranges property, get
610 * the address from reg directly.
611 */
612 iorange = find_io_range_from_fwnode(&dev->fwnode);
613 if (iorange && !(iorange->flags & IO_CPU_MMIO)) {
614 result = of_read_number(addr + 1, na - 1);
615 pr_debug("indirectIO matched(%s) 0x%llx\n",
616 of_node_full_name(dev), result);
617 *host = of_node_get(dev);
618 break;
619 }
620
dbbdee94
GL
621 /* Get new parent bus and counts */
622 pbus = of_match_bus(parent);
623 pbus->count_cells(dev, &pna, &pns);
624 if (!OF_CHECK_COUNTS(pna, pns)) {
606ad42a 625 pr_err("Bad cell count for %s\n",
0c02c800 626 of_node_full_name(dev));
dbbdee94
GL
627 break;
628 }
629
606ad42a 630 pr_debug("parent bus is %s (na=%d, ns=%d) on %s\n",
0c02c800 631 pbus->name, pna, pns, of_node_full_name(parent));
dbbdee94
GL
632
633 /* Apply bus translation */
634 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
635 break;
636
637 /* Complete the move up one level */
638 na = pna;
639 ns = pns;
640 bus = pbus;
641
606ad42a 642 of_dump_addr("one level translation:", addr, na);
dbbdee94
GL
643 }
644 bail:
645 of_node_put(parent);
646 of_node_put(dev);
647
648 return result;
649}
650
0131d897 651u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94 652{
37807639 653 struct device_node *host;
654 u64 ret;
655
656 ret = __of_translate_address(dev, in_addr, "ranges", &host);
657 if (host) {
658 of_node_put(host);
659 return OF_BAD_ADDR;
660 }
661
662 return ret;
dbbdee94
GL
663}
664EXPORT_SYMBOL(of_translate_address);
665
0131d897 666u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
dbbdee94 667{
37807639 668 struct device_node *host;
669 u64 ret;
670
671 ret = __of_translate_address(dev, in_addr, "dma-ranges", &host);
672
673 if (host) {
674 of_node_put(host);
675 return OF_BAD_ADDR;
676 }
677
678 return ret;
dbbdee94
GL
679}
680EXPORT_SYMBOL(of_translate_dma_address);
681
0131d897 682const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
dbbdee94
GL
683 unsigned int *flags)
684{
0131d897 685 const __be32 *prop;
dbbdee94
GL
686 unsigned int psize;
687 struct device_node *parent;
688 struct of_bus *bus;
689 int onesize, i, na, ns;
690
691 /* Get parent & match bus type */
692 parent = of_get_parent(dev);
693 if (parent == NULL)
694 return NULL;
695 bus = of_match_bus(parent);
696 bus->count_cells(dev, &na, &ns);
697 of_node_put(parent);
5d61b165 698 if (!OF_CHECK_ADDR_COUNT(na))
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699 return NULL;
700
701 /* Get "reg" or "assigned-addresses" property */
702 prop = of_get_property(dev, bus->addresses, &psize);
703 if (prop == NULL)
704 return NULL;
705 psize /= 4;
706
707 onesize = na + ns;
708 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
709 if (i == index) {
710 if (size)
711 *size = of_read_number(prop + na, ns);
712 if (flags)
713 *flags = bus->get_flags(prop);
714 return prop;
715 }
716 return NULL;
717}
718EXPORT_SYMBOL(of_get_address);
719
37807639 720static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr)
721{
722 u64 taddr;
723 unsigned long port;
724 struct device_node *host;
725
726 taddr = __of_translate_address(dev, in_addr, "ranges", &host);
727 if (host) {
728 /* host specific port access */
729 port = libio_translate_hwaddr(&host->fwnode, taddr);
730 of_node_put(host);
731 } else {
732 /* memory mapped I/O range */
733 port = pci_address_to_pio(taddr);
734 }
735
736 if (port == (unsigned long)-1)
737 return OF_BAD_ADDR;
738
739 return port;
740}
741
0131d897
SAS
742static int __of_address_to_resource(struct device_node *dev,
743 const __be32 *addrp, u64 size, unsigned int flags,
35f3da32 744 const char *name, struct resource *r)
1f5bef30
GL
745{
746 u64 taddr;
747
37807639 748 if (flags & IORESOURCE_MEM)
749 taddr = of_translate_address(dev, addrp);
750 else if (flags & IORESOURCE_IO)
751 taddr = of_translate_ioport(dev, addrp);
752 else
1f5bef30 753 return -EINVAL;
37807639 754
1f5bef30
GL
755 if (taddr == OF_BAD_ADDR)
756 return -EINVAL;
757 memset(r, 0, sizeof(struct resource));
37807639 758
759 r->start = taddr;
760 r->end = taddr + size - 1;
1f5bef30 761 r->flags = flags;
35f3da32
BC
762 r->name = name ? name : dev->full_name;
763
1f5bef30
GL
764 return 0;
765}
766
767/**
768 * of_address_to_resource - Translate device tree address and return as resource
769 *
770 * Note that if your address is a PIO address, the conversion will fail if
771 * the physical address can't be internally converted to an IO token with
772 * pci_address_to_pio(), that is because it's either called to early or it
773 * can't be matched to any host bridge IO space
774 */
775int of_address_to_resource(struct device_node *dev, int index,
776 struct resource *r)
777{
0131d897 778 const __be32 *addrp;
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GL
779 u64 size;
780 unsigned int flags;
35f3da32 781 const char *name = NULL;
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GL
782
783 addrp = of_get_address(dev, index, &size, &flags);
784 if (addrp == NULL)
785 return -EINVAL;
35f3da32
BC
786
787 /* Get optional "reg-names" property to add a name to a resource */
788 of_property_read_string_index(dev, "reg-names", index, &name);
789
790 return __of_address_to_resource(dev, addrp, size, flags, name, r);
1f5bef30
GL
791}
792EXPORT_SYMBOL_GPL(of_address_to_resource);
793
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GL
794struct device_node *of_find_matching_node_by_address(struct device_node *from,
795 const struct of_device_id *matches,
796 u64 base_address)
797{
798 struct device_node *dn = of_find_matching_node(from, matches);
799 struct resource res;
800
801 while (dn) {
3a496b00
DD
802 if (!of_address_to_resource(dn, 0, &res) &&
803 res.start == base_address)
90e33f62 804 return dn;
3a496b00 805
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GL
806 dn = of_find_matching_node(dn, matches);
807 }
808
809 return NULL;
810}
811
1f5bef30 812
6b884a8d
GL
813/**
814 * of_iomap - Maps the memory mapped IO for a given device_node
815 * @device: the device whose io range will be mapped
816 * @index: index of the io range
817 *
818 * Returns a pointer to the mapped memory
819 */
820void __iomem *of_iomap(struct device_node *np, int index)
821{
822 struct resource res;
823
824 if (of_address_to_resource(np, index, &res))
825 return NULL;
826
28c1b6d6 827 return ioremap(res.start, resource_size(&res));
6b884a8d
GL
828}
829EXPORT_SYMBOL(of_iomap);
18308c94 830
efd342fb
MB
831/*
832 * of_io_request_and_map - Requests a resource and maps the memory mapped IO
833 * for a given device_node
834 * @device: the device whose io range will be mapped
835 * @index: index of the io range
836 * @name: name of the resource
837 *
838 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
839 * error code on failure. Usage example:
840 *
841 * base = of_io_request_and_map(node, 0, "foo");
842 * if (IS_ERR(base))
843 * return PTR_ERR(base);
844 */
845void __iomem *of_io_request_and_map(struct device_node *np, int index,
b75b276b 846 const char *name)
efd342fb
MB
847{
848 struct resource res;
849 void __iomem *mem;
850
851 if (of_address_to_resource(np, index, &res))
852 return IOMEM_ERR_PTR(-EINVAL);
853
854 if (!request_mem_region(res.start, resource_size(&res), name))
855 return IOMEM_ERR_PTR(-EBUSY);
856
857 mem = ioremap(res.start, resource_size(&res));
858 if (!mem) {
859 release_mem_region(res.start, resource_size(&res));
860 return IOMEM_ERR_PTR(-ENOMEM);
861 }
862
863 return mem;
864}
865EXPORT_SYMBOL(of_io_request_and_map);
866
18308c94
GS
867/**
868 * of_dma_get_range - Get DMA range info
869 * @np: device node to get DMA range info
870 * @dma_addr: pointer to store initial DMA address of DMA range
871 * @paddr: pointer to store initial CPU address of DMA range
872 * @size: pointer to store size of DMA range
873 *
874 * Look in bottom up direction for the first "dma-ranges" property
875 * and parse it.
876 * dma-ranges format:
877 * DMA addr (dma_addr) : naddr cells
878 * CPU addr (phys_addr_t) : pna cells
879 * size : nsize cells
880 *
881 * It returns -ENODEV if "dma-ranges" property was not found
882 * for this device in DT.
883 */
884int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
885{
886 struct device_node *node = of_node_get(np);
887 const __be32 *ranges = NULL;
888 int len, naddr, nsize, pna;
889 int ret = 0;
890 u64 dmaaddr;
891
892 if (!node)
893 return -EINVAL;
894
895 while (1) {
896 naddr = of_n_addr_cells(node);
897 nsize = of_n_size_cells(node);
898 node = of_get_next_parent(node);
899 if (!node)
900 break;
901
902 ranges = of_get_property(node, "dma-ranges", &len);
903
904 /* Ignore empty ranges, they imply no translation required */
905 if (ranges && len > 0)
906 break;
907
908 /*
909 * At least empty ranges has to be defined for parent node if
910 * DMA is supported
911 */
912 if (!ranges)
913 break;
914 }
915
916 if (!ranges) {
606ad42a 917 pr_debug("no dma-ranges found for node(%s)\n", np->full_name);
18308c94
GS
918 ret = -ENODEV;
919 goto out;
920 }
921
922 len /= sizeof(u32);
923
924 pna = of_n_addr_cells(node);
925
926 /* dma-ranges format:
927 * DMA addr : naddr cells
928 * CPU addr : pna cells
929 * size : nsize cells
930 */
931 dmaaddr = of_read_number(ranges, naddr);
932 *paddr = of_translate_dma_address(np, ranges);
933 if (*paddr == OF_BAD_ADDR) {
606ad42a
RH
934 pr_err("translation of DMA address(%pad) to CPU address failed node(%s)\n",
935 dma_addr, np->full_name);
18308c94
GS
936 ret = -EINVAL;
937 goto out;
938 }
939 *dma_addr = dmaaddr;
940
941 *size = of_read_number(ranges + naddr + pna, nsize);
942
943 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
944 *dma_addr, *paddr, *size);
945
946out:
947 of_node_put(node);
948
949 return ret;
950}
951EXPORT_SYMBOL_GPL(of_dma_get_range);
92ea637e
SS
952
953/**
954 * of_dma_is_coherent - Check if device is coherent
955 * @np: device node
956 *
957 * It returns true if "dma-coherent" property was found
958 * for this device in DT.
959 */
960bool of_dma_is_coherent(struct device_node *np)
961{
962 struct device_node *node = of_node_get(np);
963
964 while (node) {
965 if (of_property_read_bool(node, "dma-coherent")) {
966 of_node_put(node);
967 return true;
968 }
969 node = of_get_next_parent(node);
970 }
971 of_node_put(node);
972 return false;
973}
eb3d3ec5 974EXPORT_SYMBOL_GPL(of_dma_is_coherent);