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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Interrupt management for most GSC and related devices. | |
3 | * | |
4 | * (c) Copyright 1999 Alex deVries for The Puffin Group | |
5 | * (c) Copyright 1999 Grant Grundler for Hewlett-Packard | |
6 | * (c) Copyright 1999 Matthew Wilcox | |
7 | * (c) Copyright 2000 Helge Deller | |
8 | * (c) Copyright 2001 Matthew Wilcox for Hewlett-Packard | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/bitops.h> | |
17 | #include <linux/config.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/slab.h> | |
24 | #include <linux/types.h> | |
25 | ||
26 | #include <asm/hardware.h> | |
27 | #include <asm/io.h> | |
28 | ||
29 | #include "gsc.h" | |
30 | ||
31 | #undef DEBUG | |
32 | ||
33 | #ifdef DEBUG | |
34 | #define DEBPRINTK printk | |
35 | #else | |
36 | #define DEBPRINTK(x,...) | |
37 | #endif | |
38 | ||
39 | int gsc_alloc_irq(struct gsc_irq *i) | |
40 | { | |
41 | int irq = txn_alloc_irq(GSC_EIM_WIDTH); | |
42 | if (irq < 0) { | |
43 | printk("cannot get irq\n"); | |
44 | return irq; | |
45 | } | |
46 | ||
47 | i->txn_addr = txn_alloc_addr(irq); | |
48 | i->txn_data = txn_alloc_data(irq); | |
49 | i->irq = irq; | |
50 | ||
51 | return irq; | |
52 | } | |
53 | ||
54 | int gsc_claim_irq(struct gsc_irq *i, int irq) | |
55 | { | |
56 | int c = irq; | |
57 | ||
58 | irq += CPU_IRQ_BASE; /* virtualize the IRQ first */ | |
59 | ||
60 | irq = txn_claim_irq(irq); | |
61 | if (irq < 0) { | |
62 | printk("cannot claim irq %d\n", c); | |
63 | return irq; | |
64 | } | |
65 | ||
66 | i->txn_addr = txn_alloc_addr(irq); | |
67 | i->txn_data = txn_alloc_data(irq); | |
68 | i->irq = irq; | |
69 | ||
70 | return irq; | |
71 | } | |
72 | ||
73 | EXPORT_SYMBOL(gsc_alloc_irq); | |
74 | EXPORT_SYMBOL(gsc_claim_irq); | |
75 | ||
76 | /* Common interrupt demultiplexer used by Asp, Lasi & Wax. */ | |
77 | irqreturn_t gsc_asic_intr(int gsc_asic_irq, void *dev, struct pt_regs *regs) | |
78 | { | |
79 | unsigned long irr; | |
80 | struct gsc_asic *gsc_asic = dev; | |
81 | ||
82 | irr = gsc_readl(gsc_asic->hpa + OFFSET_IRR); | |
83 | if (irr == 0) | |
84 | return IRQ_NONE; | |
85 | ||
86 | DEBPRINTK("%s intr, mask=0x%x\n", gsc_asic->name, irr); | |
87 | ||
88 | do { | |
89 | int local_irq = __ffs(irr); | |
90 | unsigned int irq = gsc_asic->global_irq[local_irq]; | |
91 | __do_IRQ(irq, regs); | |
92 | irr &= ~(1 << local_irq); | |
93 | } while (irr); | |
94 | ||
95 | return IRQ_HANDLED; | |
96 | } | |
97 | ||
98 | int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit) | |
99 | { | |
100 | int local_irq; | |
101 | ||
102 | for (local_irq = 0; local_irq < limit; local_irq++) { | |
103 | if (global_irqs[local_irq] == irq) | |
104 | return local_irq; | |
105 | } | |
106 | ||
107 | return NO_IRQ; | |
108 | } | |
109 | ||
110 | static void gsc_asic_disable_irq(unsigned int irq) | |
111 | { | |
112 | struct gsc_asic *irq_dev = irq_desc[irq].handler_data; | |
113 | int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32); | |
114 | u32 imr; | |
115 | ||
116 | DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __FUNCTION__, irq, | |
117 | irq_dev->name, imr); | |
118 | ||
119 | /* Disable the IRQ line by clearing the bit in the IMR */ | |
120 | imr = gsc_readl(irq_dev->hpa + OFFSET_IMR); | |
121 | imr &= ~(1 << local_irq); | |
122 | gsc_writel(imr, irq_dev->hpa + OFFSET_IMR); | |
123 | } | |
124 | ||
125 | static void gsc_asic_enable_irq(unsigned int irq) | |
126 | { | |
127 | struct gsc_asic *irq_dev = irq_desc[irq].handler_data; | |
128 | int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32); | |
129 | u32 imr; | |
130 | ||
131 | DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __FUNCTION__, irq, | |
132 | irq_dev->name, imr); | |
133 | ||
134 | /* Enable the IRQ line by setting the bit in the IMR */ | |
135 | imr = gsc_readl(irq_dev->hpa + OFFSET_IMR); | |
136 | imr |= 1 << local_irq; | |
137 | gsc_writel(imr, irq_dev->hpa + OFFSET_IMR); | |
138 | /* | |
139 | * FIXME: read IPR to make sure the IRQ isn't already pending. | |
140 | * If so, we need to read IRR and manually call do_irq(). | |
141 | */ | |
142 | } | |
143 | ||
144 | static unsigned int gsc_asic_startup_irq(unsigned int irq) | |
145 | { | |
146 | gsc_asic_enable_irq(irq); | |
147 | return 0; | |
148 | } | |
149 | ||
150 | static struct hw_interrupt_type gsc_asic_interrupt_type = { | |
151 | .typename = "GSC-ASIC", | |
152 | .startup = gsc_asic_startup_irq, | |
153 | .shutdown = gsc_asic_disable_irq, | |
154 | .enable = gsc_asic_enable_irq, | |
155 | .disable = gsc_asic_disable_irq, | |
156 | .ack = no_ack_irq, | |
157 | .end = no_end_irq, | |
158 | }; | |
159 | ||
160 | int gsc_assign_irq(struct hw_interrupt_type *type, void *data) | |
161 | { | |
162 | static int irq = GSC_IRQ_BASE; | |
163 | ||
164 | if (irq > GSC_IRQ_MAX) | |
165 | return NO_IRQ; | |
166 | ||
167 | irq_desc[irq].handler = type; | |
168 | irq_desc[irq].handler_data = data; | |
169 | return irq++; | |
170 | } | |
171 | ||
172 | void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp) | |
173 | { | |
174 | int irq = asic->global_irq[local_irq]; | |
175 | ||
176 | if (irq <= 0) { | |
177 | irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic); | |
178 | if (irq == NO_IRQ) | |
179 | return; | |
180 | ||
181 | asic->global_irq[local_irq] = irq; | |
182 | } | |
183 | *irqp = irq; | |
184 | } | |
185 | ||
186 | void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl, | |
187 | void (*choose_irq)(struct parisc_device *, void *)) | |
188 | { | |
189 | struct device *dev; | |
190 | ||
191 | list_for_each_entry(dev, &parent->dev.children, node) { | |
192 | struct parisc_device *padev = to_parisc_device(dev); | |
193 | ||
194 | /* work-around for 715/64 and others which have parent | |
195 | at path [5] and children at path [5/0/x] */ | |
196 | if (padev->id.hw_type == HPHW_FAULTY) | |
197 | return gsc_fixup_irqs(padev, ctrl, choose_irq); | |
198 | choose_irq(padev, ctrl); | |
199 | } | |
200 | } | |
201 | ||
202 | int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic) | |
203 | { | |
204 | struct resource *res; | |
205 | int i; | |
206 | ||
207 | gsc_asic->gsc = parent; | |
208 | ||
209 | /* Initialise local irq -> global irq mapping */ | |
210 | for (i = 0; i < 32; i++) { | |
211 | gsc_asic->global_irq[i] = NO_IRQ; | |
212 | } | |
213 | ||
214 | /* allocate resource region */ | |
215 | res = request_mem_region(gsc_asic->hpa, 0x100000, gsc_asic->name); | |
216 | if (res) { | |
217 | res->flags = IORESOURCE_MEM; /* do not mark it busy ! */ | |
218 | } | |
219 | ||
220 | #if 0 | |
221 | printk(KERN_WARNING "%s IRQ %d EIM 0x%x", gsc_asic->name, | |
222 | parent->irq, gsc_asic->eim); | |
223 | if (gsc_readl(gsc_asic->hpa + OFFSET_IMR)) | |
224 | printk(" IMR is non-zero! (0x%x)", | |
225 | gsc_readl(gsc_asic->hpa + OFFSET_IMR)); | |
226 | printk("\n"); | |
227 | #endif | |
228 | ||
229 | return 0; | |
230 | } | |
231 | ||
232 | extern struct parisc_driver lasi_driver; | |
233 | extern struct parisc_driver asp_driver; | |
234 | extern struct parisc_driver wax_driver; | |
235 | ||
236 | void __init gsc_init(void) | |
237 | { | |
238 | #ifdef CONFIG_GSC_LASI | |
239 | register_parisc_driver(&lasi_driver); | |
240 | register_parisc_driver(&asp_driver); | |
241 | #endif | |
242 | #ifdef CONFIG_GSC_WAX | |
243 | register_parisc_driver(&wax_driver); | |
244 | #endif | |
245 | } |