[mirror_ubuntu-jammy-kernel.git] / drivers / parisc / gsc.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * drivers/parisc/gsc.h
 * Declarations for functions in gsc.c
 * Copyright (c) 2000-2002 Helge Deller, Matthew Wilcox
 */

#include <linux/interrupt.h>
#include <asm/hardware.h>
#include <asm/parisc-device.h>

#define OFFSET_IRR 0x0000   /* Interrupt request register */
#define OFFSET_IMR 0x0004   /* Interrupt mask register */
#define OFFSET_IPR 0x0008   /* Interrupt pending register */
#define OFFSET_ICR 0x000C   /* Interrupt control register */
#define OFFSET_IAR 0x0010   /* Interrupt address register */

/* PA I/O Architected devices support at least 5 bits in the EIM register. */
#define GSC_EIM_WIDTH 5

struct gsc_irq {
	unsigned long txn_addr;	/* IRQ "target" */
	int txn_data;		/* HW "IRQ" */
	int irq;		/* virtual IRQ */
};

struct gsc_asic {
	struct parisc_device *gsc;
	unsigned long hpa;
	char *name;
	int version;
	int type;
	int eim;
	int global_irq[32];
};

int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic);
int gsc_alloc_irq(struct gsc_irq *dev);			/* dev needs an irq */
int gsc_claim_irq(struct gsc_irq *dev, int irq);	/* dev needs this irq */
int gsc_assign_irq(struct irq_chip *type, void *data);
int gsc_find_local_irq(unsigned int irq, int *global_irq, int limit);
void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
		void (*choose)(struct parisc_device *child, void *ctrl));
void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp);

irqreturn_t gsc_asic_intr(int irq, void *dev);
Commit	Line	Data
c88a15c6	1	/* SPDX-License-Identifier: GPL-2.0-only */
1da177e4 LT	2	/*
	3	* drivers/parisc/gsc.h
	4	* Declarations for functions in gsc.c
	5	* Copyright (c) 2000-2002 Helge Deller, Matthew Wilcox
1da177e4 LT	6	*/
	7
	8	#include <linux/interrupt.h>
	9	#include <asm/hardware.h>
	10	#include <asm/parisc-device.h>
	11
	12	#define OFFSET_IRR 0x0000 /* Interrupt request register */
	13	#define OFFSET_IMR 0x0004 /* Interrupt mask register */
	14	#define OFFSET_IPR 0x0008 /* Interrupt pending register */
	15	#define OFFSET_ICR 0x000C /* Interrupt control register */
	16	#define OFFSET_IAR 0x0010 /* Interrupt address register */
	17
	18	/* PA I/O Architected devices support at least 5 bits in the EIM register. */
	19	#define GSC_EIM_WIDTH 5
	20
	21	struct gsc_irq {
	22	unsigned long txn_addr; /* IRQ "target" */
	23	int txn_data; /* HW "IRQ" */
	24	int irq; /* virtual IRQ */
	25	};
	26
	27	struct gsc_asic {
	28	struct parisc_device *gsc;
	29	unsigned long hpa;
	30	char *name;
	31	int version;
	32	int type;
	33	int eim;
	34	int global_irq[32];
	35	};
	36
	37	int gsc_common_setup(struct parisc_device parent, struct gsc_asic gsc_asic);
	38	int gsc_alloc_irq(struct gsc_irq dev); / dev needs an irq */
	39	int gsc_claim_irq(struct gsc_irq dev, int irq); / dev needs this irq */
dfe07565	40	int gsc_assign_irq(struct irq_chip type, void data);
1da177e4 LT	41	int gsc_find_local_irq(unsigned int irq, int *global_irq, int limit);
	42	void gsc_fixup_irqs(struct parisc_device parent, void ctrl,
	43	void (choose)(struct parisc_device child, void *ctrl));
	44	void gsc_asic_assign_irq(struct gsc_asic asic, int local_irq, int irqp);
	45
7d12e780	46	irqreturn_t gsc_asic_intr(int irq, void *dev);