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1da177e4 LT |
1 | #include <linux/pci.h> |
2 | #include <linux/module.h> | |
3 | #include <linux/ioport.h> | |
7ea7e98f | 4 | #include <linux/wait.h> |
1da177e4 | 5 | |
48b19148 AB |
6 | #include "pci.h" |
7 | ||
1da177e4 LT |
8 | /* |
9 | * This interrupt-safe spinlock protects all accesses to PCI | |
10 | * configuration space. | |
11 | */ | |
12 | ||
13 | static DEFINE_SPINLOCK(pci_lock); | |
14 | ||
15 | /* | |
16 | * Wrappers for all PCI configuration access functions. They just check | |
17 | * alignment, do locking and call the low-level functions pointed to | |
18 | * by pci_dev->ops. | |
19 | */ | |
20 | ||
21 | #define PCI_byte_BAD 0 | |
22 | #define PCI_word_BAD (pos & 1) | |
23 | #define PCI_dword_BAD (pos & 3) | |
24 | ||
25 | #define PCI_OP_READ(size,type,len) \ | |
26 | int pci_bus_read_config_##size \ | |
27 | (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \ | |
28 | { \ | |
29 | int res; \ | |
30 | unsigned long flags; \ | |
31 | u32 data = 0; \ | |
32 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ | |
33 | spin_lock_irqsave(&pci_lock, flags); \ | |
34 | res = bus->ops->read(bus, devfn, pos, len, &data); \ | |
35 | *value = (type)data; \ | |
36 | spin_unlock_irqrestore(&pci_lock, flags); \ | |
37 | return res; \ | |
38 | } | |
39 | ||
40 | #define PCI_OP_WRITE(size,type,len) \ | |
41 | int pci_bus_write_config_##size \ | |
42 | (struct pci_bus *bus, unsigned int devfn, int pos, type value) \ | |
43 | { \ | |
44 | int res; \ | |
45 | unsigned long flags; \ | |
46 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ | |
47 | spin_lock_irqsave(&pci_lock, flags); \ | |
48 | res = bus->ops->write(bus, devfn, pos, len, value); \ | |
49 | spin_unlock_irqrestore(&pci_lock, flags); \ | |
50 | return res; \ | |
51 | } | |
52 | ||
53 | PCI_OP_READ(byte, u8, 1) | |
54 | PCI_OP_READ(word, u16, 2) | |
55 | PCI_OP_READ(dword, u32, 4) | |
56 | PCI_OP_WRITE(byte, u8, 1) | |
57 | PCI_OP_WRITE(word, u16, 2) | |
58 | PCI_OP_WRITE(dword, u32, 4) | |
59 | ||
60 | EXPORT_SYMBOL(pci_bus_read_config_byte); | |
61 | EXPORT_SYMBOL(pci_bus_read_config_word); | |
62 | EXPORT_SYMBOL(pci_bus_read_config_dword); | |
63 | EXPORT_SYMBOL(pci_bus_write_config_byte); | |
64 | EXPORT_SYMBOL(pci_bus_write_config_word); | |
65 | EXPORT_SYMBOL(pci_bus_write_config_dword); | |
e04b0ea2 | 66 | |
7ea7e98f MW |
67 | /* |
68 | * The following routines are to prevent the user from accessing PCI config | |
69 | * space when it's unsafe to do so. Some devices require this during BIST and | |
70 | * we're required to prevent it during D-state transitions. | |
71 | * | |
72 | * We have a bit per device to indicate it's blocked and a global wait queue | |
73 | * for callers to sleep on until devices are unblocked. | |
74 | */ | |
75 | static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait); | |
e04b0ea2 | 76 | |
7ea7e98f MW |
77 | static noinline void pci_wait_ucfg(struct pci_dev *dev) |
78 | { | |
79 | DECLARE_WAITQUEUE(wait, current); | |
80 | ||
81 | __add_wait_queue(&pci_ucfg_wait, &wait); | |
82 | do { | |
83 | set_current_state(TASK_UNINTERRUPTIBLE); | |
84 | spin_unlock_irq(&pci_lock); | |
85 | schedule(); | |
86 | spin_lock_irq(&pci_lock); | |
87 | } while (dev->block_ucfg_access); | |
88 | __remove_wait_queue(&pci_ucfg_wait, &wait); | |
e04b0ea2 BK |
89 | } |
90 | ||
91 | #define PCI_USER_READ_CONFIG(size,type) \ | |
92 | int pci_user_read_config_##size \ | |
93 | (struct pci_dev *dev, int pos, type *val) \ | |
94 | { \ | |
e04b0ea2 BK |
95 | int ret = 0; \ |
96 | u32 data = -1; \ | |
97 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ | |
7ea7e98f MW |
98 | spin_lock_irq(&pci_lock); \ |
99 | if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ | |
100 | ret = dev->bus->ops->read(dev->bus, dev->devfn, \ | |
e04b0ea2 | 101 | pos, sizeof(type), &data); \ |
7ea7e98f | 102 | spin_unlock_irq(&pci_lock); \ |
e04b0ea2 BK |
103 | *val = (type)data; \ |
104 | return ret; \ | |
105 | } | |
106 | ||
107 | #define PCI_USER_WRITE_CONFIG(size,type) \ | |
108 | int pci_user_write_config_##size \ | |
109 | (struct pci_dev *dev, int pos, type val) \ | |
110 | { \ | |
e04b0ea2 BK |
111 | int ret = -EIO; \ |
112 | if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ | |
7ea7e98f MW |
113 | spin_lock_irq(&pci_lock); \ |
114 | if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \ | |
115 | ret = dev->bus->ops->write(dev->bus, dev->devfn, \ | |
e04b0ea2 | 116 | pos, sizeof(type), val); \ |
7ea7e98f | 117 | spin_unlock_irq(&pci_lock); \ |
e04b0ea2 BK |
118 | return ret; \ |
119 | } | |
120 | ||
121 | PCI_USER_READ_CONFIG(byte, u8) | |
122 | PCI_USER_READ_CONFIG(word, u16) | |
123 | PCI_USER_READ_CONFIG(dword, u32) | |
124 | PCI_USER_WRITE_CONFIG(byte, u8) | |
125 | PCI_USER_WRITE_CONFIG(word, u16) | |
126 | PCI_USER_WRITE_CONFIG(dword, u32) | |
127 | ||
128 | /** | |
129 | * pci_block_user_cfg_access - Block userspace PCI config reads/writes | |
130 | * @dev: pci device struct | |
131 | * | |
7ea7e98f MW |
132 | * When user access is blocked, any reads or writes to config space will |
133 | * sleep until access is unblocked again. We don't allow nesting of | |
134 | * block/unblock calls. | |
135 | */ | |
e04b0ea2 BK |
136 | void pci_block_user_cfg_access(struct pci_dev *dev) |
137 | { | |
138 | unsigned long flags; | |
7ea7e98f | 139 | int was_blocked; |
e04b0ea2 | 140 | |
e04b0ea2 | 141 | spin_lock_irqsave(&pci_lock, flags); |
7ea7e98f | 142 | was_blocked = dev->block_ucfg_access; |
e04b0ea2 BK |
143 | dev->block_ucfg_access = 1; |
144 | spin_unlock_irqrestore(&pci_lock, flags); | |
7ea7e98f MW |
145 | |
146 | /* If we BUG() inside the pci_lock, we're guaranteed to hose | |
147 | * the machine */ | |
148 | BUG_ON(was_blocked); | |
e04b0ea2 BK |
149 | } |
150 | EXPORT_SYMBOL_GPL(pci_block_user_cfg_access); | |
151 | ||
152 | /** | |
153 | * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes | |
154 | * @dev: pci device struct | |
155 | * | |
156 | * This function allows userspace PCI config accesses to resume. | |
7ea7e98f | 157 | */ |
e04b0ea2 BK |
158 | void pci_unblock_user_cfg_access(struct pci_dev *dev) |
159 | { | |
160 | unsigned long flags; | |
161 | ||
e04b0ea2 | 162 | spin_lock_irqsave(&pci_lock, flags); |
7ea7e98f MW |
163 | |
164 | /* This indicates a problem in the caller, but we don't need | |
165 | * to kill them, unlike a double-block above. */ | |
166 | WARN_ON(!dev->block_ucfg_access); | |
167 | ||
e04b0ea2 | 168 | dev->block_ucfg_access = 0; |
7ea7e98f | 169 | wake_up_all(&pci_ucfg_wait); |
e04b0ea2 BK |
170 | spin_unlock_irqrestore(&pci_lock, flags); |
171 | } | |
172 | EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access); |