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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/pci/bus.c | |
3 | * | |
4 | * From setup-res.c, by: | |
5 | * Dave Rusling (david.rusling@reo.mts.dec.com) | |
6 | * David Mosberger (davidm@cs.arizona.edu) | |
7 | * David Miller (davem@redhat.com) | |
8 | * Ivan Kokshaysky (ink@jurassic.park.msu.ru) | |
9 | */ | |
10 | #include <linux/module.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/ioport.h> | |
15 | #include <linux/proc_fs.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
1da177e4 LT |
17 | |
18 | #include "pci.h" | |
19 | ||
0efd5aab BH |
20 | void pci_add_resource_offset(struct list_head *resources, struct resource *res, |
21 | resource_size_t offset) | |
45ca9e97 | 22 | { |
14d76b68 | 23 | struct resource_entry *entry; |
45ca9e97 | 24 | |
14d76b68 JL |
25 | entry = resource_list_create_entry(res, 0); |
26 | if (!entry) { | |
0efd5aab | 27 | printk(KERN_ERR "PCI: can't add host bridge window %pR\n", res); |
45ca9e97 BH |
28 | return; |
29 | } | |
30 | ||
14d76b68 JL |
31 | entry->offset = offset; |
32 | resource_list_add_tail(entry, resources); | |
0efd5aab BH |
33 | } |
34 | EXPORT_SYMBOL(pci_add_resource_offset); | |
35 | ||
36 | void pci_add_resource(struct list_head *resources, struct resource *res) | |
37 | { | |
38 | pci_add_resource_offset(resources, res, 0); | |
45ca9e97 BH |
39 | } |
40 | EXPORT_SYMBOL(pci_add_resource); | |
41 | ||
42 | void pci_free_resource_list(struct list_head *resources) | |
43 | { | |
14d76b68 | 44 | resource_list_free(resources); |
45ca9e97 BH |
45 | } |
46 | EXPORT_SYMBOL(pci_free_resource_list); | |
47 | ||
2fe2abf8 BH |
48 | void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, |
49 | unsigned int flags) | |
50 | { | |
51 | struct pci_bus_resource *bus_res; | |
52 | ||
53 | bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL); | |
54 | if (!bus_res) { | |
55 | dev_err(&bus->dev, "can't add %pR resource\n", res); | |
56 | return; | |
57 | } | |
58 | ||
59 | bus_res->res = res; | |
60 | bus_res->flags = flags; | |
61 | list_add_tail(&bus_res->list, &bus->resources); | |
62 | } | |
63 | ||
64 | struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n) | |
65 | { | |
66 | struct pci_bus_resource *bus_res; | |
67 | ||
68 | if (n < PCI_BRIDGE_RESOURCE_NUM) | |
69 | return bus->resource[n]; | |
70 | ||
71 | n -= PCI_BRIDGE_RESOURCE_NUM; | |
72 | list_for_each_entry(bus_res, &bus->resources, list) { | |
73 | if (n-- == 0) | |
74 | return bus_res->res; | |
75 | } | |
76 | return NULL; | |
77 | } | |
78 | EXPORT_SYMBOL_GPL(pci_bus_resource_n); | |
79 | ||
80 | void pci_bus_remove_resources(struct pci_bus *bus) | |
81 | { | |
2fe2abf8 | 82 | int i; |
817a2685 | 83 | struct pci_bus_resource *bus_res, *tmp; |
2fe2abf8 BH |
84 | |
85 | for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) | |
7736a05a | 86 | bus->resource[i] = NULL; |
2fe2abf8 | 87 | |
817a2685 YL |
88 | list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { |
89 | list_del(&bus_res->list); | |
90 | kfree(bus_res); | |
91 | } | |
2fe2abf8 BH |
92 | } |
93 | ||
950334bc BH |
94 | int devm_request_pci_bus_resources(struct device *dev, |
95 | struct list_head *resources) | |
96 | { | |
97 | struct resource_entry *win; | |
98 | struct resource *parent, *res; | |
99 | int err; | |
100 | ||
101 | resource_list_for_each_entry(win, resources) { | |
102 | res = win->res; | |
103 | switch (resource_type(res)) { | |
104 | case IORESOURCE_IO: | |
105 | parent = &ioport_resource; | |
106 | break; | |
107 | case IORESOURCE_MEM: | |
108 | parent = &iomem_resource; | |
109 | break; | |
110 | default: | |
111 | continue; | |
112 | } | |
113 | ||
114 | err = devm_request_resource(dev, parent, res); | |
115 | if (err) | |
116 | return err; | |
117 | } | |
118 | ||
119 | return 0; | |
120 | } | |
121 | EXPORT_SYMBOL_GPL(devm_request_pci_bus_resources); | |
122 | ||
f75b99d5 | 123 | static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL}; |
3a9ad0b4 | 124 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
f75b99d5 | 125 | static struct pci_bus_region pci_64_bit = {0, |
3a9ad0b4 YL |
126 | (pci_bus_addr_t) 0xffffffffffffffffULL}; |
127 | static struct pci_bus_region pci_high = {(pci_bus_addr_t) 0x100000000ULL, | |
128 | (pci_bus_addr_t) 0xffffffffffffffffULL}; | |
f75b99d5 YL |
129 | #endif |
130 | ||
131 | /* | |
132 | * @res contains CPU addresses. Clip it so the corresponding bus addresses | |
133 | * on @bus are entirely within @region. This is used to control the bus | |
134 | * addresses of resources we allocate, e.g., we may need a resource that | |
135 | * can be mapped by a 32-bit BAR. | |
1da177e4 | 136 | */ |
f75b99d5 YL |
137 | static void pci_clip_resource_to_region(struct pci_bus *bus, |
138 | struct resource *res, | |
139 | struct pci_bus_region *region) | |
140 | { | |
141 | struct pci_bus_region r; | |
142 | ||
143 | pcibios_resource_to_bus(bus, &r, res); | |
144 | if (r.start < region->start) | |
145 | r.start = region->start; | |
146 | if (r.end > region->end) | |
147 | r.end = region->end; | |
148 | ||
149 | if (r.end < r.start) | |
150 | res->end = res->start - 1; | |
151 | else | |
152 | pcibios_bus_to_resource(bus, res, &r); | |
153 | } | |
154 | ||
155 | static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, | |
e31dd6e4 | 156 | resource_size_t size, resource_size_t align, |
664c2848 | 157 | resource_size_t min, unsigned long type_mask, |
b26b2d49 | 158 | resource_size_t (*alignf)(void *, |
3b7a17fc | 159 | const struct resource *, |
b26b2d49 DB |
160 | resource_size_t, |
161 | resource_size_t), | |
f75b99d5 YL |
162 | void *alignf_data, |
163 | struct pci_bus_region *region) | |
1da177e4 | 164 | { |
f75b99d5 YL |
165 | int i, ret; |
166 | struct resource *r, avail; | |
167 | resource_size_t max; | |
1da177e4 | 168 | |
aa11fc58 | 169 | type_mask |= IORESOURCE_TYPE_BITS; |
1da177e4 | 170 | |
6db45b76 | 171 | pci_bus_for_each_resource(bus, r, i) { |
3460baa6 CB |
172 | resource_size_t min_used = min; |
173 | ||
6db45b76 BH |
174 | if (!r) |
175 | continue; | |
176 | ||
1da177e4 LT |
177 | /* type_mask must match */ |
178 | if ((res->flags ^ r->flags) & type_mask) | |
179 | continue; | |
180 | ||
181 | /* We cannot allocate a non-prefetching resource | |
182 | from a pre-fetching area */ | |
183 | if ((r->flags & IORESOURCE_PREFETCH) && | |
184 | !(res->flags & IORESOURCE_PREFETCH)) | |
185 | continue; | |
186 | ||
f75b99d5 YL |
187 | avail = *r; |
188 | pci_clip_resource_to_region(bus, &avail, region); | |
f75b99d5 | 189 | |
36e097a8 BH |
190 | /* |
191 | * "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to | |
192 | * protect badly documented motherboard resources, but if | |
193 | * this is an already-configured bridge window, its start | |
194 | * overrides "min". | |
195 | */ | |
f75b99d5 | 196 | if (avail.start) |
3460baa6 | 197 | min_used = avail.start; |
f75b99d5 YL |
198 | |
199 | max = avail.end; | |
36e097a8 | 200 | |
1da177e4 | 201 | /* Ok, try it out.. */ |
3460baa6 | 202 | ret = allocate_resource(r, res, size, min_used, max, |
36e097a8 | 203 | align, alignf, alignf_data); |
1da177e4 | 204 | if (ret == 0) |
f75b99d5 | 205 | return 0; |
1da177e4 | 206 | } |
f75b99d5 YL |
207 | return -ENOMEM; |
208 | } | |
209 | ||
210 | /** | |
211 | * pci_bus_alloc_resource - allocate a resource from a parent bus | |
212 | * @bus: PCI bus | |
213 | * @res: resource to allocate | |
214 | * @size: size of resource to allocate | |
215 | * @align: alignment of resource to allocate | |
216 | * @min: minimum /proc/iomem address to allocate | |
217 | * @type_mask: IORESOURCE_* type flags | |
218 | * @alignf: resource alignment function | |
219 | * @alignf_data: data argument for resource alignment function | |
220 | * | |
221 | * Given the PCI bus a device resides on, the size, minimum address, | |
222 | * alignment and type, try to find an acceptable resource allocation | |
223 | * for a specific device resource. | |
224 | */ | |
d56dbf5b | 225 | int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, |
f75b99d5 | 226 | resource_size_t size, resource_size_t align, |
664c2848 | 227 | resource_size_t min, unsigned long type_mask, |
f75b99d5 YL |
228 | resource_size_t (*alignf)(void *, |
229 | const struct resource *, | |
230 | resource_size_t, | |
231 | resource_size_t), | |
232 | void *alignf_data) | |
233 | { | |
3a9ad0b4 | 234 | #ifdef CONFIG_PCI_BUS_ADDR_T_64BIT |
d56dbf5b YL |
235 | int rc; |
236 | ||
237 | if (res->flags & IORESOURCE_MEM_64) { | |
238 | rc = pci_bus_alloc_from_region(bus, res, size, align, min, | |
239 | type_mask, alignf, alignf_data, | |
240 | &pci_high); | |
241 | if (rc == 0) | |
242 | return 0; | |
243 | ||
f75b99d5 YL |
244 | return pci_bus_alloc_from_region(bus, res, size, align, min, |
245 | type_mask, alignf, alignf_data, | |
246 | &pci_64_bit); | |
1da177e4 | 247 | } |
f75b99d5 YL |
248 | #endif |
249 | ||
250 | return pci_bus_alloc_from_region(bus, res, size, align, min, | |
251 | type_mask, alignf, alignf_data, | |
252 | &pci_32_bit); | |
1da177e4 | 253 | } |
b7fe9434 | 254 | EXPORT_SYMBOL(pci_bus_alloc_resource); |
1da177e4 | 255 | |
0f7e7aee YL |
256 | /* |
257 | * The @idx resource of @dev should be a PCI-PCI bridge window. If this | |
258 | * resource fits inside a window of an upstream bridge, do nothing. If it | |
259 | * overlaps an upstream window but extends outside it, clip the resource so | |
260 | * it fits completely inside. | |
261 | */ | |
262 | bool pci_bus_clip_resource(struct pci_dev *dev, int idx) | |
263 | { | |
264 | struct pci_bus *bus = dev->bus; | |
265 | struct resource *res = &dev->resource[idx]; | |
266 | struct resource orig_res = *res; | |
267 | struct resource *r; | |
268 | int i; | |
269 | ||
270 | pci_bus_for_each_resource(bus, r, i) { | |
271 | resource_size_t start, end; | |
272 | ||
273 | if (!r) | |
274 | continue; | |
275 | ||
276 | if (resource_type(res) != resource_type(r)) | |
277 | continue; | |
278 | ||
279 | start = max(r->start, res->start); | |
280 | end = min(r->end, res->end); | |
281 | ||
282 | if (start > end) | |
283 | continue; /* no overlap */ | |
284 | ||
285 | if (res->start == start && res->end == end) | |
286 | return false; /* no change */ | |
287 | ||
288 | res->start = start; | |
289 | res->end = end; | |
b838b39e BH |
290 | res->flags &= ~IORESOURCE_UNSET; |
291 | orig_res.flags &= ~IORESOURCE_UNSET; | |
0f7e7aee YL |
292 | dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n", |
293 | &orig_res, res); | |
294 | ||
295 | return true; | |
296 | } | |
297 | ||
298 | return false; | |
299 | } | |
300 | ||
3c449ed0 YL |
301 | void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { } |
302 | ||
7b77061f WY |
303 | void __weak pcibios_bus_add_device(struct pci_dev *pdev) { } |
304 | ||
1da177e4 | 305 | /** |
4f535093 | 306 | * pci_bus_add_device - start driver for a single device |
1da177e4 LT |
307 | * @dev: device to add |
308 | * | |
4f535093 | 309 | * This adds add sysfs entries and start device drivers |
1da177e4 | 310 | */ |
c893d133 | 311 | void pci_bus_add_device(struct pci_dev *dev) |
1da177e4 | 312 | { |
b19441af | 313 | int retval; |
735bff10 | 314 | |
4f535093 YL |
315 | /* |
316 | * Can not put in pci_device_add yet because resources | |
317 | * are not assigned yet for some devices. | |
318 | */ | |
7b77061f | 319 | pcibios_bus_add_device(dev); |
e253aaf0 | 320 | pci_fixup_device(pci_fixup_final, dev); |
4f535093 | 321 | pci_create_sysfs_dev_files(dev); |
ef37702e | 322 | pci_proc_attach_device(dev); |
1ed276a7 | 323 | pci_bridge_d3_update(dev); |
1da177e4 | 324 | |
58d9a38f YL |
325 | dev->match_driver = true; |
326 | retval = device_attach(&dev->dev); | |
9a2a5a63 | 327 | if (retval < 0 && retval != -EPROBE_DEFER) { |
ab1a187b BH |
328 | dev_warn(&dev->dev, "device attach failed (%d)\n", retval); |
329 | pci_proc_detach_device(dev); | |
330 | pci_remove_sysfs_dev_files(dev); | |
331 | return; | |
332 | } | |
58d9a38f | 333 | |
8a1bc901 | 334 | dev->is_added = 1; |
876e501a | 335 | } |
b7fe9434 | 336 | EXPORT_SYMBOL_GPL(pci_bus_add_device); |
876e501a | 337 | |
1da177e4 | 338 | /** |
4f535093 | 339 | * pci_bus_add_devices - start driver for PCI devices |
1da177e4 LT |
340 | * @bus: bus to check for new devices |
341 | * | |
4f535093 | 342 | * Start driver for PCI devices and add some sysfs entries. |
1da177e4 | 343 | */ |
c48f1670 | 344 | void pci_bus_add_devices(const struct pci_bus *bus) |
1da177e4 LT |
345 | { |
346 | struct pci_dev *dev; | |
3fa16fdb | 347 | struct pci_bus *child; |
1da177e4 LT |
348 | |
349 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
8a1bc901 GKH |
350 | /* Skip already-added devices */ |
351 | if (dev->is_added) | |
1da177e4 | 352 | continue; |
c893d133 | 353 | pci_bus_add_device(dev); |
1da177e4 LT |
354 | } |
355 | ||
356 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
1e398eae LW |
357 | /* Skip if device attach failed */ |
358 | if (!dev->is_added) | |
359 | continue; | |
3fa16fdb | 360 | child = dev->subordinate; |
981cf9ea JL |
361 | if (child) |
362 | pci_bus_add_devices(child); | |
1da177e4 LT |
363 | } |
364 | } | |
b7fe9434 | 365 | EXPORT_SYMBOL(pci_bus_add_devices); |
1da177e4 | 366 | |
cecf4864 PM |
367 | /** pci_walk_bus - walk devices on/under bus, calling callback. |
368 | * @top bus whose devices should be walked | |
369 | * @cb callback to be called for each device found | |
370 | * @userdata arbitrary pointer to be passed to callback. | |
371 | * | |
372 | * Walk the given bus, including any bridged devices | |
373 | * on buses under this bus. Call the provided callback | |
374 | * on each device found. | |
70298c6e ZY |
375 | * |
376 | * We check the return of @cb each time. If it returns anything | |
377 | * other than 0, we break out. | |
378 | * | |
cecf4864 | 379 | */ |
70298c6e | 380 | void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), |
cecf4864 PM |
381 | void *userdata) |
382 | { | |
383 | struct pci_dev *dev; | |
384 | struct pci_bus *bus; | |
385 | struct list_head *next; | |
70298c6e | 386 | int retval; |
cecf4864 PM |
387 | |
388 | bus = top; | |
d71374da | 389 | down_read(&pci_bus_sem); |
cecf4864 PM |
390 | next = top->devices.next; |
391 | for (;;) { | |
392 | if (next == &bus->devices) { | |
393 | /* end of this bus, go up or finish */ | |
394 | if (bus == top) | |
395 | break; | |
396 | next = bus->self->bus_list.next; | |
397 | bus = bus->self->bus; | |
398 | continue; | |
399 | } | |
400 | dev = list_entry(next, struct pci_dev, bus_list); | |
cecf4864 PM |
401 | if (dev->subordinate) { |
402 | /* this is a pci-pci bridge, do its devices next */ | |
403 | next = dev->subordinate->devices.next; | |
404 | bus = dev->subordinate; | |
405 | } else | |
406 | next = dev->bus_list.next; | |
cecf4864 | 407 | |
70298c6e | 408 | retval = cb(dev, userdata); |
70298c6e ZY |
409 | if (retval) |
410 | break; | |
cecf4864 | 411 | } |
d71374da | 412 | up_read(&pci_bus_sem); |
cecf4864 | 413 | } |
7c94def8 | 414 | EXPORT_SYMBOL_GPL(pci_walk_bus); |
cecf4864 | 415 | |
fe830ef6 JL |
416 | struct pci_bus *pci_bus_get(struct pci_bus *bus) |
417 | { | |
418 | if (bus) | |
419 | get_device(&bus->dev); | |
420 | return bus; | |
421 | } | |
422 | EXPORT_SYMBOL(pci_bus_get); | |
423 | ||
424 | void pci_bus_put(struct pci_bus *bus) | |
425 | { | |
426 | if (bus) | |
427 | put_device(&bus->dev); | |
428 | } | |
429 | EXPORT_SYMBOL(pci_bus_put); |