]>
Commit | Line | Data |
---|---|---|
4daace0d JO |
1 | /* |
2 | * Copyright (c) Microsoft Corporation. | |
3 | * | |
4 | * Author: | |
5 | * Jake Oshins <jakeo@microsoft.com> | |
6 | * | |
7 | * This driver acts as a paravirtual front-end for PCI Express root buses. | |
8 | * When a PCI Express function (either an entire device or an SR-IOV | |
9 | * Virtual Function) is being passed through to the VM, this driver exposes | |
10 | * a new bus to the guest VM. This is modeled as a root PCI bus because | |
11 | * no bridges are being exposed to the VM. In fact, with a "Generation 2" | |
12 | * VM within Hyper-V, there may seem to be no PCI bus at all in the VM | |
13 | * until a device as been exposed using this driver. | |
14 | * | |
15 | * Each root PCI bus has its own PCI domain, which is called "Segment" in | |
16 | * the PCI Firmware Specifications. Thus while each device passed through | |
17 | * to the VM using this front-end will appear at "device 0", the domain will | |
18 | * be unique. Typically, each bus will have one PCI function on it, though | |
19 | * this driver does support more than one. | |
20 | * | |
21 | * In order to map the interrupts from the device through to the guest VM, | |
22 | * this driver also implements an IRQ Domain, which handles interrupts (either | |
23 | * MSI or MSI-X) associated with the functions on the bus. As interrupts are | |
24 | * set up, torn down, or reaffined, this driver communicates with the | |
25 | * underlying hypervisor to adjust the mappings in the I/O MMU so that each | |
26 | * interrupt will be delivered to the correct virtual processor at the right | |
27 | * vector. This driver does not support level-triggered (line-based) | |
28 | * interrupts, and will report that the Interrupt Line register in the | |
29 | * function's configuration space is zero. | |
30 | * | |
31 | * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V | |
32 | * facilities. For instance, the configuration space of a function exposed | |
33 | * by Hyper-V is mapped into a single page of memory space, and the | |
34 | * read and write handlers for config space must be aware of this mechanism. | |
35 | * Similarly, device setup and teardown involves messages sent to and from | |
36 | * the PCI back-end driver in Hyper-V. | |
37 | * | |
38 | * This program is free software; you can redistribute it and/or modify it | |
39 | * under the terms of the GNU General Public License version 2 as published | |
40 | * by the Free Software Foundation. | |
41 | * | |
42 | * This program is distributed in the hope that it will be useful, but | |
43 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
44 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
45 | * NON INFRINGEMENT. See the GNU General Public License for more | |
46 | * details. | |
47 | * | |
48 | */ | |
49 | ||
50 | #include <linux/kernel.h> | |
51 | #include <linux/module.h> | |
52 | #include <linux/pci.h> | |
80bfeeb9 | 53 | #include <linux/delay.h> |
4daace0d JO |
54 | #include <linux/semaphore.h> |
55 | #include <linux/irqdomain.h> | |
56 | #include <asm/irqdomain.h> | |
57 | #include <asm/apic.h> | |
58 | #include <linux/msi.h> | |
59 | #include <linux/hyperv.h> | |
24196f0c | 60 | #include <linux/refcount.h> |
4daace0d JO |
61 | #include <asm/mshyperv.h> |
62 | ||
63 | /* | |
64 | * Protocol versions. The low word is the minor version, the high word the | |
65 | * major version. | |
66 | */ | |
67 | ||
b1db7e7e | 68 | #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor))) |
4daace0d JO |
69 | #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16) |
70 | #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff) | |
71 | ||
b1db7e7e JL |
72 | enum pci_protocol_version_t { |
73 | PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */ | |
7dcf90e9 | 74 | PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */ |
4daace0d JO |
75 | }; |
76 | ||
433fcf6b | 77 | #define CPU_AFFINITY_ALL -1ULL |
b1db7e7e JL |
78 | |
79 | /* | |
80 | * Supported protocol versions in the order of probing - highest go | |
81 | * first. | |
82 | */ | |
83 | static enum pci_protocol_version_t pci_protocol_versions[] = { | |
7dcf90e9 | 84 | PCI_PROTOCOL_VERSION_1_2, |
b1db7e7e JL |
85 | PCI_PROTOCOL_VERSION_1_1, |
86 | }; | |
87 | ||
88 | /* | |
89 | * Protocol version negotiated by hv_pci_protocol_negotiation(). | |
90 | */ | |
91 | static enum pci_protocol_version_t pci_protocol_version; | |
92 | ||
4daace0d JO |
93 | #define PCI_CONFIG_MMIO_LENGTH 0x2000 |
94 | #define CFG_PAGE_OFFSET 0x1000 | |
95 | #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET) | |
96 | ||
97 | #define MAX_SUPPORTED_MSI_MESSAGES 0x400 | |
98 | ||
b1db7e7e JL |
99 | #define STATUS_REVISION_MISMATCH 0xC0000059 |
100 | ||
4daace0d JO |
101 | /* |
102 | * Message Types | |
103 | */ | |
104 | ||
105 | enum pci_message_type { | |
106 | /* | |
107 | * Version 1.1 | |
108 | */ | |
109 | PCI_MESSAGE_BASE = 0x42490000, | |
110 | PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0, | |
111 | PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1, | |
112 | PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4, | |
113 | PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5, | |
114 | PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6, | |
115 | PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7, | |
116 | PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8, | |
117 | PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9, | |
118 | PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA, | |
119 | PCI_EJECT = PCI_MESSAGE_BASE + 0xB, | |
120 | PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC, | |
121 | PCI_REENABLE = PCI_MESSAGE_BASE + 0xD, | |
122 | PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE, | |
123 | PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF, | |
124 | PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10, | |
125 | PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11, | |
126 | PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12, | |
127 | PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13, | |
128 | PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14, | |
129 | PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15, | |
7dcf90e9 JL |
130 | PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16, |
131 | PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17, | |
132 | PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */ | |
4daace0d JO |
133 | PCI_MESSAGE_MAXIMUM |
134 | }; | |
135 | ||
136 | /* | |
137 | * Structures defining the virtual PCI Express protocol. | |
138 | */ | |
139 | ||
140 | union pci_version { | |
141 | struct { | |
142 | u16 minor_version; | |
143 | u16 major_version; | |
144 | } parts; | |
145 | u32 version; | |
146 | } __packed; | |
147 | ||
148 | /* | |
149 | * Function numbers are 8-bits wide on Express, as interpreted through ARI, | |
150 | * which is all this driver does. This representation is the one used in | |
151 | * Windows, which is what is expected when sending this back and forth with | |
152 | * the Hyper-V parent partition. | |
153 | */ | |
154 | union win_slot_encoding { | |
155 | struct { | |
60e2e2fb DC |
156 | u32 dev:5; |
157 | u32 func:3; | |
4daace0d JO |
158 | u32 reserved:24; |
159 | } bits; | |
160 | u32 slot; | |
161 | } __packed; | |
162 | ||
163 | /* | |
164 | * Pretty much as defined in the PCI Specifications. | |
165 | */ | |
166 | struct pci_function_description { | |
167 | u16 v_id; /* vendor ID */ | |
168 | u16 d_id; /* device ID */ | |
169 | u8 rev; | |
170 | u8 prog_intf; | |
171 | u8 subclass; | |
172 | u8 base_class; | |
173 | u32 subsystem_id; | |
174 | union win_slot_encoding win_slot; | |
175 | u32 ser; /* serial number */ | |
176 | } __packed; | |
177 | ||
178 | /** | |
179 | * struct hv_msi_desc | |
180 | * @vector: IDT entry | |
181 | * @delivery_mode: As defined in Intel's Programmer's | |
182 | * Reference Manual, Volume 3, Chapter 8. | |
183 | * @vector_count: Number of contiguous entries in the | |
184 | * Interrupt Descriptor Table that are | |
185 | * occupied by this Message-Signaled | |
186 | * Interrupt. For "MSI", as first defined | |
187 | * in PCI 2.2, this can be between 1 and | |
188 | * 32. For "MSI-X," as first defined in PCI | |
189 | * 3.0, this must be 1, as each MSI-X table | |
190 | * entry would have its own descriptor. | |
191 | * @reserved: Empty space | |
192 | * @cpu_mask: All the target virtual processors. | |
193 | */ | |
194 | struct hv_msi_desc { | |
195 | u8 vector; | |
196 | u8 delivery_mode; | |
197 | u16 vector_count; | |
198 | u32 reserved; | |
199 | u64 cpu_mask; | |
200 | } __packed; | |
201 | ||
7dcf90e9 JL |
202 | /** |
203 | * struct hv_msi_desc2 - 1.2 version of hv_msi_desc | |
204 | * @vector: IDT entry | |
205 | * @delivery_mode: As defined in Intel's Programmer's | |
206 | * Reference Manual, Volume 3, Chapter 8. | |
207 | * @vector_count: Number of contiguous entries in the | |
208 | * Interrupt Descriptor Table that are | |
209 | * occupied by this Message-Signaled | |
210 | * Interrupt. For "MSI", as first defined | |
211 | * in PCI 2.2, this can be between 1 and | |
212 | * 32. For "MSI-X," as first defined in PCI | |
213 | * 3.0, this must be 1, as each MSI-X table | |
214 | * entry would have its own descriptor. | |
215 | * @processor_count: number of bits enabled in array. | |
216 | * @processor_array: All the target virtual processors. | |
217 | */ | |
218 | struct hv_msi_desc2 { | |
219 | u8 vector; | |
220 | u8 delivery_mode; | |
221 | u16 vector_count; | |
222 | u16 processor_count; | |
223 | u16 processor_array[32]; | |
224 | } __packed; | |
225 | ||
4daace0d JO |
226 | /** |
227 | * struct tran_int_desc | |
228 | * @reserved: unused, padding | |
229 | * @vector_count: same as in hv_msi_desc | |
230 | * @data: This is the "data payload" value that is | |
231 | * written by the device when it generates | |
232 | * a message-signaled interrupt, either MSI | |
233 | * or MSI-X. | |
234 | * @address: This is the address to which the data | |
235 | * payload is written on interrupt | |
236 | * generation. | |
237 | */ | |
238 | struct tran_int_desc { | |
239 | u16 reserved; | |
240 | u16 vector_count; | |
241 | u32 data; | |
242 | u64 address; | |
243 | } __packed; | |
244 | ||
245 | /* | |
246 | * A generic message format for virtual PCI. | |
247 | * Specific message formats are defined later in the file. | |
248 | */ | |
249 | ||
250 | struct pci_message { | |
0c6045d8 | 251 | u32 type; |
4daace0d JO |
252 | } __packed; |
253 | ||
254 | struct pci_child_message { | |
0c6045d8 | 255 | struct pci_message message_type; |
4daace0d JO |
256 | union win_slot_encoding wslot; |
257 | } __packed; | |
258 | ||
259 | struct pci_incoming_message { | |
260 | struct vmpacket_descriptor hdr; | |
261 | struct pci_message message_type; | |
262 | } __packed; | |
263 | ||
264 | struct pci_response { | |
265 | struct vmpacket_descriptor hdr; | |
266 | s32 status; /* negative values are failures */ | |
267 | } __packed; | |
268 | ||
269 | struct pci_packet { | |
270 | void (*completion_func)(void *context, struct pci_response *resp, | |
271 | int resp_packet_size); | |
272 | void *compl_ctxt; | |
0c6045d8 DC |
273 | |
274 | struct pci_message message[0]; | |
4daace0d JO |
275 | }; |
276 | ||
277 | /* | |
278 | * Specific message types supporting the PCI protocol. | |
279 | */ | |
280 | ||
281 | /* | |
282 | * Version negotiation message. Sent from the guest to the host. | |
283 | * The guest is free to try different versions until the host | |
284 | * accepts the version. | |
285 | * | |
286 | * pci_version: The protocol version requested. | |
287 | * is_last_attempt: If TRUE, this is the last version guest will request. | |
288 | * reservedz: Reserved field, set to zero. | |
289 | */ | |
290 | ||
291 | struct pci_version_request { | |
292 | struct pci_message message_type; | |
691ac1dc | 293 | u32 protocol_version; |
4daace0d JO |
294 | } __packed; |
295 | ||
296 | /* | |
297 | * Bus D0 Entry. This is sent from the guest to the host when the virtual | |
298 | * bus (PCI Express port) is ready for action. | |
299 | */ | |
300 | ||
301 | struct pci_bus_d0_entry { | |
302 | struct pci_message message_type; | |
303 | u32 reserved; | |
304 | u64 mmio_base; | |
305 | } __packed; | |
306 | ||
307 | struct pci_bus_relations { | |
308 | struct pci_incoming_message incoming; | |
309 | u32 device_count; | |
7d0f8eec | 310 | struct pci_function_description func[0]; |
4daace0d JO |
311 | } __packed; |
312 | ||
313 | struct pci_q_res_req_response { | |
314 | struct vmpacket_descriptor hdr; | |
315 | s32 status; /* negative values are failures */ | |
316 | u32 probed_bar[6]; | |
317 | } __packed; | |
318 | ||
319 | struct pci_set_power { | |
320 | struct pci_message message_type; | |
321 | union win_slot_encoding wslot; | |
322 | u32 power_state; /* In Windows terms */ | |
323 | u32 reserved; | |
324 | } __packed; | |
325 | ||
326 | struct pci_set_power_response { | |
327 | struct vmpacket_descriptor hdr; | |
328 | s32 status; /* negative values are failures */ | |
329 | union win_slot_encoding wslot; | |
330 | u32 resultant_state; /* In Windows terms */ | |
331 | u32 reserved; | |
332 | } __packed; | |
333 | ||
334 | struct pci_resources_assigned { | |
335 | struct pci_message message_type; | |
336 | union win_slot_encoding wslot; | |
337 | u8 memory_range[0x14][6]; /* not used here */ | |
338 | u32 msi_descriptors; | |
339 | u32 reserved[4]; | |
340 | } __packed; | |
341 | ||
7dcf90e9 JL |
342 | struct pci_resources_assigned2 { |
343 | struct pci_message message_type; | |
344 | union win_slot_encoding wslot; | |
345 | u8 memory_range[0x14][6]; /* not used here */ | |
346 | u32 msi_descriptor_count; | |
347 | u8 reserved[70]; | |
348 | } __packed; | |
349 | ||
4daace0d JO |
350 | struct pci_create_interrupt { |
351 | struct pci_message message_type; | |
352 | union win_slot_encoding wslot; | |
353 | struct hv_msi_desc int_desc; | |
354 | } __packed; | |
355 | ||
356 | struct pci_create_int_response { | |
357 | struct pci_response response; | |
358 | u32 reserved; | |
359 | struct tran_int_desc int_desc; | |
360 | } __packed; | |
361 | ||
7dcf90e9 JL |
362 | struct pci_create_interrupt2 { |
363 | struct pci_message message_type; | |
364 | union win_slot_encoding wslot; | |
365 | struct hv_msi_desc2 int_desc; | |
366 | } __packed; | |
367 | ||
4daace0d JO |
368 | struct pci_delete_interrupt { |
369 | struct pci_message message_type; | |
370 | union win_slot_encoding wslot; | |
371 | struct tran_int_desc int_desc; | |
372 | } __packed; | |
373 | ||
374 | struct pci_dev_incoming { | |
375 | struct pci_incoming_message incoming; | |
376 | union win_slot_encoding wslot; | |
377 | } __packed; | |
378 | ||
379 | struct pci_eject_response { | |
0c6045d8 | 380 | struct pci_message message_type; |
4daace0d JO |
381 | union win_slot_encoding wslot; |
382 | u32 status; | |
383 | } __packed; | |
384 | ||
385 | static int pci_ring_size = (4 * PAGE_SIZE); | |
386 | ||
387 | /* | |
388 | * Definitions or interrupt steering hypercall. | |
389 | */ | |
390 | #define HV_PARTITION_ID_SELF ((u64)-1) | |
391 | #define HVCALL_RETARGET_INTERRUPT 0x7e | |
392 | ||
7dcf90e9 | 393 | struct hv_interrupt_entry { |
4daace0d JO |
394 | u32 source; /* 1 for MSI(-X) */ |
395 | u32 reserved1; | |
396 | u32 address; | |
397 | u32 data; | |
7dcf90e9 JL |
398 | }; |
399 | ||
400 | #define HV_VP_SET_BANK_COUNT_MAX 5 /* current implementation limit */ | |
401 | ||
402 | struct hv_vp_set { | |
403 | u64 format; /* 0 (HvGenericSetSparse4k) */ | |
404 | u64 valid_banks; | |
405 | u64 masks[HV_VP_SET_BANK_COUNT_MAX]; | |
406 | }; | |
407 | ||
408 | /* | |
409 | * flags for hv_device_interrupt_target.flags | |
410 | */ | |
411 | #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1 | |
412 | #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2 | |
413 | ||
414 | struct hv_device_interrupt_target { | |
4daace0d JO |
415 | u32 vector; |
416 | u32 flags; | |
7dcf90e9 JL |
417 | union { |
418 | u64 vp_mask; | |
419 | struct hv_vp_set vp_set; | |
420 | }; | |
421 | }; | |
422 | ||
423 | struct retarget_msi_interrupt { | |
424 | u64 partition_id; /* use "self" */ | |
425 | u64 device_id; | |
426 | struct hv_interrupt_entry int_entry; | |
427 | u64 reserved2; | |
428 | struct hv_device_interrupt_target int_target; | |
4daace0d JO |
429 | } __packed; |
430 | ||
431 | /* | |
432 | * Driver specific state. | |
433 | */ | |
434 | ||
435 | enum hv_pcibus_state { | |
436 | hv_pcibus_init = 0, | |
437 | hv_pcibus_probed, | |
438 | hv_pcibus_installed, | |
d3a78d8b | 439 | hv_pcibus_removed, |
4daace0d JO |
440 | hv_pcibus_maximum |
441 | }; | |
442 | ||
443 | struct hv_pcibus_device { | |
444 | struct pci_sysdata sysdata; | |
445 | enum hv_pcibus_state state; | |
446 | atomic_t remove_lock; | |
447 | struct hv_device *hdev; | |
448 | resource_size_t low_mmio_space; | |
449 | resource_size_t high_mmio_space; | |
450 | struct resource *mem_config; | |
451 | struct resource *low_mmio_res; | |
452 | struct resource *high_mmio_res; | |
453 | struct completion *survey_event; | |
454 | struct completion remove_event; | |
455 | struct pci_bus *pci_bus; | |
456 | spinlock_t config_lock; /* Avoid two threads writing index page */ | |
457 | spinlock_t device_list_lock; /* Protect lists below */ | |
458 | void __iomem *cfg_addr; | |
459 | ||
460 | struct semaphore enum_sem; | |
461 | struct list_head resources_for_children; | |
462 | ||
463 | struct list_head children; | |
464 | struct list_head dr_list; | |
4daace0d JO |
465 | |
466 | struct msi_domain_info msi_info; | |
467 | struct msi_controller msi_chip; | |
468 | struct irq_domain *irq_domain; | |
be66b673 JL |
469 | |
470 | /* hypercall arg, must not cross page boundary */ | |
0de8ce3e | 471 | struct retarget_msi_interrupt retarget_msi_interrupt_params; |
be66b673 | 472 | |
0de8ce3e | 473 | spinlock_t retarget_msi_interrupt_lock; |
4daace0d JO |
474 | }; |
475 | ||
476 | /* | |
477 | * Tracks "Device Relations" messages from the host, which must be both | |
478 | * processed in order and deferred so that they don't run in the context | |
479 | * of the incoming packet callback. | |
480 | */ | |
481 | struct hv_dr_work { | |
482 | struct work_struct wrk; | |
483 | struct hv_pcibus_device *bus; | |
484 | }; | |
485 | ||
486 | struct hv_dr_state { | |
487 | struct list_head list_entry; | |
488 | u32 device_count; | |
7d0f8eec | 489 | struct pci_function_description func[0]; |
4daace0d JO |
490 | }; |
491 | ||
492 | enum hv_pcichild_state { | |
493 | hv_pcichild_init = 0, | |
494 | hv_pcichild_requirements, | |
495 | hv_pcichild_resourced, | |
496 | hv_pcichild_ejecting, | |
497 | hv_pcichild_maximum | |
498 | }; | |
499 | ||
500 | enum hv_pcidev_ref_reason { | |
501 | hv_pcidev_ref_invalid = 0, | |
502 | hv_pcidev_ref_initial, | |
503 | hv_pcidev_ref_by_slot, | |
504 | hv_pcidev_ref_packet, | |
505 | hv_pcidev_ref_pnp, | |
506 | hv_pcidev_ref_childlist, | |
507 | hv_pcidev_irqdata, | |
508 | hv_pcidev_ref_max | |
509 | }; | |
510 | ||
511 | struct hv_pci_dev { | |
512 | /* List protected by pci_rescan_remove_lock */ | |
513 | struct list_head list_entry; | |
24196f0c | 514 | refcount_t refs; |
4daace0d JO |
515 | enum hv_pcichild_state state; |
516 | struct pci_function_description desc; | |
517 | bool reported_missing; | |
518 | struct hv_pcibus_device *hbus; | |
519 | struct work_struct wrk; | |
520 | ||
521 | /* | |
522 | * What would be observed if one wrote 0xFFFFFFFF to a BAR and then | |
523 | * read it back, for each of the BAR offsets within config space. | |
524 | */ | |
525 | u32 probed_bar[6]; | |
526 | }; | |
527 | ||
528 | struct hv_pci_compl { | |
529 | struct completion host_event; | |
530 | s32 completion_status; | |
531 | }; | |
532 | ||
533 | /** | |
534 | * hv_pci_generic_compl() - Invoked for a completion packet | |
535 | * @context: Set up by the sender of the packet. | |
536 | * @resp: The response packet | |
537 | * @resp_packet_size: Size in bytes of the packet | |
538 | * | |
539 | * This function is used to trigger an event and report status | |
540 | * for any message for which the completion packet contains a | |
541 | * status and nothing else. | |
542 | */ | |
a5b45b7b DC |
543 | static void hv_pci_generic_compl(void *context, struct pci_response *resp, |
544 | int resp_packet_size) | |
4daace0d JO |
545 | { |
546 | struct hv_pci_compl *comp_pkt = context; | |
547 | ||
548 | if (resp_packet_size >= offsetofend(struct pci_response, status)) | |
549 | comp_pkt->completion_status = resp->status; | |
a5b45b7b DC |
550 | else |
551 | comp_pkt->completion_status = -1; | |
552 | ||
4daace0d JO |
553 | complete(&comp_pkt->host_event); |
554 | } | |
555 | ||
556 | static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus, | |
557 | u32 wslot); | |
558 | static void get_pcichild(struct hv_pci_dev *hv_pcidev, | |
559 | enum hv_pcidev_ref_reason reason); | |
560 | static void put_pcichild(struct hv_pci_dev *hv_pcidev, | |
561 | enum hv_pcidev_ref_reason reason); | |
562 | ||
563 | static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus); | |
564 | static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus); | |
565 | ||
566 | /** | |
567 | * devfn_to_wslot() - Convert from Linux PCI slot to Windows | |
568 | * @devfn: The Linux representation of PCI slot | |
569 | * | |
570 | * Windows uses a slightly different representation of PCI slot. | |
571 | * | |
572 | * Return: The Windows representation | |
573 | */ | |
574 | static u32 devfn_to_wslot(int devfn) | |
575 | { | |
576 | union win_slot_encoding wslot; | |
577 | ||
578 | wslot.slot = 0; | |
60e2e2fb DC |
579 | wslot.bits.dev = PCI_SLOT(devfn); |
580 | wslot.bits.func = PCI_FUNC(devfn); | |
4daace0d JO |
581 | |
582 | return wslot.slot; | |
583 | } | |
584 | ||
585 | /** | |
586 | * wslot_to_devfn() - Convert from Windows PCI slot to Linux | |
587 | * @wslot: The Windows representation of PCI slot | |
588 | * | |
589 | * Windows uses a slightly different representation of PCI slot. | |
590 | * | |
591 | * Return: The Linux representation | |
592 | */ | |
593 | static int wslot_to_devfn(u32 wslot) | |
594 | { | |
595 | union win_slot_encoding slot_no; | |
596 | ||
597 | slot_no.slot = wslot; | |
60e2e2fb | 598 | return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func); |
4daace0d JO |
599 | } |
600 | ||
601 | /* | |
602 | * PCI Configuration Space for these root PCI buses is implemented as a pair | |
603 | * of pages in memory-mapped I/O space. Writing to the first page chooses | |
604 | * the PCI function being written or read. Once the first page has been | |
605 | * written to, the following page maps in the entire configuration space of | |
606 | * the function. | |
607 | */ | |
608 | ||
609 | /** | |
610 | * _hv_pcifront_read_config() - Internal PCI config read | |
611 | * @hpdev: The PCI driver's representation of the device | |
612 | * @where: Offset within config space | |
613 | * @size: Size of the transfer | |
614 | * @val: Pointer to the buffer receiving the data | |
615 | */ | |
616 | static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where, | |
617 | int size, u32 *val) | |
618 | { | |
619 | unsigned long flags; | |
620 | void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where; | |
621 | ||
622 | /* | |
623 | * If the attempt is to read the IDs or the ROM BAR, simulate that. | |
624 | */ | |
625 | if (where + size <= PCI_COMMAND) { | |
626 | memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size); | |
627 | } else if (where >= PCI_CLASS_REVISION && where + size <= | |
628 | PCI_CACHE_LINE_SIZE) { | |
629 | memcpy(val, ((u8 *)&hpdev->desc.rev) + where - | |
630 | PCI_CLASS_REVISION, size); | |
631 | } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <= | |
632 | PCI_ROM_ADDRESS) { | |
633 | memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where - | |
634 | PCI_SUBSYSTEM_VENDOR_ID, size); | |
635 | } else if (where >= PCI_ROM_ADDRESS && where + size <= | |
636 | PCI_CAPABILITY_LIST) { | |
637 | /* ROM BARs are unimplemented */ | |
638 | *val = 0; | |
639 | } else if (where >= PCI_INTERRUPT_LINE && where + size <= | |
640 | PCI_INTERRUPT_PIN) { | |
641 | /* | |
642 | * Interrupt Line and Interrupt PIN are hard-wired to zero | |
643 | * because this front-end only supports message-signaled | |
644 | * interrupts. | |
645 | */ | |
646 | *val = 0; | |
647 | } else if (where + size <= CFG_PAGE_SIZE) { | |
648 | spin_lock_irqsave(&hpdev->hbus->config_lock, flags); | |
649 | /* Choose the function to be read. (See comment above) */ | |
650 | writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); | |
bdd74440 VK |
651 | /* Make sure the function was chosen before we start reading. */ |
652 | mb(); | |
4daace0d JO |
653 | /* Read from that function's config space. */ |
654 | switch (size) { | |
655 | case 1: | |
656 | *val = readb(addr); | |
657 | break; | |
658 | case 2: | |
659 | *val = readw(addr); | |
660 | break; | |
661 | default: | |
662 | *val = readl(addr); | |
663 | break; | |
664 | } | |
bdd74440 VK |
665 | /* |
666 | * Make sure the write was done before we release the spinlock | |
667 | * allowing consecutive reads/writes. | |
668 | */ | |
669 | mb(); | |
4daace0d JO |
670 | spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags); |
671 | } else { | |
672 | dev_err(&hpdev->hbus->hdev->device, | |
673 | "Attempt to read beyond a function's config space.\n"); | |
674 | } | |
675 | } | |
676 | ||
677 | /** | |
678 | * _hv_pcifront_write_config() - Internal PCI config write | |
679 | * @hpdev: The PCI driver's representation of the device | |
680 | * @where: Offset within config space | |
681 | * @size: Size of the transfer | |
682 | * @val: The data being transferred | |
683 | */ | |
684 | static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where, | |
685 | int size, u32 val) | |
686 | { | |
687 | unsigned long flags; | |
688 | void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where; | |
689 | ||
690 | if (where >= PCI_SUBSYSTEM_VENDOR_ID && | |
691 | where + size <= PCI_CAPABILITY_LIST) { | |
692 | /* SSIDs and ROM BARs are read-only */ | |
693 | } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) { | |
694 | spin_lock_irqsave(&hpdev->hbus->config_lock, flags); | |
695 | /* Choose the function to be written. (See comment above) */ | |
696 | writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr); | |
bdd74440 VK |
697 | /* Make sure the function was chosen before we start writing. */ |
698 | wmb(); | |
4daace0d JO |
699 | /* Write to that function's config space. */ |
700 | switch (size) { | |
701 | case 1: | |
702 | writeb(val, addr); | |
703 | break; | |
704 | case 2: | |
705 | writew(val, addr); | |
706 | break; | |
707 | default: | |
708 | writel(val, addr); | |
709 | break; | |
710 | } | |
bdd74440 VK |
711 | /* |
712 | * Make sure the write was done before we release the spinlock | |
713 | * allowing consecutive reads/writes. | |
714 | */ | |
715 | mb(); | |
4daace0d JO |
716 | spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags); |
717 | } else { | |
718 | dev_err(&hpdev->hbus->hdev->device, | |
719 | "Attempt to write beyond a function's config space.\n"); | |
720 | } | |
721 | } | |
722 | ||
723 | /** | |
724 | * hv_pcifront_read_config() - Read configuration space | |
725 | * @bus: PCI Bus structure | |
726 | * @devfn: Device/function | |
727 | * @where: Offset from base | |
728 | * @size: Byte/word/dword | |
729 | * @val: Value to be read | |
730 | * | |
731 | * Return: PCIBIOS_SUCCESSFUL on success | |
732 | * PCIBIOS_DEVICE_NOT_FOUND on failure | |
733 | */ | |
734 | static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn, | |
735 | int where, int size, u32 *val) | |
736 | { | |
737 | struct hv_pcibus_device *hbus = | |
738 | container_of(bus->sysdata, struct hv_pcibus_device, sysdata); | |
739 | struct hv_pci_dev *hpdev; | |
740 | ||
741 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn)); | |
742 | if (!hpdev) | |
743 | return PCIBIOS_DEVICE_NOT_FOUND; | |
744 | ||
745 | _hv_pcifront_read_config(hpdev, where, size, val); | |
746 | ||
747 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); | |
748 | return PCIBIOS_SUCCESSFUL; | |
749 | } | |
750 | ||
751 | /** | |
752 | * hv_pcifront_write_config() - Write configuration space | |
753 | * @bus: PCI Bus structure | |
754 | * @devfn: Device/function | |
755 | * @where: Offset from base | |
756 | * @size: Byte/word/dword | |
757 | * @val: Value to be written to device | |
758 | * | |
759 | * Return: PCIBIOS_SUCCESSFUL on success | |
760 | * PCIBIOS_DEVICE_NOT_FOUND on failure | |
761 | */ | |
762 | static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn, | |
763 | int where, int size, u32 val) | |
764 | { | |
765 | struct hv_pcibus_device *hbus = | |
766 | container_of(bus->sysdata, struct hv_pcibus_device, sysdata); | |
767 | struct hv_pci_dev *hpdev; | |
768 | ||
769 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn)); | |
770 | if (!hpdev) | |
771 | return PCIBIOS_DEVICE_NOT_FOUND; | |
772 | ||
773 | _hv_pcifront_write_config(hpdev, where, size, val); | |
774 | ||
775 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); | |
776 | return PCIBIOS_SUCCESSFUL; | |
777 | } | |
778 | ||
779 | /* PCIe operations */ | |
780 | static struct pci_ops hv_pcifront_ops = { | |
781 | .read = hv_pcifront_read_config, | |
782 | .write = hv_pcifront_write_config, | |
783 | }; | |
784 | ||
785 | /* Interrupt management hooks */ | |
786 | static void hv_int_desc_free(struct hv_pci_dev *hpdev, | |
787 | struct tran_int_desc *int_desc) | |
788 | { | |
789 | struct pci_delete_interrupt *int_pkt; | |
790 | struct { | |
791 | struct pci_packet pkt; | |
0c6045d8 | 792 | u8 buffer[sizeof(struct pci_delete_interrupt)]; |
4daace0d JO |
793 | } ctxt; |
794 | ||
795 | memset(&ctxt, 0, sizeof(ctxt)); | |
796 | int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message; | |
0c6045d8 | 797 | int_pkt->message_type.type = |
4daace0d JO |
798 | PCI_DELETE_INTERRUPT_MESSAGE; |
799 | int_pkt->wslot.slot = hpdev->desc.win_slot.slot; | |
800 | int_pkt->int_desc = *int_desc; | |
801 | vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt), | |
802 | (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0); | |
803 | kfree(int_desc); | |
804 | } | |
805 | ||
806 | /** | |
807 | * hv_msi_free() - Free the MSI. | |
808 | * @domain: The interrupt domain pointer | |
809 | * @info: Extra MSI-related context | |
810 | * @irq: Identifies the IRQ. | |
811 | * | |
812 | * The Hyper-V parent partition and hypervisor are tracking the | |
813 | * messages that are in use, keeping the interrupt redirection | |
814 | * table up to date. This callback sends a message that frees | |
815 | * the IRT entry and related tracking nonsense. | |
816 | */ | |
817 | static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info, | |
818 | unsigned int irq) | |
819 | { | |
820 | struct hv_pcibus_device *hbus; | |
821 | struct hv_pci_dev *hpdev; | |
822 | struct pci_dev *pdev; | |
823 | struct tran_int_desc *int_desc; | |
824 | struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq); | |
825 | struct msi_desc *msi = irq_data_get_msi_desc(irq_data); | |
826 | ||
827 | pdev = msi_desc_to_pci_dev(msi); | |
828 | hbus = info->data; | |
0c6e617f CA |
829 | int_desc = irq_data_get_irq_chip_data(irq_data); |
830 | if (!int_desc) | |
4daace0d JO |
831 | return; |
832 | ||
0c6e617f CA |
833 | irq_data->chip_data = NULL; |
834 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn)); | |
835 | if (!hpdev) { | |
836 | kfree(int_desc); | |
837 | return; | |
4daace0d JO |
838 | } |
839 | ||
0c6e617f | 840 | hv_int_desc_free(hpdev, int_desc); |
4daace0d JO |
841 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); |
842 | } | |
843 | ||
844 | static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest, | |
845 | bool force) | |
846 | { | |
847 | struct irq_data *parent = data->parent_data; | |
848 | ||
849 | return parent->chip->irq_set_affinity(parent, dest, force); | |
850 | } | |
851 | ||
542ccf45 | 852 | static void hv_irq_mask(struct irq_data *data) |
4daace0d JO |
853 | { |
854 | pci_msi_mask_irq(data); | |
855 | } | |
856 | ||
857 | /** | |
858 | * hv_irq_unmask() - "Unmask" the IRQ by setting its current | |
859 | * affinity. | |
860 | * @data: Describes the IRQ | |
861 | * | |
862 | * Build new a destination for the MSI and make a hypercall to | |
863 | * update the Interrupt Redirection Table. "Device Logical ID" | |
864 | * is built out of this PCI bus's instance GUID and the function | |
865 | * number of the device. | |
866 | */ | |
542ccf45 | 867 | static void hv_irq_unmask(struct irq_data *data) |
4daace0d JO |
868 | { |
869 | struct msi_desc *msi_desc = irq_data_get_msi_desc(data); | |
870 | struct irq_cfg *cfg = irqd_cfg(data); | |
0de8ce3e | 871 | struct retarget_msi_interrupt *params; |
4daace0d JO |
872 | struct hv_pcibus_device *hbus; |
873 | struct cpumask *dest; | |
874 | struct pci_bus *pbus; | |
875 | struct pci_dev *pdev; | |
0de8ce3e | 876 | unsigned long flags; |
7dcf90e9 JL |
877 | u32 var_size = 0; |
878 | int cpu_vmbus; | |
879 | int cpu; | |
880 | u64 res; | |
4daace0d | 881 | |
79aa801e | 882 | dest = irq_data_get_effective_affinity_mask(data); |
4daace0d JO |
883 | pdev = msi_desc_to_pci_dev(msi_desc); |
884 | pbus = pdev->bus; | |
885 | hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata); | |
886 | ||
0de8ce3e LL |
887 | spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags); |
888 | ||
889 | params = &hbus->retarget_msi_interrupt_params; | |
890 | memset(params, 0, sizeof(*params)); | |
891 | params->partition_id = HV_PARTITION_ID_SELF; | |
7dcf90e9 JL |
892 | params->int_entry.source = 1; /* MSI(-X) */ |
893 | params->int_entry.address = msi_desc->msg.address_lo; | |
894 | params->int_entry.data = msi_desc->msg.data; | |
0de8ce3e | 895 | params->device_id = (hbus->hdev->dev_instance.b[5] << 24) | |
4daace0d JO |
896 | (hbus->hdev->dev_instance.b[4] << 16) | |
897 | (hbus->hdev->dev_instance.b[7] << 8) | | |
898 | (hbus->hdev->dev_instance.b[6] & 0xf8) | | |
899 | PCI_FUNC(pdev->devfn); | |
7dcf90e9 JL |
900 | params->int_target.vector = cfg->vector; |
901 | ||
902 | /* | |
903 | * Honoring apic->irq_delivery_mode set to dest_Fixed by | |
904 | * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a | |
905 | * spurious interrupt storm. Not doing so does not seem to have a | |
906 | * negative effect (yet?). | |
907 | */ | |
908 | ||
909 | if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) { | |
910 | /* | |
911 | * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the | |
912 | * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides | |
913 | * with >64 VP support. | |
914 | * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED | |
915 | * is not sufficient for this hypercall. | |
916 | */ | |
917 | params->int_target.flags |= | |
918 | HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET; | |
919 | params->int_target.vp_set.valid_banks = | |
920 | (1ull << HV_VP_SET_BANK_COUNT_MAX) - 1; | |
921 | ||
922 | /* | |
923 | * var-sized hypercall, var-size starts after vp_mask (thus | |
924 | * vp_set.format does not count, but vp_set.valid_banks does). | |
925 | */ | |
926 | var_size = 1 + HV_VP_SET_BANK_COUNT_MAX; | |
927 | ||
928 | for_each_cpu_and(cpu, dest, cpu_online_mask) { | |
7415aea6 | 929 | cpu_vmbus = hv_cpu_number_to_vp_number(cpu); |
7dcf90e9 JL |
930 | |
931 | if (cpu_vmbus >= HV_VP_SET_BANK_COUNT_MAX * 64) { | |
932 | dev_err(&hbus->hdev->device, | |
933 | "too high CPU %d", cpu_vmbus); | |
934 | res = 1; | |
935 | goto exit_unlock; | |
936 | } | |
4daace0d | 937 | |
7dcf90e9 JL |
938 | params->int_target.vp_set.masks[cpu_vmbus / 64] |= |
939 | (1ULL << (cpu_vmbus & 63)); | |
940 | } | |
941 | } else { | |
942 | for_each_cpu_and(cpu, dest, cpu_online_mask) { | |
943 | params->int_target.vp_mask |= | |
7415aea6 | 944 | (1ULL << hv_cpu_number_to_vp_number(cpu)); |
7dcf90e9 JL |
945 | } |
946 | } | |
0de8ce3e | 947 | |
7dcf90e9 JL |
948 | res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17), |
949 | params, NULL); | |
4daace0d | 950 | |
7dcf90e9 | 951 | exit_unlock: |
0de8ce3e | 952 | spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags); |
4daace0d | 953 | |
7dcf90e9 JL |
954 | if (res) { |
955 | dev_err(&hbus->hdev->device, | |
956 | "%s() failed: %#llx", __func__, res); | |
957 | return; | |
958 | } | |
959 | ||
4daace0d JO |
960 | pci_msi_unmask_irq(data); |
961 | } | |
962 | ||
963 | struct compose_comp_ctxt { | |
964 | struct hv_pci_compl comp_pkt; | |
965 | struct tran_int_desc int_desc; | |
966 | }; | |
967 | ||
968 | static void hv_pci_compose_compl(void *context, struct pci_response *resp, | |
969 | int resp_packet_size) | |
970 | { | |
971 | struct compose_comp_ctxt *comp_pkt = context; | |
972 | struct pci_create_int_response *int_resp = | |
973 | (struct pci_create_int_response *)resp; | |
974 | ||
975 | comp_pkt->comp_pkt.completion_status = resp->status; | |
976 | comp_pkt->int_desc = int_resp->int_desc; | |
977 | complete(&comp_pkt->comp_pkt.host_event); | |
978 | } | |
979 | ||
7dcf90e9 JL |
980 | static u32 hv_compose_msi_req_v1( |
981 | struct pci_create_interrupt *int_pkt, struct cpumask *affinity, | |
982 | u32 slot, u8 vector) | |
983 | { | |
984 | int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE; | |
985 | int_pkt->wslot.slot = slot; | |
986 | int_pkt->int_desc.vector = vector; | |
987 | int_pkt->int_desc.vector_count = 1; | |
a31e58e1 | 988 | int_pkt->int_desc.delivery_mode = dest_Fixed; |
7dcf90e9 JL |
989 | |
990 | /* | |
991 | * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in | |
992 | * hv_irq_unmask(). | |
993 | */ | |
994 | int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL; | |
995 | ||
996 | return sizeof(*int_pkt); | |
997 | } | |
998 | ||
999 | static u32 hv_compose_msi_req_v2( | |
1000 | struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity, | |
1001 | u32 slot, u8 vector) | |
1002 | { | |
1003 | int cpu; | |
1004 | ||
1005 | int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2; | |
1006 | int_pkt->wslot.slot = slot; | |
1007 | int_pkt->int_desc.vector = vector; | |
1008 | int_pkt->int_desc.vector_count = 1; | |
a31e58e1 | 1009 | int_pkt->int_desc.delivery_mode = dest_Fixed; |
7dcf90e9 JL |
1010 | |
1011 | /* | |
1012 | * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten | |
1013 | * by subsequent retarget in hv_irq_unmask(). | |
1014 | */ | |
1015 | cpu = cpumask_first_and(affinity, cpu_online_mask); | |
1016 | int_pkt->int_desc.processor_array[0] = | |
7415aea6 | 1017 | hv_cpu_number_to_vp_number(cpu); |
7dcf90e9 JL |
1018 | int_pkt->int_desc.processor_count = 1; |
1019 | ||
1020 | return sizeof(*int_pkt); | |
1021 | } | |
1022 | ||
4daace0d JO |
1023 | /** |
1024 | * hv_compose_msi_msg() - Supplies a valid MSI address/data | |
1025 | * @data: Everything about this MSI | |
1026 | * @msg: Buffer that is filled in by this function | |
1027 | * | |
1028 | * This function unpacks the IRQ looking for target CPU set, IDT | |
1029 | * vector and mode and sends a message to the parent partition | |
1030 | * asking for a mapping for that tuple in this partition. The | |
1031 | * response supplies a data value and address to which that data | |
1032 | * should be written to trigger that interrupt. | |
1033 | */ | |
1034 | static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) | |
1035 | { | |
1036 | struct irq_cfg *cfg = irqd_cfg(data); | |
1037 | struct hv_pcibus_device *hbus; | |
1038 | struct hv_pci_dev *hpdev; | |
1039 | struct pci_bus *pbus; | |
1040 | struct pci_dev *pdev; | |
79aa801e | 1041 | struct cpumask *dest; |
4daace0d JO |
1042 | struct compose_comp_ctxt comp; |
1043 | struct tran_int_desc *int_desc; | |
4daace0d | 1044 | struct { |
7dcf90e9 JL |
1045 | struct pci_packet pci_pkt; |
1046 | union { | |
1047 | struct pci_create_interrupt v1; | |
1048 | struct pci_create_interrupt2 v2; | |
1049 | } int_pkts; | |
1050 | } __packed ctxt; | |
1051 | ||
1052 | u32 size; | |
4daace0d JO |
1053 | int ret; |
1054 | ||
1055 | pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data)); | |
79aa801e | 1056 | dest = irq_data_get_effective_affinity_mask(data); |
4daace0d JO |
1057 | pbus = pdev->bus; |
1058 | hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata); | |
1059 | hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn)); | |
1060 | if (!hpdev) | |
1061 | goto return_null_message; | |
1062 | ||
1063 | /* Free any previous message that might have already been composed. */ | |
1064 | if (data->chip_data) { | |
1065 | int_desc = data->chip_data; | |
1066 | data->chip_data = NULL; | |
1067 | hv_int_desc_free(hpdev, int_desc); | |
1068 | } | |
1069 | ||
59c58cee | 1070 | int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC); |
4daace0d JO |
1071 | if (!int_desc) |
1072 | goto drop_reference; | |
1073 | ||
1074 | memset(&ctxt, 0, sizeof(ctxt)); | |
1075 | init_completion(&comp.comp_pkt.host_event); | |
7dcf90e9 JL |
1076 | ctxt.pci_pkt.completion_func = hv_pci_compose_compl; |
1077 | ctxt.pci_pkt.compl_ctxt = ∁ | |
1078 | ||
1079 | switch (pci_protocol_version) { | |
1080 | case PCI_PROTOCOL_VERSION_1_1: | |
1081 | size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1, | |
79aa801e | 1082 | dest, |
7dcf90e9 JL |
1083 | hpdev->desc.win_slot.slot, |
1084 | cfg->vector); | |
1085 | break; | |
4daace0d | 1086 | |
7dcf90e9 JL |
1087 | case PCI_PROTOCOL_VERSION_1_2: |
1088 | size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2, | |
79aa801e | 1089 | dest, |
7dcf90e9 JL |
1090 | hpdev->desc.win_slot.slot, |
1091 | cfg->vector); | |
1092 | break; | |
1093 | ||
1094 | default: | |
1095 | /* As we only negotiate protocol versions known to this driver, | |
1096 | * this path should never hit. However, this is it not a hot | |
1097 | * path so we print a message to aid future updates. | |
1098 | */ | |
1099 | dev_err(&hbus->hdev->device, | |
1100 | "Unexpected vPCI protocol, update driver."); | |
1101 | goto free_int_desc; | |
4daace0d JO |
1102 | } |
1103 | ||
7dcf90e9 JL |
1104 | ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts, |
1105 | size, (unsigned long)&ctxt.pci_pkt, | |
4daace0d JO |
1106 | VM_PKT_DATA_INBAND, |
1107 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
7dcf90e9 JL |
1108 | if (ret) { |
1109 | dev_err(&hbus->hdev->device, | |
1110 | "Sending request for interrupt failed: 0x%x", | |
1111 | comp.comp_pkt.completion_status); | |
665e2245 | 1112 | goto free_int_desc; |
7dcf90e9 | 1113 | } |
665e2245 | 1114 | |
80bfeeb9 SH |
1115 | /* |
1116 | * Since this function is called with IRQ locks held, can't | |
1117 | * do normal wait for completion; instead poll. | |
1118 | */ | |
1119 | while (!try_wait_for_completion(&comp.comp_pkt.host_event)) | |
1120 | udelay(100); | |
4daace0d JO |
1121 | |
1122 | if (comp.comp_pkt.completion_status < 0) { | |
1123 | dev_err(&hbus->hdev->device, | |
1124 | "Request for interrupt failed: 0x%x", | |
1125 | comp.comp_pkt.completion_status); | |
1126 | goto free_int_desc; | |
1127 | } | |
1128 | ||
1129 | /* | |
1130 | * Record the assignment so that this can be unwound later. Using | |
1131 | * irq_set_chip_data() here would be appropriate, but the lock it takes | |
1132 | * is already held. | |
1133 | */ | |
1134 | *int_desc = comp.int_desc; | |
1135 | data->chip_data = int_desc; | |
1136 | ||
1137 | /* Pass up the result. */ | |
1138 | msg->address_hi = comp.int_desc.address >> 32; | |
1139 | msg->address_lo = comp.int_desc.address & 0xffffffff; | |
1140 | msg->data = comp.int_desc.data; | |
1141 | ||
1142 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); | |
1143 | return; | |
1144 | ||
1145 | free_int_desc: | |
1146 | kfree(int_desc); | |
1147 | drop_reference: | |
1148 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); | |
1149 | return_null_message: | |
1150 | msg->address_hi = 0; | |
1151 | msg->address_lo = 0; | |
1152 | msg->data = 0; | |
1153 | } | |
1154 | ||
1155 | /* HW Interrupt Chip Descriptor */ | |
1156 | static struct irq_chip hv_msi_irq_chip = { | |
1157 | .name = "Hyper-V PCIe MSI", | |
1158 | .irq_compose_msi_msg = hv_compose_msi_msg, | |
1159 | .irq_set_affinity = hv_set_affinity, | |
1160 | .irq_ack = irq_chip_ack_parent, | |
1161 | .irq_mask = hv_irq_mask, | |
1162 | .irq_unmask = hv_irq_unmask, | |
1163 | }; | |
1164 | ||
1165 | static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info, | |
1166 | msi_alloc_info_t *arg) | |
1167 | { | |
1168 | return arg->msi_hwirq; | |
1169 | } | |
1170 | ||
1171 | static struct msi_domain_ops hv_msi_ops = { | |
1172 | .get_hwirq = hv_msi_domain_ops_get_hwirq, | |
1173 | .msi_prepare = pci_msi_prepare, | |
1174 | .set_desc = pci_msi_set_desc, | |
1175 | .msi_free = hv_msi_free, | |
1176 | }; | |
1177 | ||
1178 | /** | |
1179 | * hv_pcie_init_irq_domain() - Initialize IRQ domain | |
1180 | * @hbus: The root PCI bus | |
1181 | * | |
1182 | * This function creates an IRQ domain which will be used for | |
1183 | * interrupts from devices that have been passed through. These | |
1184 | * devices only support MSI and MSI-X, not line-based interrupts | |
1185 | * or simulations of line-based interrupts through PCIe's | |
1186 | * fabric-layer messages. Because interrupts are remapped, we | |
1187 | * can support multi-message MSI here. | |
1188 | * | |
1189 | * Return: '0' on success and error value on failure | |
1190 | */ | |
1191 | static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus) | |
1192 | { | |
1193 | hbus->msi_info.chip = &hv_msi_irq_chip; | |
1194 | hbus->msi_info.ops = &hv_msi_ops; | |
1195 | hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS | | |
1196 | MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI | | |
1197 | MSI_FLAG_PCI_MSIX); | |
1198 | hbus->msi_info.handler = handle_edge_irq; | |
1199 | hbus->msi_info.handler_name = "edge"; | |
1200 | hbus->msi_info.data = hbus; | |
1201 | hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode, | |
1202 | &hbus->msi_info, | |
1203 | x86_vector_domain); | |
1204 | if (!hbus->irq_domain) { | |
1205 | dev_err(&hbus->hdev->device, | |
1206 | "Failed to build an MSI IRQ domain\n"); | |
1207 | return -ENODEV; | |
1208 | } | |
1209 | ||
1210 | return 0; | |
1211 | } | |
1212 | ||
1213 | /** | |
1214 | * get_bar_size() - Get the address space consumed by a BAR | |
1215 | * @bar_val: Value that a BAR returned after -1 was written | |
1216 | * to it. | |
1217 | * | |
1218 | * This function returns the size of the BAR, rounded up to 1 | |
1219 | * page. It has to be rounded up because the hypervisor's page | |
1220 | * table entry that maps the BAR into the VM can't specify an | |
1221 | * offset within a page. The invariant is that the hypervisor | |
1222 | * must place any BARs of smaller than page length at the | |
1223 | * beginning of a page. | |
1224 | * | |
1225 | * Return: Size in bytes of the consumed MMIO space. | |
1226 | */ | |
1227 | static u64 get_bar_size(u64 bar_val) | |
1228 | { | |
1229 | return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)), | |
1230 | PAGE_SIZE); | |
1231 | } | |
1232 | ||
1233 | /** | |
1234 | * survey_child_resources() - Total all MMIO requirements | |
1235 | * @hbus: Root PCI bus, as understood by this driver | |
1236 | */ | |
1237 | static void survey_child_resources(struct hv_pcibus_device *hbus) | |
1238 | { | |
1239 | struct list_head *iter; | |
1240 | struct hv_pci_dev *hpdev; | |
1241 | resource_size_t bar_size = 0; | |
1242 | unsigned long flags; | |
1243 | struct completion *event; | |
1244 | u64 bar_val; | |
1245 | int i; | |
1246 | ||
1247 | /* If nobody is waiting on the answer, don't compute it. */ | |
1248 | event = xchg(&hbus->survey_event, NULL); | |
1249 | if (!event) | |
1250 | return; | |
1251 | ||
1252 | /* If the answer has already been computed, go with it. */ | |
1253 | if (hbus->low_mmio_space || hbus->high_mmio_space) { | |
1254 | complete(event); | |
1255 | return; | |
1256 | } | |
1257 | ||
1258 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1259 | ||
1260 | /* | |
1261 | * Due to an interesting quirk of the PCI spec, all memory regions | |
1262 | * for a child device are a power of 2 in size and aligned in memory, | |
1263 | * so it's sufficient to just add them up without tracking alignment. | |
1264 | */ | |
1265 | list_for_each(iter, &hbus->children) { | |
1266 | hpdev = container_of(iter, struct hv_pci_dev, list_entry); | |
1267 | for (i = 0; i < 6; i++) { | |
1268 | if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO) | |
1269 | dev_err(&hbus->hdev->device, | |
1270 | "There's an I/O BAR in this list!\n"); | |
1271 | ||
1272 | if (hpdev->probed_bar[i] != 0) { | |
1273 | /* | |
1274 | * A probed BAR has all the upper bits set that | |
1275 | * can be changed. | |
1276 | */ | |
1277 | ||
1278 | bar_val = hpdev->probed_bar[i]; | |
1279 | if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64) | |
1280 | bar_val |= | |
1281 | ((u64)hpdev->probed_bar[++i] << 32); | |
1282 | else | |
1283 | bar_val |= 0xffffffff00000000ULL; | |
1284 | ||
1285 | bar_size = get_bar_size(bar_val); | |
1286 | ||
1287 | if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64) | |
1288 | hbus->high_mmio_space += bar_size; | |
1289 | else | |
1290 | hbus->low_mmio_space += bar_size; | |
1291 | } | |
1292 | } | |
1293 | } | |
1294 | ||
1295 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1296 | complete(event); | |
1297 | } | |
1298 | ||
1299 | /** | |
1300 | * prepopulate_bars() - Fill in BARs with defaults | |
1301 | * @hbus: Root PCI bus, as understood by this driver | |
1302 | * | |
1303 | * The core PCI driver code seems much, much happier if the BARs | |
1304 | * for a device have values upon first scan. So fill them in. | |
1305 | * The algorithm below works down from large sizes to small, | |
1306 | * attempting to pack the assignments optimally. The assumption, | |
1307 | * enforced in other parts of the code, is that the beginning of | |
1308 | * the memory-mapped I/O space will be aligned on the largest | |
1309 | * BAR size. | |
1310 | */ | |
1311 | static void prepopulate_bars(struct hv_pcibus_device *hbus) | |
1312 | { | |
1313 | resource_size_t high_size = 0; | |
1314 | resource_size_t low_size = 0; | |
1315 | resource_size_t high_base = 0; | |
1316 | resource_size_t low_base = 0; | |
1317 | resource_size_t bar_size; | |
1318 | struct hv_pci_dev *hpdev; | |
1319 | struct list_head *iter; | |
1320 | unsigned long flags; | |
1321 | u64 bar_val; | |
1322 | u32 command; | |
1323 | bool high; | |
1324 | int i; | |
1325 | ||
1326 | if (hbus->low_mmio_space) { | |
1327 | low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space)); | |
1328 | low_base = hbus->low_mmio_res->start; | |
1329 | } | |
1330 | ||
1331 | if (hbus->high_mmio_space) { | |
1332 | high_size = 1ULL << | |
1333 | (63 - __builtin_clzll(hbus->high_mmio_space)); | |
1334 | high_base = hbus->high_mmio_res->start; | |
1335 | } | |
1336 | ||
1337 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1338 | ||
1339 | /* Pick addresses for the BARs. */ | |
1340 | do { | |
1341 | list_for_each(iter, &hbus->children) { | |
1342 | hpdev = container_of(iter, struct hv_pci_dev, | |
1343 | list_entry); | |
1344 | for (i = 0; i < 6; i++) { | |
1345 | bar_val = hpdev->probed_bar[i]; | |
1346 | if (bar_val == 0) | |
1347 | continue; | |
1348 | high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64; | |
1349 | if (high) { | |
1350 | bar_val |= | |
1351 | ((u64)hpdev->probed_bar[i + 1] | |
1352 | << 32); | |
1353 | } else { | |
1354 | bar_val |= 0xffffffffULL << 32; | |
1355 | } | |
1356 | bar_size = get_bar_size(bar_val); | |
1357 | if (high) { | |
1358 | if (high_size != bar_size) { | |
1359 | i++; | |
1360 | continue; | |
1361 | } | |
1362 | _hv_pcifront_write_config(hpdev, | |
1363 | PCI_BASE_ADDRESS_0 + (4 * i), | |
1364 | 4, | |
1365 | (u32)(high_base & 0xffffff00)); | |
1366 | i++; | |
1367 | _hv_pcifront_write_config(hpdev, | |
1368 | PCI_BASE_ADDRESS_0 + (4 * i), | |
1369 | 4, (u32)(high_base >> 32)); | |
1370 | high_base += bar_size; | |
1371 | } else { | |
1372 | if (low_size != bar_size) | |
1373 | continue; | |
1374 | _hv_pcifront_write_config(hpdev, | |
1375 | PCI_BASE_ADDRESS_0 + (4 * i), | |
1376 | 4, | |
1377 | (u32)(low_base & 0xffffff00)); | |
1378 | low_base += bar_size; | |
1379 | } | |
1380 | } | |
1381 | if (high_size <= 1 && low_size <= 1) { | |
1382 | /* Set the memory enable bit. */ | |
1383 | _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, | |
1384 | &command); | |
1385 | command |= PCI_COMMAND_MEMORY; | |
1386 | _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, | |
1387 | command); | |
1388 | break; | |
1389 | } | |
1390 | } | |
1391 | ||
1392 | high_size >>= 1; | |
1393 | low_size >>= 1; | |
1394 | } while (high_size || low_size); | |
1395 | ||
1396 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1397 | } | |
1398 | ||
1399 | /** | |
1400 | * create_root_hv_pci_bus() - Expose a new root PCI bus | |
1401 | * @hbus: Root PCI bus, as understood by this driver | |
1402 | * | |
1403 | * Return: 0 on success, -errno on failure | |
1404 | */ | |
1405 | static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus) | |
1406 | { | |
1407 | /* Register the device */ | |
1408 | hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device, | |
1409 | 0, /* bus number is always zero */ | |
1410 | &hv_pcifront_ops, | |
1411 | &hbus->sysdata, | |
1412 | &hbus->resources_for_children); | |
1413 | if (!hbus->pci_bus) | |
1414 | return -ENODEV; | |
1415 | ||
1416 | hbus->pci_bus->msi = &hbus->msi_chip; | |
1417 | hbus->pci_bus->msi->dev = &hbus->hdev->device; | |
1418 | ||
414428c5 | 1419 | pci_lock_rescan_remove(); |
4daace0d JO |
1420 | pci_scan_child_bus(hbus->pci_bus); |
1421 | pci_bus_assign_resources(hbus->pci_bus); | |
1422 | pci_bus_add_devices(hbus->pci_bus); | |
414428c5 | 1423 | pci_unlock_rescan_remove(); |
4daace0d JO |
1424 | hbus->state = hv_pcibus_installed; |
1425 | return 0; | |
1426 | } | |
1427 | ||
1428 | struct q_res_req_compl { | |
1429 | struct completion host_event; | |
1430 | struct hv_pci_dev *hpdev; | |
1431 | }; | |
1432 | ||
1433 | /** | |
1434 | * q_resource_requirements() - Query Resource Requirements | |
1435 | * @context: The completion context. | |
1436 | * @resp: The response that came from the host. | |
1437 | * @resp_packet_size: The size in bytes of resp. | |
1438 | * | |
1439 | * This function is invoked on completion of a Query Resource | |
1440 | * Requirements packet. | |
1441 | */ | |
1442 | static void q_resource_requirements(void *context, struct pci_response *resp, | |
1443 | int resp_packet_size) | |
1444 | { | |
1445 | struct q_res_req_compl *completion = context; | |
1446 | struct pci_q_res_req_response *q_res_req = | |
1447 | (struct pci_q_res_req_response *)resp; | |
1448 | int i; | |
1449 | ||
1450 | if (resp->status < 0) { | |
1451 | dev_err(&completion->hpdev->hbus->hdev->device, | |
1452 | "query resource requirements failed: %x\n", | |
1453 | resp->status); | |
1454 | } else { | |
1455 | for (i = 0; i < 6; i++) { | |
1456 | completion->hpdev->probed_bar[i] = | |
1457 | q_res_req->probed_bar[i]; | |
1458 | } | |
1459 | } | |
1460 | ||
1461 | complete(&completion->host_event); | |
1462 | } | |
1463 | ||
1464 | static void get_pcichild(struct hv_pci_dev *hpdev, | |
1465 | enum hv_pcidev_ref_reason reason) | |
1466 | { | |
24196f0c | 1467 | refcount_inc(&hpdev->refs); |
4daace0d JO |
1468 | } |
1469 | ||
1470 | static void put_pcichild(struct hv_pci_dev *hpdev, | |
1471 | enum hv_pcidev_ref_reason reason) | |
1472 | { | |
24196f0c | 1473 | if (refcount_dec_and_test(&hpdev->refs)) |
4daace0d JO |
1474 | kfree(hpdev); |
1475 | } | |
1476 | ||
1477 | /** | |
1478 | * new_pcichild_device() - Create a new child device | |
1479 | * @hbus: The internal struct tracking this root PCI bus. | |
1480 | * @desc: The information supplied so far from the host | |
1481 | * about the device. | |
1482 | * | |
1483 | * This function creates the tracking structure for a new child | |
1484 | * device and kicks off the process of figuring out what it is. | |
1485 | * | |
1486 | * Return: Pointer to the new tracking struct | |
1487 | */ | |
1488 | static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus, | |
1489 | struct pci_function_description *desc) | |
1490 | { | |
1491 | struct hv_pci_dev *hpdev; | |
1492 | struct pci_child_message *res_req; | |
1493 | struct q_res_req_compl comp_pkt; | |
8286e96d DC |
1494 | struct { |
1495 | struct pci_packet init_packet; | |
1496 | u8 buffer[sizeof(struct pci_child_message)]; | |
4daace0d JO |
1497 | } pkt; |
1498 | unsigned long flags; | |
1499 | int ret; | |
1500 | ||
1501 | hpdev = kzalloc(sizeof(*hpdev), GFP_ATOMIC); | |
1502 | if (!hpdev) | |
1503 | return NULL; | |
1504 | ||
1505 | hpdev->hbus = hbus; | |
1506 | ||
1507 | memset(&pkt, 0, sizeof(pkt)); | |
1508 | init_completion(&comp_pkt.host_event); | |
1509 | comp_pkt.hpdev = hpdev; | |
1510 | pkt.init_packet.compl_ctxt = &comp_pkt; | |
1511 | pkt.init_packet.completion_func = q_resource_requirements; | |
1512 | res_req = (struct pci_child_message *)&pkt.init_packet.message; | |
0c6045d8 | 1513 | res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS; |
4daace0d JO |
1514 | res_req->wslot.slot = desc->win_slot.slot; |
1515 | ||
1516 | ret = vmbus_sendpacket(hbus->hdev->channel, res_req, | |
1517 | sizeof(struct pci_child_message), | |
1518 | (unsigned long)&pkt.init_packet, | |
1519 | VM_PKT_DATA_INBAND, | |
1520 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
1521 | if (ret) | |
1522 | goto error; | |
1523 | ||
1524 | wait_for_completion(&comp_pkt.host_event); | |
1525 | ||
1526 | hpdev->desc = *desc; | |
24196f0c | 1527 | refcount_set(&hpdev->refs, 1); |
4daace0d JO |
1528 | get_pcichild(hpdev, hv_pcidev_ref_childlist); |
1529 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
4a9b0933 HZ |
1530 | |
1531 | /* | |
1532 | * When a device is being added to the bus, we set the PCI domain | |
1533 | * number to be the device serial number, which is non-zero and | |
1534 | * unique on the same VM. The serial numbers start with 1, and | |
1535 | * increase by 1 for each device. So device names including this | |
1536 | * can have shorter names than based on the bus instance UUID. | |
1537 | * Only the first device serial number is used for domain, so the | |
1538 | * domain number will not change after the first device is added. | |
1539 | */ | |
1540 | if (list_empty(&hbus->children)) | |
1541 | hbus->sysdata.domain = desc->ser; | |
4daace0d JO |
1542 | list_add_tail(&hpdev->list_entry, &hbus->children); |
1543 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1544 | return hpdev; | |
1545 | ||
1546 | error: | |
1547 | kfree(hpdev); | |
1548 | return NULL; | |
1549 | } | |
1550 | ||
1551 | /** | |
1552 | * get_pcichild_wslot() - Find device from slot | |
1553 | * @hbus: Root PCI bus, as understood by this driver | |
1554 | * @wslot: Location on the bus | |
1555 | * | |
1556 | * This function looks up a PCI device and returns the internal | |
1557 | * representation of it. It acquires a reference on it, so that | |
1558 | * the device won't be deleted while somebody is using it. The | |
1559 | * caller is responsible for calling put_pcichild() to release | |
1560 | * this reference. | |
1561 | * | |
1562 | * Return: Internal representation of a PCI device | |
1563 | */ | |
1564 | static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus, | |
1565 | u32 wslot) | |
1566 | { | |
1567 | unsigned long flags; | |
1568 | struct hv_pci_dev *iter, *hpdev = NULL; | |
1569 | ||
1570 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1571 | list_for_each_entry(iter, &hbus->children, list_entry) { | |
1572 | if (iter->desc.win_slot.slot == wslot) { | |
1573 | hpdev = iter; | |
1574 | get_pcichild(hpdev, hv_pcidev_ref_by_slot); | |
1575 | break; | |
1576 | } | |
1577 | } | |
1578 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1579 | ||
1580 | return hpdev; | |
1581 | } | |
1582 | ||
1583 | /** | |
1584 | * pci_devices_present_work() - Handle new list of child devices | |
1585 | * @work: Work struct embedded in struct hv_dr_work | |
1586 | * | |
1587 | * "Bus Relations" is the Windows term for "children of this | |
1588 | * bus." The terminology is preserved here for people trying to | |
1589 | * debug the interaction between Hyper-V and Linux. This | |
1590 | * function is called when the parent partition reports a list | |
1591 | * of functions that should be observed under this PCI Express | |
1592 | * port (bus). | |
1593 | * | |
1594 | * This function updates the list, and must tolerate being | |
1595 | * called multiple times with the same information. The typical | |
1596 | * number of child devices is one, with very atypical cases | |
1597 | * involving three or four, so the algorithms used here can be | |
1598 | * simple and inefficient. | |
1599 | * | |
1600 | * It must also treat the omission of a previously observed device as | |
1601 | * notification that the device no longer exists. | |
1602 | * | |
1603 | * Note that this function is a work item, and it may not be | |
1604 | * invoked in the order that it was queued. Back to back | |
1605 | * updates of the list of present devices may involve queuing | |
1606 | * multiple work items, and this one may run before ones that | |
1607 | * were sent later. As such, this function only does something | |
1608 | * if is the last one in the queue. | |
1609 | */ | |
1610 | static void pci_devices_present_work(struct work_struct *work) | |
1611 | { | |
1612 | u32 child_no; | |
1613 | bool found; | |
1614 | struct list_head *iter; | |
1615 | struct pci_function_description *new_desc; | |
1616 | struct hv_pci_dev *hpdev; | |
1617 | struct hv_pcibus_device *hbus; | |
1618 | struct list_head removed; | |
1619 | struct hv_dr_work *dr_wrk; | |
1620 | struct hv_dr_state *dr = NULL; | |
1621 | unsigned long flags; | |
1622 | ||
1623 | dr_wrk = container_of(work, struct hv_dr_work, wrk); | |
1624 | hbus = dr_wrk->bus; | |
1625 | kfree(dr_wrk); | |
1626 | ||
1627 | INIT_LIST_HEAD(&removed); | |
1628 | ||
1629 | if (down_interruptible(&hbus->enum_sem)) { | |
1630 | put_hvpcibus(hbus); | |
1631 | return; | |
1632 | } | |
1633 | ||
1634 | /* Pull this off the queue and process it if it was the last one. */ | |
1635 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1636 | while (!list_empty(&hbus->dr_list)) { | |
1637 | dr = list_first_entry(&hbus->dr_list, struct hv_dr_state, | |
1638 | list_entry); | |
1639 | list_del(&dr->list_entry); | |
1640 | ||
1641 | /* Throw this away if the list still has stuff in it. */ | |
1642 | if (!list_empty(&hbus->dr_list)) { | |
1643 | kfree(dr); | |
1644 | continue; | |
1645 | } | |
1646 | } | |
1647 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1648 | ||
1649 | if (!dr) { | |
1650 | up(&hbus->enum_sem); | |
1651 | put_hvpcibus(hbus); | |
1652 | return; | |
1653 | } | |
1654 | ||
1655 | /* First, mark all existing children as reported missing. */ | |
1656 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1657 | list_for_each(iter, &hbus->children) { | |
1658 | hpdev = container_of(iter, struct hv_pci_dev, | |
1659 | list_entry); | |
1660 | hpdev->reported_missing = true; | |
1661 | } | |
1662 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1663 | ||
1664 | /* Next, add back any reported devices. */ | |
1665 | for (child_no = 0; child_no < dr->device_count; child_no++) { | |
1666 | found = false; | |
1667 | new_desc = &dr->func[child_no]; | |
1668 | ||
1669 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1670 | list_for_each(iter, &hbus->children) { | |
1671 | hpdev = container_of(iter, struct hv_pci_dev, | |
1672 | list_entry); | |
1673 | if ((hpdev->desc.win_slot.slot == | |
1674 | new_desc->win_slot.slot) && | |
1675 | (hpdev->desc.v_id == new_desc->v_id) && | |
1676 | (hpdev->desc.d_id == new_desc->d_id) && | |
1677 | (hpdev->desc.ser == new_desc->ser)) { | |
1678 | hpdev->reported_missing = false; | |
1679 | found = true; | |
1680 | } | |
1681 | } | |
1682 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1683 | ||
1684 | if (!found) { | |
1685 | hpdev = new_pcichild_device(hbus, new_desc); | |
1686 | if (!hpdev) | |
1687 | dev_err(&hbus->hdev->device, | |
1688 | "couldn't record a child device.\n"); | |
1689 | } | |
1690 | } | |
1691 | ||
1692 | /* Move missing children to a list on the stack. */ | |
1693 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1694 | do { | |
1695 | found = false; | |
1696 | list_for_each(iter, &hbus->children) { | |
1697 | hpdev = container_of(iter, struct hv_pci_dev, | |
1698 | list_entry); | |
1699 | if (hpdev->reported_missing) { | |
1700 | found = true; | |
1701 | put_pcichild(hpdev, hv_pcidev_ref_childlist); | |
4f1cb01a | 1702 | list_move_tail(&hpdev->list_entry, &removed); |
4daace0d JO |
1703 | break; |
1704 | } | |
1705 | } | |
1706 | } while (found); | |
1707 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1708 | ||
1709 | /* Delete everything that should no longer exist. */ | |
1710 | while (!list_empty(&removed)) { | |
1711 | hpdev = list_first_entry(&removed, struct hv_pci_dev, | |
1712 | list_entry); | |
1713 | list_del(&hpdev->list_entry); | |
1714 | put_pcichild(hpdev, hv_pcidev_ref_initial); | |
1715 | } | |
1716 | ||
691ac1dc | 1717 | switch (hbus->state) { |
d3a78d8b LL |
1718 | case hv_pcibus_installed: |
1719 | /* | |
691ac1dc JL |
1720 | * Tell the core to rescan bus |
1721 | * because there may have been changes. | |
1722 | */ | |
4daace0d JO |
1723 | pci_lock_rescan_remove(); |
1724 | pci_scan_child_bus(hbus->pci_bus); | |
1725 | pci_unlock_rescan_remove(); | |
d3a78d8b LL |
1726 | break; |
1727 | ||
1728 | case hv_pcibus_init: | |
1729 | case hv_pcibus_probed: | |
4daace0d | 1730 | survey_child_resources(hbus); |
d3a78d8b LL |
1731 | break; |
1732 | ||
1733 | default: | |
1734 | break; | |
4daace0d JO |
1735 | } |
1736 | ||
1737 | up(&hbus->enum_sem); | |
1738 | put_hvpcibus(hbus); | |
1739 | kfree(dr); | |
1740 | } | |
1741 | ||
1742 | /** | |
1743 | * hv_pci_devices_present() - Handles list of new children | |
1744 | * @hbus: Root PCI bus, as understood by this driver | |
1745 | * @relations: Packet from host listing children | |
1746 | * | |
1747 | * This function is invoked whenever a new list of devices for | |
1748 | * this bus appears. | |
1749 | */ | |
1750 | static void hv_pci_devices_present(struct hv_pcibus_device *hbus, | |
1751 | struct pci_bus_relations *relations) | |
1752 | { | |
1753 | struct hv_dr_state *dr; | |
1754 | struct hv_dr_work *dr_wrk; | |
1755 | unsigned long flags; | |
1756 | ||
1757 | dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT); | |
1758 | if (!dr_wrk) | |
1759 | return; | |
1760 | ||
1761 | dr = kzalloc(offsetof(struct hv_dr_state, func) + | |
1762 | (sizeof(struct pci_function_description) * | |
1763 | (relations->device_count)), GFP_NOWAIT); | |
1764 | if (!dr) { | |
1765 | kfree(dr_wrk); | |
1766 | return; | |
1767 | } | |
1768 | ||
1769 | INIT_WORK(&dr_wrk->wrk, pci_devices_present_work); | |
1770 | dr_wrk->bus = hbus; | |
1771 | dr->device_count = relations->device_count; | |
1772 | if (dr->device_count != 0) { | |
1773 | memcpy(dr->func, relations->func, | |
1774 | sizeof(struct pci_function_description) * | |
1775 | dr->device_count); | |
1776 | } | |
1777 | ||
1778 | spin_lock_irqsave(&hbus->device_list_lock, flags); | |
1779 | list_add_tail(&dr->list_entry, &hbus->dr_list); | |
1780 | spin_unlock_irqrestore(&hbus->device_list_lock, flags); | |
1781 | ||
1782 | get_hvpcibus(hbus); | |
1783 | schedule_work(&dr_wrk->wrk); | |
1784 | } | |
1785 | ||
1786 | /** | |
1787 | * hv_eject_device_work() - Asynchronously handles ejection | |
1788 | * @work: Work struct embedded in internal device struct | |
1789 | * | |
1790 | * This function handles ejecting a device. Windows will | |
1791 | * attempt to gracefully eject a device, waiting 60 seconds to | |
1792 | * hear back from the guest OS that this completed successfully. | |
1793 | * If this timer expires, the device will be forcibly removed. | |
1794 | */ | |
1795 | static void hv_eject_device_work(struct work_struct *work) | |
1796 | { | |
1797 | struct pci_eject_response *ejct_pkt; | |
1798 | struct hv_pci_dev *hpdev; | |
1799 | struct pci_dev *pdev; | |
1800 | unsigned long flags; | |
1801 | int wslot; | |
1802 | struct { | |
1803 | struct pci_packet pkt; | |
0c6045d8 | 1804 | u8 buffer[sizeof(struct pci_eject_response)]; |
4daace0d JO |
1805 | } ctxt; |
1806 | ||
1807 | hpdev = container_of(work, struct hv_pci_dev, wrk); | |
1808 | ||
1809 | if (hpdev->state != hv_pcichild_ejecting) { | |
1810 | put_pcichild(hpdev, hv_pcidev_ref_pnp); | |
1811 | return; | |
1812 | } | |
1813 | ||
1814 | /* | |
1815 | * Ejection can come before or after the PCI bus has been set up, so | |
1816 | * attempt to find it and tear down the bus state, if it exists. This | |
1817 | * must be done without constructs like pci_domain_nr(hbus->pci_bus) | |
1818 | * because hbus->pci_bus may not exist yet. | |
1819 | */ | |
1820 | wslot = wslot_to_devfn(hpdev->desc.win_slot.slot); | |
1821 | pdev = pci_get_domain_bus_and_slot(hpdev->hbus->sysdata.domain, 0, | |
1822 | wslot); | |
1823 | if (pdev) { | |
414428c5 | 1824 | pci_lock_rescan_remove(); |
4daace0d JO |
1825 | pci_stop_and_remove_bus_device(pdev); |
1826 | pci_dev_put(pdev); | |
414428c5 | 1827 | pci_unlock_rescan_remove(); |
4daace0d JO |
1828 | } |
1829 | ||
e74d2ebd DC |
1830 | spin_lock_irqsave(&hpdev->hbus->device_list_lock, flags); |
1831 | list_del(&hpdev->list_entry); | |
1832 | spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags); | |
1833 | ||
4daace0d JO |
1834 | memset(&ctxt, 0, sizeof(ctxt)); |
1835 | ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message; | |
0c6045d8 | 1836 | ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE; |
4daace0d JO |
1837 | ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot; |
1838 | vmbus_sendpacket(hpdev->hbus->hdev->channel, ejct_pkt, | |
1839 | sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt, | |
1840 | VM_PKT_DATA_INBAND, 0); | |
1841 | ||
4daace0d JO |
1842 | put_pcichild(hpdev, hv_pcidev_ref_childlist); |
1843 | put_pcichild(hpdev, hv_pcidev_ref_pnp); | |
1844 | put_hvpcibus(hpdev->hbus); | |
1845 | } | |
1846 | ||
1847 | /** | |
1848 | * hv_pci_eject_device() - Handles device ejection | |
1849 | * @hpdev: Internal device tracking struct | |
1850 | * | |
1851 | * This function is invoked when an ejection packet arrives. It | |
1852 | * just schedules work so that we don't re-enter the packet | |
1853 | * delivery code handling the ejection. | |
1854 | */ | |
1855 | static void hv_pci_eject_device(struct hv_pci_dev *hpdev) | |
1856 | { | |
1857 | hpdev->state = hv_pcichild_ejecting; | |
1858 | get_pcichild(hpdev, hv_pcidev_ref_pnp); | |
1859 | INIT_WORK(&hpdev->wrk, hv_eject_device_work); | |
1860 | get_hvpcibus(hpdev->hbus); | |
1861 | schedule_work(&hpdev->wrk); | |
1862 | } | |
1863 | ||
1864 | /** | |
1865 | * hv_pci_onchannelcallback() - Handles incoming packets | |
1866 | * @context: Internal bus tracking struct | |
1867 | * | |
1868 | * This function is invoked whenever the host sends a packet to | |
1869 | * this channel (which is private to this root PCI bus). | |
1870 | */ | |
1871 | static void hv_pci_onchannelcallback(void *context) | |
1872 | { | |
1873 | const int packet_size = 0x100; | |
1874 | int ret; | |
1875 | struct hv_pcibus_device *hbus = context; | |
1876 | u32 bytes_recvd; | |
1877 | u64 req_id; | |
1878 | struct vmpacket_descriptor *desc; | |
1879 | unsigned char *buffer; | |
1880 | int bufferlen = packet_size; | |
1881 | struct pci_packet *comp_packet; | |
1882 | struct pci_response *response; | |
1883 | struct pci_incoming_message *new_message; | |
1884 | struct pci_bus_relations *bus_rel; | |
1885 | struct pci_dev_incoming *dev_message; | |
1886 | struct hv_pci_dev *hpdev; | |
1887 | ||
1888 | buffer = kmalloc(bufferlen, GFP_ATOMIC); | |
1889 | if (!buffer) | |
1890 | return; | |
1891 | ||
1892 | while (1) { | |
1893 | ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer, | |
1894 | bufferlen, &bytes_recvd, &req_id); | |
1895 | ||
1896 | if (ret == -ENOBUFS) { | |
1897 | kfree(buffer); | |
1898 | /* Handle large packet */ | |
1899 | bufferlen = bytes_recvd; | |
1900 | buffer = kmalloc(bytes_recvd, GFP_ATOMIC); | |
1901 | if (!buffer) | |
1902 | return; | |
1903 | continue; | |
1904 | } | |
1905 | ||
837d741e VK |
1906 | /* Zero length indicates there are no more packets. */ |
1907 | if (ret || !bytes_recvd) | |
1908 | break; | |
1909 | ||
4daace0d JO |
1910 | /* |
1911 | * All incoming packets must be at least as large as a | |
1912 | * response. | |
1913 | */ | |
60fcdac8 | 1914 | if (bytes_recvd <= sizeof(struct pci_response)) |
837d741e | 1915 | continue; |
4daace0d JO |
1916 | desc = (struct vmpacket_descriptor *)buffer; |
1917 | ||
1918 | switch (desc->type) { | |
1919 | case VM_PKT_COMP: | |
1920 | ||
1921 | /* | |
1922 | * The host is trusted, and thus it's safe to interpret | |
1923 | * this transaction ID as a pointer. | |
1924 | */ | |
1925 | comp_packet = (struct pci_packet *)req_id; | |
1926 | response = (struct pci_response *)buffer; | |
1927 | comp_packet->completion_func(comp_packet->compl_ctxt, | |
1928 | response, | |
1929 | bytes_recvd); | |
60fcdac8 | 1930 | break; |
4daace0d JO |
1931 | |
1932 | case VM_PKT_DATA_INBAND: | |
1933 | ||
1934 | new_message = (struct pci_incoming_message *)buffer; | |
0c6045d8 | 1935 | switch (new_message->message_type.type) { |
4daace0d JO |
1936 | case PCI_BUS_RELATIONS: |
1937 | ||
1938 | bus_rel = (struct pci_bus_relations *)buffer; | |
1939 | if (bytes_recvd < | |
1940 | offsetof(struct pci_bus_relations, func) + | |
1941 | (sizeof(struct pci_function_description) * | |
1942 | (bus_rel->device_count))) { | |
1943 | dev_err(&hbus->hdev->device, | |
1944 | "bus relations too small\n"); | |
1945 | break; | |
1946 | } | |
1947 | ||
1948 | hv_pci_devices_present(hbus, bus_rel); | |
1949 | break; | |
1950 | ||
1951 | case PCI_EJECT: | |
1952 | ||
1953 | dev_message = (struct pci_dev_incoming *)buffer; | |
1954 | hpdev = get_pcichild_wslot(hbus, | |
1955 | dev_message->wslot.slot); | |
1956 | if (hpdev) { | |
1957 | hv_pci_eject_device(hpdev); | |
1958 | put_pcichild(hpdev, | |
1959 | hv_pcidev_ref_by_slot); | |
1960 | } | |
1961 | break; | |
1962 | ||
1963 | default: | |
1964 | dev_warn(&hbus->hdev->device, | |
1965 | "Unimplemented protocol message %x\n", | |
0c6045d8 | 1966 | new_message->message_type.type); |
4daace0d JO |
1967 | break; |
1968 | } | |
1969 | break; | |
1970 | ||
1971 | default: | |
1972 | dev_err(&hbus->hdev->device, | |
1973 | "unhandled packet type %d, tid %llx len %d\n", | |
1974 | desc->type, req_id, bytes_recvd); | |
1975 | break; | |
1976 | } | |
4daace0d | 1977 | } |
60fcdac8 VK |
1978 | |
1979 | kfree(buffer); | |
4daace0d JO |
1980 | } |
1981 | ||
1982 | /** | |
1983 | * hv_pci_protocol_negotiation() - Set up protocol | |
1984 | * @hdev: VMBus's tracking struct for this root PCI bus | |
1985 | * | |
1986 | * This driver is intended to support running on Windows 10 | |
1987 | * (server) and later versions. It will not run on earlier | |
1988 | * versions, as they assume that many of the operations which | |
1989 | * Linux needs accomplished with a spinlock held were done via | |
1990 | * asynchronous messaging via VMBus. Windows 10 increases the | |
1991 | * surface area of PCI emulation so that these actions can take | |
1992 | * place by suspending a virtual processor for their duration. | |
1993 | * | |
1994 | * This function negotiates the channel protocol version, | |
1995 | * failing if the host doesn't support the necessary protocol | |
1996 | * level. | |
1997 | */ | |
1998 | static int hv_pci_protocol_negotiation(struct hv_device *hdev) | |
1999 | { | |
2000 | struct pci_version_request *version_req; | |
2001 | struct hv_pci_compl comp_pkt; | |
2002 | struct pci_packet *pkt; | |
2003 | int ret; | |
b1db7e7e | 2004 | int i; |
4daace0d JO |
2005 | |
2006 | /* | |
2007 | * Initiate the handshake with the host and negotiate | |
2008 | * a version that the host can support. We start with the | |
2009 | * highest version number and go down if the host cannot | |
2010 | * support it. | |
2011 | */ | |
2012 | pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL); | |
2013 | if (!pkt) | |
2014 | return -ENOMEM; | |
2015 | ||
2016 | init_completion(&comp_pkt.host_event); | |
2017 | pkt->completion_func = hv_pci_generic_compl; | |
2018 | pkt->compl_ctxt = &comp_pkt; | |
2019 | version_req = (struct pci_version_request *)&pkt->message; | |
0c6045d8 | 2020 | version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION; |
4daace0d | 2021 | |
b1db7e7e JL |
2022 | for (i = 0; i < ARRAY_SIZE(pci_protocol_versions); i++) { |
2023 | version_req->protocol_version = pci_protocol_versions[i]; | |
2024 | ret = vmbus_sendpacket(hdev->channel, version_req, | |
2025 | sizeof(struct pci_version_request), | |
2026 | (unsigned long)pkt, VM_PKT_DATA_INBAND, | |
2027 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
2028 | if (ret) { | |
2029 | dev_err(&hdev->device, | |
2030 | "PCI Pass-through VSP failed sending version reqquest: %#x", | |
2031 | ret); | |
2032 | goto exit; | |
2033 | } | |
4daace0d | 2034 | |
b1db7e7e JL |
2035 | wait_for_completion(&comp_pkt.host_event); |
2036 | ||
2037 | if (comp_pkt.completion_status >= 0) { | |
2038 | pci_protocol_version = pci_protocol_versions[i]; | |
2039 | dev_info(&hdev->device, | |
2040 | "PCI VMBus probing: Using version %#x\n", | |
2041 | pci_protocol_version); | |
2042 | goto exit; | |
2043 | } | |
2044 | ||
2045 | if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) { | |
2046 | dev_err(&hdev->device, | |
2047 | "PCI Pass-through VSP failed version request: %#x", | |
2048 | comp_pkt.completion_status); | |
2049 | ret = -EPROTO; | |
2050 | goto exit; | |
2051 | } | |
4daace0d | 2052 | |
b1db7e7e | 2053 | reinit_completion(&comp_pkt.host_event); |
4daace0d JO |
2054 | } |
2055 | ||
b1db7e7e JL |
2056 | dev_err(&hdev->device, |
2057 | "PCI pass-through VSP failed to find supported version"); | |
2058 | ret = -EPROTO; | |
4daace0d JO |
2059 | |
2060 | exit: | |
2061 | kfree(pkt); | |
2062 | return ret; | |
2063 | } | |
2064 | ||
2065 | /** | |
2066 | * hv_pci_free_bridge_windows() - Release memory regions for the | |
2067 | * bus | |
2068 | * @hbus: Root PCI bus, as understood by this driver | |
2069 | */ | |
2070 | static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus) | |
2071 | { | |
2072 | /* | |
2073 | * Set the resources back to the way they looked when they | |
2074 | * were allocated by setting IORESOURCE_BUSY again. | |
2075 | */ | |
2076 | ||
2077 | if (hbus->low_mmio_space && hbus->low_mmio_res) { | |
2078 | hbus->low_mmio_res->flags |= IORESOURCE_BUSY; | |
696ca5e8 JO |
2079 | vmbus_free_mmio(hbus->low_mmio_res->start, |
2080 | resource_size(hbus->low_mmio_res)); | |
4daace0d JO |
2081 | } |
2082 | ||
2083 | if (hbus->high_mmio_space && hbus->high_mmio_res) { | |
2084 | hbus->high_mmio_res->flags |= IORESOURCE_BUSY; | |
696ca5e8 JO |
2085 | vmbus_free_mmio(hbus->high_mmio_res->start, |
2086 | resource_size(hbus->high_mmio_res)); | |
4daace0d JO |
2087 | } |
2088 | } | |
2089 | ||
2090 | /** | |
2091 | * hv_pci_allocate_bridge_windows() - Allocate memory regions | |
2092 | * for the bus | |
2093 | * @hbus: Root PCI bus, as understood by this driver | |
2094 | * | |
2095 | * This function calls vmbus_allocate_mmio(), which is itself a | |
2096 | * bit of a compromise. Ideally, we might change the pnp layer | |
2097 | * in the kernel such that it comprehends either PCI devices | |
2098 | * which are "grandchildren of ACPI," with some intermediate bus | |
2099 | * node (in this case, VMBus) or change it such that it | |
2100 | * understands VMBus. The pnp layer, however, has been declared | |
2101 | * deprecated, and not subject to change. | |
2102 | * | |
2103 | * The workaround, implemented here, is to ask VMBus to allocate | |
2104 | * MMIO space for this bus. VMBus itself knows which ranges are | |
2105 | * appropriate by looking at its own ACPI objects. Then, after | |
2106 | * these ranges are claimed, they're modified to look like they | |
2107 | * would have looked if the ACPI and pnp code had allocated | |
2108 | * bridge windows. These descriptors have to exist in this form | |
2109 | * in order to satisfy the code which will get invoked when the | |
2110 | * endpoint PCI function driver calls request_mem_region() or | |
2111 | * request_mem_region_exclusive(). | |
2112 | * | |
2113 | * Return: 0 on success, -errno on failure | |
2114 | */ | |
2115 | static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus) | |
2116 | { | |
2117 | resource_size_t align; | |
2118 | int ret; | |
2119 | ||
2120 | if (hbus->low_mmio_space) { | |
2121 | align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space)); | |
2122 | ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0, | |
2123 | (u64)(u32)0xffffffff, | |
2124 | hbus->low_mmio_space, | |
2125 | align, false); | |
2126 | if (ret) { | |
2127 | dev_err(&hbus->hdev->device, | |
2128 | "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n", | |
2129 | hbus->low_mmio_space); | |
2130 | return ret; | |
2131 | } | |
2132 | ||
2133 | /* Modify this resource to become a bridge window. */ | |
2134 | hbus->low_mmio_res->flags |= IORESOURCE_WINDOW; | |
2135 | hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY; | |
2136 | pci_add_resource(&hbus->resources_for_children, | |
2137 | hbus->low_mmio_res); | |
2138 | } | |
2139 | ||
2140 | if (hbus->high_mmio_space) { | |
2141 | align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space)); | |
2142 | ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev, | |
2143 | 0x100000000, -1, | |
2144 | hbus->high_mmio_space, align, | |
2145 | false); | |
2146 | if (ret) { | |
2147 | dev_err(&hbus->hdev->device, | |
2148 | "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n", | |
2149 | hbus->high_mmio_space); | |
2150 | goto release_low_mmio; | |
2151 | } | |
2152 | ||
2153 | /* Modify this resource to become a bridge window. */ | |
2154 | hbus->high_mmio_res->flags |= IORESOURCE_WINDOW; | |
2155 | hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY; | |
2156 | pci_add_resource(&hbus->resources_for_children, | |
2157 | hbus->high_mmio_res); | |
2158 | } | |
2159 | ||
2160 | return 0; | |
2161 | ||
2162 | release_low_mmio: | |
2163 | if (hbus->low_mmio_res) { | |
696ca5e8 JO |
2164 | vmbus_free_mmio(hbus->low_mmio_res->start, |
2165 | resource_size(hbus->low_mmio_res)); | |
4daace0d JO |
2166 | } |
2167 | ||
2168 | return ret; | |
2169 | } | |
2170 | ||
2171 | /** | |
2172 | * hv_allocate_config_window() - Find MMIO space for PCI Config | |
2173 | * @hbus: Root PCI bus, as understood by this driver | |
2174 | * | |
2175 | * This function claims memory-mapped I/O space for accessing | |
2176 | * configuration space for the functions on this bus. | |
2177 | * | |
2178 | * Return: 0 on success, -errno on failure | |
2179 | */ | |
2180 | static int hv_allocate_config_window(struct hv_pcibus_device *hbus) | |
2181 | { | |
2182 | int ret; | |
2183 | ||
2184 | /* | |
2185 | * Set up a region of MMIO space to use for accessing configuration | |
2186 | * space. | |
2187 | */ | |
2188 | ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1, | |
2189 | PCI_CONFIG_MMIO_LENGTH, 0x1000, false); | |
2190 | if (ret) | |
2191 | return ret; | |
2192 | ||
2193 | /* | |
2194 | * vmbus_allocate_mmio() gets used for allocating both device endpoint | |
2195 | * resource claims (those which cannot be overlapped) and the ranges | |
2196 | * which are valid for the children of this bus, which are intended | |
2197 | * to be overlapped by those children. Set the flag on this claim | |
2198 | * meaning that this region can't be overlapped. | |
2199 | */ | |
2200 | ||
2201 | hbus->mem_config->flags |= IORESOURCE_BUSY; | |
2202 | ||
2203 | return 0; | |
2204 | } | |
2205 | ||
2206 | static void hv_free_config_window(struct hv_pcibus_device *hbus) | |
2207 | { | |
696ca5e8 | 2208 | vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH); |
4daace0d JO |
2209 | } |
2210 | ||
2211 | /** | |
2212 | * hv_pci_enter_d0() - Bring the "bus" into the D0 power state | |
2213 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2214 | * | |
2215 | * Return: 0 on success, -errno on failure | |
2216 | */ | |
2217 | static int hv_pci_enter_d0(struct hv_device *hdev) | |
2218 | { | |
2219 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2220 | struct pci_bus_d0_entry *d0_entry; | |
2221 | struct hv_pci_compl comp_pkt; | |
2222 | struct pci_packet *pkt; | |
2223 | int ret; | |
2224 | ||
2225 | /* | |
2226 | * Tell the host that the bus is ready to use, and moved into the | |
2227 | * powered-on state. This includes telling the host which region | |
2228 | * of memory-mapped I/O space has been chosen for configuration space | |
2229 | * access. | |
2230 | */ | |
2231 | pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL); | |
2232 | if (!pkt) | |
2233 | return -ENOMEM; | |
2234 | ||
2235 | init_completion(&comp_pkt.host_event); | |
2236 | pkt->completion_func = hv_pci_generic_compl; | |
2237 | pkt->compl_ctxt = &comp_pkt; | |
2238 | d0_entry = (struct pci_bus_d0_entry *)&pkt->message; | |
0c6045d8 | 2239 | d0_entry->message_type.type = PCI_BUS_D0ENTRY; |
4daace0d JO |
2240 | d0_entry->mmio_base = hbus->mem_config->start; |
2241 | ||
2242 | ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry), | |
2243 | (unsigned long)pkt, VM_PKT_DATA_INBAND, | |
2244 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
2245 | if (ret) | |
2246 | goto exit; | |
2247 | ||
2248 | wait_for_completion(&comp_pkt.host_event); | |
2249 | ||
2250 | if (comp_pkt.completion_status < 0) { | |
2251 | dev_err(&hdev->device, | |
2252 | "PCI Pass-through VSP failed D0 Entry with status %x\n", | |
2253 | comp_pkt.completion_status); | |
2254 | ret = -EPROTO; | |
2255 | goto exit; | |
2256 | } | |
2257 | ||
2258 | ret = 0; | |
2259 | ||
2260 | exit: | |
2261 | kfree(pkt); | |
2262 | return ret; | |
2263 | } | |
2264 | ||
2265 | /** | |
2266 | * hv_pci_query_relations() - Ask host to send list of child | |
2267 | * devices | |
2268 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2269 | * | |
2270 | * Return: 0 on success, -errno on failure | |
2271 | */ | |
2272 | static int hv_pci_query_relations(struct hv_device *hdev) | |
2273 | { | |
2274 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2275 | struct pci_message message; | |
2276 | struct completion comp; | |
2277 | int ret; | |
2278 | ||
2279 | /* Ask the host to send along the list of child devices */ | |
2280 | init_completion(&comp); | |
2281 | if (cmpxchg(&hbus->survey_event, NULL, &comp)) | |
2282 | return -ENOTEMPTY; | |
2283 | ||
2284 | memset(&message, 0, sizeof(message)); | |
0c6045d8 | 2285 | message.type = PCI_QUERY_BUS_RELATIONS; |
4daace0d JO |
2286 | |
2287 | ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message), | |
2288 | 0, VM_PKT_DATA_INBAND, 0); | |
2289 | if (ret) | |
2290 | return ret; | |
2291 | ||
2292 | wait_for_completion(&comp); | |
2293 | return 0; | |
2294 | } | |
2295 | ||
2296 | /** | |
2297 | * hv_send_resources_allocated() - Report local resource choices | |
2298 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2299 | * | |
2300 | * The host OS is expecting to be sent a request as a message | |
2301 | * which contains all the resources that the device will use. | |
2302 | * The response contains those same resources, "translated" | |
2303 | * which is to say, the values which should be used by the | |
2304 | * hardware, when it delivers an interrupt. (MMIO resources are | |
2305 | * used in local terms.) This is nice for Windows, and lines up | |
2306 | * with the FDO/PDO split, which doesn't exist in Linux. Linux | |
2307 | * is deeply expecting to scan an emulated PCI configuration | |
2308 | * space. So this message is sent here only to drive the state | |
2309 | * machine on the host forward. | |
2310 | * | |
2311 | * Return: 0 on success, -errno on failure | |
2312 | */ | |
2313 | static int hv_send_resources_allocated(struct hv_device *hdev) | |
2314 | { | |
2315 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2316 | struct pci_resources_assigned *res_assigned; | |
7dcf90e9 | 2317 | struct pci_resources_assigned2 *res_assigned2; |
4daace0d JO |
2318 | struct hv_pci_compl comp_pkt; |
2319 | struct hv_pci_dev *hpdev; | |
2320 | struct pci_packet *pkt; | |
7dcf90e9 | 2321 | size_t size_res; |
4daace0d JO |
2322 | u32 wslot; |
2323 | int ret; | |
2324 | ||
7dcf90e9 JL |
2325 | size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) |
2326 | ? sizeof(*res_assigned) : sizeof(*res_assigned2); | |
2327 | ||
2328 | pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL); | |
4daace0d JO |
2329 | if (!pkt) |
2330 | return -ENOMEM; | |
2331 | ||
2332 | ret = 0; | |
2333 | ||
2334 | for (wslot = 0; wslot < 256; wslot++) { | |
2335 | hpdev = get_pcichild_wslot(hbus, wslot); | |
2336 | if (!hpdev) | |
2337 | continue; | |
2338 | ||
7dcf90e9 | 2339 | memset(pkt, 0, sizeof(*pkt) + size_res); |
4daace0d JO |
2340 | init_completion(&comp_pkt.host_event); |
2341 | pkt->completion_func = hv_pci_generic_compl; | |
2342 | pkt->compl_ctxt = &comp_pkt; | |
4daace0d | 2343 | |
7dcf90e9 JL |
2344 | if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) { |
2345 | res_assigned = | |
2346 | (struct pci_resources_assigned *)&pkt->message; | |
2347 | res_assigned->message_type.type = | |
2348 | PCI_RESOURCES_ASSIGNED; | |
2349 | res_assigned->wslot.slot = hpdev->desc.win_slot.slot; | |
2350 | } else { | |
2351 | res_assigned2 = | |
2352 | (struct pci_resources_assigned2 *)&pkt->message; | |
2353 | res_assigned2->message_type.type = | |
2354 | PCI_RESOURCES_ASSIGNED2; | |
2355 | res_assigned2->wslot.slot = hpdev->desc.win_slot.slot; | |
2356 | } | |
4daace0d JO |
2357 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); |
2358 | ||
7dcf90e9 JL |
2359 | ret = vmbus_sendpacket(hdev->channel, &pkt->message, |
2360 | size_res, (unsigned long)pkt, | |
2361 | VM_PKT_DATA_INBAND, | |
2362 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
4daace0d JO |
2363 | if (ret) |
2364 | break; | |
2365 | ||
2366 | wait_for_completion(&comp_pkt.host_event); | |
2367 | ||
2368 | if (comp_pkt.completion_status < 0) { | |
2369 | ret = -EPROTO; | |
2370 | dev_err(&hdev->device, | |
2371 | "resource allocated returned 0x%x", | |
2372 | comp_pkt.completion_status); | |
2373 | break; | |
2374 | } | |
2375 | } | |
2376 | ||
2377 | kfree(pkt); | |
2378 | return ret; | |
2379 | } | |
2380 | ||
2381 | /** | |
2382 | * hv_send_resources_released() - Report local resources | |
2383 | * released | |
2384 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2385 | * | |
2386 | * Return: 0 on success, -errno on failure | |
2387 | */ | |
2388 | static int hv_send_resources_released(struct hv_device *hdev) | |
2389 | { | |
2390 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); | |
2391 | struct pci_child_message pkt; | |
2392 | struct hv_pci_dev *hpdev; | |
2393 | u32 wslot; | |
2394 | int ret; | |
2395 | ||
2396 | for (wslot = 0; wslot < 256; wslot++) { | |
2397 | hpdev = get_pcichild_wslot(hbus, wslot); | |
2398 | if (!hpdev) | |
2399 | continue; | |
2400 | ||
2401 | memset(&pkt, 0, sizeof(pkt)); | |
0c6045d8 | 2402 | pkt.message_type.type = PCI_RESOURCES_RELEASED; |
4daace0d JO |
2403 | pkt.wslot.slot = hpdev->desc.win_slot.slot; |
2404 | ||
2405 | put_pcichild(hpdev, hv_pcidev_ref_by_slot); | |
2406 | ||
2407 | ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0, | |
2408 | VM_PKT_DATA_INBAND, 0); | |
2409 | if (ret) | |
2410 | return ret; | |
2411 | } | |
2412 | ||
2413 | return 0; | |
2414 | } | |
2415 | ||
2416 | static void get_hvpcibus(struct hv_pcibus_device *hbus) | |
2417 | { | |
2418 | atomic_inc(&hbus->remove_lock); | |
2419 | } | |
2420 | ||
2421 | static void put_hvpcibus(struct hv_pcibus_device *hbus) | |
2422 | { | |
2423 | if (atomic_dec_and_test(&hbus->remove_lock)) | |
2424 | complete(&hbus->remove_event); | |
2425 | } | |
2426 | ||
2427 | /** | |
2428 | * hv_pci_probe() - New VMBus channel probe, for a root PCI bus | |
2429 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2430 | * @dev_id: Identifies the device itself | |
2431 | * | |
2432 | * Return: 0 on success, -errno on failure | |
2433 | */ | |
2434 | static int hv_pci_probe(struct hv_device *hdev, | |
2435 | const struct hv_vmbus_device_id *dev_id) | |
2436 | { | |
2437 | struct hv_pcibus_device *hbus; | |
2438 | int ret; | |
2439 | ||
be66b673 JL |
2440 | /* |
2441 | * hv_pcibus_device contains the hypercall arguments for retargeting in | |
2442 | * hv_irq_unmask(). Those must not cross a page boundary. | |
2443 | */ | |
2444 | BUILD_BUG_ON(sizeof(*hbus) > PAGE_SIZE); | |
2445 | ||
2446 | hbus = (struct hv_pcibus_device *)get_zeroed_page(GFP_KERNEL); | |
4daace0d JO |
2447 | if (!hbus) |
2448 | return -ENOMEM; | |
d3a78d8b | 2449 | hbus->state = hv_pcibus_init; |
4daace0d JO |
2450 | |
2451 | /* | |
2452 | * The PCI bus "domain" is what is called "segment" in ACPI and | |
2453 | * other specs. Pull it from the instance ID, to get something | |
2454 | * unique. Bytes 8 and 9 are what is used in Windows guests, so | |
2455 | * do the same thing for consistency. Note that, since this code | |
2456 | * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee | |
2457 | * that (1) the only domain in use for something that looks like | |
2458 | * a physical PCI bus (which is actually emulated by the | |
2459 | * hypervisor) is domain 0 and (2) there will be no overlap | |
2460 | * between domains derived from these instance IDs in the same | |
2461 | * VM. | |
2462 | */ | |
2463 | hbus->sysdata.domain = hdev->dev_instance.b[9] | | |
2464 | hdev->dev_instance.b[8] << 8; | |
2465 | ||
2466 | hbus->hdev = hdev; | |
2467 | atomic_inc(&hbus->remove_lock); | |
2468 | INIT_LIST_HEAD(&hbus->children); | |
2469 | INIT_LIST_HEAD(&hbus->dr_list); | |
2470 | INIT_LIST_HEAD(&hbus->resources_for_children); | |
2471 | spin_lock_init(&hbus->config_lock); | |
2472 | spin_lock_init(&hbus->device_list_lock); | |
0de8ce3e | 2473 | spin_lock_init(&hbus->retarget_msi_interrupt_lock); |
4daace0d JO |
2474 | sema_init(&hbus->enum_sem, 1); |
2475 | init_completion(&hbus->remove_event); | |
2476 | ||
2477 | ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0, | |
2478 | hv_pci_onchannelcallback, hbus); | |
2479 | if (ret) | |
2480 | goto free_bus; | |
2481 | ||
2482 | hv_set_drvdata(hdev, hbus); | |
2483 | ||
2484 | ret = hv_pci_protocol_negotiation(hdev); | |
2485 | if (ret) | |
2486 | goto close; | |
2487 | ||
2488 | ret = hv_allocate_config_window(hbus); | |
2489 | if (ret) | |
2490 | goto close; | |
2491 | ||
2492 | hbus->cfg_addr = ioremap(hbus->mem_config->start, | |
2493 | PCI_CONFIG_MMIO_LENGTH); | |
2494 | if (!hbus->cfg_addr) { | |
2495 | dev_err(&hdev->device, | |
2496 | "Unable to map a virtual address for config space\n"); | |
2497 | ret = -ENOMEM; | |
2498 | goto free_config; | |
2499 | } | |
2500 | ||
2501 | hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus); | |
2502 | if (!hbus->sysdata.fwnode) { | |
2503 | ret = -ENOMEM; | |
2504 | goto unmap; | |
2505 | } | |
2506 | ||
2507 | ret = hv_pcie_init_irq_domain(hbus); | |
2508 | if (ret) | |
2509 | goto free_fwnode; | |
2510 | ||
2511 | ret = hv_pci_query_relations(hdev); | |
2512 | if (ret) | |
2513 | goto free_irq_domain; | |
2514 | ||
2515 | ret = hv_pci_enter_d0(hdev); | |
2516 | if (ret) | |
2517 | goto free_irq_domain; | |
2518 | ||
2519 | ret = hv_pci_allocate_bridge_windows(hbus); | |
2520 | if (ret) | |
2521 | goto free_irq_domain; | |
2522 | ||
2523 | ret = hv_send_resources_allocated(hdev); | |
2524 | if (ret) | |
2525 | goto free_windows; | |
2526 | ||
2527 | prepopulate_bars(hbus); | |
2528 | ||
2529 | hbus->state = hv_pcibus_probed; | |
2530 | ||
2531 | ret = create_root_hv_pci_bus(hbus); | |
2532 | if (ret) | |
2533 | goto free_windows; | |
2534 | ||
2535 | return 0; | |
2536 | ||
2537 | free_windows: | |
2538 | hv_pci_free_bridge_windows(hbus); | |
2539 | free_irq_domain: | |
2540 | irq_domain_remove(hbus->irq_domain); | |
2541 | free_fwnode: | |
2542 | irq_domain_free_fwnode(hbus->sysdata.fwnode); | |
2543 | unmap: | |
2544 | iounmap(hbus->cfg_addr); | |
2545 | free_config: | |
2546 | hv_free_config_window(hbus); | |
2547 | close: | |
2548 | vmbus_close(hdev->channel); | |
2549 | free_bus: | |
be66b673 | 2550 | free_page((unsigned long)hbus); |
4daace0d JO |
2551 | return ret; |
2552 | } | |
2553 | ||
17978524 | 2554 | static void hv_pci_bus_exit(struct hv_device *hdev) |
4daace0d | 2555 | { |
17978524 DC |
2556 | struct hv_pcibus_device *hbus = hv_get_drvdata(hdev); |
2557 | struct { | |
4daace0d | 2558 | struct pci_packet teardown_packet; |
17978524 | 2559 | u8 buffer[sizeof(struct pci_message)]; |
4daace0d JO |
2560 | } pkt; |
2561 | struct pci_bus_relations relations; | |
2562 | struct hv_pci_compl comp_pkt; | |
17978524 | 2563 | int ret; |
4daace0d | 2564 | |
17978524 DC |
2565 | /* |
2566 | * After the host sends the RESCIND_CHANNEL message, it doesn't | |
2567 | * access the per-channel ringbuffer any longer. | |
2568 | */ | |
2569 | if (hdev->channel->rescind) | |
2570 | return; | |
2571 | ||
2572 | /* Delete any children which might still exist. */ | |
2573 | memset(&relations, 0, sizeof(relations)); | |
2574 | hv_pci_devices_present(hbus, &relations); | |
2575 | ||
2576 | ret = hv_send_resources_released(hdev); | |
2577 | if (ret) | |
2578 | dev_err(&hdev->device, | |
2579 | "Couldn't send resources released packet(s)\n"); | |
4daace0d | 2580 | |
4daace0d JO |
2581 | memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet)); |
2582 | init_completion(&comp_pkt.host_event); | |
2583 | pkt.teardown_packet.completion_func = hv_pci_generic_compl; | |
2584 | pkt.teardown_packet.compl_ctxt = &comp_pkt; | |
0c6045d8 | 2585 | pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT; |
4daace0d JO |
2586 | |
2587 | ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message, | |
2588 | sizeof(struct pci_message), | |
2589 | (unsigned long)&pkt.teardown_packet, | |
2590 | VM_PKT_DATA_INBAND, | |
2591 | VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); | |
2592 | if (!ret) | |
2593 | wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ); | |
17978524 DC |
2594 | } |
2595 | ||
2596 | /** | |
2597 | * hv_pci_remove() - Remove routine for this VMBus channel | |
2598 | * @hdev: VMBus's tracking struct for this root PCI bus | |
2599 | * | |
2600 | * Return: 0 on success, -errno on failure | |
2601 | */ | |
2602 | static int hv_pci_remove(struct hv_device *hdev) | |
2603 | { | |
2604 | struct hv_pcibus_device *hbus; | |
4daace0d | 2605 | |
17978524 | 2606 | hbus = hv_get_drvdata(hdev); |
4daace0d JO |
2607 | if (hbus->state == hv_pcibus_installed) { |
2608 | /* Remove the bus from PCI's point of view. */ | |
2609 | pci_lock_rescan_remove(); | |
2610 | pci_stop_root_bus(hbus->pci_bus); | |
2611 | pci_remove_root_bus(hbus->pci_bus); | |
2612 | pci_unlock_rescan_remove(); | |
d3a78d8b | 2613 | hbus->state = hv_pcibus_removed; |
4daace0d JO |
2614 | } |
2615 | ||
17978524 | 2616 | hv_pci_bus_exit(hdev); |
deb22e5c | 2617 | |
4daace0d JO |
2618 | vmbus_close(hdev->channel); |
2619 | ||
4daace0d JO |
2620 | iounmap(hbus->cfg_addr); |
2621 | hv_free_config_window(hbus); | |
2622 | pci_free_resource_list(&hbus->resources_for_children); | |
2623 | hv_pci_free_bridge_windows(hbus); | |
2624 | irq_domain_remove(hbus->irq_domain); | |
2625 | irq_domain_free_fwnode(hbus->sysdata.fwnode); | |
2626 | put_hvpcibus(hbus); | |
2627 | wait_for_completion(&hbus->remove_event); | |
be66b673 | 2628 | free_page((unsigned long)hbus); |
4daace0d JO |
2629 | return 0; |
2630 | } | |
2631 | ||
2632 | static const struct hv_vmbus_device_id hv_pci_id_table[] = { | |
2633 | /* PCI Pass-through Class ID */ | |
2634 | /* 44C4F61D-4444-4400-9D52-802E27EDE19F */ | |
2635 | { HV_PCIE_GUID, }, | |
2636 | { }, | |
2637 | }; | |
2638 | ||
2639 | MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table); | |
2640 | ||
2641 | static struct hv_driver hv_pci_drv = { | |
2642 | .name = "hv_pci", | |
2643 | .id_table = hv_pci_id_table, | |
2644 | .probe = hv_pci_probe, | |
2645 | .remove = hv_pci_remove, | |
2646 | }; | |
2647 | ||
2648 | static void __exit exit_hv_pci_drv(void) | |
2649 | { | |
2650 | vmbus_driver_unregister(&hv_pci_drv); | |
2651 | } | |
2652 | ||
2653 | static int __init init_hv_pci_drv(void) | |
2654 | { | |
2655 | return vmbus_driver_register(&hv_pci_drv); | |
2656 | } | |
2657 | ||
2658 | module_init(init_hv_pci_drv); | |
2659 | module_exit(exit_hv_pci_drv); | |
2660 | ||
2661 | MODULE_DESCRIPTION("Hyper-V PCI"); | |
2662 | MODULE_LICENSE("GPL v2"); |