[mirror_ubuntu-bionic-kernel.git] / drivers / pci / hotplug / cpcihp_zt5550.c

/*
 * cpcihp_zt5550.c
 *
 * Intel/Ziatech ZT5550 CompactPCI Host Controller driver
 *
 * Copyright 2002 SOMA Networks, Inc.
 * Copyright 2001 Intel San Luis Obispo
 * Copyright 2000,2001 MontaVista Software Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
 * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * Send feedback to <scottm@somanetworks.com>
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/signal.h>	/* IRQF_SHARED */
#include "cpci_hotplug.h"
#include "cpcihp_zt5550.h"

#define DRIVER_VERSION	"0.2"
#define DRIVER_AUTHOR	"Scott Murray <scottm@somanetworks.com>"
#define DRIVER_DESC	"ZT5550 CompactPCI Hot Plug Driver"

#define MY_NAME	"cpcihp_zt5550"

#define dbg(format, arg...)					\
	do {							\
		if (debug)					\
			printk(KERN_DEBUG "%s: " format "\n",	\
				MY_NAME, ## arg);		\
	} while (0)
#define err(format, arg...) printk(KERN_ERR "%s: " format "\n", MY_NAME, ## arg)
#define info(format, arg...) printk(KERN_INFO "%s: " format "\n", MY_NAME, ## arg)
#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n", MY_NAME, ## arg)

/* local variables */
static bool debug;
static bool poll;
static struct cpci_hp_controller_ops zt5550_hpc_ops;
static struct cpci_hp_controller zt5550_hpc;

/* Primary cPCI bus bridge device */
static struct pci_dev *bus0_dev;
static struct pci_bus *bus0;

/* Host controller device */
static struct pci_dev *hc_dev;

/* Host controller register addresses */
static void __iomem *hc_registers;
static void __iomem *csr_hc_index;
static void __iomem *csr_hc_data;
static void __iomem *csr_int_status;
static void __iomem *csr_int_mask;


static int zt5550_hc_config(struct pci_dev *pdev)
{
	int ret;

	/* Since we know that no boards exist with two HC chips, treat it as an error */
	if (hc_dev) {
		err("too many host controller devices?");
		return -EBUSY;
	}

	ret = pci_enable_device(pdev);
	if (ret) {
		err("cannot enable %s\n", pci_name(pdev));
		return ret;
	}

	hc_dev = pdev;
	dbg("hc_dev = %p", hc_dev);
	dbg("pci resource start %llx", (unsigned long long)pci_resource_start(hc_dev, 1));
	dbg("pci resource len %llx", (unsigned long long)pci_resource_len(hc_dev, 1));

	if (!request_mem_region(pci_resource_start(hc_dev, 1),
				pci_resource_len(hc_dev, 1), MY_NAME)) {
		err("cannot reserve MMIO region");
		ret = -ENOMEM;
		goto exit_disable_device;
	}

	hc_registers =
	    ioremap(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1));
	if (!hc_registers) {
		err("cannot remap MMIO region %llx @ %llx",
			(unsigned long long)pci_resource_len(hc_dev, 1),
			(unsigned long long)pci_resource_start(hc_dev, 1));
		ret = -ENODEV;
		goto exit_release_region;
	}

	csr_hc_index = hc_registers + CSR_HCINDEX;
	csr_hc_data = hc_registers + CSR_HCDATA;
	csr_int_status = hc_registers + CSR_INTSTAT;
	csr_int_mask = hc_registers + CSR_INTMASK;

	/*
	 * Disable host control, fault and serial interrupts
	 */
	dbg("disabling host control, fault and serial interrupts");
	writeb((u8) HC_INT_MASK_REG, csr_hc_index);
	writeb((u8) ALL_INDEXED_INTS_MASK, csr_hc_data);
	dbg("disabled host control, fault and serial interrupts");

	/*
	 * Disable timer0, timer1 and ENUM interrupts
	 */
	dbg("disabling timer0, timer1 and ENUM interrupts");
	writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);
	dbg("disabled timer0, timer1 and ENUM interrupts");
	return 0;

exit_release_region:
	release_mem_region(pci_resource_start(hc_dev, 1),
			   pci_resource_len(hc_dev, 1));
exit_disable_device:
	pci_disable_device(hc_dev);
	return ret;
}

static int zt5550_hc_cleanup(void)
{
	if (!hc_dev)
		return -ENODEV;

	iounmap(hc_registers);
	release_mem_region(pci_resource_start(hc_dev, 1),
			   pci_resource_len(hc_dev, 1));
	pci_disable_device(hc_dev);
	return 0;
}

static int zt5550_hc_query_enum(void)
{
	u8 value;

	value = inb_p(ENUM_PORT);
	return ((value & ENUM_MASK) == ENUM_MASK);
}

static int zt5550_hc_check_irq(void *dev_id)
{
	int ret;
	u8 reg;

	ret = 0;
	if (dev_id == zt5550_hpc.dev_id) {
		reg = readb(csr_int_status);
		if (reg)
			ret = 1;
	}
	return ret;
}

static int zt5550_hc_enable_irq(void)
{
	u8 reg;

	if (hc_dev == NULL)
		return -ENODEV;

	reg = readb(csr_int_mask);
	reg = reg & ~ENUM_INT_MASK;
	writeb(reg, csr_int_mask);
	return 0;
}

static int zt5550_hc_disable_irq(void)
{
	u8 reg;

	if (hc_dev == NULL)
		return -ENODEV;

	reg = readb(csr_int_mask);
	reg = reg | ENUM_INT_MASK;
	writeb(reg, csr_int_mask);
	return 0;
}

static int zt5550_hc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	int status;

	status = zt5550_hc_config(pdev);
	if (status != 0)
		return status;

	dbg("returned from zt5550_hc_config");

	memset(&zt5550_hpc, 0, sizeof(struct cpci_hp_controller));
	zt5550_hpc_ops.query_enum = zt5550_hc_query_enum;
	zt5550_hpc.ops = &zt5550_hpc_ops;
	if (!poll) {
		zt5550_hpc.irq = hc_dev->irq;
		zt5550_hpc.irq_flags = IRQF_SHARED;
		zt5550_hpc.dev_id = hc_dev;

		zt5550_hpc_ops.enable_irq = zt5550_hc_enable_irq;
		zt5550_hpc_ops.disable_irq = zt5550_hc_disable_irq;
		zt5550_hpc_ops.check_irq = zt5550_hc_check_irq;
	} else {
		info("using ENUM# polling mode");
	}

	status = cpci_hp_register_controller(&zt5550_hpc);
	if (status != 0) {
		err("could not register cPCI hotplug controller");
		goto init_hc_error;
	}
	dbg("registered controller");

	/* Look for first device matching cPCI bus's bridge vendor and device IDs */
	bus0_dev = pci_get_device(PCI_VENDOR_ID_DEC,
				  PCI_DEVICE_ID_DEC_21154, NULL);
	if (!bus0_dev) {
		status = -ENODEV;
		goto init_register_error;
	}
	bus0 = bus0_dev->subordinate;
	pci_dev_put(bus0_dev);

	status = cpci_hp_register_bus(bus0, 0x0a, 0x0f);
	if (status != 0) {
		err("could not register cPCI hotplug bus");
		goto init_register_error;
	}
	dbg("registered bus");

	status = cpci_hp_start();
	if (status != 0) {
		err("could not started cPCI hotplug system");
		cpci_hp_unregister_bus(bus0);
		goto init_register_error;
	}
	dbg("started cpci hp system");

	return 0;
init_register_error:
	cpci_hp_unregister_controller(&zt5550_hpc);
init_hc_error:
	err("status = %d", status);
	zt5550_hc_cleanup();
	return status;

}

static void zt5550_hc_remove_one(struct pci_dev *pdev)
{
	cpci_hp_stop();
	cpci_hp_unregister_bus(bus0);
	cpci_hp_unregister_controller(&zt5550_hpc);
	zt5550_hc_cleanup();
}


static const struct pci_device_id zt5550_hc_pci_tbl[] = {
	{ PCI_VENDOR_ID_ZIATECH, PCI_DEVICE_ID_ZIATECH_5550_HC, PCI_ANY_ID, PCI_ANY_ID, },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, zt5550_hc_pci_tbl);

static struct pci_driver zt5550_hc_driver = {
	.name		= "zt5550_hc",
	.id_table	= zt5550_hc_pci_tbl,
	.probe		= zt5550_hc_init_one,
	.remove		= zt5550_hc_remove_one,
};

static int __init zt5550_init(void)
{
	struct resource *r;
	int rc;

	info(DRIVER_DESC " version: " DRIVER_VERSION);
	r = request_region(ENUM_PORT, 1, "#ENUM hotswap signal register");
	if (!r)
		return -EBUSY;

	rc = pci_register_driver(&zt5550_hc_driver);
	if (rc < 0)
		release_region(ENUM_PORT, 1);
	return rc;
}

static void __exit
zt5550_exit(void)
{
	pci_unregister_driver(&zt5550_hc_driver);
	release_region(ENUM_PORT, 1);
}

module_init(zt5550_init);
module_exit(zt5550_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
module_param(debug, bool, 0644);
MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
module_param(poll, bool, 0644);
MODULE_PARM_DESC(poll, "#ENUM polling mode enabled or not");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* cpcihp_zt5550.c
	3	*
	4	* Intel/Ziatech ZT5550 CompactPCI Host Controller driver
	5	*
	6	* Copyright 2002 SOMA Networks, Inc.
	7	* Copyright 2001 Intel San Luis Obispo
	8	* Copyright 2000,2001 MontaVista Software Inc.
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*
	15	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
f7625980 BH	16	* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
	17	* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
	18	* THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
	19	* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
	20	* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
	21	* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
	22	* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
	23	* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1da177e4 LT	24	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	25	*
	26	* You should have received a copy of the GNU General Public License along
	27	* with this program; if not, write to the Free Software Foundation, Inc.,
	28	* 675 Mass Ave, Cambridge, MA 02139, USA.
	29	*
	30	* Send feedback to <scottm@somanetworks.com>
	31	*/
	32
1da177e4 LT	33	#include <linux/module.h>
	34	#include <linux/moduleparam.h>
	35	#include <linux/init.h>
	36	#include <linux/errno.h>
	37	#include <linux/pci.h>
6b4486e2 TG	38	#include <linux/interrupt.h>
6b4486e2 TG	39	#include <linux/signal.h> /* IRQF_SHARED */
1da177e4 LT	40	#include "cpci_hotplug.h"
	41	#include "cpcihp_zt5550.h"
	42
	43	#define DRIVER_VERSION "0.2"
	44	#define DRIVER_AUTHOR "Scott Murray <scottm@somanetworks.com>"
	45	#define DRIVER_DESC "ZT5550 CompactPCI Hot Plug Driver"
	46
	47	#define MY_NAME "cpcihp_zt5550"
	48
	49	#define dbg(format, arg...) \
	50	do { \
f7625980	51	if (debug) \
ff3ce480 BS	52	printk(KERN_DEBUG "%s: " format "\n", \
ff3ce480 BS	53	MY_NAME, ## arg); \
382a9c9a	54	} while (0)
ff3ce480 BS	55	#define err(format, arg...) printk(KERN_ERR "%s: " format "\n", MY_NAME, ## arg)
	56	#define info(format, arg...) printk(KERN_INFO "%s: " format "\n", MY_NAME, ## arg)
	57	#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n", MY_NAME, ## arg)
1da177e4 LT	58
1da177e4 LT	59	/* local variables */
90ab5ee9 RR	60	static bool debug;
90ab5ee9 RR	61	static bool poll;
1da177e4 LT	62	static struct cpci_hp_controller_ops zt5550_hpc_ops;
	63	static struct cpci_hp_controller zt5550_hpc;
	64
	65	/* Primary cPCI bus bridge device */
	66	static struct pci_dev *bus0_dev;
	67	static struct pci_bus *bus0;
	68
	69	/* Host controller device */
	70	static struct pci_dev *hc_dev;
	71
	72	/* Host controller register addresses */
	73	static void __iomem *hc_registers;
	74	static void __iomem *csr_hc_index;
	75	static void __iomem *csr_hc_data;
	76	static void __iomem *csr_int_status;
	77	static void __iomem *csr_int_mask;
	78
	79
	80	static int zt5550_hc_config(struct pci_dev *pdev)
	81	{
c8920f0c BH	82	int ret;
c8920f0c BH	83
1da177e4	84	/* Since we know that no boards exist with two HC chips, treat it as an error */
382a9c9a	85	if (hc_dev) {
1da177e4 LT	86	err("too many host controller devices?");
	87	return -EBUSY;
	88	}
c8920f0c BH	89
c8920f0c BH	90	ret = pci_enable_device(pdev);
382a9c9a	91	if (ret) {
c8920f0c BH	92	err("cannot enable %s\n", pci_name(pdev));
	93	return ret;
	94	}
	95
1da177e4 LT	96	hc_dev = pdev;
1da177e4 LT	97	dbg("hc_dev = %p", hc_dev);
1396a8c3 GKH	98	dbg("pci resource start %llx", (unsigned long long)pci_resource_start(hc_dev, 1));
1396a8c3 GKH	99	dbg("pci resource len %llx", (unsigned long long)pci_resource_len(hc_dev, 1));
1da177e4	100
382a9c9a	101	if (!request_mem_region(pci_resource_start(hc_dev, 1),
1da177e4 LT	102	pci_resource_len(hc_dev, 1), MY_NAME)) {
1da177e4 LT	103	err("cannot reserve MMIO region");
c8920f0c BH	104	ret = -ENOMEM;
c8920f0c BH	105	goto exit_disable_device;
1da177e4 LT	106	}
	107
	108	hc_registers =
	109	ioremap(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1));
382a9c9a	110	if (!hc_registers) {
1396a8c3 GKH	111	err("cannot remap MMIO region %llx @ %llx",
	112	(unsigned long long)pci_resource_len(hc_dev, 1),
	113	(unsigned long long)pci_resource_start(hc_dev, 1));
c8920f0c BH	114	ret = -ENODEV;
c8920f0c BH	115	goto exit_release_region;
1da177e4 LT	116	}
	117
	118	csr_hc_index = hc_registers + CSR_HCINDEX;
	119	csr_hc_data = hc_registers + CSR_HCDATA;
	120	csr_int_status = hc_registers + CSR_INTSTAT;
	121	csr_int_mask = hc_registers + CSR_INTMASK;
	122
	123	/*
	124	* Disable host control, fault and serial interrupts
	125	*/
	126	dbg("disabling host control, fault and serial interrupts");
	127	writeb((u8) HC_INT_MASK_REG, csr_hc_index);
	128	writeb((u8) ALL_INDEXED_INTS_MASK, csr_hc_data);
	129	dbg("disabled host control, fault and serial interrupts");
	130
	131	/*
	132	* Disable timer0, timer1 and ENUM interrupts
	133	*/
	134	dbg("disabling timer0, timer1 and ENUM interrupts");
	135	writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask);
	136	dbg("disabled timer0, timer1 and ENUM interrupts");
	137	return 0;
c8920f0c BH	138
	139	exit_release_region:
	140	release_mem_region(pci_resource_start(hc_dev, 1),
	141	pci_resource_len(hc_dev, 1));
	142	exit_disable_device:
	143	pci_disable_device(hc_dev);
	144	return ret;
1da177e4 LT	145	}
	146
	147	static int zt5550_hc_cleanup(void)
	148	{
382a9c9a	149	if (!hc_dev)
1da177e4 LT	150	return -ENODEV;
	151
	152	iounmap(hc_registers);
	153	release_mem_region(pci_resource_start(hc_dev, 1),
	154	pci_resource_len(hc_dev, 1));
c8920f0c	155	pci_disable_device(hc_dev);
1da177e4 LT	156	return 0;
	157	}
	158
	159	static int zt5550_hc_query_enum(void)
	160	{
	161	u8 value;
	162
	163	value = inb_p(ENUM_PORT);
	164	return ((value & ENUM_MASK) == ENUM_MASK);
	165	}
	166
	167	static int zt5550_hc_check_irq(void *dev_id)
	168	{
	169	int ret;
	170	u8 reg;
	171
	172	ret = 0;
382a9c9a	173	if (dev_id == zt5550_hpc.dev_id) {
1da177e4	174	reg = readb(csr_int_status);
382a9c9a	175	if (reg)
1da177e4 LT	176	ret = 1;
	177	}
	178	return ret;
	179	}
	180
	181	static int zt5550_hc_enable_irq(void)
	182	{
	183	u8 reg;
	184
656f978f	185	if (hc_dev == NULL)
1da177e4	186	return -ENODEV;
656f978f	187
1da177e4 LT	188	reg = readb(csr_int_mask);
	189	reg = reg & ~ENUM_INT_MASK;
	190	writeb(reg, csr_int_mask);
	191	return 0;
	192	}
	193
	194	static int zt5550_hc_disable_irq(void)
	195	{
	196	u8 reg;
	197
656f978f	198	if (hc_dev == NULL)
1da177e4	199	return -ENODEV;
1da177e4 LT	200
	201	reg = readb(csr_int_mask);
	202	reg = reg \| ENUM_INT_MASK;
	203	writeb(reg, csr_int_mask);
	204	return 0;
	205	}
	206
ff3ce480	207	static int zt5550_hc_init_one(struct pci_dev pdev, const struct pci_device_id ent)
1da177e4 LT	208	{
	209	int status;
	210
	211	status = zt5550_hc_config(pdev);
656f978f	212	if (status != 0)
1da177e4	213	return status;
656f978f	214
1da177e4 LT	215	dbg("returned from zt5550_hc_config");
1da177e4 LT	216
ff3ce480	217	memset(&zt5550_hpc, 0, sizeof(struct cpci_hp_controller));
1da177e4 LT	218	zt5550_hpc_ops.query_enum = zt5550_hc_query_enum;
1da177e4 LT	219	zt5550_hpc.ops = &zt5550_hpc_ops;
382a9c9a	220	if (!poll) {
1da177e4	221	zt5550_hpc.irq = hc_dev->irq;
6b4486e2	222	zt5550_hpc.irq_flags = IRQF_SHARED;
1da177e4 LT	223	zt5550_hpc.dev_id = hc_dev;
	224
	225	zt5550_hpc_ops.enable_irq = zt5550_hc_enable_irq;
	226	zt5550_hpc_ops.disable_irq = zt5550_hc_disable_irq;
	227	zt5550_hpc_ops.check_irq = zt5550_hc_check_irq;
	228	} else {
	229	info("using ENUM# polling mode");
	230	}
	231
	232	status = cpci_hp_register_controller(&zt5550_hpc);
382a9c9a	233	if (status != 0) {
1da177e4 LT	234	err("could not register cPCI hotplug controller");
	235	goto init_hc_error;
	236	}
	237	dbg("registered controller");
	238
	239	/* Look for first device matching cPCI bus's bridge vendor and device IDs */
79e50e72 QL	240	bus0_dev = pci_get_device(PCI_VENDOR_ID_DEC,
	241	PCI_DEVICE_ID_DEC_21154, NULL);
	242	if (!bus0_dev) {
1da177e4 LT	243	status = -ENODEV;
	244	goto init_register_error;
	245	}
	246	bus0 = bus0_dev->subordinate;
	247	pci_dev_put(bus0_dev);
	248
	249	status = cpci_hp_register_bus(bus0, 0x0a, 0x0f);
382a9c9a	250	if (status != 0) {
1da177e4 LT	251	err("could not register cPCI hotplug bus");
	252	goto init_register_error;
	253	}
	254	dbg("registered bus");
	255
	256	status = cpci_hp_start();
382a9c9a	257	if (status != 0) {
1da177e4 LT	258	err("could not started cPCI hotplug system");
	259	cpci_hp_unregister_bus(bus0);
	260	goto init_register_error;
	261	}
	262	dbg("started cpci hp system");
	263
	264	return 0;
	265	init_register_error:
	266	cpci_hp_unregister_controller(&zt5550_hpc);
	267	init_hc_error:
	268	err("status = %d", status);
	269	zt5550_hc_cleanup();
	270	return status;
	271
	272	}
	273
15856ad5	274	static void zt5550_hc_remove_one(struct pci_dev *pdev)
1da177e4 LT	275	{
	276	cpci_hp_stop();
	277	cpci_hp_unregister_bus(bus0);
	278	cpci_hp_unregister_controller(&zt5550_hpc);
	279	zt5550_hc_cleanup();
	280	}
	281
	282
8394264d	283	static const struct pci_device_id zt5550_hc_pci_tbl[] = {
1da177e4 LT	284	{ PCI_VENDOR_ID_ZIATECH, PCI_DEVICE_ID_ZIATECH_5550_HC, PCI_ANY_ID, PCI_ANY_ID, },
	285	{ 0, }
	286	};
	287	MODULE_DEVICE_TABLE(pci, zt5550_hc_pci_tbl);
f7625980	288
1da177e4 LT	289	static struct pci_driver zt5550_hc_driver = {
	290	.name = "zt5550_hc",
	291	.id_table = zt5550_hc_pci_tbl,
	292	.probe = zt5550_hc_init_one,
15856ad5	293	.remove = zt5550_hc_remove_one,
1da177e4 LT	294	};
	295
	296	static int __init zt5550_init(void)
	297	{
3c78bc61	298	struct resource *r;
03555d59	299	int rc;
1da177e4 LT	300
	301	info(DRIVER_DESC " version: " DRIVER_VERSION);
	302	r = request_region(ENUM_PORT, 1, "#ENUM hotswap signal register");
382a9c9a	303	if (!r)
1da177e4 LT	304	return -EBUSY;
1da177e4 LT	305
03555d59	306	rc = pci_register_driver(&zt5550_hc_driver);
382a9c9a	307	if (rc < 0)
03555d59 SM	308	release_region(ENUM_PORT, 1);
03555d59 SM	309	return rc;
1da177e4 LT	310	}
	311
	312	static void __exit
	313	zt5550_exit(void)
	314	{
	315	pci_unregister_driver(&zt5550_hc_driver);
	316	release_region(ENUM_PORT, 1);
	317	}
	318
	319	module_init(zt5550_init);
	320	module_exit(zt5550_exit);
	321
	322	MODULE_AUTHOR(DRIVER_AUTHOR);
	323	MODULE_DESCRIPTION(DRIVER_DESC);
	324	MODULE_LICENSE("GPL");
	325	module_param(debug, bool, 0644);
	326	MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
	327	module_param(poll, bool, 0644);
	328	MODULE_PARM_DESC(poll, "#ENUM polling mode enabled or not");