[mirror_ubuntu-bionic-kernel.git] / drivers / pci / hotplug / pciehp.h

/*
 * PCI Express Hot Plug Controller Driver
 *
 * Copyright (C) 1995,2001 Compaq Computer Corporation
 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
 * Copyright (C) 2001 IBM Corp.
 * Copyright (C) 2003-2004 Intel Corporation
 *
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 * NON INFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
 *
 */
#ifndef _PCIEHP_H
#define _PCIEHP_H

#include <linux/types.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/sched.h>		/* signal_pending() */
#include <linux/pcieport_if.h>
#include "pci_hotplug.h"

#define MY_NAME	"pciehp"

extern int pciehp_poll_mode;
extern int pciehp_poll_time;
extern int pciehp_debug;
extern int pciehp_force;

/*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)

struct hotplug_params {
	u8 cache_line_size;
	u8 latency_timer;
	u8 enable_serr;
	u8 enable_perr;
};

struct slot {
	struct slot *next;
	u8 bus;
	u8 device;
	u32 number;
	u8 state;
	struct timer_list task_event;
	u8 hp_slot;
	struct controller *ctrl;
	struct hpc_ops *hpc_ops;
	struct hotplug_slot *hotplug_slot;
	struct list_head	slot_list;
};

struct event_info {
	u32 event_type;
	u8 hp_slot;
};

typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);

struct php_ctlr_state_s {
	struct php_ctlr_state_s *pnext;
	struct pci_dev *pci_dev;
	unsigned int irq;
	unsigned long flags;				/* spinlock's */
	u32 slot_device_offset;
	u32 num_slots;
    	struct timer_list	int_poll_timer;		/* Added for poll event */
	php_intr_callback_t 	attention_button_callback;
	php_intr_callback_t 	switch_change_callback;
	php_intr_callback_t 	presence_change_callback;
	php_intr_callback_t 	power_fault_callback;
	void 			*callback_instance_id;
	struct ctrl_reg 	*creg;				/* Ptr to controller register space */
};

#define MAX_EVENTS		10
struct controller {
	struct controller *next;
	struct semaphore crit_sect;	/* critical section semaphore */
	struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
	int num_slots;			/* Number of slots on ctlr */
	int slot_num_inc;		/* 1 or -1 */
	struct pci_dev *pci_dev;
	struct pci_bus *pci_bus;
	struct event_info event_queue[MAX_EVENTS];
	struct slot *slot;
	struct hpc_ops *hpc_ops;
	wait_queue_head_t queue;	/* sleep & wake process */
	u8 next_event;
	u8 bus;
	u8 device;
	u8 function;
	u8 slot_device_offset;
	u32 first_slot;		/* First physical slot number */  /* PCIE only has 1 slot */
	u8 slot_bus;		/* Bus where the slots handled by this controller sit */
	u8 ctrlcap;
	u16 vendor_id;
	u8 cap_base;
};

#define INT_BUTTON_IGNORE		0
#define INT_PRESENCE_ON			1
#define INT_PRESENCE_OFF		2
#define INT_SWITCH_CLOSE		3
#define INT_SWITCH_OPEN			4
#define INT_POWER_FAULT			5
#define INT_POWER_FAULT_CLEAR		6
#define INT_BUTTON_PRESS		7
#define INT_BUTTON_RELEASE		8
#define INT_BUTTON_CANCEL		9

#define STATIC_STATE			0
#define BLINKINGON_STATE		1
#define BLINKINGOFF_STATE		2
#define POWERON_STATE			3
#define POWEROFF_STATE			4

#define PCI_TO_PCI_BRIDGE_CLASS		0x00060400

/* Error messages */
#define INTERLOCK_OPEN			0x00000002
#define ADD_NOT_SUPPORTED		0x00000003
#define CARD_FUNCTIONING		0x00000005
#define ADAPTER_NOT_SAME		0x00000006
#define NO_ADAPTER_PRESENT		0x00000009
#define NOT_ENOUGH_RESOURCES		0x0000000B
#define DEVICE_TYPE_NOT_SUPPORTED	0x0000000C
#define WRONG_BUS_FREQUENCY		0x0000000D
#define POWER_FAILURE			0x0000000E

#define REMOVE_NOT_SUPPORTED		0x00000003

#define DISABLE_CARD			1

/* Field definitions in Slot Capabilities Register */
#define ATTN_BUTTN_PRSN	0x00000001
#define	PWR_CTRL_PRSN	0x00000002
#define MRL_SENS_PRSN	0x00000004
#define ATTN_LED_PRSN	0x00000008
#define PWR_LED_PRSN	0x00000010
#define HP_SUPR_RM_SUP	0x00000020

#define ATTN_BUTTN(cap)		(cap & ATTN_BUTTN_PRSN)
#define POWER_CTRL(cap)		(cap & PWR_CTRL_PRSN)
#define MRL_SENS(cap)		(cap & MRL_SENS_PRSN)
#define ATTN_LED(cap)		(cap & ATTN_LED_PRSN)
#define PWR_LED(cap)		(cap & PWR_LED_PRSN) 
#define HP_SUPR_RM(cap)		(cap & HP_SUPR_RM_SUP)

/*
 * error Messages
 */
#define msg_initialization_err	"Initialization failure, error=%d\n"
#define msg_button_on		"PCI slot #%d - powering on due to button press.\n"
#define msg_button_off		"PCI slot #%d - powering off due to button press.\n"
#define msg_button_cancel	"PCI slot #%d - action canceled due to button press.\n"
#define msg_button_ignore	"PCI slot #%d - button press ignored.  (action in progress...)\n"

/* controller functions */
extern int	pciehp_event_start_thread	(void);
extern void	pciehp_event_stop_thread	(void);
extern int	pciehp_enable_slot		(struct slot *slot);
extern int	pciehp_disable_slot		(struct slot *slot);

extern u8	pciehp_handle_attention_button	(u8 hp_slot, void *inst_id);
extern u8	pciehp_handle_switch_change	(u8 hp_slot, void *inst_id);
extern u8	pciehp_handle_presence_change	(u8 hp_slot, void *inst_id);
extern u8	pciehp_handle_power_fault	(u8 hp_slot, void *inst_id);
/* extern void	long_delay (int delay); */

/* pci functions */
extern int	pciehp_configure_device		(struct slot *p_slot);
extern int	pciehp_unconfigure_device	(struct slot *p_slot);
extern int	pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev);
extern void	pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
	       	struct hotplug_params *hpp);


/* Global variables */
extern struct controller *pciehp_ctrl_list;

/* Inline functions */

static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
{
	struct slot *p_slot, *tmp_slot = NULL;

	p_slot = ctrl->slot;

	while (p_slot && (p_slot->device != device)) {
		tmp_slot = p_slot;
		p_slot = p_slot->next;
	}
	if (p_slot == NULL) {
		err("ERROR: pciehp_find_slot device=0x%x\n", device);
		p_slot = tmp_slot;
	}

	return p_slot;
}

static inline int wait_for_ctrl_irq(struct controller *ctrl)
{
	int retval = 0;

	DECLARE_WAITQUEUE(wait, current);

	add_wait_queue(&ctrl->queue, &wait);
	if (!pciehp_poll_mode)
		/* Sleep for up to 1 second */
		msleep_interruptible(1000);
	else
		msleep_interruptible(2500);
	
	remove_wait_queue(&ctrl->queue, &wait);
	if (signal_pending(current))
		retval =  -EINTR;

	return retval;
}

#define SLOT_NAME_SIZE 10

static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
{
	snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number);
}

enum php_ctlr_type {
	PCI,
	ISA,
	ACPI
};

int pcie_init(struct controller *ctrl, struct pcie_device *dev);

/* This has no meaning for PCI Express, as there is only 1 slot per port */
int pcie_get_ctlr_slot_config(struct controller *ctrl,
		int *num_ctlr_slots,
		int *first_device_num,
		int *physical_slot_num,
		u8 *ctrlcap);

struct hpc_ops {
	int	(*power_on_slot)	(struct slot *slot);
	int	(*power_off_slot)	(struct slot *slot);
	int	(*get_power_status)	(struct slot *slot, u8 *status);
	int	(*get_attention_status)	(struct slot *slot, u8 *status);
	int	(*set_attention_status)	(struct slot *slot, u8 status);
	int	(*get_latch_status)	(struct slot *slot, u8 *status);
	int	(*get_adapter_status)	(struct slot *slot, u8 *status);

	int	(*get_max_bus_speed)	(struct slot *slot, enum pci_bus_speed *speed);
	int	(*get_cur_bus_speed)	(struct slot *slot, enum pci_bus_speed *speed);

	int	(*get_max_lnk_width)	(struct slot *slot, enum pcie_link_width *value);
	int	(*get_cur_lnk_width)	(struct slot *slot, enum pcie_link_width *value);
	
	int	(*query_power_fault)	(struct slot *slot);
	void	(*green_led_on)		(struct slot *slot);
	void	(*green_led_off)	(struct slot *slot);
	void	(*green_led_blink)	(struct slot *slot);
	void	(*release_ctlr)		(struct controller *ctrl);
	int	(*check_lnk_status)	(struct controller *ctrl);
};

#endif				/* _PCIEHP_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* PCI Express Hot Plug Controller Driver
	3	*
	4	* Copyright (C) 1995,2001 Compaq Computer Corporation
	5	* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
	6	* Copyright (C) 2001 IBM Corp.
	7	* Copyright (C) 2003-2004 Intel Corporation
	8	*
	9	* All rights reserved.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or (at
	14	* your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful, but
	17	* WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	19	* NON INFRINGEMENT. See the GNU General Public License for more
	20	* details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, write to the Free Software
	24	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	25	*
8cf4c195	26	* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
1da177e4 LT	27	*
	28	*/
	29	#ifndef _PCIEHP_H
	30	#define _PCIEHP_H
	31
	32	#include <linux/types.h>
	33	#include <linux/pci.h>
	34	#include <linux/delay.h>
de25968c	35	#include <linux/sched.h> /* signal_pending() */
1da177e4 LT	36	#include <linux/pcieport_if.h>
	37	#include "pci_hotplug.h"
	38
	39	#define MY_NAME "pciehp"
	40
	41	extern int pciehp_poll_mode;
	42	extern int pciehp_poll_time;
	43	extern int pciehp_debug;
a3a45ec8	44	extern int pciehp_force;
1da177e4 LT	45
	46	/#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)/
	47	#define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
	48	#define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
	49	#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
	50	#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
	51
a8a2be94 RS	52	struct hotplug_params {
	53	u8 cache_line_size;
	54	u8 latency_timer;
	55	u8 enable_serr;
	56	u8 enable_perr;
	57	};
	58
1da177e4 LT	59	struct slot {
	60	struct slot *next;
	61	u8 bus;
	62	u8 device;
	63	u32 number;
1da177e4	64	u8 state;
1da177e4 LT	65	struct timer_list task_event;
	66	u8 hp_slot;
	67	struct controller *ctrl;
	68	struct hpc_ops *hpc_ops;
	69	struct hotplug_slot *hotplug_slot;
	70	struct list_head slot_list;
	71	};
	72
1da177e4 LT	73	struct event_info {
	74	u32 event_type;
	75	u8 hp_slot;
	76	};
	77
ed6cbcf2 RS	78	typedef u8(php_intr_callback_t) (u8 hp_slot, void instance_id);
	79
	80	struct php_ctlr_state_s {
	81	struct php_ctlr_state_s *pnext;
	82	struct pci_dev *pci_dev;
	83	unsigned int irq;
	84	unsigned long flags; /* spinlock's */
	85	u32 slot_device_offset;
	86	u32 num_slots;
	87	struct timer_list int_poll_timer; /* Added for poll event */
	88	php_intr_callback_t attention_button_callback;
	89	php_intr_callback_t switch_change_callback;
	90	php_intr_callback_t presence_change_callback;
	91	php_intr_callback_t power_fault_callback;
	92	void *callback_instance_id;
	93	struct ctrl_reg creg; / Ptr to controller register space */
	94	};
	95
	96	#define MAX_EVENTS 10
1da177e4 LT	97	struct controller {
	98	struct controller *next;
	99	struct semaphore crit_sect; /* critical section semaphore */
ed6cbcf2	100	struct php_ctlr_state_s hpc_ctlr_handle; / HPC controller handle */
1da177e4 LT	101	int num_slots; /* Number of slots on ctlr */
1da177e4 LT	102	int slot_num_inc; /* 1 or -1 */
1da177e4 LT	103	struct pci_dev *pci_dev;
1da177e4 LT	104	struct pci_bus *pci_bus;
ed6cbcf2	105	struct event_info event_queue[MAX_EVENTS];
1da177e4 LT	106	struct slot *slot;
	107	struct hpc_ops *hpc_ops;
	108	wait_queue_head_t queue; /* sleep & wake process */
	109	u8 next_event;
1da177e4 LT	110	u8 bus;
	111	u8 device;
	112	u8 function;
1da177e4	113	u8 slot_device_offset;
1da177e4 LT	114	u32 first_slot; /* First physical slot number / / PCIE only has 1 slot */
	115	u8 slot_bus; /* Bus where the slots handled by this controller sit */
	116	u8 ctrlcap;
	117	u16 vendor_id;
8b245e45	118	u8 cap_base;
1da177e4 LT	119	};
1da177e4 LT	120
1da177e4 LT	121	#define INT_BUTTON_IGNORE 0
	122	#define INT_PRESENCE_ON 1
	123	#define INT_PRESENCE_OFF 2
	124	#define INT_SWITCH_CLOSE 3
	125	#define INT_SWITCH_OPEN 4
	126	#define INT_POWER_FAULT 5
	127	#define INT_POWER_FAULT_CLEAR 6
	128	#define INT_BUTTON_PRESS 7
	129	#define INT_BUTTON_RELEASE 8
	130	#define INT_BUTTON_CANCEL 9
	131
	132	#define STATIC_STATE 0
	133	#define BLINKINGON_STATE 1
	134	#define BLINKINGOFF_STATE 2
	135	#define POWERON_STATE 3
	136	#define POWEROFF_STATE 4
	137
	138	#define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
	139
	140	/* Error messages */
	141	#define INTERLOCK_OPEN 0x00000002
	142	#define ADD_NOT_SUPPORTED 0x00000003
	143	#define CARD_FUNCTIONING 0x00000005
	144	#define ADAPTER_NOT_SAME 0x00000006
	145	#define NO_ADAPTER_PRESENT 0x00000009
	146	#define NOT_ENOUGH_RESOURCES 0x0000000B
	147	#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
	148	#define WRONG_BUS_FREQUENCY 0x0000000D
	149	#define POWER_FAILURE 0x0000000E
	150
	151	#define REMOVE_NOT_SUPPORTED 0x00000003
	152
	153	#define DISABLE_CARD 1
	154
	155	/* Field definitions in Slot Capabilities Register */
	156	#define ATTN_BUTTN_PRSN 0x00000001
	157	#define PWR_CTRL_PRSN 0x00000002
	158	#define MRL_SENS_PRSN 0x00000004
	159	#define ATTN_LED_PRSN 0x00000008
	160	#define PWR_LED_PRSN 0x00000010
	161	#define HP_SUPR_RM_SUP 0x00000020
	162
	163	#define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN)
	164	#define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN)
	165	#define MRL_SENS(cap) (cap & MRL_SENS_PRSN)
	166	#define ATTN_LED(cap) (cap & ATTN_LED_PRSN)
	167	#define PWR_LED(cap) (cap & PWR_LED_PRSN)
	168	#define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP)
	169
	170	/*
	171	* error Messages
	172	*/
	173	#define msg_initialization_err "Initialization failure, error=%d\n"
1da177e4 LT	174	#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
	175	#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
	176	#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
	177	#define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
	178
	179	/* controller functions */
1da177e4 LT	180	extern int pciehp_event_start_thread (void);
1da177e4 LT	181	extern void pciehp_event_stop_thread (void);
1da177e4 LT	182	extern int pciehp_enable_slot (struct slot *slot);
	183	extern int pciehp_disable_slot (struct slot *slot);
	184
	185	extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id);
	186	extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id);
	187	extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
	188	extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
	189	/* extern void long_delay (int delay); */
	190
1da177e4	191	/* pci functions */
ca22a5e4 RS	192	extern int pciehp_configure_device (struct slot *p_slot);
ca22a5e4 RS	193	extern int pciehp_unconfigure_device (struct slot *p_slot);
6560aa5c RS	194	extern int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev);
6560aa5c RS	195	extern void pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
a8a2be94 RS	196	struct hotplug_params *hpp);
a8a2be94 RS	197
1da177e4 LT	198
	199
	200	/* Global variables */
	201	extern struct controller *pciehp_ctrl_list;
1da177e4 LT	202
	203	/* Inline functions */
	204
	205	static inline struct slot pciehp_find_slot(struct controller ctrl, u8 device)
	206	{
	207	struct slot p_slot, tmp_slot = NULL;
	208
	209	p_slot = ctrl->slot;
	210
1da177e4 LT	211	while (p_slot && (p_slot->device != device)) {
	212	tmp_slot = p_slot;
	213	p_slot = p_slot->next;
1da177e4 LT	214	}
	215	if (p_slot == NULL) {
	216	err("ERROR: pciehp_find_slot device=0x%x\n", device);
	217	p_slot = tmp_slot;
	218	}
	219
	220	return p_slot;
	221	}
	222
	223	static inline int wait_for_ctrl_irq(struct controller *ctrl)
	224	{
	225	int retval = 0;
	226
	227	DECLARE_WAITQUEUE(wait, current);
	228
1da177e4 LT	229	add_wait_queue(&ctrl->queue, &wait);
	230	if (!pciehp_poll_mode)
	231	/* Sleep for up to 1 second */
	232	msleep_interruptible(1000);
	233	else
	234	msleep_interruptible(2500);
	235
	236	remove_wait_queue(&ctrl->queue, &wait);
	237	if (signal_pending(current))
	238	retval = -EINTR;
	239
1da177e4 LT	240	return retval;
	241	}
	242
1da177e4 LT	243	#define SLOT_NAME_SIZE 10
	244
	245	static inline void make_slot_name(char buffer, int buffer_size, struct slot slot)
	246	{
1248d636	247	snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number);
1da177e4 LT	248	}
	249
	250	enum php_ctlr_type {
	251	PCI,
	252	ISA,
	253	ACPI
	254	};
	255
ed6cbcf2	256	int pcie_init(struct controller ctrl, struct pcie_device dev);
1da177e4 LT	257
	258	/* This has no meaning for PCI Express, as there is only 1 slot per port */
	259	int pcie_get_ctlr_slot_config(struct controller *ctrl,
	260	int *num_ctlr_slots,
	261	int *first_device_num,
	262	int *physical_slot_num,
	263	u8 *ctrlcap);
	264
	265	struct hpc_ops {
	266	int (power_on_slot) (struct slot slot);
	267	int (power_off_slot) (struct slot slot);
	268	int (get_power_status) (struct slot slot, u8 *status);
	269	int (get_attention_status) (struct slot slot, u8 *status);
	270	int (set_attention_status) (struct slot slot, u8 status);
	271	int (get_latch_status) (struct slot slot, u8 *status);
	272	int (get_adapter_status) (struct slot slot, u8 *status);
	273
	274	int (get_max_bus_speed) (struct slot slot, enum pci_bus_speed *speed);
	275	int (get_cur_bus_speed) (struct slot slot, enum pci_bus_speed *speed);
	276
	277	int (get_max_lnk_width) (struct slot slot, enum pcie_link_width *value);
	278	int (get_cur_lnk_width) (struct slot slot, enum pcie_link_width *value);
	279
	280	int (query_power_fault) (struct slot slot);
	281	void (green_led_on) (struct slot slot);
	282	void (green_led_off) (struct slot slot);
	283	void (green_led_blink) (struct slot slot);
	284	void (release_ctlr) (struct controller ctrl);
	285	int (check_lnk_status) (struct controller ctrl);
	286	};
	287
	288	#endif /* _PCIEHP_H */