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Commit | Line | Data |
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d1b054da YZ |
1 | /* |
2 | * drivers/pci/iov.c | |
3 | * | |
4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
5 | * | |
6 | * PCI Express I/O Virtualization (IOV) support. | |
7 | * Single Root IOV 1.0 | |
302b4215 | 8 | * Address Translation Service 1.0 |
d1b054da YZ |
9 | */ |
10 | ||
11 | #include <linux/pci.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
d1b054da | 13 | #include <linux/mutex.h> |
363c75db | 14 | #include <linux/export.h> |
d1b054da YZ |
15 | #include <linux/string.h> |
16 | #include <linux/delay.h> | |
5cdede24 | 17 | #include <linux/pci-ats.h> |
d1b054da YZ |
18 | #include "pci.h" |
19 | ||
dd7cc44d | 20 | #define VIRTFN_ID_LEN 16 |
d1b054da | 21 | |
b07579c0 | 22 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 23 | { |
b07579c0 WY |
24 | if (!dev->is_physfn) |
25 | return -EINVAL; | |
a28724b0 | 26 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 27 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
28 | } |
29 | ||
b07579c0 | 30 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 31 | { |
b07579c0 WY |
32 | if (!dev->is_physfn) |
33 | return -EINVAL; | |
a28724b0 | 34 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 35 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
36 | } |
37 | ||
f59dca27 WY |
38 | /* |
39 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
40 | * change when NumVFs changes. | |
41 | * | |
42 | * Update iov->offset and iov->stride when NumVFs is written. | |
43 | */ | |
44 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
45 | { | |
46 | struct pci_sriov *iov = dev->sriov; | |
47 | ||
48 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
49 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
50 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
51 | } | |
52 | ||
4449f079 WY |
53 | /* |
54 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
55 | * determine how many additional bus numbers will be consumed by VFs. | |
56 | * | |
ea9a8854 AD |
57 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
58 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 59 | */ |
ea9a8854 | 60 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
61 | { |
62 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 63 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 64 | |
ea9a8854 | 65 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 66 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
67 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
68 | rc = -EIO; | |
69 | goto out; | |
70 | } | |
71 | ||
b07579c0 | 72 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
73 | if (busnr > iov->max_VF_buses) |
74 | iov->max_VF_buses = busnr; | |
4449f079 WY |
75 | } |
76 | ||
ea9a8854 AD |
77 | out: |
78 | pci_iov_set_numvfs(dev, 0); | |
79 | return rc; | |
4449f079 WY |
80 | } |
81 | ||
dd7cc44d YZ |
82 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
83 | { | |
dd7cc44d YZ |
84 | struct pci_bus *child; |
85 | ||
86 | if (bus->number == busnr) | |
87 | return bus; | |
88 | ||
89 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
90 | if (child) | |
91 | return child; | |
92 | ||
93 | child = pci_add_new_bus(bus, NULL, busnr); | |
94 | if (!child) | |
95 | return NULL; | |
96 | ||
b7eac055 | 97 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
98 | |
99 | return child; | |
100 | } | |
101 | ||
dc087f2f | 102 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 103 | { |
dc087f2f JL |
104 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
105 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
106 | } |
107 | ||
0e6c9122 WY |
108 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
109 | { | |
110 | if (!dev->is_physfn) | |
111 | return 0; | |
112 | ||
113 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
114 | } | |
115 | ||
c194f7ea | 116 | int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset) |
dd7cc44d YZ |
117 | { |
118 | int i; | |
dc087f2f | 119 | int rc = -ENOMEM; |
dd7cc44d YZ |
120 | u64 size; |
121 | char buf[VIRTFN_ID_LEN]; | |
122 | struct pci_dev *virtfn; | |
123 | struct resource *res; | |
124 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 125 | struct pci_bus *bus; |
dd7cc44d | 126 | |
dd7cc44d | 127 | mutex_lock(&iov->dev->sriov->lock); |
b07579c0 | 128 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
129 | if (!bus) |
130 | goto failed; | |
131 | ||
132 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 133 | if (!virtfn) |
dc087f2f | 134 | goto failed0; |
dd7cc44d | 135 | |
b07579c0 | 136 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d YZ |
137 | virtfn->vendor = dev->vendor; |
138 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); | |
156c5532 PL |
139 | rc = pci_setup_device(virtfn); |
140 | if (rc) | |
141 | goto failed0; | |
142 | ||
dd7cc44d | 143 | virtfn->dev.parent = dev->dev.parent; |
fbf33f51 XH |
144 | virtfn->physfn = pci_dev_get(dev); |
145 | virtfn->is_virtfn = 1; | |
aa931977 | 146 | virtfn->multifunction = 0; |
dd7cc44d YZ |
147 | |
148 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 149 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
150 | if (!res->parent) |
151 | continue; | |
152 | virtfn->resource[i].name = pci_name(virtfn); | |
153 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 154 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
155 | virtfn->resource[i].start = res->start + size * id; |
156 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
157 | rc = request_resource(res, &virtfn->resource[i]); | |
158 | BUG_ON(rc); | |
159 | } | |
160 | ||
161 | if (reset) | |
8c1c699f | 162 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
163 | |
164 | pci_device_add(virtfn, virtfn->bus); | |
165 | mutex_unlock(&iov->dev->sriov->lock); | |
166 | ||
c893d133 | 167 | pci_bus_add_device(virtfn); |
dd7cc44d YZ |
168 | sprintf(buf, "virtfn%u", id); |
169 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
170 | if (rc) | |
171 | goto failed1; | |
172 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
173 | if (rc) | |
174 | goto failed2; | |
175 | ||
176 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
177 | ||
178 | return 0; | |
179 | ||
180 | failed2: | |
181 | sysfs_remove_link(&dev->dev.kobj, buf); | |
182 | failed1: | |
183 | pci_dev_put(dev); | |
184 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 185 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f JL |
186 | failed0: |
187 | virtfn_remove_bus(dev->bus, bus); | |
188 | failed: | |
dd7cc44d YZ |
189 | mutex_unlock(&iov->dev->sriov->lock); |
190 | ||
191 | return rc; | |
192 | } | |
193 | ||
c194f7ea | 194 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset) |
dd7cc44d YZ |
195 | { |
196 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d YZ |
197 | struct pci_dev *virtfn; |
198 | struct pci_sriov *iov = dev->sriov; | |
199 | ||
dc087f2f | 200 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
201 | pci_iov_virtfn_bus(dev, id), |
202 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
203 | if (!virtfn) |
204 | return; | |
205 | ||
dd7cc44d YZ |
206 | if (reset) { |
207 | device_release_driver(&virtfn->dev); | |
8c1c699f | 208 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
209 | } |
210 | ||
211 | sprintf(buf, "virtfn%u", id); | |
212 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
213 | /* |
214 | * pci_stop_dev() could have been called for this virtfn already, | |
215 | * so the directory for the virtfn may have been removed before. | |
216 | * Double check to avoid spurious sysfs warnings. | |
217 | */ | |
218 | if (virtfn->dev.kobj.sd) | |
219 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d YZ |
220 | |
221 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 222 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 223 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d YZ |
224 | mutex_unlock(&iov->dev->sriov->lock); |
225 | ||
dc087f2f JL |
226 | /* balance pci_get_domain_bus_and_slot() */ |
227 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
228 | pci_dev_put(dev); |
229 | } | |
230 | ||
995df527 WY |
231 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
232 | { | |
a39e3fcd AD |
233 | return 0; |
234 | } | |
235 | ||
236 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
237 | { | |
238 | return 0; | |
995df527 WY |
239 | } |
240 | ||
dd7cc44d YZ |
241 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
242 | { | |
243 | int rc; | |
3443c382 | 244 | int i; |
dd7cc44d | 245 | int nres; |
ce288ec3 | 246 | u16 initial; |
dd7cc44d YZ |
247 | struct resource *res; |
248 | struct pci_dev *pdev; | |
249 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 250 | int bars = 0; |
b07579c0 | 251 | int bus; |
dd7cc44d YZ |
252 | |
253 | if (!nr_virtfn) | |
254 | return 0; | |
255 | ||
6b136724 | 256 | if (iov->num_VFs) |
dd7cc44d YZ |
257 | return -EINVAL; |
258 | ||
259 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
260 | if (initial > iov->total_VFs || |
261 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
262 | return -EIO; |
263 | ||
6b136724 | 264 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
265 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
266 | return -EINVAL; | |
267 | ||
dd7cc44d YZ |
268 | nres = 0; |
269 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 270 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 271 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
272 | if (res->parent) |
273 | nres++; | |
274 | } | |
275 | if (nres != iov->nres) { | |
276 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | |
277 | return -ENOMEM; | |
278 | } | |
279 | ||
b07579c0 | 280 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa BH |
281 | if (bus > dev->bus->busn_res.end) { |
282 | dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", | |
283 | nr_virtfn, bus, &dev->bus->busn_res); | |
dd7cc44d YZ |
284 | return -ENOMEM; |
285 | } | |
286 | ||
bbef98ab RP |
287 | if (pci_enable_resources(dev, bars)) { |
288 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | |
289 | return -ENOMEM; | |
290 | } | |
291 | ||
dd7cc44d YZ |
292 | if (iov->link != dev->devfn) { |
293 | pdev = pci_get_slot(dev->bus, iov->link); | |
294 | if (!pdev) | |
295 | return -ENODEV; | |
296 | ||
dc087f2f JL |
297 | if (!pdev->is_physfn) { |
298 | pci_dev_put(pdev); | |
652d1100 | 299 | return -ENOSYS; |
dc087f2f | 300 | } |
dd7cc44d YZ |
301 | |
302 | rc = sysfs_create_link(&dev->dev.kobj, | |
303 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 304 | pci_dev_put(pdev); |
dd7cc44d YZ |
305 | if (rc) |
306 | return rc; | |
307 | } | |
308 | ||
6b136724 | 309 | iov->initial_VFs = initial; |
dd7cc44d YZ |
310 | if (nr_virtfn < initial) |
311 | initial = nr_virtfn; | |
312 | ||
c23b6135 AD |
313 | rc = pcibios_sriov_enable(dev, initial); |
314 | if (rc) { | |
315 | dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc); | |
316 | goto err_pcibios; | |
995df527 WY |
317 | } |
318 | ||
f40ec3c7 GS |
319 | pci_iov_set_numvfs(dev, nr_virtfn); |
320 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
321 | pci_cfg_access_lock(dev); | |
322 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
323 | msleep(100); | |
324 | pci_cfg_access_unlock(dev); | |
325 | ||
dd7cc44d | 326 | for (i = 0; i < initial; i++) { |
c194f7ea | 327 | rc = pci_iov_add_virtfn(dev, i, 0); |
dd7cc44d YZ |
328 | if (rc) |
329 | goto failed; | |
330 | } | |
331 | ||
332 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 333 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
334 | |
335 | return 0; | |
336 | ||
337 | failed: | |
3443c382 | 338 | while (i--) |
c194f7ea | 339 | pci_iov_remove_virtfn(dev, i, 0); |
dd7cc44d | 340 | |
c23b6135 AD |
341 | pcibios_sriov_disable(dev); |
342 | err_pcibios: | |
dd7cc44d | 343 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 344 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
345 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
346 | ssleep(1); | |
fb51ccbf | 347 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
348 | |
349 | if (iov->link != dev->devfn) | |
350 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
351 | ||
b3908644 | 352 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
353 | return rc; |
354 | } | |
355 | ||
356 | static void sriov_disable(struct pci_dev *dev) | |
357 | { | |
358 | int i; | |
359 | struct pci_sriov *iov = dev->sriov; | |
360 | ||
6b136724 | 361 | if (!iov->num_VFs) |
dd7cc44d YZ |
362 | return; |
363 | ||
6b136724 | 364 | for (i = 0; i < iov->num_VFs; i++) |
c194f7ea | 365 | pci_iov_remove_virtfn(dev, i, 0); |
dd7cc44d | 366 | |
995df527 WY |
367 | pcibios_sriov_disable(dev); |
368 | ||
dd7cc44d | 369 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 370 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
371 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
372 | ssleep(1); | |
fb51ccbf | 373 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
374 | |
375 | if (iov->link != dev->devfn) | |
376 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
377 | ||
6b136724 | 378 | iov->num_VFs = 0; |
f59dca27 | 379 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
380 | } |
381 | ||
d1b054da YZ |
382 | static int sriov_init(struct pci_dev *dev, int pos) |
383 | { | |
0e6c9122 | 384 | int i, bar64; |
d1b054da YZ |
385 | int rc; |
386 | int nres; | |
387 | u32 pgsz; | |
ea9a8854 | 388 | u16 ctrl, total; |
d1b054da YZ |
389 | struct pci_sriov *iov; |
390 | struct resource *res; | |
391 | struct pci_dev *pdev; | |
392 | ||
d1b054da YZ |
393 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
394 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
395 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
396 | ssleep(1); | |
397 | } | |
398 | ||
d1b054da YZ |
399 | ctrl = 0; |
400 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
401 | if (pdev->is_physfn) | |
402 | goto found; | |
403 | ||
404 | pdev = NULL; | |
405 | if (pci_ari_enabled(dev->bus)) | |
406 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
407 | ||
408 | found: | |
409 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 410 | |
ff45f9dd BS |
411 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
412 | if (!total) | |
413 | return 0; | |
d1b054da YZ |
414 | |
415 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
416 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
417 | pgsz &= ~((1 << i) - 1); | |
418 | if (!pgsz) | |
419 | return -EIO; | |
420 | ||
421 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 422 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 423 | |
0e6c9122 WY |
424 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
425 | if (!iov) | |
426 | return -ENOMEM; | |
427 | ||
d1b054da YZ |
428 | nres = 0; |
429 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 430 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
431 | /* |
432 | * If it is already FIXED, don't change it, something | |
433 | * (perhaps EA or header fixups) wants it this way. | |
434 | */ | |
435 | if (res->flags & IORESOURCE_PCI_FIXED) | |
436 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
437 | else | |
438 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
439 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
440 | if (!res->flags) |
441 | continue; | |
442 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
443 | rc = -EIO; | |
444 | goto failed; | |
445 | } | |
0e6c9122 | 446 | iov->barsz[i] = resource_size(res); |
d1b054da | 447 | res->end = res->start + resource_size(res) * total - 1; |
e88ae01d WY |
448 | dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
449 | i, res, i, total); | |
0e6c9122 | 450 | i += bar64; |
d1b054da YZ |
451 | nres++; |
452 | } | |
453 | ||
d1b054da YZ |
454 | iov->pos = pos; |
455 | iov->nres = nres; | |
456 | iov->ctrl = ctrl; | |
6b136724 | 457 | iov->total_VFs = total; |
d1b054da YZ |
458 | iov->pgsz = pgsz; |
459 | iov->self = dev; | |
460 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); | |
461 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 462 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 463 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
464 | |
465 | if (pdev) | |
466 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 467 | else |
d1b054da | 468 | iov->dev = dev; |
e277d2fc YZ |
469 | |
470 | mutex_init(&iov->lock); | |
d1b054da YZ |
471 | |
472 | dev->sriov = iov; | |
473 | dev->is_physfn = 1; | |
ea9a8854 AD |
474 | rc = compute_max_vf_buses(dev); |
475 | if (rc) | |
476 | goto fail_max_buses; | |
d1b054da YZ |
477 | |
478 | return 0; | |
479 | ||
ea9a8854 AD |
480 | fail_max_buses: |
481 | dev->sriov = NULL; | |
482 | dev->is_physfn = 0; | |
d1b054da YZ |
483 | failed: |
484 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 485 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
486 | res->flags = 0; |
487 | } | |
488 | ||
0e6c9122 | 489 | kfree(iov); |
d1b054da YZ |
490 | return rc; |
491 | } | |
492 | ||
493 | static void sriov_release(struct pci_dev *dev) | |
494 | { | |
6b136724 | 495 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 496 | |
e277d2fc | 497 | if (dev != dev->sriov->dev) |
d1b054da YZ |
498 | pci_dev_put(dev->sriov->dev); |
499 | ||
e277d2fc YZ |
500 | mutex_destroy(&dev->sriov->lock); |
501 | ||
d1b054da YZ |
502 | kfree(dev->sriov); |
503 | dev->sriov = NULL; | |
504 | } | |
505 | ||
8c5cdb6a YZ |
506 | static void sriov_restore_state(struct pci_dev *dev) |
507 | { | |
508 | int i; | |
509 | u16 ctrl; | |
510 | struct pci_sriov *iov = dev->sriov; | |
511 | ||
512 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
513 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
514 | return; | |
515 | ||
516 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) | |
517 | pci_update_resource(dev, i); | |
518 | ||
519 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 520 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
521 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
522 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
523 | msleep(100); | |
524 | } | |
525 | ||
d1b054da YZ |
526 | /** |
527 | * pci_iov_init - initialize the IOV capability | |
528 | * @dev: the PCI device | |
529 | * | |
530 | * Returns 0 on success, or negative on failure. | |
531 | */ | |
532 | int pci_iov_init(struct pci_dev *dev) | |
533 | { | |
534 | int pos; | |
535 | ||
5f4d91a1 | 536 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
537 | return -ENODEV; |
538 | ||
539 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
540 | if (pos) | |
541 | return sriov_init(dev, pos); | |
542 | ||
543 | return -ENODEV; | |
544 | } | |
545 | ||
546 | /** | |
547 | * pci_iov_release - release resources used by the IOV capability | |
548 | * @dev: the PCI device | |
549 | */ | |
550 | void pci_iov_release(struct pci_dev *dev) | |
551 | { | |
552 | if (dev->is_physfn) | |
553 | sriov_release(dev); | |
554 | } | |
555 | ||
6ffa2489 BH |
556 | /** |
557 | * pci_iov_update_resource - update a VF BAR | |
558 | * @dev: the PCI device | |
559 | * @resno: the resource number | |
560 | * | |
561 | * Update a VF BAR in the SR-IOV capability of a PF. | |
562 | */ | |
563 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
564 | { | |
565 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
566 | struct resource *res = dev->resource + resno; | |
567 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
568 | struct pci_bus_region region; | |
546ba9f8 | 569 | u16 cmd; |
6ffa2489 BH |
570 | u32 new; |
571 | int reg; | |
572 | ||
573 | /* | |
574 | * The generic pci_restore_bars() path calls this for all devices, | |
575 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
576 | * have nothing to do. | |
577 | */ | |
578 | if (!iov) | |
579 | return; | |
580 | ||
546ba9f8 BH |
581 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
582 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
583 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
584 | vf_bar, res); | |
585 | return; | |
586 | } | |
587 | ||
6ffa2489 BH |
588 | /* |
589 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
590 | * BARs, and non-movable resources, e.g., those described via | |
591 | * Enhanced Allocation. | |
592 | */ | |
593 | if (!res->flags) | |
594 | return; | |
595 | ||
596 | if (res->flags & IORESOURCE_UNSET) | |
597 | return; | |
598 | ||
599 | if (res->flags & IORESOURCE_PCI_FIXED) | |
600 | return; | |
601 | ||
602 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
603 | new = region.start; | |
604 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
605 | ||
606 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
607 | pci_write_config_dword(dev, reg, new); | |
608 | if (res->flags & IORESOURCE_MEM_64) { | |
609 | new = region.start >> 16 >> 16; | |
610 | pci_write_config_dword(dev, reg + 4, new); | |
611 | } | |
612 | } | |
613 | ||
978d2d68 WY |
614 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
615 | int resno) | |
616 | { | |
617 | return pci_iov_resource_size(dev, resno); | |
618 | } | |
619 | ||
6faf17f6 CW |
620 | /** |
621 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
622 | * @dev: the PCI device | |
623 | * @resno: the resource number | |
624 | * | |
625 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
626 | * This is not the same as the resource size which is defined as | |
627 | * the VF BAR size multiplied by the number of VFs. The alignment | |
628 | * is just the VF BAR size. | |
629 | */ | |
0e52247a | 630 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 631 | { |
978d2d68 | 632 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
633 | } |
634 | ||
8c5cdb6a YZ |
635 | /** |
636 | * pci_restore_iov_state - restore the state of the IOV capability | |
637 | * @dev: the PCI device | |
638 | */ | |
639 | void pci_restore_iov_state(struct pci_dev *dev) | |
640 | { | |
641 | if (dev->is_physfn) | |
642 | sriov_restore_state(dev); | |
643 | } | |
a28724b0 YZ |
644 | |
645 | /** | |
646 | * pci_iov_bus_range - find bus range used by Virtual Function | |
647 | * @bus: the PCI bus | |
648 | * | |
649 | * Returns max number of buses (exclude current one) used by Virtual | |
650 | * Functions. | |
651 | */ | |
652 | int pci_iov_bus_range(struct pci_bus *bus) | |
653 | { | |
654 | int max = 0; | |
a28724b0 YZ |
655 | struct pci_dev *dev; |
656 | ||
657 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
658 | if (!dev->is_physfn) | |
659 | continue; | |
4449f079 WY |
660 | if (dev->sriov->max_VF_buses > max) |
661 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
662 | } |
663 | ||
664 | return max ? max - bus->number : 0; | |
665 | } | |
dd7cc44d YZ |
666 | |
667 | /** | |
668 | * pci_enable_sriov - enable the SR-IOV capability | |
669 | * @dev: the PCI device | |
52a8873b | 670 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
671 | * |
672 | * Returns 0 on success, or negative on failure. | |
673 | */ | |
674 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
675 | { | |
676 | might_sleep(); | |
677 | ||
678 | if (!dev->is_physfn) | |
652d1100 | 679 | return -ENOSYS; |
dd7cc44d YZ |
680 | |
681 | return sriov_enable(dev, nr_virtfn); | |
682 | } | |
683 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
684 | ||
685 | /** | |
686 | * pci_disable_sriov - disable the SR-IOV capability | |
687 | * @dev: the PCI device | |
688 | */ | |
689 | void pci_disable_sriov(struct pci_dev *dev) | |
690 | { | |
691 | might_sleep(); | |
692 | ||
693 | if (!dev->is_physfn) | |
694 | return; | |
695 | ||
696 | sriov_disable(dev); | |
697 | } | |
698 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 699 | |
fb8a0d9d WM |
700 | /** |
701 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
702 | * @dev: the PCI device | |
703 | * | |
704 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
705 | */ | |
706 | int pci_num_vf(struct pci_dev *dev) | |
707 | { | |
1452cd76 | 708 | if (!dev->is_physfn) |
fb8a0d9d | 709 | return 0; |
1452cd76 BH |
710 | |
711 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
712 | } |
713 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 714 | |
5a8eb242 AD |
715 | /** |
716 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
717 | * @dev: the PCI device | |
718 | * | |
719 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 720 | * If device is not a physical function returns 0. |
5a8eb242 AD |
721 | */ |
722 | int pci_vfs_assigned(struct pci_dev *dev) | |
723 | { | |
724 | struct pci_dev *vfdev; | |
725 | unsigned int vfs_assigned = 0; | |
726 | unsigned short dev_id; | |
727 | ||
728 | /* only search if we are a PF */ | |
729 | if (!dev->is_physfn) | |
730 | return 0; | |
731 | ||
732 | /* | |
733 | * determine the device ID for the VFs, the vendor ID will be the | |
734 | * same as the PF so there is no need to check for that one | |
735 | */ | |
736 | pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id); | |
737 | ||
738 | /* loop through all the VFs to see if we own any that are assigned */ | |
739 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
740 | while (vfdev) { | |
741 | /* | |
742 | * It is considered assigned if it is a virtual function with | |
743 | * our dev as the physical function and the assigned bit is set | |
744 | */ | |
745 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 746 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
747 | vfs_assigned++; |
748 | ||
749 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
750 | } | |
751 | ||
752 | return vfs_assigned; | |
753 | } | |
754 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
755 | ||
bff73156 DD |
756 | /** |
757 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
758 | * @dev: the PCI PF device | |
2094f167 | 759 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
760 | * |
761 | * Should be called from PF driver's probe routine with | |
762 | * device's mutex held. | |
763 | * | |
764 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
765 | * value of numvfs valid. If not a PF return -ENOSYS; |
766 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
767 | * if VFs already enabled, return -EBUSY. |
768 | */ | |
769 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
770 | { | |
652d1100 SA |
771 | if (!dev->is_physfn) |
772 | return -ENOSYS; | |
773 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
774 | return -EINVAL; |
775 | ||
776 | /* Shouldn't change if VFs already enabled */ | |
777 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
778 | return -EBUSY; | |
779 | else | |
6b136724 | 780 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
781 | |
782 | return 0; | |
783 | } | |
784 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
785 | ||
786 | /** | |
ddc191f5 | 787 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
788 | * @dev: the PCI PF device |
789 | * | |
790 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 791 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 792 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
793 | */ |
794 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
795 | { | |
1452cd76 | 796 | if (!dev->is_physfn) |
652d1100 | 797 | return 0; |
bff73156 | 798 | |
6b136724 BH |
799 | if (dev->sriov->driver_max_VFs) |
800 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
801 | |
802 | return dev->sriov->total_VFs; | |
bff73156 DD |
803 | } |
804 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |