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7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
d1b054da | 2 | /* |
df62ab5e | 3 | * PCI Express I/O Virtualization (IOV) support |
d1b054da | 4 | * Single Root IOV 1.0 |
302b4215 | 5 | * Address Translation Service 1.0 |
df62ab5e BH |
6 | * |
7 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
d1b054da YZ |
8 | */ |
9 | ||
10 | #include <linux/pci.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
363c75db | 12 | #include <linux/export.h> |
d1b054da YZ |
13 | #include <linux/string.h> |
14 | #include <linux/delay.h> | |
15 | #include "pci.h" | |
16 | ||
dd7cc44d | 17 | #define VIRTFN_ID_LEN 16 |
d1b054da | 18 | |
b07579c0 | 19 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 20 | { |
b07579c0 WY |
21 | if (!dev->is_physfn) |
22 | return -EINVAL; | |
a28724b0 | 23 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 24 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
25 | } |
26 | ||
b07579c0 | 27 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 28 | { |
b07579c0 WY |
29 | if (!dev->is_physfn) |
30 | return -EINVAL; | |
a28724b0 | 31 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 32 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
33 | } |
34 | ||
f59dca27 WY |
35 | /* |
36 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
37 | * change when NumVFs changes. | |
38 | * | |
39 | * Update iov->offset and iov->stride when NumVFs is written. | |
40 | */ | |
41 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
42 | { | |
43 | struct pci_sriov *iov = dev->sriov; | |
44 | ||
45 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
46 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
47 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
48 | } | |
49 | ||
4449f079 WY |
50 | /* |
51 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
52 | * determine how many additional bus numbers will be consumed by VFs. | |
53 | * | |
ea9a8854 AD |
54 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
55 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 56 | */ |
ea9a8854 | 57 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
58 | { |
59 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 60 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 61 | |
ea9a8854 | 62 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 63 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
64 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
65 | rc = -EIO; | |
66 | goto out; | |
67 | } | |
68 | ||
b07579c0 | 69 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
70 | if (busnr > iov->max_VF_buses) |
71 | iov->max_VF_buses = busnr; | |
4449f079 WY |
72 | } |
73 | ||
ea9a8854 AD |
74 | out: |
75 | pci_iov_set_numvfs(dev, 0); | |
76 | return rc; | |
4449f079 WY |
77 | } |
78 | ||
dd7cc44d YZ |
79 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
80 | { | |
dd7cc44d YZ |
81 | struct pci_bus *child; |
82 | ||
83 | if (bus->number == busnr) | |
84 | return bus; | |
85 | ||
86 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
87 | if (child) | |
88 | return child; | |
89 | ||
90 | child = pci_add_new_bus(bus, NULL, busnr); | |
91 | if (!child) | |
92 | return NULL; | |
93 | ||
b7eac055 | 94 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
95 | |
96 | return child; | |
97 | } | |
98 | ||
dc087f2f | 99 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 100 | { |
dc087f2f JL |
101 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
102 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
103 | } |
104 | ||
0e6c9122 WY |
105 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
106 | { | |
107 | if (!dev->is_physfn) | |
108 | return 0; | |
109 | ||
110 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
111 | } | |
112 | ||
cf0921be KA |
113 | static void pci_read_vf_config_common(struct pci_dev *virtfn) |
114 | { | |
115 | struct pci_dev *physfn = virtfn->physfn; | |
116 | ||
117 | /* | |
118 | * Some config registers are the same across all associated VFs. | |
119 | * Read them once from VF0 so we can skip reading them from the | |
120 | * other VFs. | |
121 | * | |
122 | * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to | |
123 | * have the same Revision ID and Subsystem ID, but we assume they | |
124 | * do. | |
125 | */ | |
126 | pci_read_config_dword(virtfn, PCI_CLASS_REVISION, | |
127 | &physfn->sriov->class); | |
128 | pci_read_config_byte(virtfn, PCI_HEADER_TYPE, | |
129 | &physfn->sriov->hdr_type); | |
130 | pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID, | |
131 | &physfn->sriov->subsystem_vendor); | |
132 | pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID, | |
133 | &physfn->sriov->subsystem_device); | |
134 | } | |
135 | ||
753f6124 | 136 | int pci_iov_add_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
137 | { |
138 | int i; | |
dc087f2f | 139 | int rc = -ENOMEM; |
dd7cc44d YZ |
140 | u64 size; |
141 | char buf[VIRTFN_ID_LEN]; | |
142 | struct pci_dev *virtfn; | |
143 | struct resource *res; | |
144 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 145 | struct pci_bus *bus; |
dd7cc44d | 146 | |
b07579c0 | 147 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
148 | if (!bus) |
149 | goto failed; | |
150 | ||
151 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 152 | if (!virtfn) |
dc087f2f | 153 | goto failed0; |
dd7cc44d | 154 | |
b07579c0 | 155 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d | 156 | virtfn->vendor = dev->vendor; |
3142d832 | 157 | virtfn->device = iov->vf_device; |
cf0921be KA |
158 | virtfn->is_virtfn = 1; |
159 | virtfn->physfn = pci_dev_get(dev); | |
160 | ||
161 | if (id == 0) | |
162 | pci_read_vf_config_common(virtfn); | |
163 | ||
156c5532 PL |
164 | rc = pci_setup_device(virtfn); |
165 | if (rc) | |
cf0921be | 166 | goto failed1; |
156c5532 | 167 | |
dd7cc44d | 168 | virtfn->dev.parent = dev->dev.parent; |
aa931977 | 169 | virtfn->multifunction = 0; |
dd7cc44d YZ |
170 | |
171 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 172 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
173 | if (!res->parent) |
174 | continue; | |
175 | virtfn->resource[i].name = pci_name(virtfn); | |
176 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 177 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
178 | virtfn->resource[i].start = res->start + size * id; |
179 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
180 | rc = request_resource(res, &virtfn->resource[i]); | |
181 | BUG_ON(rc); | |
182 | } | |
183 | ||
dd7cc44d | 184 | pci_device_add(virtfn, virtfn->bus); |
dd7cc44d | 185 | |
dd7cc44d YZ |
186 | sprintf(buf, "virtfn%u", id); |
187 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
188 | if (rc) | |
8c386cc8 | 189 | goto failed1; |
dd7cc44d YZ |
190 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); |
191 | if (rc) | |
8c386cc8 | 192 | goto failed2; |
dd7cc44d YZ |
193 | |
194 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
195 | ||
27d61629 SH |
196 | pci_bus_add_device(virtfn); |
197 | ||
dd7cc44d YZ |
198 | return 0; |
199 | ||
cf0921be | 200 | failed2: |
8c386cc8 | 201 | sysfs_remove_link(&dev->dev.kobj, buf); |
dd7cc44d | 202 | failed1: |
8c386cc8 | 203 | pci_stop_and_remove_bus_device(virtfn); |
dd7cc44d | 204 | pci_dev_put(dev); |
dc087f2f JL |
205 | failed0: |
206 | virtfn_remove_bus(dev->bus, bus); | |
207 | failed: | |
dd7cc44d YZ |
208 | |
209 | return rc; | |
210 | } | |
211 | ||
753f6124 | 212 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
213 | { |
214 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d | 215 | struct pci_dev *virtfn; |
dd7cc44d | 216 | |
dc087f2f | 217 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
218 | pci_iov_virtfn_bus(dev, id), |
219 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
220 | if (!virtfn) |
221 | return; | |
222 | ||
dd7cc44d YZ |
223 | sprintf(buf, "virtfn%u", id); |
224 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
225 | /* |
226 | * pci_stop_dev() could have been called for this virtfn already, | |
227 | * so the directory for the virtfn may have been removed before. | |
228 | * Double check to avoid spurious sysfs warnings. | |
229 | */ | |
230 | if (virtfn->dev.kobj.sd) | |
231 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d | 232 | |
210647af | 233 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 234 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d | 235 | |
dc087f2f JL |
236 | /* balance pci_get_domain_bus_and_slot() */ |
237 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
238 | pci_dev_put(dev); |
239 | } | |
240 | ||
aaee0c1f KS |
241 | static ssize_t sriov_totalvfs_show(struct device *dev, |
242 | struct device_attribute *attr, | |
243 | char *buf) | |
244 | { | |
245 | struct pci_dev *pdev = to_pci_dev(dev); | |
246 | ||
247 | return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); | |
248 | } | |
249 | ||
250 | static ssize_t sriov_numvfs_show(struct device *dev, | |
251 | struct device_attribute *attr, | |
252 | char *buf) | |
253 | { | |
254 | struct pci_dev *pdev = to_pci_dev(dev); | |
35ff867b | 255 | u16 num_vfs; |
aaee0c1f | 256 | |
35ff867b PC |
257 | /* Serialize vs sriov_numvfs_store() so readers see valid num_VFs */ |
258 | device_lock(&pdev->dev); | |
259 | num_vfs = pdev->sriov->num_VFs; | |
260 | device_unlock(&pdev->dev); | |
261 | ||
262 | return sprintf(buf, "%u\n", num_vfs); | |
aaee0c1f KS |
263 | } |
264 | ||
265 | /* | |
266 | * num_vfs > 0; number of VFs to enable | |
267 | * num_vfs = 0; disable all VFs | |
268 | * | |
269 | * Note: SRIOV spec does not allow partial VF | |
270 | * disable, so it's all or none. | |
271 | */ | |
272 | static ssize_t sriov_numvfs_store(struct device *dev, | |
273 | struct device_attribute *attr, | |
274 | const char *buf, size_t count) | |
275 | { | |
276 | struct pci_dev *pdev = to_pci_dev(dev); | |
277 | int ret; | |
278 | u16 num_vfs; | |
279 | ||
280 | ret = kstrtou16(buf, 0, &num_vfs); | |
281 | if (ret < 0) | |
282 | return ret; | |
283 | ||
284 | if (num_vfs > pci_sriov_get_totalvfs(pdev)) | |
285 | return -ERANGE; | |
286 | ||
287 | device_lock(&pdev->dev); | |
288 | ||
289 | if (num_vfs == pdev->sriov->num_VFs) | |
290 | goto exit; | |
291 | ||
292 | /* is PF driver loaded w/callback */ | |
293 | if (!pdev->driver || !pdev->driver->sriov_configure) { | |
294 | pci_info(pdev, "Driver does not support SRIOV configuration via sysfs\n"); | |
295 | ret = -ENOENT; | |
296 | goto exit; | |
297 | } | |
298 | ||
299 | if (num_vfs == 0) { | |
300 | /* disable VFs */ | |
301 | ret = pdev->driver->sriov_configure(pdev, 0); | |
302 | goto exit; | |
303 | } | |
304 | ||
305 | /* enable VFs */ | |
306 | if (pdev->sriov->num_VFs) { | |
307 | pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n", | |
308 | pdev->sriov->num_VFs, num_vfs); | |
309 | ret = -EBUSY; | |
310 | goto exit; | |
311 | } | |
312 | ||
313 | ret = pdev->driver->sriov_configure(pdev, num_vfs); | |
314 | if (ret < 0) | |
315 | goto exit; | |
316 | ||
317 | if (ret != num_vfs) | |
318 | pci_warn(pdev, "%d VFs requested; only %d enabled\n", | |
319 | num_vfs, ret); | |
320 | ||
321 | exit: | |
322 | device_unlock(&pdev->dev); | |
323 | ||
324 | if (ret < 0) | |
325 | return ret; | |
326 | ||
327 | return count; | |
328 | } | |
329 | ||
330 | static ssize_t sriov_offset_show(struct device *dev, | |
331 | struct device_attribute *attr, | |
332 | char *buf) | |
333 | { | |
334 | struct pci_dev *pdev = to_pci_dev(dev); | |
335 | ||
336 | return sprintf(buf, "%u\n", pdev->sriov->offset); | |
337 | } | |
338 | ||
339 | static ssize_t sriov_stride_show(struct device *dev, | |
340 | struct device_attribute *attr, | |
341 | char *buf) | |
342 | { | |
343 | struct pci_dev *pdev = to_pci_dev(dev); | |
344 | ||
345 | return sprintf(buf, "%u\n", pdev->sriov->stride); | |
346 | } | |
347 | ||
348 | static ssize_t sriov_vf_device_show(struct device *dev, | |
349 | struct device_attribute *attr, | |
350 | char *buf) | |
351 | { | |
352 | struct pci_dev *pdev = to_pci_dev(dev); | |
353 | ||
354 | return sprintf(buf, "%x\n", pdev->sriov->vf_device); | |
355 | } | |
356 | ||
357 | static ssize_t sriov_drivers_autoprobe_show(struct device *dev, | |
358 | struct device_attribute *attr, | |
359 | char *buf) | |
360 | { | |
361 | struct pci_dev *pdev = to_pci_dev(dev); | |
362 | ||
363 | return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe); | |
364 | } | |
365 | ||
366 | static ssize_t sriov_drivers_autoprobe_store(struct device *dev, | |
367 | struct device_attribute *attr, | |
368 | const char *buf, size_t count) | |
369 | { | |
370 | struct pci_dev *pdev = to_pci_dev(dev); | |
371 | bool drivers_autoprobe; | |
372 | ||
373 | if (kstrtobool(buf, &drivers_autoprobe) < 0) | |
374 | return -EINVAL; | |
375 | ||
376 | pdev->sriov->drivers_autoprobe = drivers_autoprobe; | |
377 | ||
378 | return count; | |
379 | } | |
380 | ||
381 | static DEVICE_ATTR_RO(sriov_totalvfs); | |
244c06c3 | 382 | static DEVICE_ATTR_RW(sriov_numvfs); |
aaee0c1f KS |
383 | static DEVICE_ATTR_RO(sriov_offset); |
384 | static DEVICE_ATTR_RO(sriov_stride); | |
385 | static DEVICE_ATTR_RO(sriov_vf_device); | |
244c06c3 | 386 | static DEVICE_ATTR_RW(sriov_drivers_autoprobe); |
aaee0c1f KS |
387 | |
388 | static struct attribute *sriov_dev_attrs[] = { | |
389 | &dev_attr_sriov_totalvfs.attr, | |
390 | &dev_attr_sriov_numvfs.attr, | |
391 | &dev_attr_sriov_offset.attr, | |
392 | &dev_attr_sriov_stride.attr, | |
393 | &dev_attr_sriov_vf_device.attr, | |
394 | &dev_attr_sriov_drivers_autoprobe.attr, | |
395 | NULL, | |
396 | }; | |
397 | ||
398 | static umode_t sriov_attrs_are_visible(struct kobject *kobj, | |
399 | struct attribute *a, int n) | |
400 | { | |
401 | struct device *dev = kobj_to_dev(kobj); | |
402 | ||
403 | if (!dev_is_pf(dev)) | |
404 | return 0; | |
405 | ||
406 | return a->mode; | |
407 | } | |
408 | ||
409 | const struct attribute_group sriov_dev_attr_group = { | |
410 | .attrs = sriov_dev_attrs, | |
411 | .is_visible = sriov_attrs_are_visible, | |
412 | }; | |
413 | ||
995df527 WY |
414 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
415 | { | |
a39e3fcd AD |
416 | return 0; |
417 | } | |
418 | ||
419 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
420 | { | |
421 | return 0; | |
995df527 WY |
422 | } |
423 | ||
18f9e9d1 SO |
424 | static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs) |
425 | { | |
426 | unsigned int i; | |
427 | int rc; | |
428 | ||
aff68a5a SO |
429 | if (dev->no_vf_scan) |
430 | return 0; | |
431 | ||
18f9e9d1 SO |
432 | for (i = 0; i < num_vfs; i++) { |
433 | rc = pci_iov_add_virtfn(dev, i); | |
434 | if (rc) | |
435 | goto failed; | |
436 | } | |
437 | return 0; | |
438 | failed: | |
439 | while (i--) | |
440 | pci_iov_remove_virtfn(dev, i); | |
441 | ||
442 | return rc; | |
443 | } | |
444 | ||
dd7cc44d YZ |
445 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
446 | { | |
447 | int rc; | |
3443c382 | 448 | int i; |
dd7cc44d | 449 | int nres; |
ce288ec3 | 450 | u16 initial; |
dd7cc44d YZ |
451 | struct resource *res; |
452 | struct pci_dev *pdev; | |
453 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 454 | int bars = 0; |
b07579c0 | 455 | int bus; |
dd7cc44d YZ |
456 | |
457 | if (!nr_virtfn) | |
458 | return 0; | |
459 | ||
6b136724 | 460 | if (iov->num_VFs) |
dd7cc44d YZ |
461 | return -EINVAL; |
462 | ||
463 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
464 | if (initial > iov->total_VFs || |
465 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
466 | return -EIO; |
467 | ||
6b136724 | 468 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
469 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
470 | return -EINVAL; | |
471 | ||
dd7cc44d YZ |
472 | nres = 0; |
473 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 474 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 475 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
476 | if (res->parent) |
477 | nres++; | |
478 | } | |
479 | if (nres != iov->nres) { | |
7506dc79 | 480 | pci_err(dev, "not enough MMIO resources for SR-IOV\n"); |
dd7cc44d YZ |
481 | return -ENOMEM; |
482 | } | |
483 | ||
b07579c0 | 484 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa | 485 | if (bus > dev->bus->busn_res.end) { |
7506dc79 | 486 | pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", |
68f8e9fa | 487 | nr_virtfn, bus, &dev->bus->busn_res); |
dd7cc44d YZ |
488 | return -ENOMEM; |
489 | } | |
490 | ||
bbef98ab | 491 | if (pci_enable_resources(dev, bars)) { |
7506dc79 | 492 | pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); |
bbef98ab RP |
493 | return -ENOMEM; |
494 | } | |
495 | ||
dd7cc44d YZ |
496 | if (iov->link != dev->devfn) { |
497 | pdev = pci_get_slot(dev->bus, iov->link); | |
498 | if (!pdev) | |
499 | return -ENODEV; | |
500 | ||
dc087f2f JL |
501 | if (!pdev->is_physfn) { |
502 | pci_dev_put(pdev); | |
652d1100 | 503 | return -ENOSYS; |
dc087f2f | 504 | } |
dd7cc44d YZ |
505 | |
506 | rc = sysfs_create_link(&dev->dev.kobj, | |
507 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 508 | pci_dev_put(pdev); |
dd7cc44d YZ |
509 | if (rc) |
510 | return rc; | |
511 | } | |
512 | ||
6b136724 | 513 | iov->initial_VFs = initial; |
dd7cc44d YZ |
514 | if (nr_virtfn < initial) |
515 | initial = nr_virtfn; | |
516 | ||
c23b6135 AD |
517 | rc = pcibios_sriov_enable(dev, initial); |
518 | if (rc) { | |
7506dc79 | 519 | pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); |
c23b6135 | 520 | goto err_pcibios; |
995df527 WY |
521 | } |
522 | ||
f40ec3c7 GS |
523 | pci_iov_set_numvfs(dev, nr_virtfn); |
524 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
525 | pci_cfg_access_lock(dev); | |
526 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
527 | msleep(100); | |
528 | pci_cfg_access_unlock(dev); | |
529 | ||
18f9e9d1 SO |
530 | rc = sriov_add_vfs(dev, initial); |
531 | if (rc) | |
532 | goto err_pcibios; | |
dd7cc44d YZ |
533 | |
534 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 535 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
536 | |
537 | return 0; | |
538 | ||
c23b6135 | 539 | err_pcibios: |
dd7cc44d | 540 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 541 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
542 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
543 | ssleep(1); | |
fb51ccbf | 544 | pci_cfg_access_unlock(dev); |
dd7cc44d | 545 | |
0fc690a7 GS |
546 | pcibios_sriov_disable(dev); |
547 | ||
dd7cc44d YZ |
548 | if (iov->link != dev->devfn) |
549 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
550 | ||
b3908644 | 551 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
552 | return rc; |
553 | } | |
554 | ||
18f9e9d1 | 555 | static void sriov_del_vfs(struct pci_dev *dev) |
dd7cc44d | 556 | { |
18f9e9d1 | 557 | struct pci_sriov *iov = dev->sriov; |
dd7cc44d | 558 | int i; |
18f9e9d1 | 559 | |
aff68a5a SO |
560 | if (dev->no_vf_scan) |
561 | return; | |
562 | ||
18f9e9d1 SO |
563 | for (i = 0; i < iov->num_VFs; i++) |
564 | pci_iov_remove_virtfn(dev, i); | |
565 | } | |
566 | ||
567 | static void sriov_disable(struct pci_dev *dev) | |
568 | { | |
dd7cc44d YZ |
569 | struct pci_sriov *iov = dev->sriov; |
570 | ||
6b136724 | 571 | if (!iov->num_VFs) |
dd7cc44d YZ |
572 | return; |
573 | ||
18f9e9d1 | 574 | sriov_del_vfs(dev); |
dd7cc44d | 575 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 576 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
577 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
578 | ssleep(1); | |
fb51ccbf | 579 | pci_cfg_access_unlock(dev); |
dd7cc44d | 580 | |
0fc690a7 GS |
581 | pcibios_sriov_disable(dev); |
582 | ||
dd7cc44d YZ |
583 | if (iov->link != dev->devfn) |
584 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
585 | ||
6b136724 | 586 | iov->num_VFs = 0; |
f59dca27 | 587 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
588 | } |
589 | ||
d1b054da YZ |
590 | static int sriov_init(struct pci_dev *dev, int pos) |
591 | { | |
0e6c9122 | 592 | int i, bar64; |
d1b054da YZ |
593 | int rc; |
594 | int nres; | |
595 | u32 pgsz; | |
ea9a8854 | 596 | u16 ctrl, total; |
d1b054da YZ |
597 | struct pci_sriov *iov; |
598 | struct resource *res; | |
599 | struct pci_dev *pdev; | |
600 | ||
d1b054da YZ |
601 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
602 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
603 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
604 | ssleep(1); | |
605 | } | |
606 | ||
d1b054da YZ |
607 | ctrl = 0; |
608 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
609 | if (pdev->is_physfn) | |
610 | goto found; | |
611 | ||
612 | pdev = NULL; | |
613 | if (pci_ari_enabled(dev->bus)) | |
614 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
615 | ||
616 | found: | |
617 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 618 | |
ff45f9dd BS |
619 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
620 | if (!total) | |
621 | return 0; | |
d1b054da YZ |
622 | |
623 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
624 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
625 | pgsz &= ~((1 << i) - 1); | |
626 | if (!pgsz) | |
627 | return -EIO; | |
628 | ||
629 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 630 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 631 | |
0e6c9122 WY |
632 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
633 | if (!iov) | |
634 | return -ENOMEM; | |
635 | ||
d1b054da YZ |
636 | nres = 0; |
637 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 638 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
639 | /* |
640 | * If it is already FIXED, don't change it, something | |
641 | * (perhaps EA or header fixups) wants it this way. | |
642 | */ | |
643 | if (res->flags & IORESOURCE_PCI_FIXED) | |
644 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
645 | else | |
646 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
647 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
648 | if (!res->flags) |
649 | continue; | |
650 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
651 | rc = -EIO; | |
652 | goto failed; | |
653 | } | |
0e6c9122 | 654 | iov->barsz[i] = resource_size(res); |
d1b054da | 655 | res->end = res->start + resource_size(res) * total - 1; |
7506dc79 | 656 | pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
e88ae01d | 657 | i, res, i, total); |
0e6c9122 | 658 | i += bar64; |
d1b054da YZ |
659 | nres++; |
660 | } | |
661 | ||
d1b054da YZ |
662 | iov->pos = pos; |
663 | iov->nres = nres; | |
664 | iov->ctrl = ctrl; | |
6b136724 | 665 | iov->total_VFs = total; |
8d85a7a4 | 666 | iov->driver_max_VFs = total; |
3142d832 | 667 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); |
d1b054da YZ |
668 | iov->pgsz = pgsz; |
669 | iov->self = dev; | |
0e7df224 | 670 | iov->drivers_autoprobe = true; |
d1b054da YZ |
671 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); |
672 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 673 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 674 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
675 | |
676 | if (pdev) | |
677 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 678 | else |
d1b054da | 679 | iov->dev = dev; |
e277d2fc | 680 | |
d1b054da YZ |
681 | dev->sriov = iov; |
682 | dev->is_physfn = 1; | |
ea9a8854 AD |
683 | rc = compute_max_vf_buses(dev); |
684 | if (rc) | |
685 | goto fail_max_buses; | |
d1b054da YZ |
686 | |
687 | return 0; | |
688 | ||
ea9a8854 AD |
689 | fail_max_buses: |
690 | dev->sriov = NULL; | |
691 | dev->is_physfn = 0; | |
d1b054da YZ |
692 | failed: |
693 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 694 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
695 | res->flags = 0; |
696 | } | |
697 | ||
0e6c9122 | 698 | kfree(iov); |
d1b054da YZ |
699 | return rc; |
700 | } | |
701 | ||
702 | static void sriov_release(struct pci_dev *dev) | |
703 | { | |
6b136724 | 704 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 705 | |
e277d2fc | 706 | if (dev != dev->sriov->dev) |
d1b054da YZ |
707 | pci_dev_put(dev->sriov->dev); |
708 | ||
709 | kfree(dev->sriov); | |
710 | dev->sriov = NULL; | |
711 | } | |
712 | ||
8c5cdb6a YZ |
713 | static void sriov_restore_state(struct pci_dev *dev) |
714 | { | |
715 | int i; | |
716 | u16 ctrl; | |
717 | struct pci_sriov *iov = dev->sriov; | |
718 | ||
719 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
720 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
721 | return; | |
722 | ||
ff26449e TN |
723 | /* |
724 | * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because | |
725 | * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. | |
726 | */ | |
727 | ctrl &= ~PCI_SRIOV_CTRL_ARI; | |
728 | ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; | |
729 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); | |
730 | ||
39098edb DE |
731 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) |
732 | pci_update_resource(dev, i + PCI_IOV_RESOURCES); | |
8c5cdb6a YZ |
733 | |
734 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 735 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
736 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
737 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
738 | msleep(100); | |
739 | } | |
740 | ||
d1b054da YZ |
741 | /** |
742 | * pci_iov_init - initialize the IOV capability | |
743 | * @dev: the PCI device | |
744 | * | |
745 | * Returns 0 on success, or negative on failure. | |
746 | */ | |
747 | int pci_iov_init(struct pci_dev *dev) | |
748 | { | |
749 | int pos; | |
750 | ||
5f4d91a1 | 751 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
752 | return -ENODEV; |
753 | ||
754 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
755 | if (pos) | |
756 | return sriov_init(dev, pos); | |
757 | ||
758 | return -ENODEV; | |
759 | } | |
760 | ||
761 | /** | |
762 | * pci_iov_release - release resources used by the IOV capability | |
763 | * @dev: the PCI device | |
764 | */ | |
765 | void pci_iov_release(struct pci_dev *dev) | |
766 | { | |
767 | if (dev->is_physfn) | |
768 | sriov_release(dev); | |
769 | } | |
770 | ||
38972375 JK |
771 | /** |
772 | * pci_iov_remove - clean up SR-IOV state after PF driver is detached | |
773 | * @dev: the PCI device | |
774 | */ | |
775 | void pci_iov_remove(struct pci_dev *dev) | |
776 | { | |
777 | struct pci_sriov *iov = dev->sriov; | |
778 | ||
779 | if (!dev->is_physfn) | |
780 | return; | |
781 | ||
782 | iov->driver_max_VFs = iov->total_VFs; | |
783 | if (iov->num_VFs) | |
784 | pci_warn(dev, "driver left SR-IOV enabled after remove\n"); | |
785 | } | |
786 | ||
6ffa2489 BH |
787 | /** |
788 | * pci_iov_update_resource - update a VF BAR | |
789 | * @dev: the PCI device | |
790 | * @resno: the resource number | |
791 | * | |
792 | * Update a VF BAR in the SR-IOV capability of a PF. | |
793 | */ | |
794 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
795 | { | |
796 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
797 | struct resource *res = dev->resource + resno; | |
798 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
799 | struct pci_bus_region region; | |
546ba9f8 | 800 | u16 cmd; |
6ffa2489 BH |
801 | u32 new; |
802 | int reg; | |
803 | ||
804 | /* | |
805 | * The generic pci_restore_bars() path calls this for all devices, | |
806 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
807 | * have nothing to do. | |
808 | */ | |
809 | if (!iov) | |
810 | return; | |
811 | ||
546ba9f8 BH |
812 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
813 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
814 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
815 | vf_bar, res); | |
816 | return; | |
817 | } | |
818 | ||
6ffa2489 BH |
819 | /* |
820 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
821 | * BARs, and non-movable resources, e.g., those described via | |
822 | * Enhanced Allocation. | |
823 | */ | |
824 | if (!res->flags) | |
825 | return; | |
826 | ||
827 | if (res->flags & IORESOURCE_UNSET) | |
828 | return; | |
829 | ||
830 | if (res->flags & IORESOURCE_PCI_FIXED) | |
831 | return; | |
832 | ||
833 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
834 | new = region.start; | |
835 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
836 | ||
837 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
838 | pci_write_config_dword(dev, reg, new); | |
839 | if (res->flags & IORESOURCE_MEM_64) { | |
840 | new = region.start >> 16 >> 16; | |
841 | pci_write_config_dword(dev, reg + 4, new); | |
842 | } | |
843 | } | |
844 | ||
978d2d68 WY |
845 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
846 | int resno) | |
847 | { | |
848 | return pci_iov_resource_size(dev, resno); | |
849 | } | |
850 | ||
6faf17f6 CW |
851 | /** |
852 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
853 | * @dev: the PCI device | |
854 | * @resno: the resource number | |
855 | * | |
856 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
857 | * This is not the same as the resource size which is defined as | |
858 | * the VF BAR size multiplied by the number of VFs. The alignment | |
859 | * is just the VF BAR size. | |
860 | */ | |
0e52247a | 861 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 862 | { |
978d2d68 | 863 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
864 | } |
865 | ||
8c5cdb6a YZ |
866 | /** |
867 | * pci_restore_iov_state - restore the state of the IOV capability | |
868 | * @dev: the PCI device | |
869 | */ | |
870 | void pci_restore_iov_state(struct pci_dev *dev) | |
871 | { | |
872 | if (dev->is_physfn) | |
873 | sriov_restore_state(dev); | |
874 | } | |
a28724b0 | 875 | |
608c0d88 BL |
876 | /** |
877 | * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs | |
878 | * @dev: the PCI device | |
879 | * @auto_probe: set VF drivers auto probe flag | |
880 | */ | |
881 | void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe) | |
882 | { | |
883 | if (dev->is_physfn) | |
884 | dev->sriov->drivers_autoprobe = auto_probe; | |
885 | } | |
886 | ||
a28724b0 YZ |
887 | /** |
888 | * pci_iov_bus_range - find bus range used by Virtual Function | |
889 | * @bus: the PCI bus | |
890 | * | |
891 | * Returns max number of buses (exclude current one) used by Virtual | |
892 | * Functions. | |
893 | */ | |
894 | int pci_iov_bus_range(struct pci_bus *bus) | |
895 | { | |
896 | int max = 0; | |
a28724b0 YZ |
897 | struct pci_dev *dev; |
898 | ||
899 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
900 | if (!dev->is_physfn) | |
901 | continue; | |
4449f079 WY |
902 | if (dev->sriov->max_VF_buses > max) |
903 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
904 | } |
905 | ||
906 | return max ? max - bus->number : 0; | |
907 | } | |
dd7cc44d YZ |
908 | |
909 | /** | |
910 | * pci_enable_sriov - enable the SR-IOV capability | |
911 | * @dev: the PCI device | |
52a8873b | 912 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
913 | * |
914 | * Returns 0 on success, or negative on failure. | |
915 | */ | |
916 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
917 | { | |
918 | might_sleep(); | |
919 | ||
920 | if (!dev->is_physfn) | |
652d1100 | 921 | return -ENOSYS; |
dd7cc44d YZ |
922 | |
923 | return sriov_enable(dev, nr_virtfn); | |
924 | } | |
925 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
926 | ||
927 | /** | |
928 | * pci_disable_sriov - disable the SR-IOV capability | |
929 | * @dev: the PCI device | |
930 | */ | |
931 | void pci_disable_sriov(struct pci_dev *dev) | |
932 | { | |
933 | might_sleep(); | |
934 | ||
935 | if (!dev->is_physfn) | |
936 | return; | |
937 | ||
938 | sriov_disable(dev); | |
939 | } | |
940 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 941 | |
fb8a0d9d WM |
942 | /** |
943 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
944 | * @dev: the PCI device | |
945 | * | |
946 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
947 | */ | |
948 | int pci_num_vf(struct pci_dev *dev) | |
949 | { | |
1452cd76 | 950 | if (!dev->is_physfn) |
fb8a0d9d | 951 | return 0; |
1452cd76 BH |
952 | |
953 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
954 | } |
955 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 956 | |
5a8eb242 AD |
957 | /** |
958 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
959 | * @dev: the PCI device | |
960 | * | |
961 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 962 | * If device is not a physical function returns 0. |
5a8eb242 AD |
963 | */ |
964 | int pci_vfs_assigned(struct pci_dev *dev) | |
965 | { | |
966 | struct pci_dev *vfdev; | |
967 | unsigned int vfs_assigned = 0; | |
968 | unsigned short dev_id; | |
969 | ||
970 | /* only search if we are a PF */ | |
971 | if (!dev->is_physfn) | |
972 | return 0; | |
973 | ||
974 | /* | |
975 | * determine the device ID for the VFs, the vendor ID will be the | |
976 | * same as the PF so there is no need to check for that one | |
977 | */ | |
3142d832 | 978 | dev_id = dev->sriov->vf_device; |
5a8eb242 AD |
979 | |
980 | /* loop through all the VFs to see if we own any that are assigned */ | |
981 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
982 | while (vfdev) { | |
983 | /* | |
984 | * It is considered assigned if it is a virtual function with | |
985 | * our dev as the physical function and the assigned bit is set | |
986 | */ | |
987 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 988 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
989 | vfs_assigned++; |
990 | ||
991 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
992 | } | |
993 | ||
994 | return vfs_assigned; | |
995 | } | |
996 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
997 | ||
bff73156 DD |
998 | /** |
999 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
1000 | * @dev: the PCI PF device | |
2094f167 | 1001 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
1002 | * |
1003 | * Should be called from PF driver's probe routine with | |
1004 | * device's mutex held. | |
1005 | * | |
1006 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
1007 | * value of numvfs valid. If not a PF return -ENOSYS; |
1008 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
1009 | * if VFs already enabled, return -EBUSY. |
1010 | */ | |
1011 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
1012 | { | |
652d1100 SA |
1013 | if (!dev->is_physfn) |
1014 | return -ENOSYS; | |
51259d00 | 1015 | |
652d1100 | 1016 | if (numvfs > dev->sriov->total_VFs) |
bff73156 DD |
1017 | return -EINVAL; |
1018 | ||
1019 | /* Shouldn't change if VFs already enabled */ | |
1020 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
1021 | return -EBUSY; | |
bff73156 | 1022 | |
51259d00 | 1023 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
1024 | return 0; |
1025 | } | |
1026 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
1027 | ||
1028 | /** | |
ddc191f5 | 1029 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
1030 | * @dev: the PCI PF device |
1031 | * | |
1032 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 1033 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 1034 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
1035 | */ |
1036 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
1037 | { | |
1452cd76 | 1038 | if (!dev->is_physfn) |
652d1100 | 1039 | return 0; |
bff73156 | 1040 | |
8d85a7a4 | 1041 | return dev->sriov->driver_max_VFs; |
bff73156 DD |
1042 | } |
1043 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); | |
8effc395 AD |
1044 | |
1045 | /** | |
1046 | * pci_sriov_configure_simple - helper to configure SR-IOV | |
1047 | * @dev: the PCI device | |
1048 | * @nr_virtfn: number of virtual functions to enable, 0 to disable | |
1049 | * | |
1050 | * Enable or disable SR-IOV for devices that don't require any PF setup | |
1051 | * before enabling SR-IOV. Return value is negative on error, or number of | |
1052 | * VFs allocated on success. | |
1053 | */ | |
1054 | int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn) | |
1055 | { | |
1056 | int rc; | |
1057 | ||
1058 | might_sleep(); | |
1059 | ||
1060 | if (!dev->is_physfn) | |
1061 | return -ENODEV; | |
1062 | ||
1063 | if (pci_vfs_assigned(dev)) { | |
1064 | pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n"); | |
1065 | return -EPERM; | |
1066 | } | |
1067 | ||
1068 | if (nr_virtfn == 0) { | |
1069 | sriov_disable(dev); | |
1070 | return 0; | |
1071 | } | |
1072 | ||
1073 | rc = sriov_enable(dev, nr_virtfn); | |
1074 | if (rc < 0) | |
1075 | return rc; | |
1076 | ||
1077 | return nr_virtfn; | |
1078 | } | |
1079 | EXPORT_SYMBOL_GPL(pci_sriov_configure_simple); |