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Commit | Line | Data |
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d1b054da YZ |
1 | /* |
2 | * drivers/pci/iov.c | |
3 | * | |
4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
5 | * | |
6 | * PCI Express I/O Virtualization (IOV) support. | |
7 | * Single Root IOV 1.0 | |
302b4215 | 8 | * Address Translation Service 1.0 |
d1b054da YZ |
9 | */ |
10 | ||
11 | #include <linux/pci.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
d1b054da | 13 | #include <linux/mutex.h> |
363c75db | 14 | #include <linux/export.h> |
d1b054da YZ |
15 | #include <linux/string.h> |
16 | #include <linux/delay.h> | |
5cdede24 | 17 | #include <linux/pci-ats.h> |
d1b054da YZ |
18 | #include "pci.h" |
19 | ||
dd7cc44d | 20 | #define VIRTFN_ID_LEN 16 |
d1b054da | 21 | |
b07579c0 | 22 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 23 | { |
b07579c0 WY |
24 | if (!dev->is_physfn) |
25 | return -EINVAL; | |
a28724b0 | 26 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 27 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
28 | } |
29 | ||
b07579c0 | 30 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 31 | { |
b07579c0 WY |
32 | if (!dev->is_physfn) |
33 | return -EINVAL; | |
a28724b0 | 34 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 35 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
36 | } |
37 | ||
f59dca27 WY |
38 | /* |
39 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
40 | * change when NumVFs changes. | |
41 | * | |
42 | * Update iov->offset and iov->stride when NumVFs is written. | |
43 | */ | |
44 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
45 | { | |
46 | struct pci_sriov *iov = dev->sriov; | |
47 | ||
48 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
49 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
50 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
51 | } | |
52 | ||
4449f079 WY |
53 | /* |
54 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
55 | * determine how many additional bus numbers will be consumed by VFs. | |
56 | * | |
ea9a8854 AD |
57 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
58 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 59 | */ |
ea9a8854 | 60 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
61 | { |
62 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 63 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 64 | |
ea9a8854 | 65 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 66 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
67 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
68 | rc = -EIO; | |
69 | goto out; | |
70 | } | |
71 | ||
b07579c0 | 72 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
73 | if (busnr > iov->max_VF_buses) |
74 | iov->max_VF_buses = busnr; | |
4449f079 WY |
75 | } |
76 | ||
ea9a8854 AD |
77 | out: |
78 | pci_iov_set_numvfs(dev, 0); | |
79 | return rc; | |
4449f079 WY |
80 | } |
81 | ||
dd7cc44d YZ |
82 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
83 | { | |
dd7cc44d YZ |
84 | struct pci_bus *child; |
85 | ||
86 | if (bus->number == busnr) | |
87 | return bus; | |
88 | ||
89 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
90 | if (child) | |
91 | return child; | |
92 | ||
93 | child = pci_add_new_bus(bus, NULL, busnr); | |
94 | if (!child) | |
95 | return NULL; | |
96 | ||
b7eac055 | 97 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
98 | |
99 | return child; | |
100 | } | |
101 | ||
dc087f2f | 102 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 103 | { |
dc087f2f JL |
104 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
105 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
106 | } |
107 | ||
0e6c9122 WY |
108 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
109 | { | |
110 | if (!dev->is_physfn) | |
111 | return 0; | |
112 | ||
113 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
114 | } | |
115 | ||
753f6124 | 116 | int pci_iov_add_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
117 | { |
118 | int i; | |
dc087f2f | 119 | int rc = -ENOMEM; |
dd7cc44d YZ |
120 | u64 size; |
121 | char buf[VIRTFN_ID_LEN]; | |
122 | struct pci_dev *virtfn; | |
123 | struct resource *res; | |
124 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 125 | struct pci_bus *bus; |
dd7cc44d | 126 | |
b07579c0 | 127 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
128 | if (!bus) |
129 | goto failed; | |
130 | ||
131 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 132 | if (!virtfn) |
dc087f2f | 133 | goto failed0; |
dd7cc44d | 134 | |
b07579c0 | 135 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d | 136 | virtfn->vendor = dev->vendor; |
3142d832 | 137 | virtfn->device = iov->vf_device; |
156c5532 PL |
138 | rc = pci_setup_device(virtfn); |
139 | if (rc) | |
140 | goto failed0; | |
141 | ||
dd7cc44d | 142 | virtfn->dev.parent = dev->dev.parent; |
fbf33f51 XH |
143 | virtfn->physfn = pci_dev_get(dev); |
144 | virtfn->is_virtfn = 1; | |
aa931977 | 145 | virtfn->multifunction = 0; |
dd7cc44d YZ |
146 | |
147 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 148 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
149 | if (!res->parent) |
150 | continue; | |
151 | virtfn->resource[i].name = pci_name(virtfn); | |
152 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 153 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
154 | virtfn->resource[i].start = res->start + size * id; |
155 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
156 | rc = request_resource(res, &virtfn->resource[i]); | |
157 | BUG_ON(rc); | |
158 | } | |
159 | ||
dd7cc44d | 160 | pci_device_add(virtfn, virtfn->bus); |
dd7cc44d | 161 | |
dd7cc44d YZ |
162 | sprintf(buf, "virtfn%u", id); |
163 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
164 | if (rc) | |
165 | goto failed1; | |
166 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
167 | if (rc) | |
168 | goto failed2; | |
169 | ||
170 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
171 | ||
27d61629 SH |
172 | pci_bus_add_device(virtfn); |
173 | ||
dd7cc44d YZ |
174 | return 0; |
175 | ||
176 | failed2: | |
177 | sysfs_remove_link(&dev->dev.kobj, buf); | |
178 | failed1: | |
179 | pci_dev_put(dev); | |
210647af | 180 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f JL |
181 | failed0: |
182 | virtfn_remove_bus(dev->bus, bus); | |
183 | failed: | |
dd7cc44d YZ |
184 | |
185 | return rc; | |
186 | } | |
187 | ||
753f6124 | 188 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
189 | { |
190 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d | 191 | struct pci_dev *virtfn; |
dd7cc44d | 192 | |
dc087f2f | 193 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
194 | pci_iov_virtfn_bus(dev, id), |
195 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
196 | if (!virtfn) |
197 | return; | |
198 | ||
dd7cc44d YZ |
199 | sprintf(buf, "virtfn%u", id); |
200 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
201 | /* |
202 | * pci_stop_dev() could have been called for this virtfn already, | |
203 | * so the directory for the virtfn may have been removed before. | |
204 | * Double check to avoid spurious sysfs warnings. | |
205 | */ | |
206 | if (virtfn->dev.kobj.sd) | |
207 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d | 208 | |
210647af | 209 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 210 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d | 211 | |
dc087f2f JL |
212 | /* balance pci_get_domain_bus_and_slot() */ |
213 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
214 | pci_dev_put(dev); |
215 | } | |
216 | ||
995df527 WY |
217 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
218 | { | |
a39e3fcd AD |
219 | return 0; |
220 | } | |
221 | ||
222 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
223 | { | |
224 | return 0; | |
995df527 WY |
225 | } |
226 | ||
dd7cc44d YZ |
227 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
228 | { | |
229 | int rc; | |
3443c382 | 230 | int i; |
dd7cc44d | 231 | int nres; |
ce288ec3 | 232 | u16 initial; |
dd7cc44d YZ |
233 | struct resource *res; |
234 | struct pci_dev *pdev; | |
235 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 236 | int bars = 0; |
b07579c0 | 237 | int bus; |
dd7cc44d YZ |
238 | |
239 | if (!nr_virtfn) | |
240 | return 0; | |
241 | ||
6b136724 | 242 | if (iov->num_VFs) |
dd7cc44d YZ |
243 | return -EINVAL; |
244 | ||
245 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
246 | if (initial > iov->total_VFs || |
247 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
248 | return -EIO; |
249 | ||
6b136724 | 250 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
251 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
252 | return -EINVAL; | |
253 | ||
dd7cc44d YZ |
254 | nres = 0; |
255 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 256 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 257 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
258 | if (res->parent) |
259 | nres++; | |
260 | } | |
261 | if (nres != iov->nres) { | |
262 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | |
263 | return -ENOMEM; | |
264 | } | |
265 | ||
b07579c0 | 266 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa BH |
267 | if (bus > dev->bus->busn_res.end) { |
268 | dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", | |
269 | nr_virtfn, bus, &dev->bus->busn_res); | |
dd7cc44d YZ |
270 | return -ENOMEM; |
271 | } | |
272 | ||
bbef98ab RP |
273 | if (pci_enable_resources(dev, bars)) { |
274 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | |
275 | return -ENOMEM; | |
276 | } | |
277 | ||
dd7cc44d YZ |
278 | if (iov->link != dev->devfn) { |
279 | pdev = pci_get_slot(dev->bus, iov->link); | |
280 | if (!pdev) | |
281 | return -ENODEV; | |
282 | ||
dc087f2f JL |
283 | if (!pdev->is_physfn) { |
284 | pci_dev_put(pdev); | |
652d1100 | 285 | return -ENOSYS; |
dc087f2f | 286 | } |
dd7cc44d YZ |
287 | |
288 | rc = sysfs_create_link(&dev->dev.kobj, | |
289 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 290 | pci_dev_put(pdev); |
dd7cc44d YZ |
291 | if (rc) |
292 | return rc; | |
293 | } | |
294 | ||
6b136724 | 295 | iov->initial_VFs = initial; |
dd7cc44d YZ |
296 | if (nr_virtfn < initial) |
297 | initial = nr_virtfn; | |
298 | ||
c23b6135 AD |
299 | rc = pcibios_sriov_enable(dev, initial); |
300 | if (rc) { | |
301 | dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc); | |
302 | goto err_pcibios; | |
995df527 WY |
303 | } |
304 | ||
f40ec3c7 GS |
305 | pci_iov_set_numvfs(dev, nr_virtfn); |
306 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
307 | pci_cfg_access_lock(dev); | |
308 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
309 | msleep(100); | |
310 | pci_cfg_access_unlock(dev); | |
311 | ||
dd7cc44d | 312 | for (i = 0; i < initial; i++) { |
753f6124 | 313 | rc = pci_iov_add_virtfn(dev, i); |
dd7cc44d YZ |
314 | if (rc) |
315 | goto failed; | |
316 | } | |
317 | ||
318 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 319 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
320 | |
321 | return 0; | |
322 | ||
323 | failed: | |
3443c382 | 324 | while (i--) |
753f6124 | 325 | pci_iov_remove_virtfn(dev, i); |
dd7cc44d | 326 | |
c23b6135 | 327 | err_pcibios: |
dd7cc44d | 328 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 329 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
330 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
331 | ssleep(1); | |
fb51ccbf | 332 | pci_cfg_access_unlock(dev); |
dd7cc44d | 333 | |
0fc690a7 GS |
334 | pcibios_sriov_disable(dev); |
335 | ||
dd7cc44d YZ |
336 | if (iov->link != dev->devfn) |
337 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
338 | ||
b3908644 | 339 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
340 | return rc; |
341 | } | |
342 | ||
343 | static void sriov_disable(struct pci_dev *dev) | |
344 | { | |
345 | int i; | |
346 | struct pci_sriov *iov = dev->sriov; | |
347 | ||
6b136724 | 348 | if (!iov->num_VFs) |
dd7cc44d YZ |
349 | return; |
350 | ||
6b136724 | 351 | for (i = 0; i < iov->num_VFs; i++) |
753f6124 | 352 | pci_iov_remove_virtfn(dev, i); |
dd7cc44d YZ |
353 | |
354 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 355 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
356 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
357 | ssleep(1); | |
fb51ccbf | 358 | pci_cfg_access_unlock(dev); |
dd7cc44d | 359 | |
0fc690a7 GS |
360 | pcibios_sriov_disable(dev); |
361 | ||
dd7cc44d YZ |
362 | if (iov->link != dev->devfn) |
363 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
364 | ||
6b136724 | 365 | iov->num_VFs = 0; |
f59dca27 | 366 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
367 | } |
368 | ||
d1b054da YZ |
369 | static int sriov_init(struct pci_dev *dev, int pos) |
370 | { | |
0e6c9122 | 371 | int i, bar64; |
d1b054da YZ |
372 | int rc; |
373 | int nres; | |
374 | u32 pgsz; | |
ea9a8854 | 375 | u16 ctrl, total; |
d1b054da YZ |
376 | struct pci_sriov *iov; |
377 | struct resource *res; | |
378 | struct pci_dev *pdev; | |
379 | ||
d1b054da YZ |
380 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
381 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
382 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
383 | ssleep(1); | |
384 | } | |
385 | ||
d1b054da YZ |
386 | ctrl = 0; |
387 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
388 | if (pdev->is_physfn) | |
389 | goto found; | |
390 | ||
391 | pdev = NULL; | |
392 | if (pci_ari_enabled(dev->bus)) | |
393 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
394 | ||
395 | found: | |
396 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 397 | |
ff45f9dd BS |
398 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
399 | if (!total) | |
400 | return 0; | |
d1b054da YZ |
401 | |
402 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
403 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
404 | pgsz &= ~((1 << i) - 1); | |
405 | if (!pgsz) | |
406 | return -EIO; | |
407 | ||
408 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 409 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 410 | |
0e6c9122 WY |
411 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
412 | if (!iov) | |
413 | return -ENOMEM; | |
414 | ||
d1b054da YZ |
415 | nres = 0; |
416 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 417 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
418 | /* |
419 | * If it is already FIXED, don't change it, something | |
420 | * (perhaps EA or header fixups) wants it this way. | |
421 | */ | |
422 | if (res->flags & IORESOURCE_PCI_FIXED) | |
423 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
424 | else | |
425 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
426 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
427 | if (!res->flags) |
428 | continue; | |
429 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
430 | rc = -EIO; | |
431 | goto failed; | |
432 | } | |
0e6c9122 | 433 | iov->barsz[i] = resource_size(res); |
d1b054da | 434 | res->end = res->start + resource_size(res) * total - 1; |
e88ae01d WY |
435 | dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
436 | i, res, i, total); | |
0e6c9122 | 437 | i += bar64; |
d1b054da YZ |
438 | nres++; |
439 | } | |
440 | ||
d1b054da YZ |
441 | iov->pos = pos; |
442 | iov->nres = nres; | |
443 | iov->ctrl = ctrl; | |
6b136724 | 444 | iov->total_VFs = total; |
3142d832 | 445 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); |
d1b054da YZ |
446 | iov->pgsz = pgsz; |
447 | iov->self = dev; | |
0e7df224 | 448 | iov->drivers_autoprobe = true; |
d1b054da YZ |
449 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); |
450 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 451 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 452 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
453 | |
454 | if (pdev) | |
455 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 456 | else |
d1b054da | 457 | iov->dev = dev; |
e277d2fc | 458 | |
d1b054da YZ |
459 | dev->sriov = iov; |
460 | dev->is_physfn = 1; | |
ea9a8854 AD |
461 | rc = compute_max_vf_buses(dev); |
462 | if (rc) | |
463 | goto fail_max_buses; | |
d1b054da YZ |
464 | |
465 | return 0; | |
466 | ||
ea9a8854 AD |
467 | fail_max_buses: |
468 | dev->sriov = NULL; | |
469 | dev->is_physfn = 0; | |
d1b054da YZ |
470 | failed: |
471 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 472 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
473 | res->flags = 0; |
474 | } | |
475 | ||
0e6c9122 | 476 | kfree(iov); |
d1b054da YZ |
477 | return rc; |
478 | } | |
479 | ||
480 | static void sriov_release(struct pci_dev *dev) | |
481 | { | |
6b136724 | 482 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 483 | |
e277d2fc | 484 | if (dev != dev->sriov->dev) |
d1b054da YZ |
485 | pci_dev_put(dev->sriov->dev); |
486 | ||
487 | kfree(dev->sriov); | |
488 | dev->sriov = NULL; | |
489 | } | |
490 | ||
8c5cdb6a YZ |
491 | static void sriov_restore_state(struct pci_dev *dev) |
492 | { | |
493 | int i; | |
494 | u16 ctrl; | |
495 | struct pci_sriov *iov = dev->sriov; | |
496 | ||
497 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
498 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
499 | return; | |
500 | ||
ff26449e TN |
501 | /* |
502 | * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because | |
503 | * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. | |
504 | */ | |
505 | ctrl &= ~PCI_SRIOV_CTRL_ARI; | |
506 | ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; | |
507 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); | |
508 | ||
8c5cdb6a YZ |
509 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) |
510 | pci_update_resource(dev, i); | |
511 | ||
512 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 513 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
514 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
515 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
516 | msleep(100); | |
517 | } | |
518 | ||
d1b054da YZ |
519 | /** |
520 | * pci_iov_init - initialize the IOV capability | |
521 | * @dev: the PCI device | |
522 | * | |
523 | * Returns 0 on success, or negative on failure. | |
524 | */ | |
525 | int pci_iov_init(struct pci_dev *dev) | |
526 | { | |
527 | int pos; | |
528 | ||
5f4d91a1 | 529 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
530 | return -ENODEV; |
531 | ||
532 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
533 | if (pos) | |
534 | return sriov_init(dev, pos); | |
535 | ||
536 | return -ENODEV; | |
537 | } | |
538 | ||
539 | /** | |
540 | * pci_iov_release - release resources used by the IOV capability | |
541 | * @dev: the PCI device | |
542 | */ | |
543 | void pci_iov_release(struct pci_dev *dev) | |
544 | { | |
545 | if (dev->is_physfn) | |
546 | sriov_release(dev); | |
547 | } | |
548 | ||
6ffa2489 BH |
549 | /** |
550 | * pci_iov_update_resource - update a VF BAR | |
551 | * @dev: the PCI device | |
552 | * @resno: the resource number | |
553 | * | |
554 | * Update a VF BAR in the SR-IOV capability of a PF. | |
555 | */ | |
556 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
557 | { | |
558 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
559 | struct resource *res = dev->resource + resno; | |
560 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
561 | struct pci_bus_region region; | |
546ba9f8 | 562 | u16 cmd; |
6ffa2489 BH |
563 | u32 new; |
564 | int reg; | |
565 | ||
566 | /* | |
567 | * The generic pci_restore_bars() path calls this for all devices, | |
568 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
569 | * have nothing to do. | |
570 | */ | |
571 | if (!iov) | |
572 | return; | |
573 | ||
546ba9f8 BH |
574 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
575 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
576 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
577 | vf_bar, res); | |
578 | return; | |
579 | } | |
580 | ||
6ffa2489 BH |
581 | /* |
582 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
583 | * BARs, and non-movable resources, e.g., those described via | |
584 | * Enhanced Allocation. | |
585 | */ | |
586 | if (!res->flags) | |
587 | return; | |
588 | ||
589 | if (res->flags & IORESOURCE_UNSET) | |
590 | return; | |
591 | ||
592 | if (res->flags & IORESOURCE_PCI_FIXED) | |
593 | return; | |
594 | ||
595 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
596 | new = region.start; | |
597 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
598 | ||
599 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
600 | pci_write_config_dword(dev, reg, new); | |
601 | if (res->flags & IORESOURCE_MEM_64) { | |
602 | new = region.start >> 16 >> 16; | |
603 | pci_write_config_dword(dev, reg + 4, new); | |
604 | } | |
605 | } | |
606 | ||
978d2d68 WY |
607 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
608 | int resno) | |
609 | { | |
610 | return pci_iov_resource_size(dev, resno); | |
611 | } | |
612 | ||
6faf17f6 CW |
613 | /** |
614 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
615 | * @dev: the PCI device | |
616 | * @resno: the resource number | |
617 | * | |
618 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
619 | * This is not the same as the resource size which is defined as | |
620 | * the VF BAR size multiplied by the number of VFs. The alignment | |
621 | * is just the VF BAR size. | |
622 | */ | |
0e52247a | 623 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 624 | { |
978d2d68 | 625 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
626 | } |
627 | ||
8c5cdb6a YZ |
628 | /** |
629 | * pci_restore_iov_state - restore the state of the IOV capability | |
630 | * @dev: the PCI device | |
631 | */ | |
632 | void pci_restore_iov_state(struct pci_dev *dev) | |
633 | { | |
634 | if (dev->is_physfn) | |
635 | sriov_restore_state(dev); | |
636 | } | |
a28724b0 YZ |
637 | |
638 | /** | |
639 | * pci_iov_bus_range - find bus range used by Virtual Function | |
640 | * @bus: the PCI bus | |
641 | * | |
642 | * Returns max number of buses (exclude current one) used by Virtual | |
643 | * Functions. | |
644 | */ | |
645 | int pci_iov_bus_range(struct pci_bus *bus) | |
646 | { | |
647 | int max = 0; | |
a28724b0 YZ |
648 | struct pci_dev *dev; |
649 | ||
650 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
651 | if (!dev->is_physfn) | |
652 | continue; | |
4449f079 WY |
653 | if (dev->sriov->max_VF_buses > max) |
654 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
655 | } |
656 | ||
657 | return max ? max - bus->number : 0; | |
658 | } | |
dd7cc44d YZ |
659 | |
660 | /** | |
661 | * pci_enable_sriov - enable the SR-IOV capability | |
662 | * @dev: the PCI device | |
52a8873b | 663 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
664 | * |
665 | * Returns 0 on success, or negative on failure. | |
666 | */ | |
667 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
668 | { | |
669 | might_sleep(); | |
670 | ||
671 | if (!dev->is_physfn) | |
652d1100 | 672 | return -ENOSYS; |
dd7cc44d YZ |
673 | |
674 | return sriov_enable(dev, nr_virtfn); | |
675 | } | |
676 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
677 | ||
678 | /** | |
679 | * pci_disable_sriov - disable the SR-IOV capability | |
680 | * @dev: the PCI device | |
681 | */ | |
682 | void pci_disable_sriov(struct pci_dev *dev) | |
683 | { | |
684 | might_sleep(); | |
685 | ||
686 | if (!dev->is_physfn) | |
687 | return; | |
688 | ||
689 | sriov_disable(dev); | |
690 | } | |
691 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 692 | |
fb8a0d9d WM |
693 | /** |
694 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
695 | * @dev: the PCI device | |
696 | * | |
697 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
698 | */ | |
699 | int pci_num_vf(struct pci_dev *dev) | |
700 | { | |
1452cd76 | 701 | if (!dev->is_physfn) |
fb8a0d9d | 702 | return 0; |
1452cd76 BH |
703 | |
704 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
705 | } |
706 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 707 | |
5a8eb242 AD |
708 | /** |
709 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
710 | * @dev: the PCI device | |
711 | * | |
712 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 713 | * If device is not a physical function returns 0. |
5a8eb242 AD |
714 | */ |
715 | int pci_vfs_assigned(struct pci_dev *dev) | |
716 | { | |
717 | struct pci_dev *vfdev; | |
718 | unsigned int vfs_assigned = 0; | |
719 | unsigned short dev_id; | |
720 | ||
721 | /* only search if we are a PF */ | |
722 | if (!dev->is_physfn) | |
723 | return 0; | |
724 | ||
725 | /* | |
726 | * determine the device ID for the VFs, the vendor ID will be the | |
727 | * same as the PF so there is no need to check for that one | |
728 | */ | |
3142d832 | 729 | dev_id = dev->sriov->vf_device; |
5a8eb242 AD |
730 | |
731 | /* loop through all the VFs to see if we own any that are assigned */ | |
732 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
733 | while (vfdev) { | |
734 | /* | |
735 | * It is considered assigned if it is a virtual function with | |
736 | * our dev as the physical function and the assigned bit is set | |
737 | */ | |
738 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 739 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
740 | vfs_assigned++; |
741 | ||
742 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
743 | } | |
744 | ||
745 | return vfs_assigned; | |
746 | } | |
747 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
748 | ||
bff73156 DD |
749 | /** |
750 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
751 | * @dev: the PCI PF device | |
2094f167 | 752 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
753 | * |
754 | * Should be called from PF driver's probe routine with | |
755 | * device's mutex held. | |
756 | * | |
757 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
758 | * value of numvfs valid. If not a PF return -ENOSYS; |
759 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
760 | * if VFs already enabled, return -EBUSY. |
761 | */ | |
762 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
763 | { | |
652d1100 SA |
764 | if (!dev->is_physfn) |
765 | return -ENOSYS; | |
766 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
767 | return -EINVAL; |
768 | ||
769 | /* Shouldn't change if VFs already enabled */ | |
770 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
771 | return -EBUSY; | |
772 | else | |
6b136724 | 773 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
774 | |
775 | return 0; | |
776 | } | |
777 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
778 | ||
779 | /** | |
ddc191f5 | 780 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
781 | * @dev: the PCI PF device |
782 | * | |
783 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 784 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 785 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
786 | */ |
787 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
788 | { | |
1452cd76 | 789 | if (!dev->is_physfn) |
652d1100 | 790 | return 0; |
bff73156 | 791 | |
6b136724 BH |
792 | if (dev->sriov->driver_max_VFs) |
793 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
794 | |
795 | return dev->sriov->total_VFs; | |
bff73156 DD |
796 | } |
797 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |