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Commit | Line | Data |
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d1b054da YZ |
1 | /* |
2 | * drivers/pci/iov.c | |
3 | * | |
4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
5 | * | |
6 | * PCI Express I/O Virtualization (IOV) support. | |
7 | * Single Root IOV 1.0 | |
302b4215 | 8 | * Address Translation Service 1.0 |
d1b054da YZ |
9 | */ |
10 | ||
11 | #include <linux/pci.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
d1b054da | 13 | #include <linux/mutex.h> |
363c75db | 14 | #include <linux/export.h> |
d1b054da YZ |
15 | #include <linux/string.h> |
16 | #include <linux/delay.h> | |
5cdede24 | 17 | #include <linux/pci-ats.h> |
d1b054da YZ |
18 | #include "pci.h" |
19 | ||
dd7cc44d | 20 | #define VIRTFN_ID_LEN 16 |
d1b054da | 21 | |
a28724b0 YZ |
22 | static inline u8 virtfn_bus(struct pci_dev *dev, int id) |
23 | { | |
24 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + | |
25 | dev->sriov->stride * id) >> 8); | |
26 | } | |
27 | ||
28 | static inline u8 virtfn_devfn(struct pci_dev *dev, int id) | |
29 | { | |
30 | return (dev->devfn + dev->sriov->offset + | |
31 | dev->sriov->stride * id) & 0xff; | |
32 | } | |
33 | ||
dd7cc44d YZ |
34 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
35 | { | |
36 | int rc; | |
37 | struct pci_bus *child; | |
38 | ||
39 | if (bus->number == busnr) | |
40 | return bus; | |
41 | ||
42 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
43 | if (child) | |
44 | return child; | |
45 | ||
46 | child = pci_add_new_bus(bus, NULL, busnr); | |
47 | if (!child) | |
48 | return NULL; | |
49 | ||
b7eac055 | 50 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
51 | child->dev.parent = bus->bridge; |
52 | rc = pci_bus_add_child(child); | |
53 | if (rc) { | |
54 | pci_remove_bus(child); | |
55 | return NULL; | |
56 | } | |
57 | ||
58 | return child; | |
59 | } | |
60 | ||
61 | static void virtfn_remove_bus(struct pci_bus *bus, int busnr) | |
62 | { | |
63 | struct pci_bus *child; | |
64 | ||
65 | if (bus->number == busnr) | |
66 | return; | |
67 | ||
68 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
69 | BUG_ON(!child); | |
70 | ||
71 | if (list_empty(&child->devices)) | |
72 | pci_remove_bus(child); | |
73 | } | |
74 | ||
75 | static int virtfn_add(struct pci_dev *dev, int id, int reset) | |
76 | { | |
77 | int i; | |
78 | int rc; | |
79 | u64 size; | |
80 | char buf[VIRTFN_ID_LEN]; | |
81 | struct pci_dev *virtfn; | |
82 | struct resource *res; | |
83 | struct pci_sriov *iov = dev->sriov; | |
84 | ||
85 | virtfn = alloc_pci_dev(); | |
86 | if (!virtfn) | |
87 | return -ENOMEM; | |
88 | ||
89 | mutex_lock(&iov->dev->sriov->lock); | |
90 | virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id)); | |
91 | if (!virtfn->bus) { | |
92 | kfree(virtfn); | |
93 | mutex_unlock(&iov->dev->sriov->lock); | |
94 | return -ENOMEM; | |
95 | } | |
96 | virtfn->devfn = virtfn_devfn(dev, id); | |
97 | virtfn->vendor = dev->vendor; | |
98 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); | |
99 | pci_setup_device(virtfn); | |
100 | virtfn->dev.parent = dev->dev.parent; | |
101 | ||
102 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
103 | res = dev->resource + PCI_IOV_RESOURCES + i; | |
104 | if (!res->parent) | |
105 | continue; | |
106 | virtfn->resource[i].name = pci_name(virtfn); | |
107 | virtfn->resource[i].flags = res->flags; | |
108 | size = resource_size(res); | |
109 | do_div(size, iov->total); | |
110 | virtfn->resource[i].start = res->start + size * id; | |
111 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
112 | rc = request_resource(res, &virtfn->resource[i]); | |
113 | BUG_ON(rc); | |
114 | } | |
115 | ||
116 | if (reset) | |
8c1c699f | 117 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
118 | |
119 | pci_device_add(virtfn, virtfn->bus); | |
120 | mutex_unlock(&iov->dev->sriov->lock); | |
121 | ||
122 | virtfn->physfn = pci_dev_get(dev); | |
123 | virtfn->is_virtfn = 1; | |
124 | ||
125 | rc = pci_bus_add_device(virtfn); | |
126 | if (rc) | |
127 | goto failed1; | |
128 | sprintf(buf, "virtfn%u", id); | |
129 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
130 | if (rc) | |
131 | goto failed1; | |
132 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
133 | if (rc) | |
134 | goto failed2; | |
135 | ||
136 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
137 | ||
138 | return 0; | |
139 | ||
140 | failed2: | |
141 | sysfs_remove_link(&dev->dev.kobj, buf); | |
142 | failed1: | |
143 | pci_dev_put(dev); | |
144 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 145 | pci_stop_and_remove_bus_device(virtfn); |
dd7cc44d YZ |
146 | virtfn_remove_bus(dev->bus, virtfn_bus(dev, id)); |
147 | mutex_unlock(&iov->dev->sriov->lock); | |
148 | ||
149 | return rc; | |
150 | } | |
151 | ||
152 | static void virtfn_remove(struct pci_dev *dev, int id, int reset) | |
153 | { | |
154 | char buf[VIRTFN_ID_LEN]; | |
155 | struct pci_bus *bus; | |
156 | struct pci_dev *virtfn; | |
157 | struct pci_sriov *iov = dev->sriov; | |
158 | ||
159 | bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id)); | |
160 | if (!bus) | |
161 | return; | |
162 | ||
163 | virtfn = pci_get_slot(bus, virtfn_devfn(dev, id)); | |
164 | if (!virtfn) | |
165 | return; | |
166 | ||
167 | pci_dev_put(virtfn); | |
168 | ||
169 | if (reset) { | |
170 | device_release_driver(&virtfn->dev); | |
8c1c699f | 171 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
172 | } |
173 | ||
174 | sprintf(buf, "virtfn%u", id); | |
175 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
176 | /* |
177 | * pci_stop_dev() could have been called for this virtfn already, | |
178 | * so the directory for the virtfn may have been removed before. | |
179 | * Double check to avoid spurious sysfs warnings. | |
180 | */ | |
181 | if (virtfn->dev.kobj.sd) | |
182 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d YZ |
183 | |
184 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 185 | pci_stop_and_remove_bus_device(virtfn); |
dd7cc44d YZ |
186 | virtfn_remove_bus(dev->bus, virtfn_bus(dev, id)); |
187 | mutex_unlock(&iov->dev->sriov->lock); | |
188 | ||
189 | pci_dev_put(dev); | |
190 | } | |
191 | ||
74bb1bcc YZ |
192 | static int sriov_migration(struct pci_dev *dev) |
193 | { | |
194 | u16 status; | |
195 | struct pci_sriov *iov = dev->sriov; | |
196 | ||
197 | if (!iov->nr_virtfn) | |
198 | return 0; | |
199 | ||
200 | if (!(iov->cap & PCI_SRIOV_CAP_VFM)) | |
201 | return 0; | |
202 | ||
203 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status); | |
204 | if (!(status & PCI_SRIOV_STATUS_VFM)) | |
205 | return 0; | |
206 | ||
207 | schedule_work(&iov->mtask); | |
208 | ||
209 | return 1; | |
210 | } | |
211 | ||
212 | static void sriov_migration_task(struct work_struct *work) | |
213 | { | |
214 | int i; | |
215 | u8 state; | |
216 | u16 status; | |
217 | struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask); | |
218 | ||
219 | for (i = iov->initial; i < iov->nr_virtfn; i++) { | |
220 | state = readb(iov->mstate + i); | |
221 | if (state == PCI_SRIOV_VFM_MI) { | |
222 | writeb(PCI_SRIOV_VFM_AV, iov->mstate + i); | |
223 | state = readb(iov->mstate + i); | |
224 | if (state == PCI_SRIOV_VFM_AV) | |
225 | virtfn_add(iov->self, i, 1); | |
226 | } else if (state == PCI_SRIOV_VFM_MO) { | |
227 | virtfn_remove(iov->self, i, 1); | |
228 | writeb(PCI_SRIOV_VFM_UA, iov->mstate + i); | |
229 | state = readb(iov->mstate + i); | |
230 | if (state == PCI_SRIOV_VFM_AV) | |
231 | virtfn_add(iov->self, i, 0); | |
232 | } | |
233 | } | |
234 | ||
235 | pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status); | |
236 | status &= ~PCI_SRIOV_STATUS_VFM; | |
237 | pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status); | |
238 | } | |
239 | ||
240 | static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn) | |
241 | { | |
242 | int bir; | |
243 | u32 table; | |
244 | resource_size_t pa; | |
245 | struct pci_sriov *iov = dev->sriov; | |
246 | ||
247 | if (nr_virtfn <= iov->initial) | |
248 | return 0; | |
249 | ||
250 | pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table); | |
251 | bir = PCI_SRIOV_VFM_BIR(table); | |
252 | if (bir > PCI_STD_RESOURCE_END) | |
253 | return -EIO; | |
254 | ||
255 | table = PCI_SRIOV_VFM_OFFSET(table); | |
256 | if (table + nr_virtfn > pci_resource_len(dev, bir)) | |
257 | return -EIO; | |
258 | ||
259 | pa = pci_resource_start(dev, bir) + table; | |
260 | iov->mstate = ioremap(pa, nr_virtfn); | |
261 | if (!iov->mstate) | |
262 | return -ENOMEM; | |
263 | ||
264 | INIT_WORK(&iov->mtask, sriov_migration_task); | |
265 | ||
266 | iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR; | |
267 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
268 | ||
269 | return 0; | |
270 | } | |
271 | ||
272 | static void sriov_disable_migration(struct pci_dev *dev) | |
273 | { | |
274 | struct pci_sriov *iov = dev->sriov; | |
275 | ||
276 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR); | |
277 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
278 | ||
279 | cancel_work_sync(&iov->mtask); | |
280 | iounmap(iov->mstate); | |
281 | } | |
282 | ||
dd7cc44d YZ |
283 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
284 | { | |
285 | int rc; | |
286 | int i, j; | |
287 | int nres; | |
288 | u16 offset, stride, initial; | |
289 | struct resource *res; | |
290 | struct pci_dev *pdev; | |
291 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 292 | int bars = 0; |
dd7cc44d YZ |
293 | |
294 | if (!nr_virtfn) | |
295 | return 0; | |
296 | ||
297 | if (iov->nr_virtfn) | |
298 | return -EINVAL; | |
299 | ||
300 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
301 | if (initial > iov->total || | |
302 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total))) | |
303 | return -EIO; | |
304 | ||
305 | if (nr_virtfn < 0 || nr_virtfn > iov->total || | |
306 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) | |
307 | return -EINVAL; | |
308 | ||
309 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
310 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset); | |
311 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride); | |
312 | if (!offset || (nr_virtfn > 1 && !stride)) | |
313 | return -EIO; | |
314 | ||
315 | nres = 0; | |
316 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 317 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
dd7cc44d YZ |
318 | res = dev->resource + PCI_IOV_RESOURCES + i; |
319 | if (res->parent) | |
320 | nres++; | |
321 | } | |
322 | if (nres != iov->nres) { | |
323 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | |
324 | return -ENOMEM; | |
325 | } | |
326 | ||
327 | iov->offset = offset; | |
328 | iov->stride = stride; | |
329 | ||
b918c62e | 330 | if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) { |
dd7cc44d YZ |
331 | dev_err(&dev->dev, "SR-IOV: bus number out of range\n"); |
332 | return -ENOMEM; | |
333 | } | |
334 | ||
bbef98ab RP |
335 | if (pci_enable_resources(dev, bars)) { |
336 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | |
337 | return -ENOMEM; | |
338 | } | |
339 | ||
dd7cc44d YZ |
340 | if (iov->link != dev->devfn) { |
341 | pdev = pci_get_slot(dev->bus, iov->link); | |
342 | if (!pdev) | |
343 | return -ENODEV; | |
344 | ||
345 | pci_dev_put(pdev); | |
346 | ||
347 | if (!pdev->is_physfn) | |
348 | return -ENODEV; | |
349 | ||
350 | rc = sysfs_create_link(&dev->dev.kobj, | |
351 | &pdev->dev.kobj, "dep_link"); | |
352 | if (rc) | |
353 | return rc; | |
354 | } | |
355 | ||
356 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
fb51ccbf | 357 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
358 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
359 | msleep(100); | |
fb51ccbf | 360 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
361 | |
362 | iov->initial = initial; | |
363 | if (nr_virtfn < initial) | |
364 | initial = nr_virtfn; | |
365 | ||
366 | for (i = 0; i < initial; i++) { | |
367 | rc = virtfn_add(dev, i, 0); | |
368 | if (rc) | |
369 | goto failed; | |
370 | } | |
371 | ||
74bb1bcc YZ |
372 | if (iov->cap & PCI_SRIOV_CAP_VFM) { |
373 | rc = sriov_enable_migration(dev, nr_virtfn); | |
374 | if (rc) | |
375 | goto failed; | |
376 | } | |
377 | ||
dd7cc44d YZ |
378 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); |
379 | iov->nr_virtfn = nr_virtfn; | |
380 | ||
381 | return 0; | |
382 | ||
383 | failed: | |
384 | for (j = 0; j < i; j++) | |
385 | virtfn_remove(dev, j, 0); | |
386 | ||
387 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 388 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
389 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
390 | ssleep(1); | |
fb51ccbf | 391 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
392 | |
393 | if (iov->link != dev->devfn) | |
394 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
395 | ||
396 | return rc; | |
397 | } | |
398 | ||
399 | static void sriov_disable(struct pci_dev *dev) | |
400 | { | |
401 | int i; | |
402 | struct pci_sriov *iov = dev->sriov; | |
403 | ||
404 | if (!iov->nr_virtfn) | |
405 | return; | |
406 | ||
74bb1bcc YZ |
407 | if (iov->cap & PCI_SRIOV_CAP_VFM) |
408 | sriov_disable_migration(dev); | |
409 | ||
dd7cc44d YZ |
410 | for (i = 0; i < iov->nr_virtfn; i++) |
411 | virtfn_remove(dev, i, 0); | |
412 | ||
413 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 414 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
415 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
416 | ssleep(1); | |
fb51ccbf | 417 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
418 | |
419 | if (iov->link != dev->devfn) | |
420 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
421 | ||
422 | iov->nr_virtfn = 0; | |
423 | } | |
424 | ||
d1b054da YZ |
425 | static int sriov_init(struct pci_dev *dev, int pos) |
426 | { | |
427 | int i; | |
428 | int rc; | |
429 | int nres; | |
430 | u32 pgsz; | |
431 | u16 ctrl, total, offset, stride; | |
432 | struct pci_sriov *iov; | |
433 | struct resource *res; | |
434 | struct pci_dev *pdev; | |
435 | ||
436 | if (dev->pcie_type != PCI_EXP_TYPE_RC_END && | |
437 | dev->pcie_type != PCI_EXP_TYPE_ENDPOINT) | |
438 | return -ENODEV; | |
439 | ||
440 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); | |
441 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
442 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
443 | ssleep(1); | |
444 | } | |
445 | ||
446 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); | |
447 | if (!total) | |
448 | return 0; | |
449 | ||
450 | ctrl = 0; | |
451 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
452 | if (pdev->is_physfn) | |
453 | goto found; | |
454 | ||
455 | pdev = NULL; | |
456 | if (pci_ari_enabled(dev->bus)) | |
457 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
458 | ||
459 | found: | |
460 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da YZ |
461 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset); |
462 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride); | |
463 | if (!offset || (total > 1 && !stride)) | |
464 | return -EIO; | |
465 | ||
466 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
467 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
468 | pgsz &= ~((1 << i) - 1); | |
469 | if (!pgsz) | |
470 | return -EIO; | |
471 | ||
472 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 473 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da YZ |
474 | |
475 | nres = 0; | |
476 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
477 | res = dev->resource + PCI_IOV_RESOURCES + i; | |
478 | i += __pci_read_base(dev, pci_bar_unknown, res, | |
479 | pos + PCI_SRIOV_BAR + i * 4); | |
480 | if (!res->flags) | |
481 | continue; | |
482 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
483 | rc = -EIO; | |
484 | goto failed; | |
485 | } | |
486 | res->end = res->start + resource_size(res) * total - 1; | |
487 | nres++; | |
488 | } | |
489 | ||
490 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); | |
491 | if (!iov) { | |
492 | rc = -ENOMEM; | |
493 | goto failed; | |
494 | } | |
495 | ||
496 | iov->pos = pos; | |
497 | iov->nres = nres; | |
498 | iov->ctrl = ctrl; | |
499 | iov->total = total; | |
500 | iov->offset = offset; | |
501 | iov->stride = stride; | |
502 | iov->pgsz = pgsz; | |
503 | iov->self = dev; | |
504 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); | |
505 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
4d135dbe YZ |
506 | if (dev->pcie_type == PCI_EXP_TYPE_RC_END) |
507 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); | |
d1b054da YZ |
508 | |
509 | if (pdev) | |
510 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 511 | else |
d1b054da | 512 | iov->dev = dev; |
e277d2fc YZ |
513 | |
514 | mutex_init(&iov->lock); | |
d1b054da YZ |
515 | |
516 | dev->sriov = iov; | |
517 | dev->is_physfn = 1; | |
518 | ||
519 | return 0; | |
520 | ||
521 | failed: | |
522 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
523 | res = dev->resource + PCI_IOV_RESOURCES + i; | |
524 | res->flags = 0; | |
525 | } | |
526 | ||
527 | return rc; | |
528 | } | |
529 | ||
530 | static void sriov_release(struct pci_dev *dev) | |
531 | { | |
dd7cc44d YZ |
532 | BUG_ON(dev->sriov->nr_virtfn); |
533 | ||
e277d2fc | 534 | if (dev != dev->sriov->dev) |
d1b054da YZ |
535 | pci_dev_put(dev->sriov->dev); |
536 | ||
e277d2fc YZ |
537 | mutex_destroy(&dev->sriov->lock); |
538 | ||
d1b054da YZ |
539 | kfree(dev->sriov); |
540 | dev->sriov = NULL; | |
541 | } | |
542 | ||
8c5cdb6a YZ |
543 | static void sriov_restore_state(struct pci_dev *dev) |
544 | { | |
545 | int i; | |
546 | u16 ctrl; | |
547 | struct pci_sriov *iov = dev->sriov; | |
548 | ||
549 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
550 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
551 | return; | |
552 | ||
553 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) | |
554 | pci_update_resource(dev, i); | |
555 | ||
556 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
dd7cc44d | 557 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->nr_virtfn); |
8c5cdb6a YZ |
558 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
559 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
560 | msleep(100); | |
561 | } | |
562 | ||
d1b054da YZ |
563 | /** |
564 | * pci_iov_init - initialize the IOV capability | |
565 | * @dev: the PCI device | |
566 | * | |
567 | * Returns 0 on success, or negative on failure. | |
568 | */ | |
569 | int pci_iov_init(struct pci_dev *dev) | |
570 | { | |
571 | int pos; | |
572 | ||
5f4d91a1 | 573 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
574 | return -ENODEV; |
575 | ||
576 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
577 | if (pos) | |
578 | return sriov_init(dev, pos); | |
579 | ||
580 | return -ENODEV; | |
581 | } | |
582 | ||
583 | /** | |
584 | * pci_iov_release - release resources used by the IOV capability | |
585 | * @dev: the PCI device | |
586 | */ | |
587 | void pci_iov_release(struct pci_dev *dev) | |
588 | { | |
589 | if (dev->is_physfn) | |
590 | sriov_release(dev); | |
591 | } | |
592 | ||
593 | /** | |
594 | * pci_iov_resource_bar - get position of the SR-IOV BAR | |
595 | * @dev: the PCI device | |
596 | * @resno: the resource number | |
597 | * @type: the BAR type to be filled in | |
598 | * | |
599 | * Returns position of the BAR encapsulated in the SR-IOV capability. | |
600 | */ | |
601 | int pci_iov_resource_bar(struct pci_dev *dev, int resno, | |
602 | enum pci_bar_type *type) | |
603 | { | |
604 | if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END) | |
605 | return 0; | |
606 | ||
607 | BUG_ON(!dev->is_physfn); | |
608 | ||
609 | *type = pci_bar_unknown; | |
610 | ||
611 | return dev->sriov->pos + PCI_SRIOV_BAR + | |
612 | 4 * (resno - PCI_IOV_RESOURCES); | |
613 | } | |
8c5cdb6a | 614 | |
6faf17f6 CW |
615 | /** |
616 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
617 | * @dev: the PCI device | |
618 | * @resno: the resource number | |
619 | * | |
620 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
621 | * This is not the same as the resource size which is defined as | |
622 | * the VF BAR size multiplied by the number of VFs. The alignment | |
623 | * is just the VF BAR size. | |
624 | */ | |
0e52247a | 625 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 CW |
626 | { |
627 | struct resource tmp; | |
628 | enum pci_bar_type type; | |
629 | int reg = pci_iov_resource_bar(dev, resno, &type); | |
630 | ||
631 | if (!reg) | |
632 | return 0; | |
633 | ||
634 | __pci_read_base(dev, type, &tmp, reg); | |
635 | return resource_alignment(&tmp); | |
636 | } | |
637 | ||
8c5cdb6a YZ |
638 | /** |
639 | * pci_restore_iov_state - restore the state of the IOV capability | |
640 | * @dev: the PCI device | |
641 | */ | |
642 | void pci_restore_iov_state(struct pci_dev *dev) | |
643 | { | |
644 | if (dev->is_physfn) | |
645 | sriov_restore_state(dev); | |
646 | } | |
a28724b0 YZ |
647 | |
648 | /** | |
649 | * pci_iov_bus_range - find bus range used by Virtual Function | |
650 | * @bus: the PCI bus | |
651 | * | |
652 | * Returns max number of buses (exclude current one) used by Virtual | |
653 | * Functions. | |
654 | */ | |
655 | int pci_iov_bus_range(struct pci_bus *bus) | |
656 | { | |
657 | int max = 0; | |
658 | u8 busnr; | |
659 | struct pci_dev *dev; | |
660 | ||
661 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
662 | if (!dev->is_physfn) | |
663 | continue; | |
664 | busnr = virtfn_bus(dev, dev->sriov->total - 1); | |
665 | if (busnr > max) | |
666 | max = busnr; | |
667 | } | |
668 | ||
669 | return max ? max - bus->number : 0; | |
670 | } | |
dd7cc44d YZ |
671 | |
672 | /** | |
673 | * pci_enable_sriov - enable the SR-IOV capability | |
674 | * @dev: the PCI device | |
52a8873b | 675 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
676 | * |
677 | * Returns 0 on success, or negative on failure. | |
678 | */ | |
679 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
680 | { | |
681 | might_sleep(); | |
682 | ||
683 | if (!dev->is_physfn) | |
684 | return -ENODEV; | |
685 | ||
686 | return sriov_enable(dev, nr_virtfn); | |
687 | } | |
688 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
689 | ||
690 | /** | |
691 | * pci_disable_sriov - disable the SR-IOV capability | |
692 | * @dev: the PCI device | |
693 | */ | |
694 | void pci_disable_sriov(struct pci_dev *dev) | |
695 | { | |
696 | might_sleep(); | |
697 | ||
698 | if (!dev->is_physfn) | |
699 | return; | |
700 | ||
701 | sriov_disable(dev); | |
702 | } | |
703 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc YZ |
704 | |
705 | /** | |
706 | * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration | |
707 | * @dev: the PCI device | |
708 | * | |
709 | * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not. | |
710 | * | |
711 | * Physical Function driver is responsible to register IRQ handler using | |
712 | * VF Migration Interrupt Message Number, and call this function when the | |
713 | * interrupt is generated by the hardware. | |
714 | */ | |
715 | irqreturn_t pci_sriov_migration(struct pci_dev *dev) | |
716 | { | |
717 | if (!dev->is_physfn) | |
718 | return IRQ_NONE; | |
719 | ||
720 | return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE; | |
721 | } | |
722 | EXPORT_SYMBOL_GPL(pci_sriov_migration); | |
302b4215 | 723 | |
fb8a0d9d WM |
724 | /** |
725 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
726 | * @dev: the PCI device | |
727 | * | |
728 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
729 | */ | |
730 | int pci_num_vf(struct pci_dev *dev) | |
731 | { | |
732 | if (!dev || !dev->is_physfn) | |
733 | return 0; | |
734 | else | |
735 | return dev->sriov->nr_virtfn; | |
736 | } | |
737 | EXPORT_SYMBOL_GPL(pci_num_vf); |