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Commit | Line | Data |
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7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
d1b054da | 2 | /* |
df62ab5e | 3 | * PCI Express I/O Virtualization (IOV) support |
d1b054da | 4 | * Single Root IOV 1.0 |
302b4215 | 5 | * Address Translation Service 1.0 |
df62ab5e BH |
6 | * |
7 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
d1b054da YZ |
8 | */ |
9 | ||
10 | #include <linux/pci.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
363c75db | 12 | #include <linux/export.h> |
d1b054da YZ |
13 | #include <linux/string.h> |
14 | #include <linux/delay.h> | |
15 | #include "pci.h" | |
16 | ||
dd7cc44d | 17 | #define VIRTFN_ID_LEN 16 |
d1b054da | 18 | |
b07579c0 | 19 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 20 | { |
b07579c0 WY |
21 | if (!dev->is_physfn) |
22 | return -EINVAL; | |
a28724b0 | 23 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 24 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
25 | } |
26 | ||
b07579c0 | 27 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 28 | { |
b07579c0 WY |
29 | if (!dev->is_physfn) |
30 | return -EINVAL; | |
a28724b0 | 31 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 32 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
33 | } |
34 | ||
f59dca27 WY |
35 | /* |
36 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
37 | * change when NumVFs changes. | |
38 | * | |
39 | * Update iov->offset and iov->stride when NumVFs is written. | |
40 | */ | |
41 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
42 | { | |
43 | struct pci_sriov *iov = dev->sriov; | |
44 | ||
45 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
46 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
47 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
48 | } | |
49 | ||
4449f079 WY |
50 | /* |
51 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
52 | * determine how many additional bus numbers will be consumed by VFs. | |
53 | * | |
ea9a8854 AD |
54 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
55 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 56 | */ |
ea9a8854 | 57 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
58 | { |
59 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 60 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 61 | |
ea9a8854 | 62 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 63 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
64 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
65 | rc = -EIO; | |
66 | goto out; | |
67 | } | |
68 | ||
b07579c0 | 69 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
70 | if (busnr > iov->max_VF_buses) |
71 | iov->max_VF_buses = busnr; | |
4449f079 WY |
72 | } |
73 | ||
ea9a8854 AD |
74 | out: |
75 | pci_iov_set_numvfs(dev, 0); | |
76 | return rc; | |
4449f079 WY |
77 | } |
78 | ||
dd7cc44d YZ |
79 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
80 | { | |
dd7cc44d YZ |
81 | struct pci_bus *child; |
82 | ||
83 | if (bus->number == busnr) | |
84 | return bus; | |
85 | ||
86 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
87 | if (child) | |
88 | return child; | |
89 | ||
90 | child = pci_add_new_bus(bus, NULL, busnr); | |
91 | if (!child) | |
92 | return NULL; | |
93 | ||
b7eac055 | 94 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
95 | |
96 | return child; | |
97 | } | |
98 | ||
dc087f2f | 99 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 100 | { |
dc087f2f JL |
101 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
102 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
103 | } |
104 | ||
0e6c9122 WY |
105 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
106 | { | |
107 | if (!dev->is_physfn) | |
108 | return 0; | |
109 | ||
110 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
111 | } | |
112 | ||
cf0921be KA |
113 | static void pci_read_vf_config_common(struct pci_dev *virtfn) |
114 | { | |
115 | struct pci_dev *physfn = virtfn->physfn; | |
116 | ||
117 | /* | |
118 | * Some config registers are the same across all associated VFs. | |
119 | * Read them once from VF0 so we can skip reading them from the | |
120 | * other VFs. | |
121 | * | |
122 | * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to | |
123 | * have the same Revision ID and Subsystem ID, but we assume they | |
124 | * do. | |
125 | */ | |
126 | pci_read_config_dword(virtfn, PCI_CLASS_REVISION, | |
127 | &physfn->sriov->class); | |
128 | pci_read_config_byte(virtfn, PCI_HEADER_TYPE, | |
129 | &physfn->sriov->hdr_type); | |
130 | pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID, | |
131 | &physfn->sriov->subsystem_vendor); | |
132 | pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID, | |
133 | &physfn->sriov->subsystem_device); | |
134 | } | |
135 | ||
a1ceea67 NS |
136 | int pci_iov_sysfs_link(struct pci_dev *dev, |
137 | struct pci_dev *virtfn, int id) | |
138 | { | |
139 | char buf[VIRTFN_ID_LEN]; | |
140 | int rc; | |
141 | ||
142 | sprintf(buf, "virtfn%u", id); | |
143 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
144 | if (rc) | |
145 | goto failed; | |
146 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
147 | if (rc) | |
148 | goto failed1; | |
149 | ||
150 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
151 | ||
152 | return 0; | |
153 | ||
154 | failed1: | |
155 | sysfs_remove_link(&dev->dev.kobj, buf); | |
156 | failed: | |
157 | return rc; | |
158 | } | |
159 | ||
753f6124 | 160 | int pci_iov_add_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
161 | { |
162 | int i; | |
dc087f2f | 163 | int rc = -ENOMEM; |
dd7cc44d | 164 | u64 size; |
dd7cc44d YZ |
165 | struct pci_dev *virtfn; |
166 | struct resource *res; | |
167 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 168 | struct pci_bus *bus; |
dd7cc44d | 169 | |
b07579c0 | 170 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
171 | if (!bus) |
172 | goto failed; | |
173 | ||
174 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 175 | if (!virtfn) |
dc087f2f | 176 | goto failed0; |
dd7cc44d | 177 | |
b07579c0 | 178 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d | 179 | virtfn->vendor = dev->vendor; |
3142d832 | 180 | virtfn->device = iov->vf_device; |
cf0921be KA |
181 | virtfn->is_virtfn = 1; |
182 | virtfn->physfn = pci_dev_get(dev); | |
183 | ||
184 | if (id == 0) | |
185 | pci_read_vf_config_common(virtfn); | |
186 | ||
156c5532 PL |
187 | rc = pci_setup_device(virtfn); |
188 | if (rc) | |
cf0921be | 189 | goto failed1; |
156c5532 | 190 | |
dd7cc44d | 191 | virtfn->dev.parent = dev->dev.parent; |
aa931977 | 192 | virtfn->multifunction = 0; |
dd7cc44d YZ |
193 | |
194 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 195 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
196 | if (!res->parent) |
197 | continue; | |
198 | virtfn->resource[i].name = pci_name(virtfn); | |
199 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 200 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
201 | virtfn->resource[i].start = res->start + size * id; |
202 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
203 | rc = request_resource(res, &virtfn->resource[i]); | |
204 | BUG_ON(rc); | |
205 | } | |
206 | ||
dd7cc44d | 207 | pci_device_add(virtfn, virtfn->bus); |
a1ceea67 | 208 | rc = pci_iov_sysfs_link(dev, virtfn, id); |
dd7cc44d | 209 | if (rc) |
8c386cc8 | 210 | goto failed1; |
dd7cc44d | 211 | |
27d61629 SH |
212 | pci_bus_add_device(virtfn); |
213 | ||
dd7cc44d YZ |
214 | return 0; |
215 | ||
dd7cc44d | 216 | failed1: |
8c386cc8 | 217 | pci_stop_and_remove_bus_device(virtfn); |
dd7cc44d | 218 | pci_dev_put(dev); |
dc087f2f JL |
219 | failed0: |
220 | virtfn_remove_bus(dev->bus, bus); | |
221 | failed: | |
dd7cc44d YZ |
222 | |
223 | return rc; | |
224 | } | |
225 | ||
753f6124 | 226 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
227 | { |
228 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d | 229 | struct pci_dev *virtfn; |
dd7cc44d | 230 | |
dc087f2f | 231 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
232 | pci_iov_virtfn_bus(dev, id), |
233 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
234 | if (!virtfn) |
235 | return; | |
236 | ||
dd7cc44d YZ |
237 | sprintf(buf, "virtfn%u", id); |
238 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
239 | /* |
240 | * pci_stop_dev() could have been called for this virtfn already, | |
241 | * so the directory for the virtfn may have been removed before. | |
242 | * Double check to avoid spurious sysfs warnings. | |
243 | */ | |
244 | if (virtfn->dev.kobj.sd) | |
245 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d | 246 | |
210647af | 247 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 248 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d | 249 | |
dc087f2f JL |
250 | /* balance pci_get_domain_bus_and_slot() */ |
251 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
252 | pci_dev_put(dev); |
253 | } | |
254 | ||
aaee0c1f KS |
255 | static ssize_t sriov_totalvfs_show(struct device *dev, |
256 | struct device_attribute *attr, | |
257 | char *buf) | |
258 | { | |
259 | struct pci_dev *pdev = to_pci_dev(dev); | |
260 | ||
261 | return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); | |
262 | } | |
263 | ||
264 | static ssize_t sriov_numvfs_show(struct device *dev, | |
265 | struct device_attribute *attr, | |
266 | char *buf) | |
267 | { | |
268 | struct pci_dev *pdev = to_pci_dev(dev); | |
35ff867b | 269 | u16 num_vfs; |
aaee0c1f | 270 | |
35ff867b PC |
271 | /* Serialize vs sriov_numvfs_store() so readers see valid num_VFs */ |
272 | device_lock(&pdev->dev); | |
273 | num_vfs = pdev->sriov->num_VFs; | |
274 | device_unlock(&pdev->dev); | |
275 | ||
276 | return sprintf(buf, "%u\n", num_vfs); | |
aaee0c1f KS |
277 | } |
278 | ||
279 | /* | |
280 | * num_vfs > 0; number of VFs to enable | |
281 | * num_vfs = 0; disable all VFs | |
282 | * | |
283 | * Note: SRIOV spec does not allow partial VF | |
284 | * disable, so it's all or none. | |
285 | */ | |
286 | static ssize_t sriov_numvfs_store(struct device *dev, | |
287 | struct device_attribute *attr, | |
288 | const char *buf, size_t count) | |
289 | { | |
290 | struct pci_dev *pdev = to_pci_dev(dev); | |
291 | int ret; | |
292 | u16 num_vfs; | |
293 | ||
294 | ret = kstrtou16(buf, 0, &num_vfs); | |
295 | if (ret < 0) | |
296 | return ret; | |
297 | ||
298 | if (num_vfs > pci_sriov_get_totalvfs(pdev)) | |
299 | return -ERANGE; | |
300 | ||
301 | device_lock(&pdev->dev); | |
302 | ||
303 | if (num_vfs == pdev->sriov->num_VFs) | |
304 | goto exit; | |
305 | ||
306 | /* is PF driver loaded w/callback */ | |
307 | if (!pdev->driver || !pdev->driver->sriov_configure) { | |
308 | pci_info(pdev, "Driver does not support SRIOV configuration via sysfs\n"); | |
309 | ret = -ENOENT; | |
310 | goto exit; | |
311 | } | |
312 | ||
313 | if (num_vfs == 0) { | |
314 | /* disable VFs */ | |
315 | ret = pdev->driver->sriov_configure(pdev, 0); | |
316 | goto exit; | |
317 | } | |
318 | ||
319 | /* enable VFs */ | |
320 | if (pdev->sriov->num_VFs) { | |
321 | pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n", | |
322 | pdev->sriov->num_VFs, num_vfs); | |
323 | ret = -EBUSY; | |
324 | goto exit; | |
325 | } | |
326 | ||
327 | ret = pdev->driver->sriov_configure(pdev, num_vfs); | |
328 | if (ret < 0) | |
329 | goto exit; | |
330 | ||
331 | if (ret != num_vfs) | |
332 | pci_warn(pdev, "%d VFs requested; only %d enabled\n", | |
333 | num_vfs, ret); | |
334 | ||
335 | exit: | |
336 | device_unlock(&pdev->dev); | |
337 | ||
338 | if (ret < 0) | |
339 | return ret; | |
340 | ||
341 | return count; | |
342 | } | |
343 | ||
344 | static ssize_t sriov_offset_show(struct device *dev, | |
345 | struct device_attribute *attr, | |
346 | char *buf) | |
347 | { | |
348 | struct pci_dev *pdev = to_pci_dev(dev); | |
349 | ||
350 | return sprintf(buf, "%u\n", pdev->sriov->offset); | |
351 | } | |
352 | ||
353 | static ssize_t sriov_stride_show(struct device *dev, | |
354 | struct device_attribute *attr, | |
355 | char *buf) | |
356 | { | |
357 | struct pci_dev *pdev = to_pci_dev(dev); | |
358 | ||
359 | return sprintf(buf, "%u\n", pdev->sriov->stride); | |
360 | } | |
361 | ||
362 | static ssize_t sriov_vf_device_show(struct device *dev, | |
363 | struct device_attribute *attr, | |
364 | char *buf) | |
365 | { | |
366 | struct pci_dev *pdev = to_pci_dev(dev); | |
367 | ||
368 | return sprintf(buf, "%x\n", pdev->sriov->vf_device); | |
369 | } | |
370 | ||
371 | static ssize_t sriov_drivers_autoprobe_show(struct device *dev, | |
372 | struct device_attribute *attr, | |
373 | char *buf) | |
374 | { | |
375 | struct pci_dev *pdev = to_pci_dev(dev); | |
376 | ||
377 | return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe); | |
378 | } | |
379 | ||
380 | static ssize_t sriov_drivers_autoprobe_store(struct device *dev, | |
381 | struct device_attribute *attr, | |
382 | const char *buf, size_t count) | |
383 | { | |
384 | struct pci_dev *pdev = to_pci_dev(dev); | |
385 | bool drivers_autoprobe; | |
386 | ||
387 | if (kstrtobool(buf, &drivers_autoprobe) < 0) | |
388 | return -EINVAL; | |
389 | ||
390 | pdev->sriov->drivers_autoprobe = drivers_autoprobe; | |
391 | ||
392 | return count; | |
393 | } | |
394 | ||
395 | static DEVICE_ATTR_RO(sriov_totalvfs); | |
244c06c3 | 396 | static DEVICE_ATTR_RW(sriov_numvfs); |
aaee0c1f KS |
397 | static DEVICE_ATTR_RO(sriov_offset); |
398 | static DEVICE_ATTR_RO(sriov_stride); | |
399 | static DEVICE_ATTR_RO(sriov_vf_device); | |
244c06c3 | 400 | static DEVICE_ATTR_RW(sriov_drivers_autoprobe); |
aaee0c1f KS |
401 | |
402 | static struct attribute *sriov_dev_attrs[] = { | |
403 | &dev_attr_sriov_totalvfs.attr, | |
404 | &dev_attr_sriov_numvfs.attr, | |
405 | &dev_attr_sriov_offset.attr, | |
406 | &dev_attr_sriov_stride.attr, | |
407 | &dev_attr_sriov_vf_device.attr, | |
408 | &dev_attr_sriov_drivers_autoprobe.attr, | |
409 | NULL, | |
410 | }; | |
411 | ||
412 | static umode_t sriov_attrs_are_visible(struct kobject *kobj, | |
413 | struct attribute *a, int n) | |
414 | { | |
415 | struct device *dev = kobj_to_dev(kobj); | |
416 | ||
417 | if (!dev_is_pf(dev)) | |
418 | return 0; | |
419 | ||
420 | return a->mode; | |
421 | } | |
422 | ||
423 | const struct attribute_group sriov_dev_attr_group = { | |
424 | .attrs = sriov_dev_attrs, | |
425 | .is_visible = sriov_attrs_are_visible, | |
426 | }; | |
427 | ||
995df527 WY |
428 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
429 | { | |
a39e3fcd AD |
430 | return 0; |
431 | } | |
432 | ||
433 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
434 | { | |
435 | return 0; | |
995df527 WY |
436 | } |
437 | ||
18f9e9d1 SO |
438 | static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs) |
439 | { | |
440 | unsigned int i; | |
441 | int rc; | |
442 | ||
aff68a5a SO |
443 | if (dev->no_vf_scan) |
444 | return 0; | |
445 | ||
18f9e9d1 SO |
446 | for (i = 0; i < num_vfs; i++) { |
447 | rc = pci_iov_add_virtfn(dev, i); | |
448 | if (rc) | |
449 | goto failed; | |
450 | } | |
451 | return 0; | |
452 | failed: | |
453 | while (i--) | |
454 | pci_iov_remove_virtfn(dev, i); | |
455 | ||
456 | return rc; | |
457 | } | |
458 | ||
dd7cc44d YZ |
459 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
460 | { | |
461 | int rc; | |
3443c382 | 462 | int i; |
dd7cc44d | 463 | int nres; |
ce288ec3 | 464 | u16 initial; |
dd7cc44d YZ |
465 | struct resource *res; |
466 | struct pci_dev *pdev; | |
467 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 468 | int bars = 0; |
b07579c0 | 469 | int bus; |
dd7cc44d YZ |
470 | |
471 | if (!nr_virtfn) | |
472 | return 0; | |
473 | ||
6b136724 | 474 | if (iov->num_VFs) |
dd7cc44d YZ |
475 | return -EINVAL; |
476 | ||
477 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
478 | if (initial > iov->total_VFs || |
479 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
480 | return -EIO; |
481 | ||
6b136724 | 482 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
483 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
484 | return -EINVAL; | |
485 | ||
dd7cc44d YZ |
486 | nres = 0; |
487 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 488 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 489 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
490 | if (res->parent) |
491 | nres++; | |
492 | } | |
493 | if (nres != iov->nres) { | |
7506dc79 | 494 | pci_err(dev, "not enough MMIO resources for SR-IOV\n"); |
dd7cc44d YZ |
495 | return -ENOMEM; |
496 | } | |
497 | ||
b07579c0 | 498 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa | 499 | if (bus > dev->bus->busn_res.end) { |
7506dc79 | 500 | pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", |
68f8e9fa | 501 | nr_virtfn, bus, &dev->bus->busn_res); |
dd7cc44d YZ |
502 | return -ENOMEM; |
503 | } | |
504 | ||
bbef98ab | 505 | if (pci_enable_resources(dev, bars)) { |
7506dc79 | 506 | pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); |
bbef98ab RP |
507 | return -ENOMEM; |
508 | } | |
509 | ||
dd7cc44d YZ |
510 | if (iov->link != dev->devfn) { |
511 | pdev = pci_get_slot(dev->bus, iov->link); | |
512 | if (!pdev) | |
513 | return -ENODEV; | |
514 | ||
dc087f2f JL |
515 | if (!pdev->is_physfn) { |
516 | pci_dev_put(pdev); | |
652d1100 | 517 | return -ENOSYS; |
dc087f2f | 518 | } |
dd7cc44d YZ |
519 | |
520 | rc = sysfs_create_link(&dev->dev.kobj, | |
521 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 522 | pci_dev_put(pdev); |
dd7cc44d YZ |
523 | if (rc) |
524 | return rc; | |
525 | } | |
526 | ||
6b136724 | 527 | iov->initial_VFs = initial; |
dd7cc44d YZ |
528 | if (nr_virtfn < initial) |
529 | initial = nr_virtfn; | |
530 | ||
c23b6135 AD |
531 | rc = pcibios_sriov_enable(dev, initial); |
532 | if (rc) { | |
7506dc79 | 533 | pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); |
c23b6135 | 534 | goto err_pcibios; |
995df527 WY |
535 | } |
536 | ||
f40ec3c7 GS |
537 | pci_iov_set_numvfs(dev, nr_virtfn); |
538 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
539 | pci_cfg_access_lock(dev); | |
540 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
541 | msleep(100); | |
542 | pci_cfg_access_unlock(dev); | |
543 | ||
18f9e9d1 SO |
544 | rc = sriov_add_vfs(dev, initial); |
545 | if (rc) | |
546 | goto err_pcibios; | |
dd7cc44d YZ |
547 | |
548 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 549 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
550 | |
551 | return 0; | |
552 | ||
c23b6135 | 553 | err_pcibios: |
dd7cc44d | 554 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 555 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
556 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
557 | ssleep(1); | |
fb51ccbf | 558 | pci_cfg_access_unlock(dev); |
dd7cc44d | 559 | |
0fc690a7 GS |
560 | pcibios_sriov_disable(dev); |
561 | ||
dd7cc44d YZ |
562 | if (iov->link != dev->devfn) |
563 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
564 | ||
b3908644 | 565 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
566 | return rc; |
567 | } | |
568 | ||
18f9e9d1 | 569 | static void sriov_del_vfs(struct pci_dev *dev) |
dd7cc44d | 570 | { |
18f9e9d1 | 571 | struct pci_sriov *iov = dev->sriov; |
dd7cc44d | 572 | int i; |
18f9e9d1 SO |
573 | |
574 | for (i = 0; i < iov->num_VFs; i++) | |
575 | pci_iov_remove_virtfn(dev, i); | |
576 | } | |
577 | ||
578 | static void sriov_disable(struct pci_dev *dev) | |
579 | { | |
dd7cc44d YZ |
580 | struct pci_sriov *iov = dev->sriov; |
581 | ||
6b136724 | 582 | if (!iov->num_VFs) |
dd7cc44d YZ |
583 | return; |
584 | ||
18f9e9d1 | 585 | sriov_del_vfs(dev); |
dd7cc44d | 586 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 587 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
588 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
589 | ssleep(1); | |
fb51ccbf | 590 | pci_cfg_access_unlock(dev); |
dd7cc44d | 591 | |
0fc690a7 GS |
592 | pcibios_sriov_disable(dev); |
593 | ||
dd7cc44d YZ |
594 | if (iov->link != dev->devfn) |
595 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
596 | ||
6b136724 | 597 | iov->num_VFs = 0; |
f59dca27 | 598 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
599 | } |
600 | ||
d1b054da YZ |
601 | static int sriov_init(struct pci_dev *dev, int pos) |
602 | { | |
0e6c9122 | 603 | int i, bar64; |
d1b054da YZ |
604 | int rc; |
605 | int nres; | |
606 | u32 pgsz; | |
ea9a8854 | 607 | u16 ctrl, total; |
d1b054da YZ |
608 | struct pci_sriov *iov; |
609 | struct resource *res; | |
610 | struct pci_dev *pdev; | |
611 | ||
d1b054da YZ |
612 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
613 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
614 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
615 | ssleep(1); | |
616 | } | |
617 | ||
d1b054da YZ |
618 | ctrl = 0; |
619 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
620 | if (pdev->is_physfn) | |
621 | goto found; | |
622 | ||
623 | pdev = NULL; | |
624 | if (pci_ari_enabled(dev->bus)) | |
625 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
626 | ||
627 | found: | |
628 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 629 | |
ff45f9dd BS |
630 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
631 | if (!total) | |
632 | return 0; | |
d1b054da YZ |
633 | |
634 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
635 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
636 | pgsz &= ~((1 << i) - 1); | |
637 | if (!pgsz) | |
638 | return -EIO; | |
639 | ||
640 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 641 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 642 | |
0e6c9122 WY |
643 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
644 | if (!iov) | |
645 | return -ENOMEM; | |
646 | ||
d1b054da YZ |
647 | nres = 0; |
648 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 649 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
650 | /* |
651 | * If it is already FIXED, don't change it, something | |
652 | * (perhaps EA or header fixups) wants it this way. | |
653 | */ | |
654 | if (res->flags & IORESOURCE_PCI_FIXED) | |
655 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
656 | else | |
657 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
658 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
659 | if (!res->flags) |
660 | continue; | |
661 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
662 | rc = -EIO; | |
663 | goto failed; | |
664 | } | |
0e6c9122 | 665 | iov->barsz[i] = resource_size(res); |
d1b054da | 666 | res->end = res->start + resource_size(res) * total - 1; |
7506dc79 | 667 | pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
e88ae01d | 668 | i, res, i, total); |
0e6c9122 | 669 | i += bar64; |
d1b054da YZ |
670 | nres++; |
671 | } | |
672 | ||
d1b054da YZ |
673 | iov->pos = pos; |
674 | iov->nres = nres; | |
675 | iov->ctrl = ctrl; | |
6b136724 | 676 | iov->total_VFs = total; |
8d85a7a4 | 677 | iov->driver_max_VFs = total; |
3142d832 | 678 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); |
d1b054da YZ |
679 | iov->pgsz = pgsz; |
680 | iov->self = dev; | |
0e7df224 | 681 | iov->drivers_autoprobe = true; |
d1b054da YZ |
682 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); |
683 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 684 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 685 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
686 | |
687 | if (pdev) | |
688 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 689 | else |
d1b054da | 690 | iov->dev = dev; |
e277d2fc | 691 | |
d1b054da YZ |
692 | dev->sriov = iov; |
693 | dev->is_physfn = 1; | |
ea9a8854 AD |
694 | rc = compute_max_vf_buses(dev); |
695 | if (rc) | |
696 | goto fail_max_buses; | |
d1b054da YZ |
697 | |
698 | return 0; | |
699 | ||
ea9a8854 AD |
700 | fail_max_buses: |
701 | dev->sriov = NULL; | |
702 | dev->is_physfn = 0; | |
d1b054da YZ |
703 | failed: |
704 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 705 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
706 | res->flags = 0; |
707 | } | |
708 | ||
0e6c9122 | 709 | kfree(iov); |
d1b054da YZ |
710 | return rc; |
711 | } | |
712 | ||
713 | static void sriov_release(struct pci_dev *dev) | |
714 | { | |
6b136724 | 715 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 716 | |
e277d2fc | 717 | if (dev != dev->sriov->dev) |
d1b054da YZ |
718 | pci_dev_put(dev->sriov->dev); |
719 | ||
720 | kfree(dev->sriov); | |
721 | dev->sriov = NULL; | |
722 | } | |
723 | ||
8c5cdb6a YZ |
724 | static void sriov_restore_state(struct pci_dev *dev) |
725 | { | |
726 | int i; | |
727 | u16 ctrl; | |
728 | struct pci_sriov *iov = dev->sriov; | |
729 | ||
730 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
731 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
732 | return; | |
733 | ||
ff26449e TN |
734 | /* |
735 | * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because | |
736 | * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. | |
737 | */ | |
738 | ctrl &= ~PCI_SRIOV_CTRL_ARI; | |
739 | ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; | |
740 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); | |
741 | ||
39098edb DE |
742 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) |
743 | pci_update_resource(dev, i + PCI_IOV_RESOURCES); | |
8c5cdb6a YZ |
744 | |
745 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 746 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
747 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
748 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
749 | msleep(100); | |
750 | } | |
751 | ||
d1b054da YZ |
752 | /** |
753 | * pci_iov_init - initialize the IOV capability | |
754 | * @dev: the PCI device | |
755 | * | |
756 | * Returns 0 on success, or negative on failure. | |
757 | */ | |
758 | int pci_iov_init(struct pci_dev *dev) | |
759 | { | |
760 | int pos; | |
761 | ||
5f4d91a1 | 762 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
763 | return -ENODEV; |
764 | ||
765 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
766 | if (pos) | |
767 | return sriov_init(dev, pos); | |
768 | ||
769 | return -ENODEV; | |
770 | } | |
771 | ||
772 | /** | |
773 | * pci_iov_release - release resources used by the IOV capability | |
774 | * @dev: the PCI device | |
775 | */ | |
776 | void pci_iov_release(struct pci_dev *dev) | |
777 | { | |
778 | if (dev->is_physfn) | |
779 | sriov_release(dev); | |
780 | } | |
781 | ||
38972375 JK |
782 | /** |
783 | * pci_iov_remove - clean up SR-IOV state after PF driver is detached | |
784 | * @dev: the PCI device | |
785 | */ | |
786 | void pci_iov_remove(struct pci_dev *dev) | |
787 | { | |
788 | struct pci_sriov *iov = dev->sriov; | |
789 | ||
790 | if (!dev->is_physfn) | |
791 | return; | |
792 | ||
793 | iov->driver_max_VFs = iov->total_VFs; | |
794 | if (iov->num_VFs) | |
795 | pci_warn(dev, "driver left SR-IOV enabled after remove\n"); | |
796 | } | |
797 | ||
6ffa2489 BH |
798 | /** |
799 | * pci_iov_update_resource - update a VF BAR | |
800 | * @dev: the PCI device | |
801 | * @resno: the resource number | |
802 | * | |
803 | * Update a VF BAR in the SR-IOV capability of a PF. | |
804 | */ | |
805 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
806 | { | |
807 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
808 | struct resource *res = dev->resource + resno; | |
809 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
810 | struct pci_bus_region region; | |
546ba9f8 | 811 | u16 cmd; |
6ffa2489 BH |
812 | u32 new; |
813 | int reg; | |
814 | ||
815 | /* | |
816 | * The generic pci_restore_bars() path calls this for all devices, | |
817 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
818 | * have nothing to do. | |
819 | */ | |
820 | if (!iov) | |
821 | return; | |
822 | ||
546ba9f8 BH |
823 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
824 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
825 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
826 | vf_bar, res); | |
827 | return; | |
828 | } | |
829 | ||
6ffa2489 BH |
830 | /* |
831 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
832 | * BARs, and non-movable resources, e.g., those described via | |
833 | * Enhanced Allocation. | |
834 | */ | |
835 | if (!res->flags) | |
836 | return; | |
837 | ||
838 | if (res->flags & IORESOURCE_UNSET) | |
839 | return; | |
840 | ||
841 | if (res->flags & IORESOURCE_PCI_FIXED) | |
842 | return; | |
843 | ||
844 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
845 | new = region.start; | |
846 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
847 | ||
848 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
849 | pci_write_config_dword(dev, reg, new); | |
850 | if (res->flags & IORESOURCE_MEM_64) { | |
851 | new = region.start >> 16 >> 16; | |
852 | pci_write_config_dword(dev, reg + 4, new); | |
853 | } | |
854 | } | |
855 | ||
978d2d68 WY |
856 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
857 | int resno) | |
858 | { | |
859 | return pci_iov_resource_size(dev, resno); | |
860 | } | |
861 | ||
6faf17f6 CW |
862 | /** |
863 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
864 | * @dev: the PCI device | |
865 | * @resno: the resource number | |
866 | * | |
867 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
868 | * This is not the same as the resource size which is defined as | |
869 | * the VF BAR size multiplied by the number of VFs. The alignment | |
870 | * is just the VF BAR size. | |
871 | */ | |
0e52247a | 872 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 873 | { |
978d2d68 | 874 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
875 | } |
876 | ||
8c5cdb6a YZ |
877 | /** |
878 | * pci_restore_iov_state - restore the state of the IOV capability | |
879 | * @dev: the PCI device | |
880 | */ | |
881 | void pci_restore_iov_state(struct pci_dev *dev) | |
882 | { | |
883 | if (dev->is_physfn) | |
884 | sriov_restore_state(dev); | |
885 | } | |
a28724b0 | 886 | |
608c0d88 BL |
887 | /** |
888 | * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs | |
889 | * @dev: the PCI device | |
890 | * @auto_probe: set VF drivers auto probe flag | |
891 | */ | |
892 | void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe) | |
893 | { | |
894 | if (dev->is_physfn) | |
895 | dev->sriov->drivers_autoprobe = auto_probe; | |
896 | } | |
897 | ||
a28724b0 YZ |
898 | /** |
899 | * pci_iov_bus_range - find bus range used by Virtual Function | |
900 | * @bus: the PCI bus | |
901 | * | |
902 | * Returns max number of buses (exclude current one) used by Virtual | |
903 | * Functions. | |
904 | */ | |
905 | int pci_iov_bus_range(struct pci_bus *bus) | |
906 | { | |
907 | int max = 0; | |
a28724b0 YZ |
908 | struct pci_dev *dev; |
909 | ||
910 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
911 | if (!dev->is_physfn) | |
912 | continue; | |
4449f079 WY |
913 | if (dev->sriov->max_VF_buses > max) |
914 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
915 | } |
916 | ||
917 | return max ? max - bus->number : 0; | |
918 | } | |
dd7cc44d YZ |
919 | |
920 | /** | |
921 | * pci_enable_sriov - enable the SR-IOV capability | |
922 | * @dev: the PCI device | |
52a8873b | 923 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
924 | * |
925 | * Returns 0 on success, or negative on failure. | |
926 | */ | |
927 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
928 | { | |
929 | might_sleep(); | |
930 | ||
931 | if (!dev->is_physfn) | |
652d1100 | 932 | return -ENOSYS; |
dd7cc44d YZ |
933 | |
934 | return sriov_enable(dev, nr_virtfn); | |
935 | } | |
936 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
937 | ||
938 | /** | |
939 | * pci_disable_sriov - disable the SR-IOV capability | |
940 | * @dev: the PCI device | |
941 | */ | |
942 | void pci_disable_sriov(struct pci_dev *dev) | |
943 | { | |
944 | might_sleep(); | |
945 | ||
946 | if (!dev->is_physfn) | |
947 | return; | |
948 | ||
949 | sriov_disable(dev); | |
950 | } | |
951 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 952 | |
fb8a0d9d WM |
953 | /** |
954 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
955 | * @dev: the PCI device | |
956 | * | |
957 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
958 | */ | |
959 | int pci_num_vf(struct pci_dev *dev) | |
960 | { | |
1452cd76 | 961 | if (!dev->is_physfn) |
fb8a0d9d | 962 | return 0; |
1452cd76 BH |
963 | |
964 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
965 | } |
966 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 967 | |
5a8eb242 AD |
968 | /** |
969 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
970 | * @dev: the PCI device | |
971 | * | |
972 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 973 | * If device is not a physical function returns 0. |
5a8eb242 AD |
974 | */ |
975 | int pci_vfs_assigned(struct pci_dev *dev) | |
976 | { | |
977 | struct pci_dev *vfdev; | |
978 | unsigned int vfs_assigned = 0; | |
979 | unsigned short dev_id; | |
980 | ||
981 | /* only search if we are a PF */ | |
982 | if (!dev->is_physfn) | |
983 | return 0; | |
984 | ||
985 | /* | |
986 | * determine the device ID for the VFs, the vendor ID will be the | |
987 | * same as the PF so there is no need to check for that one | |
988 | */ | |
3142d832 | 989 | dev_id = dev->sriov->vf_device; |
5a8eb242 AD |
990 | |
991 | /* loop through all the VFs to see if we own any that are assigned */ | |
992 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
993 | while (vfdev) { | |
994 | /* | |
995 | * It is considered assigned if it is a virtual function with | |
996 | * our dev as the physical function and the assigned bit is set | |
997 | */ | |
998 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 999 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
1000 | vfs_assigned++; |
1001 | ||
1002 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
1003 | } | |
1004 | ||
1005 | return vfs_assigned; | |
1006 | } | |
1007 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
1008 | ||
bff73156 DD |
1009 | /** |
1010 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
1011 | * @dev: the PCI PF device | |
2094f167 | 1012 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
1013 | * |
1014 | * Should be called from PF driver's probe routine with | |
1015 | * device's mutex held. | |
1016 | * | |
1017 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
1018 | * value of numvfs valid. If not a PF return -ENOSYS; |
1019 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
1020 | * if VFs already enabled, return -EBUSY. |
1021 | */ | |
1022 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
1023 | { | |
652d1100 SA |
1024 | if (!dev->is_physfn) |
1025 | return -ENOSYS; | |
51259d00 | 1026 | |
652d1100 | 1027 | if (numvfs > dev->sriov->total_VFs) |
bff73156 DD |
1028 | return -EINVAL; |
1029 | ||
1030 | /* Shouldn't change if VFs already enabled */ | |
1031 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
1032 | return -EBUSY; | |
bff73156 | 1033 | |
51259d00 | 1034 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
1035 | return 0; |
1036 | } | |
1037 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
1038 | ||
1039 | /** | |
ddc191f5 | 1040 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
1041 | * @dev: the PCI PF device |
1042 | * | |
1043 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 1044 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 1045 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
1046 | */ |
1047 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
1048 | { | |
1452cd76 | 1049 | if (!dev->is_physfn) |
652d1100 | 1050 | return 0; |
bff73156 | 1051 | |
8d85a7a4 | 1052 | return dev->sriov->driver_max_VFs; |
bff73156 DD |
1053 | } |
1054 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); | |
8effc395 AD |
1055 | |
1056 | /** | |
1057 | * pci_sriov_configure_simple - helper to configure SR-IOV | |
1058 | * @dev: the PCI device | |
1059 | * @nr_virtfn: number of virtual functions to enable, 0 to disable | |
1060 | * | |
1061 | * Enable or disable SR-IOV for devices that don't require any PF setup | |
1062 | * before enabling SR-IOV. Return value is negative on error, or number of | |
1063 | * VFs allocated on success. | |
1064 | */ | |
1065 | int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn) | |
1066 | { | |
1067 | int rc; | |
1068 | ||
1069 | might_sleep(); | |
1070 | ||
1071 | if (!dev->is_physfn) | |
1072 | return -ENODEV; | |
1073 | ||
1074 | if (pci_vfs_assigned(dev)) { | |
1075 | pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n"); | |
1076 | return -EPERM; | |
1077 | } | |
1078 | ||
1079 | if (nr_virtfn == 0) { | |
1080 | sriov_disable(dev); | |
1081 | return 0; | |
1082 | } | |
1083 | ||
1084 | rc = sriov_enable(dev, nr_virtfn); | |
1085 | if (rc < 0) | |
1086 | return rc; | |
1087 | ||
1088 | return nr_virtfn; | |
1089 | } | |
1090 | EXPORT_SYMBOL_GPL(pci_sriov_configure_simple); |