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Commit | Line | Data |
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d1b054da YZ |
1 | /* |
2 | * drivers/pci/iov.c | |
3 | * | |
4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
5 | * | |
6 | * PCI Express I/O Virtualization (IOV) support. | |
7 | * Single Root IOV 1.0 | |
302b4215 | 8 | * Address Translation Service 1.0 |
d1b054da YZ |
9 | */ |
10 | ||
11 | #include <linux/pci.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
d1b054da | 13 | #include <linux/mutex.h> |
363c75db | 14 | #include <linux/export.h> |
d1b054da YZ |
15 | #include <linux/string.h> |
16 | #include <linux/delay.h> | |
5cdede24 | 17 | #include <linux/pci-ats.h> |
d1b054da YZ |
18 | #include "pci.h" |
19 | ||
dd7cc44d | 20 | #define VIRTFN_ID_LEN 16 |
d1b054da | 21 | |
a28724b0 YZ |
22 | static inline u8 virtfn_bus(struct pci_dev *dev, int id) |
23 | { | |
24 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + | |
25 | dev->sriov->stride * id) >> 8); | |
26 | } | |
27 | ||
28 | static inline u8 virtfn_devfn(struct pci_dev *dev, int id) | |
29 | { | |
30 | return (dev->devfn + dev->sriov->offset + | |
31 | dev->sriov->stride * id) & 0xff; | |
32 | } | |
33 | ||
dd7cc44d YZ |
34 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
35 | { | |
dd7cc44d YZ |
36 | struct pci_bus *child; |
37 | ||
38 | if (bus->number == busnr) | |
39 | return bus; | |
40 | ||
41 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
42 | if (child) | |
43 | return child; | |
44 | ||
45 | child = pci_add_new_bus(bus, NULL, busnr); | |
46 | if (!child) | |
47 | return NULL; | |
48 | ||
b7eac055 | 49 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
50 | |
51 | return child; | |
52 | } | |
53 | ||
dc087f2f | 54 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 55 | { |
dc087f2f JL |
56 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
57 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
58 | } |
59 | ||
0e6c9122 WY |
60 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
61 | { | |
62 | if (!dev->is_physfn) | |
63 | return 0; | |
64 | ||
65 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
66 | } | |
67 | ||
dd7cc44d YZ |
68 | static int virtfn_add(struct pci_dev *dev, int id, int reset) |
69 | { | |
70 | int i; | |
dc087f2f | 71 | int rc = -ENOMEM; |
dd7cc44d YZ |
72 | u64 size; |
73 | char buf[VIRTFN_ID_LEN]; | |
74 | struct pci_dev *virtfn; | |
75 | struct resource *res; | |
76 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 77 | struct pci_bus *bus; |
dd7cc44d | 78 | |
dd7cc44d | 79 | mutex_lock(&iov->dev->sriov->lock); |
8b1fce04 | 80 | bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id)); |
dc087f2f JL |
81 | if (!bus) |
82 | goto failed; | |
83 | ||
84 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 85 | if (!virtfn) |
dc087f2f | 86 | goto failed0; |
dd7cc44d | 87 | |
dd7cc44d YZ |
88 | virtfn->devfn = virtfn_devfn(dev, id); |
89 | virtfn->vendor = dev->vendor; | |
90 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); | |
91 | pci_setup_device(virtfn); | |
92 | virtfn->dev.parent = dev->dev.parent; | |
fbf33f51 XH |
93 | virtfn->physfn = pci_dev_get(dev); |
94 | virtfn->is_virtfn = 1; | |
aa931977 | 95 | virtfn->multifunction = 0; |
dd7cc44d YZ |
96 | |
97 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
98 | res = dev->resource + PCI_IOV_RESOURCES + i; | |
99 | if (!res->parent) | |
100 | continue; | |
101 | virtfn->resource[i].name = pci_name(virtfn); | |
102 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 103 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
104 | virtfn->resource[i].start = res->start + size * id; |
105 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
106 | rc = request_resource(res, &virtfn->resource[i]); | |
107 | BUG_ON(rc); | |
108 | } | |
109 | ||
110 | if (reset) | |
8c1c699f | 111 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
112 | |
113 | pci_device_add(virtfn, virtfn->bus); | |
114 | mutex_unlock(&iov->dev->sriov->lock); | |
115 | ||
c893d133 | 116 | pci_bus_add_device(virtfn); |
dd7cc44d YZ |
117 | sprintf(buf, "virtfn%u", id); |
118 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
119 | if (rc) | |
120 | goto failed1; | |
121 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
122 | if (rc) | |
123 | goto failed2; | |
124 | ||
125 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
126 | ||
127 | return 0; | |
128 | ||
129 | failed2: | |
130 | sysfs_remove_link(&dev->dev.kobj, buf); | |
131 | failed1: | |
132 | pci_dev_put(dev); | |
133 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 134 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f JL |
135 | failed0: |
136 | virtfn_remove_bus(dev->bus, bus); | |
137 | failed: | |
dd7cc44d YZ |
138 | mutex_unlock(&iov->dev->sriov->lock); |
139 | ||
140 | return rc; | |
141 | } | |
142 | ||
143 | static void virtfn_remove(struct pci_dev *dev, int id, int reset) | |
144 | { | |
145 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d YZ |
146 | struct pci_dev *virtfn; |
147 | struct pci_sriov *iov = dev->sriov; | |
148 | ||
dc087f2f JL |
149 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
150 | virtfn_bus(dev, id), | |
151 | virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
152 | if (!virtfn) |
153 | return; | |
154 | ||
dd7cc44d YZ |
155 | if (reset) { |
156 | device_release_driver(&virtfn->dev); | |
8c1c699f | 157 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
158 | } |
159 | ||
160 | sprintf(buf, "virtfn%u", id); | |
161 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
162 | /* |
163 | * pci_stop_dev() could have been called for this virtfn already, | |
164 | * so the directory for the virtfn may have been removed before. | |
165 | * Double check to avoid spurious sysfs warnings. | |
166 | */ | |
167 | if (virtfn->dev.kobj.sd) | |
168 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d YZ |
169 | |
170 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 171 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 172 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d YZ |
173 | mutex_unlock(&iov->dev->sriov->lock); |
174 | ||
dc087f2f JL |
175 | /* balance pci_get_domain_bus_and_slot() */ |
176 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
177 | pci_dev_put(dev); |
178 | } | |
179 | ||
180 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) | |
181 | { | |
182 | int rc; | |
183 | int i, j; | |
184 | int nres; | |
185 | u16 offset, stride, initial; | |
186 | struct resource *res; | |
187 | struct pci_dev *pdev; | |
188 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 189 | int bars = 0; |
68f8e9fa | 190 | u8 bus; |
dd7cc44d YZ |
191 | |
192 | if (!nr_virtfn) | |
193 | return 0; | |
194 | ||
6b136724 | 195 | if (iov->num_VFs) |
dd7cc44d YZ |
196 | return -EINVAL; |
197 | ||
198 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
199 | if (initial > iov->total_VFs || |
200 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
201 | return -EIO; |
202 | ||
6b136724 | 203 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
204 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
205 | return -EINVAL; | |
206 | ||
dd7cc44d YZ |
207 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset); |
208 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride); | |
209 | if (!offset || (nr_virtfn > 1 && !stride)) | |
210 | return -EIO; | |
211 | ||
212 | nres = 0; | |
213 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 214 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
dd7cc44d YZ |
215 | res = dev->resource + PCI_IOV_RESOURCES + i; |
216 | if (res->parent) | |
217 | nres++; | |
218 | } | |
219 | if (nres != iov->nres) { | |
220 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | |
221 | return -ENOMEM; | |
222 | } | |
223 | ||
224 | iov->offset = offset; | |
225 | iov->stride = stride; | |
226 | ||
68f8e9fa BH |
227 | bus = virtfn_bus(dev, nr_virtfn - 1); |
228 | if (bus > dev->bus->busn_res.end) { | |
229 | dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", | |
230 | nr_virtfn, bus, &dev->bus->busn_res); | |
dd7cc44d YZ |
231 | return -ENOMEM; |
232 | } | |
233 | ||
bbef98ab RP |
234 | if (pci_enable_resources(dev, bars)) { |
235 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | |
236 | return -ENOMEM; | |
237 | } | |
238 | ||
dd7cc44d YZ |
239 | if (iov->link != dev->devfn) { |
240 | pdev = pci_get_slot(dev->bus, iov->link); | |
241 | if (!pdev) | |
242 | return -ENODEV; | |
243 | ||
dc087f2f JL |
244 | if (!pdev->is_physfn) { |
245 | pci_dev_put(pdev); | |
652d1100 | 246 | return -ENOSYS; |
dc087f2f | 247 | } |
dd7cc44d YZ |
248 | |
249 | rc = sysfs_create_link(&dev->dev.kobj, | |
250 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 251 | pci_dev_put(pdev); |
dd7cc44d YZ |
252 | if (rc) |
253 | return rc; | |
254 | } | |
255 | ||
19b6984e | 256 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); |
dd7cc44d | 257 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; |
fb51ccbf | 258 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
259 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
260 | msleep(100); | |
fb51ccbf | 261 | pci_cfg_access_unlock(dev); |
dd7cc44d | 262 | |
6b136724 | 263 | iov->initial_VFs = initial; |
dd7cc44d YZ |
264 | if (nr_virtfn < initial) |
265 | initial = nr_virtfn; | |
266 | ||
267 | for (i = 0; i < initial; i++) { | |
268 | rc = virtfn_add(dev, i, 0); | |
269 | if (rc) | |
270 | goto failed; | |
271 | } | |
272 | ||
273 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 274 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
275 | |
276 | return 0; | |
277 | ||
278 | failed: | |
279 | for (j = 0; j < i; j++) | |
280 | virtfn_remove(dev, j, 0); | |
281 | ||
282 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 283 | pci_cfg_access_lock(dev); |
dd7cc44d | 284 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
19b6984e | 285 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0); |
dd7cc44d | 286 | ssleep(1); |
fb51ccbf | 287 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
288 | |
289 | if (iov->link != dev->devfn) | |
290 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
291 | ||
292 | return rc; | |
293 | } | |
294 | ||
295 | static void sriov_disable(struct pci_dev *dev) | |
296 | { | |
297 | int i; | |
298 | struct pci_sriov *iov = dev->sriov; | |
299 | ||
6b136724 | 300 | if (!iov->num_VFs) |
dd7cc44d YZ |
301 | return; |
302 | ||
6b136724 | 303 | for (i = 0; i < iov->num_VFs; i++) |
dd7cc44d YZ |
304 | virtfn_remove(dev, i, 0); |
305 | ||
306 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 307 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
308 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
309 | ssleep(1); | |
fb51ccbf | 310 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
311 | |
312 | if (iov->link != dev->devfn) | |
313 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
314 | ||
6b136724 | 315 | iov->num_VFs = 0; |
19b6984e | 316 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0); |
dd7cc44d YZ |
317 | } |
318 | ||
d1b054da YZ |
319 | static int sriov_init(struct pci_dev *dev, int pos) |
320 | { | |
0e6c9122 | 321 | int i, bar64; |
d1b054da YZ |
322 | int rc; |
323 | int nres; | |
324 | u32 pgsz; | |
325 | u16 ctrl, total, offset, stride; | |
326 | struct pci_sriov *iov; | |
327 | struct resource *res; | |
328 | struct pci_dev *pdev; | |
329 | ||
62f87c0e YW |
330 | if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END && |
331 | pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT) | |
d1b054da YZ |
332 | return -ENODEV; |
333 | ||
334 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); | |
335 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
336 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
337 | ssleep(1); | |
338 | } | |
339 | ||
340 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); | |
341 | if (!total) | |
342 | return 0; | |
343 | ||
344 | ctrl = 0; | |
345 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
346 | if (pdev->is_physfn) | |
347 | goto found; | |
348 | ||
349 | pdev = NULL; | |
350 | if (pci_ari_enabled(dev->bus)) | |
351 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
352 | ||
353 | found: | |
354 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
045cc22e | 355 | pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0); |
d1b054da YZ |
356 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset); |
357 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride); | |
358 | if (!offset || (total > 1 && !stride)) | |
359 | return -EIO; | |
360 | ||
361 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
362 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
363 | pgsz &= ~((1 << i) - 1); | |
364 | if (!pgsz) | |
365 | return -EIO; | |
366 | ||
367 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 368 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 369 | |
0e6c9122 WY |
370 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
371 | if (!iov) | |
372 | return -ENOMEM; | |
373 | ||
d1b054da YZ |
374 | nres = 0; |
375 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
376 | res = dev->resource + PCI_IOV_RESOURCES + i; | |
0e6c9122 WY |
377 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, |
378 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
379 | if (!res->flags) |
380 | continue; | |
381 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
382 | rc = -EIO; | |
383 | goto failed; | |
384 | } | |
0e6c9122 | 385 | iov->barsz[i] = resource_size(res); |
d1b054da | 386 | res->end = res->start + resource_size(res) * total - 1; |
e88ae01d WY |
387 | dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
388 | i, res, i, total); | |
0e6c9122 | 389 | i += bar64; |
d1b054da YZ |
390 | nres++; |
391 | } | |
392 | ||
d1b054da YZ |
393 | iov->pos = pos; |
394 | iov->nres = nres; | |
395 | iov->ctrl = ctrl; | |
6b136724 | 396 | iov->total_VFs = total; |
d1b054da YZ |
397 | iov->offset = offset; |
398 | iov->stride = stride; | |
399 | iov->pgsz = pgsz; | |
400 | iov->self = dev; | |
401 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); | |
402 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 403 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 404 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
405 | |
406 | if (pdev) | |
407 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 408 | else |
d1b054da | 409 | iov->dev = dev; |
e277d2fc YZ |
410 | |
411 | mutex_init(&iov->lock); | |
d1b054da YZ |
412 | |
413 | dev->sriov = iov; | |
414 | dev->is_physfn = 1; | |
415 | ||
416 | return 0; | |
417 | ||
418 | failed: | |
419 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
420 | res = dev->resource + PCI_IOV_RESOURCES + i; | |
421 | res->flags = 0; | |
422 | } | |
423 | ||
0e6c9122 | 424 | kfree(iov); |
d1b054da YZ |
425 | return rc; |
426 | } | |
427 | ||
428 | static void sriov_release(struct pci_dev *dev) | |
429 | { | |
6b136724 | 430 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 431 | |
e277d2fc | 432 | if (dev != dev->sriov->dev) |
d1b054da YZ |
433 | pci_dev_put(dev->sriov->dev); |
434 | ||
e277d2fc YZ |
435 | mutex_destroy(&dev->sriov->lock); |
436 | ||
d1b054da YZ |
437 | kfree(dev->sriov); |
438 | dev->sriov = NULL; | |
439 | } | |
440 | ||
8c5cdb6a YZ |
441 | static void sriov_restore_state(struct pci_dev *dev) |
442 | { | |
443 | int i; | |
444 | u16 ctrl; | |
445 | struct pci_sriov *iov = dev->sriov; | |
446 | ||
447 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
448 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
449 | return; | |
450 | ||
451 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) | |
452 | pci_update_resource(dev, i); | |
453 | ||
454 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
6b136724 | 455 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs); |
8c5cdb6a YZ |
456 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
457 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
458 | msleep(100); | |
459 | } | |
460 | ||
d1b054da YZ |
461 | /** |
462 | * pci_iov_init - initialize the IOV capability | |
463 | * @dev: the PCI device | |
464 | * | |
465 | * Returns 0 on success, or negative on failure. | |
466 | */ | |
467 | int pci_iov_init(struct pci_dev *dev) | |
468 | { | |
469 | int pos; | |
470 | ||
5f4d91a1 | 471 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
472 | return -ENODEV; |
473 | ||
474 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
475 | if (pos) | |
476 | return sriov_init(dev, pos); | |
477 | ||
478 | return -ENODEV; | |
479 | } | |
480 | ||
481 | /** | |
482 | * pci_iov_release - release resources used by the IOV capability | |
483 | * @dev: the PCI device | |
484 | */ | |
485 | void pci_iov_release(struct pci_dev *dev) | |
486 | { | |
487 | if (dev->is_physfn) | |
488 | sriov_release(dev); | |
489 | } | |
490 | ||
491 | /** | |
492 | * pci_iov_resource_bar - get position of the SR-IOV BAR | |
493 | * @dev: the PCI device | |
494 | * @resno: the resource number | |
d1b054da YZ |
495 | * |
496 | * Returns position of the BAR encapsulated in the SR-IOV capability. | |
497 | */ | |
26ff46c6 | 498 | int pci_iov_resource_bar(struct pci_dev *dev, int resno) |
d1b054da YZ |
499 | { |
500 | if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END) | |
501 | return 0; | |
502 | ||
503 | BUG_ON(!dev->is_physfn); | |
504 | ||
d1b054da YZ |
505 | return dev->sriov->pos + PCI_SRIOV_BAR + |
506 | 4 * (resno - PCI_IOV_RESOURCES); | |
507 | } | |
8c5cdb6a | 508 | |
6faf17f6 CW |
509 | /** |
510 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
511 | * @dev: the PCI device | |
512 | * @resno: the resource number | |
513 | * | |
514 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
515 | * This is not the same as the resource size which is defined as | |
516 | * the VF BAR size multiplied by the number of VFs. The alignment | |
517 | * is just the VF BAR size. | |
518 | */ | |
0e52247a | 519 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 520 | { |
0e6c9122 | 521 | return pci_iov_resource_size(dev, resno); |
6faf17f6 CW |
522 | } |
523 | ||
8c5cdb6a YZ |
524 | /** |
525 | * pci_restore_iov_state - restore the state of the IOV capability | |
526 | * @dev: the PCI device | |
527 | */ | |
528 | void pci_restore_iov_state(struct pci_dev *dev) | |
529 | { | |
530 | if (dev->is_physfn) | |
531 | sriov_restore_state(dev); | |
532 | } | |
a28724b0 YZ |
533 | |
534 | /** | |
535 | * pci_iov_bus_range - find bus range used by Virtual Function | |
536 | * @bus: the PCI bus | |
537 | * | |
538 | * Returns max number of buses (exclude current one) used by Virtual | |
539 | * Functions. | |
540 | */ | |
541 | int pci_iov_bus_range(struct pci_bus *bus) | |
542 | { | |
543 | int max = 0; | |
544 | u8 busnr; | |
545 | struct pci_dev *dev; | |
546 | ||
547 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
548 | if (!dev->is_physfn) | |
549 | continue; | |
6b136724 | 550 | busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1); |
a28724b0 YZ |
551 | if (busnr > max) |
552 | max = busnr; | |
553 | } | |
554 | ||
555 | return max ? max - bus->number : 0; | |
556 | } | |
dd7cc44d YZ |
557 | |
558 | /** | |
559 | * pci_enable_sriov - enable the SR-IOV capability | |
560 | * @dev: the PCI device | |
52a8873b | 561 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
562 | * |
563 | * Returns 0 on success, or negative on failure. | |
564 | */ | |
565 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
566 | { | |
567 | might_sleep(); | |
568 | ||
569 | if (!dev->is_physfn) | |
652d1100 | 570 | return -ENOSYS; |
dd7cc44d YZ |
571 | |
572 | return sriov_enable(dev, nr_virtfn); | |
573 | } | |
574 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
575 | ||
576 | /** | |
577 | * pci_disable_sriov - disable the SR-IOV capability | |
578 | * @dev: the PCI device | |
579 | */ | |
580 | void pci_disable_sriov(struct pci_dev *dev) | |
581 | { | |
582 | might_sleep(); | |
583 | ||
584 | if (!dev->is_physfn) | |
585 | return; | |
586 | ||
587 | sriov_disable(dev); | |
588 | } | |
589 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 590 | |
fb8a0d9d WM |
591 | /** |
592 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
593 | * @dev: the PCI device | |
594 | * | |
595 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
596 | */ | |
597 | int pci_num_vf(struct pci_dev *dev) | |
598 | { | |
1452cd76 | 599 | if (!dev->is_physfn) |
fb8a0d9d | 600 | return 0; |
1452cd76 BH |
601 | |
602 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
603 | } |
604 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 605 | |
5a8eb242 AD |
606 | /** |
607 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
608 | * @dev: the PCI device | |
609 | * | |
610 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 611 | * If device is not a physical function returns 0. |
5a8eb242 AD |
612 | */ |
613 | int pci_vfs_assigned(struct pci_dev *dev) | |
614 | { | |
615 | struct pci_dev *vfdev; | |
616 | unsigned int vfs_assigned = 0; | |
617 | unsigned short dev_id; | |
618 | ||
619 | /* only search if we are a PF */ | |
620 | if (!dev->is_physfn) | |
621 | return 0; | |
622 | ||
623 | /* | |
624 | * determine the device ID for the VFs, the vendor ID will be the | |
625 | * same as the PF so there is no need to check for that one | |
626 | */ | |
627 | pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id); | |
628 | ||
629 | /* loop through all the VFs to see if we own any that are assigned */ | |
630 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
631 | while (vfdev) { | |
632 | /* | |
633 | * It is considered assigned if it is a virtual function with | |
634 | * our dev as the physical function and the assigned bit is set | |
635 | */ | |
636 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 637 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
638 | vfs_assigned++; |
639 | ||
640 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
641 | } | |
642 | ||
643 | return vfs_assigned; | |
644 | } | |
645 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
646 | ||
bff73156 DD |
647 | /** |
648 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
649 | * @dev: the PCI PF device | |
2094f167 | 650 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
651 | * |
652 | * Should be called from PF driver's probe routine with | |
653 | * device's mutex held. | |
654 | * | |
655 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
656 | * value of numvfs valid. If not a PF return -ENOSYS; |
657 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
658 | * if VFs already enabled, return -EBUSY. |
659 | */ | |
660 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
661 | { | |
652d1100 SA |
662 | if (!dev->is_physfn) |
663 | return -ENOSYS; | |
664 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
665 | return -EINVAL; |
666 | ||
667 | /* Shouldn't change if VFs already enabled */ | |
668 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
669 | return -EBUSY; | |
670 | else | |
6b136724 | 671 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
672 | |
673 | return 0; | |
674 | } | |
675 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
676 | ||
677 | /** | |
ddc191f5 | 678 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
679 | * @dev: the PCI PF device |
680 | * | |
681 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 682 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 683 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
684 | */ |
685 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
686 | { | |
1452cd76 | 687 | if (!dev->is_physfn) |
652d1100 | 688 | return 0; |
bff73156 | 689 | |
6b136724 BH |
690 | if (dev->sriov->driver_max_VFs) |
691 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
692 | |
693 | return dev->sriov->total_VFs; | |
bff73156 DD |
694 | } |
695 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |