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PCI: Disable VF decoding before pcibios_sriov_disable() updates resources
[mirror_ubuntu-zesty-kernel.git] / drivers / pci / iov.c
CommitLineData
d1b054da
YZ
1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
302b4215 8 * Address Translation Service 1.0
d1b054da
YZ
9 */
10
11#include <linux/pci.h>
5a0e3ad6 12#include <linux/slab.h>
d1b054da 13#include <linux/mutex.h>
363c75db 14#include <linux/export.h>
d1b054da
YZ
15#include <linux/string.h>
16#include <linux/delay.h>
5cdede24 17#include <linux/pci-ats.h>
d1b054da
YZ
18#include "pci.h"
19
dd7cc44d 20#define VIRTFN_ID_LEN 16
d1b054da 21
b07579c0 22int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
a28724b0 23{
b07579c0
WY
24 if (!dev->is_physfn)
25 return -EINVAL;
a28724b0 26 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
b07579c0 27 dev->sriov->stride * vf_id) >> 8);
a28724b0
YZ
28}
29
b07579c0 30int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
a28724b0 31{
b07579c0
WY
32 if (!dev->is_physfn)
33 return -EINVAL;
a28724b0 34 return (dev->devfn + dev->sriov->offset +
b07579c0 35 dev->sriov->stride * vf_id) & 0xff;
a28724b0
YZ
36}
37
f59dca27
WY
38/*
39 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
40 * change when NumVFs changes.
41 *
42 * Update iov->offset and iov->stride when NumVFs is written.
43 */
44static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
45{
46 struct pci_sriov *iov = dev->sriov;
47
48 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
49 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
50 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
51}
52
4449f079
WY
53/*
54 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
55 * determine how many additional bus numbers will be consumed by VFs.
56 *
ea9a8854
AD
57 * Iterate over all valid NumVFs, validate offset and stride, and calculate
58 * the maximum number of bus numbers that could ever be required.
4449f079 59 */
ea9a8854 60static int compute_max_vf_buses(struct pci_dev *dev)
4449f079
WY
61{
62 struct pci_sriov *iov = dev->sriov;
ea9a8854 63 int nr_virtfn, busnr, rc = 0;
4449f079 64
ea9a8854 65 for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
4449f079 66 pci_iov_set_numvfs(dev, nr_virtfn);
ea9a8854
AD
67 if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
68 rc = -EIO;
69 goto out;
70 }
71
b07579c0 72 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
ea9a8854
AD
73 if (busnr > iov->max_VF_buses)
74 iov->max_VF_buses = busnr;
4449f079
WY
75 }
76
ea9a8854
AD
77out:
78 pci_iov_set_numvfs(dev, 0);
79 return rc;
4449f079
WY
80}
81
dd7cc44d
YZ
82static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
83{
dd7cc44d
YZ
84 struct pci_bus *child;
85
86 if (bus->number == busnr)
87 return bus;
88
89 child = pci_find_bus(pci_domain_nr(bus), busnr);
90 if (child)
91 return child;
92
93 child = pci_add_new_bus(bus, NULL, busnr);
94 if (!child)
95 return NULL;
96
b7eac055 97 pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d
YZ
98
99 return child;
100}
101
dc087f2f 102static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
dd7cc44d 103{
dc087f2f
JL
104 if (physbus != virtbus && list_empty(&virtbus->devices))
105 pci_remove_bus(virtbus);
dd7cc44d
YZ
106}
107
0e6c9122
WY
108resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
109{
110 if (!dev->is_physfn)
111 return 0;
112
113 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
114}
115
c194f7ea 116int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
dd7cc44d
YZ
117{
118 int i;
dc087f2f 119 int rc = -ENOMEM;
dd7cc44d
YZ
120 u64 size;
121 char buf[VIRTFN_ID_LEN];
122 struct pci_dev *virtfn;
123 struct resource *res;
124 struct pci_sriov *iov = dev->sriov;
8b1fce04 125 struct pci_bus *bus;
dd7cc44d 126
b07579c0 127 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
dc087f2f
JL
128 if (!bus)
129 goto failed;
130
131 virtfn = pci_alloc_dev(bus);
dd7cc44d 132 if (!virtfn)
dc087f2f 133 goto failed0;
dd7cc44d 134
b07579c0 135 virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
dd7cc44d
YZ
136 virtfn->vendor = dev->vendor;
137 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
156c5532
PL
138 rc = pci_setup_device(virtfn);
139 if (rc)
140 goto failed0;
141
dd7cc44d 142 virtfn->dev.parent = dev->dev.parent;
fbf33f51
XH
143 virtfn->physfn = pci_dev_get(dev);
144 virtfn->is_virtfn = 1;
aa931977 145 virtfn->multifunction = 0;
dd7cc44d
YZ
146
147 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 148 res = &dev->resource[i + PCI_IOV_RESOURCES];
dd7cc44d
YZ
149 if (!res->parent)
150 continue;
151 virtfn->resource[i].name = pci_name(virtfn);
152 virtfn->resource[i].flags = res->flags;
0e6c9122 153 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
dd7cc44d
YZ
154 virtfn->resource[i].start = res->start + size * id;
155 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
156 rc = request_resource(res, &virtfn->resource[i]);
157 BUG_ON(rc);
158 }
159
160 if (reset)
8c1c699f 161 __pci_reset_function(virtfn);
dd7cc44d
YZ
162
163 pci_device_add(virtfn, virtfn->bus);
dd7cc44d 164
c893d133 165 pci_bus_add_device(virtfn);
dd7cc44d
YZ
166 sprintf(buf, "virtfn%u", id);
167 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
168 if (rc)
169 goto failed1;
170 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
171 if (rc)
172 goto failed2;
173
174 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
175
176 return 0;
177
178failed2:
179 sysfs_remove_link(&dev->dev.kobj, buf);
180failed1:
181 pci_dev_put(dev);
210647af 182 pci_stop_and_remove_bus_device(virtfn);
dc087f2f
JL
183failed0:
184 virtfn_remove_bus(dev->bus, bus);
185failed:
dd7cc44d
YZ
186
187 return rc;
188}
189
c194f7ea 190void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset)
dd7cc44d
YZ
191{
192 char buf[VIRTFN_ID_LEN];
dd7cc44d 193 struct pci_dev *virtfn;
dd7cc44d 194
dc087f2f 195 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
b07579c0
WY
196 pci_iov_virtfn_bus(dev, id),
197 pci_iov_virtfn_devfn(dev, id));
dd7cc44d
YZ
198 if (!virtfn)
199 return;
200
dd7cc44d
YZ
201 if (reset) {
202 device_release_driver(&virtfn->dev);
8c1c699f 203 __pci_reset_function(virtfn);
dd7cc44d
YZ
204 }
205
206 sprintf(buf, "virtfn%u", id);
207 sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef
YL
208 /*
209 * pci_stop_dev() could have been called for this virtfn already,
210 * so the directory for the virtfn may have been removed before.
211 * Double check to avoid spurious sysfs warnings.
212 */
213 if (virtfn->dev.kobj.sd)
214 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d 215
210647af 216 pci_stop_and_remove_bus_device(virtfn);
dc087f2f 217 virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d 218
dc087f2f
JL
219 /* balance pci_get_domain_bus_and_slot() */
220 pci_dev_put(virtfn);
dd7cc44d
YZ
221 pci_dev_put(dev);
222}
223
995df527
WY
224int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
225{
a39e3fcd
AD
226 return 0;
227}
228
229int __weak pcibios_sriov_disable(struct pci_dev *pdev)
230{
231 return 0;
995df527
WY
232}
233
dd7cc44d
YZ
234static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
235{
236 int rc;
3443c382 237 int i;
dd7cc44d 238 int nres;
ce288ec3 239 u16 initial;
dd7cc44d
YZ
240 struct resource *res;
241 struct pci_dev *pdev;
242 struct pci_sriov *iov = dev->sriov;
bbef98ab 243 int bars = 0;
b07579c0 244 int bus;
dd7cc44d
YZ
245
246 if (!nr_virtfn)
247 return 0;
248
6b136724 249 if (iov->num_VFs)
dd7cc44d
YZ
250 return -EINVAL;
251
252 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724
BH
253 if (initial > iov->total_VFs ||
254 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d
YZ
255 return -EIO;
256
6b136724 257 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
dd7cc44d
YZ
258 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
259 return -EINVAL;
260
dd7cc44d
YZ
261 nres = 0;
262 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab 263 bars |= (1 << (i + PCI_IOV_RESOURCES));
c1fe1f96 264 res = &dev->resource[i + PCI_IOV_RESOURCES];
dd7cc44d
YZ
265 if (res->parent)
266 nres++;
267 }
268 if (nres != iov->nres) {
269 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
270 return -ENOMEM;
271 }
272
b07579c0 273 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
68f8e9fa
BH
274 if (bus > dev->bus->busn_res.end) {
275 dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
276 nr_virtfn, bus, &dev->bus->busn_res);
dd7cc44d
YZ
277 return -ENOMEM;
278 }
279
bbef98ab
RP
280 if (pci_enable_resources(dev, bars)) {
281 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
282 return -ENOMEM;
283 }
284
dd7cc44d
YZ
285 if (iov->link != dev->devfn) {
286 pdev = pci_get_slot(dev->bus, iov->link);
287 if (!pdev)
288 return -ENODEV;
289
dc087f2f
JL
290 if (!pdev->is_physfn) {
291 pci_dev_put(pdev);
652d1100 292 return -ENOSYS;
dc087f2f 293 }
dd7cc44d
YZ
294
295 rc = sysfs_create_link(&dev->dev.kobj,
296 &pdev->dev.kobj, "dep_link");
dc087f2f 297 pci_dev_put(pdev);
dd7cc44d
YZ
298 if (rc)
299 return rc;
300 }
301
6b136724 302 iov->initial_VFs = initial;
dd7cc44d
YZ
303 if (nr_virtfn < initial)
304 initial = nr_virtfn;
305
c23b6135
AD
306 rc = pcibios_sriov_enable(dev, initial);
307 if (rc) {
308 dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc);
309 goto err_pcibios;
995df527
WY
310 }
311
f40ec3c7
GS
312 pci_iov_set_numvfs(dev, nr_virtfn);
313 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
314 pci_cfg_access_lock(dev);
315 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
316 msleep(100);
317 pci_cfg_access_unlock(dev);
318
dd7cc44d 319 for (i = 0; i < initial; i++) {
c194f7ea 320 rc = pci_iov_add_virtfn(dev, i, 0);
dd7cc44d
YZ
321 if (rc)
322 goto failed;
323 }
324
325 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724 326 iov->num_VFs = nr_virtfn;
dd7cc44d
YZ
327
328 return 0;
329
330failed:
3443c382 331 while (i--)
c194f7ea 332 pci_iov_remove_virtfn(dev, i, 0);
dd7cc44d 333
c23b6135 334err_pcibios:
dd7cc44d 335 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 336 pci_cfg_access_lock(dev);
dd7cc44d
YZ
337 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
338 ssleep(1);
fb51ccbf 339 pci_cfg_access_unlock(dev);
dd7cc44d 340
7cade1f0
GS
341 pcibios_sriov_disable(dev);
342
dd7cc44d
YZ
343 if (iov->link != dev->devfn)
344 sysfs_remove_link(&dev->dev.kobj, "dep_link");
345
b3908644 346 pci_iov_set_numvfs(dev, 0);
dd7cc44d
YZ
347 return rc;
348}
349
350static void sriov_disable(struct pci_dev *dev)
351{
352 int i;
353 struct pci_sriov *iov = dev->sriov;
354
6b136724 355 if (!iov->num_VFs)
dd7cc44d
YZ
356 return;
357
6b136724 358 for (i = 0; i < iov->num_VFs; i++)
c194f7ea 359 pci_iov_remove_virtfn(dev, i, 0);
dd7cc44d
YZ
360
361 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 362 pci_cfg_access_lock(dev);
dd7cc44d
YZ
363 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
364 ssleep(1);
fb51ccbf 365 pci_cfg_access_unlock(dev);
dd7cc44d 366
7cade1f0
GS
367 pcibios_sriov_disable(dev);
368
dd7cc44d
YZ
369 if (iov->link != dev->devfn)
370 sysfs_remove_link(&dev->dev.kobj, "dep_link");
371
6b136724 372 iov->num_VFs = 0;
f59dca27 373 pci_iov_set_numvfs(dev, 0);
dd7cc44d
YZ
374}
375
d1b054da
YZ
376static int sriov_init(struct pci_dev *dev, int pos)
377{
0e6c9122 378 int i, bar64;
d1b054da
YZ
379 int rc;
380 int nres;
381 u32 pgsz;
ea9a8854 382 u16 ctrl, total;
d1b054da
YZ
383 struct pci_sriov *iov;
384 struct resource *res;
385 struct pci_dev *pdev;
386
d1b054da
YZ
387 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
388 if (ctrl & PCI_SRIOV_CTRL_VFE) {
389 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
390 ssleep(1);
391 }
392
d1b054da
YZ
393 ctrl = 0;
394 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
395 if (pdev->is_physfn)
396 goto found;
397
398 pdev = NULL;
399 if (pci_ari_enabled(dev->bus))
400 ctrl |= PCI_SRIOV_CTRL_ARI;
401
402found:
403 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
d1b054da 404
ff45f9dd
BS
405 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
406 if (!total)
407 return 0;
d1b054da
YZ
408
409 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
410 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
411 pgsz &= ~((1 << i) - 1);
412 if (!pgsz)
413 return -EIO;
414
415 pgsz &= ~(pgsz - 1);
8161fe91 416 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da 417
0e6c9122
WY
418 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
419 if (!iov)
420 return -ENOMEM;
421
d1b054da
YZ
422 nres = 0;
423 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 424 res = &dev->resource[i + PCI_IOV_RESOURCES];
11183991
DD
425 /*
426 * If it is already FIXED, don't change it, something
427 * (perhaps EA or header fixups) wants it this way.
428 */
429 if (res->flags & IORESOURCE_PCI_FIXED)
430 bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
431 else
432 bar64 = __pci_read_base(dev, pci_bar_unknown, res,
433 pos + PCI_SRIOV_BAR + i * 4);
d1b054da
YZ
434 if (!res->flags)
435 continue;
436 if (resource_size(res) & (PAGE_SIZE - 1)) {
437 rc = -EIO;
438 goto failed;
439 }
0e6c9122 440 iov->barsz[i] = resource_size(res);
d1b054da 441 res->end = res->start + resource_size(res) * total - 1;
e88ae01d
WY
442 dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
443 i, res, i, total);
0e6c9122 444 i += bar64;
d1b054da
YZ
445 nres++;
446 }
447
d1b054da
YZ
448 iov->pos = pos;
449 iov->nres = nres;
450 iov->ctrl = ctrl;
6b136724 451 iov->total_VFs = total;
d1b054da
YZ
452 iov->pgsz = pgsz;
453 iov->self = dev;
454 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
455 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e 456 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe 457 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da
YZ
458
459 if (pdev)
460 iov->dev = pci_dev_get(pdev);
e277d2fc 461 else
d1b054da 462 iov->dev = dev;
e277d2fc
YZ
463
464 mutex_init(&iov->lock);
d1b054da
YZ
465
466 dev->sriov = iov;
467 dev->is_physfn = 1;
ea9a8854
AD
468 rc = compute_max_vf_buses(dev);
469 if (rc)
470 goto fail_max_buses;
d1b054da
YZ
471
472 return 0;
473
ea9a8854
AD
474fail_max_buses:
475 dev->sriov = NULL;
476 dev->is_physfn = 0;
d1b054da
YZ
477failed:
478 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 479 res = &dev->resource[i + PCI_IOV_RESOURCES];
d1b054da
YZ
480 res->flags = 0;
481 }
482
0e6c9122 483 kfree(iov);
d1b054da
YZ
484 return rc;
485}
486
487static void sriov_release(struct pci_dev *dev)
488{
6b136724 489 BUG_ON(dev->sriov->num_VFs);
dd7cc44d 490
e277d2fc 491 if (dev != dev->sriov->dev)
d1b054da
YZ
492 pci_dev_put(dev->sriov->dev);
493
e277d2fc
YZ
494 mutex_destroy(&dev->sriov->lock);
495
d1b054da
YZ
496 kfree(dev->sriov);
497 dev->sriov = NULL;
498}
499
8c5cdb6a
YZ
500static void sriov_restore_state(struct pci_dev *dev)
501{
502 int i;
503 u16 ctrl;
504 struct pci_sriov *iov = dev->sriov;
505
506 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
507 if (ctrl & PCI_SRIOV_CTRL_VFE)
508 return;
509
510 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
511 pci_update_resource(dev, i);
512
513 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
f59dca27 514 pci_iov_set_numvfs(dev, iov->num_VFs);
8c5cdb6a
YZ
515 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
516 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
517 msleep(100);
518}
519
d1b054da
YZ
520/**
521 * pci_iov_init - initialize the IOV capability
522 * @dev: the PCI device
523 *
524 * Returns 0 on success, or negative on failure.
525 */
526int pci_iov_init(struct pci_dev *dev)
527{
528 int pos;
529
5f4d91a1 530 if (!pci_is_pcie(dev))
d1b054da
YZ
531 return -ENODEV;
532
533 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
534 if (pos)
535 return sriov_init(dev, pos);
536
537 return -ENODEV;
538}
539
540/**
541 * pci_iov_release - release resources used by the IOV capability
542 * @dev: the PCI device
543 */
544void pci_iov_release(struct pci_dev *dev)
545{
546 if (dev->is_physfn)
547 sriov_release(dev);
548}
549
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550/**
551 * pci_iov_update_resource - update a VF BAR
552 * @dev: the PCI device
553 * @resno: the resource number
554 *
555 * Update a VF BAR in the SR-IOV capability of a PF.
556 */
557void pci_iov_update_resource(struct pci_dev *dev, int resno)
558{
559 struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
560 struct resource *res = dev->resource + resno;
561 int vf_bar = resno - PCI_IOV_RESOURCES;
562 struct pci_bus_region region;
546ba9f8 563 u16 cmd;
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564 u32 new;
565 int reg;
566
567 /*
568 * The generic pci_restore_bars() path calls this for all devices,
569 * including VFs and non-SR-IOV devices. If this is not a PF, we
570 * have nothing to do.
571 */
572 if (!iov)
573 return;
574
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575 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
576 if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
577 dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
578 vf_bar, res);
579 return;
580 }
581
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582 /*
583 * Ignore unimplemented BARs, unused resource slots for 64-bit
584 * BARs, and non-movable resources, e.g., those described via
585 * Enhanced Allocation.
586 */
587 if (!res->flags)
588 return;
589
590 if (res->flags & IORESOURCE_UNSET)
591 return;
592
593 if (res->flags & IORESOURCE_PCI_FIXED)
594 return;
595
596 pcibios_resource_to_bus(dev->bus, &region, res);
597 new = region.start;
598 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
599
600 reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
601 pci_write_config_dword(dev, reg, new);
602 if (res->flags & IORESOURCE_MEM_64) {
603 new = region.start >> 16 >> 16;
604 pci_write_config_dword(dev, reg + 4, new);
605 }
606}
607
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608resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
609 int resno)
610{
611 return pci_iov_resource_size(dev, resno);
612}
613
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614/**
615 * pci_sriov_resource_alignment - get resource alignment for VF BAR
616 * @dev: the PCI device
617 * @resno: the resource number
618 *
619 * Returns the alignment of the VF BAR found in the SR-IOV capability.
620 * This is not the same as the resource size which is defined as
621 * the VF BAR size multiplied by the number of VFs. The alignment
622 * is just the VF BAR size.
623 */
0e52247a 624resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6faf17f6 625{
978d2d68 626 return pcibios_iov_resource_alignment(dev, resno);
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627}
628
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629/**
630 * pci_restore_iov_state - restore the state of the IOV capability
631 * @dev: the PCI device
632 */
633void pci_restore_iov_state(struct pci_dev *dev)
634{
635 if (dev->is_physfn)
636 sriov_restore_state(dev);
637}
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638
639/**
640 * pci_iov_bus_range - find bus range used by Virtual Function
641 * @bus: the PCI bus
642 *
643 * Returns max number of buses (exclude current one) used by Virtual
644 * Functions.
645 */
646int pci_iov_bus_range(struct pci_bus *bus)
647{
648 int max = 0;
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649 struct pci_dev *dev;
650
651 list_for_each_entry(dev, &bus->devices, bus_list) {
652 if (!dev->is_physfn)
653 continue;
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654 if (dev->sriov->max_VF_buses > max)
655 max = dev->sriov->max_VF_buses;
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656 }
657
658 return max ? max - bus->number : 0;
659}
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660
661/**
662 * pci_enable_sriov - enable the SR-IOV capability
663 * @dev: the PCI device
52a8873b 664 * @nr_virtfn: number of virtual functions to enable
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665 *
666 * Returns 0 on success, or negative on failure.
667 */
668int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
669{
670 might_sleep();
671
672 if (!dev->is_physfn)
652d1100 673 return -ENOSYS;
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674
675 return sriov_enable(dev, nr_virtfn);
676}
677EXPORT_SYMBOL_GPL(pci_enable_sriov);
678
679/**
680 * pci_disable_sriov - disable the SR-IOV capability
681 * @dev: the PCI device
682 */
683void pci_disable_sriov(struct pci_dev *dev)
684{
685 might_sleep();
686
687 if (!dev->is_physfn)
688 return;
689
690 sriov_disable(dev);
691}
692EXPORT_SYMBOL_GPL(pci_disable_sriov);
74bb1bcc 693
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694/**
695 * pci_num_vf - return number of VFs associated with a PF device_release_driver
696 * @dev: the PCI device
697 *
698 * Returns number of VFs, or 0 if SR-IOV is not enabled.
699 */
700int pci_num_vf(struct pci_dev *dev)
701{
1452cd76 702 if (!dev->is_physfn)
fb8a0d9d 703 return 0;
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704
705 return dev->sriov->num_VFs;
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706}
707EXPORT_SYMBOL_GPL(pci_num_vf);
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709/**
710 * pci_vfs_assigned - returns number of VFs are assigned to a guest
711 * @dev: the PCI device
712 *
713 * Returns number of VFs belonging to this device that are assigned to a guest.
652d1100 714 * If device is not a physical function returns 0.
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715 */
716int pci_vfs_assigned(struct pci_dev *dev)
717{
718 struct pci_dev *vfdev;
719 unsigned int vfs_assigned = 0;
720 unsigned short dev_id;
721
722 /* only search if we are a PF */
723 if (!dev->is_physfn)
724 return 0;
725
726 /*
727 * determine the device ID for the VFs, the vendor ID will be the
728 * same as the PF so there is no need to check for that one
729 */
730 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
731
732 /* loop through all the VFs to see if we own any that are assigned */
733 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
734 while (vfdev) {
735 /*
736 * It is considered assigned if it is a virtual function with
737 * our dev as the physical function and the assigned bit is set
738 */
739 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
be63497c 740 pci_is_dev_assigned(vfdev))
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AD
741 vfs_assigned++;
742
743 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
744 }
745
746 return vfs_assigned;
747}
748EXPORT_SYMBOL_GPL(pci_vfs_assigned);
749
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750/**
751 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
752 * @dev: the PCI PF device
2094f167 753 * @numvfs: number that should be used for TotalVFs supported
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754 *
755 * Should be called from PF driver's probe routine with
756 * device's mutex held.
757 *
758 * Returns 0 if PF is an SRIOV-capable device and
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759 * value of numvfs valid. If not a PF return -ENOSYS;
760 * if numvfs is invalid return -EINVAL;
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761 * if VFs already enabled, return -EBUSY.
762 */
763int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
764{
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SA
765 if (!dev->is_physfn)
766 return -ENOSYS;
767 if (numvfs > dev->sriov->total_VFs)
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768 return -EINVAL;
769
770 /* Shouldn't change if VFs already enabled */
771 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
772 return -EBUSY;
773 else
6b136724 774 dev->sriov->driver_max_VFs = numvfs;
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775
776 return 0;
777}
778EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
779
780/**
ddc191f5 781 * pci_sriov_get_totalvfs -- get total VFs supported on this device
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782 * @dev: the PCI PF device
783 *
784 * For a PCIe device with SRIOV support, return the PCIe
6b136724 785 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100 786 * if the driver reduced it. Otherwise 0.
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787 */
788int pci_sriov_get_totalvfs(struct pci_dev *dev)
789{
1452cd76 790 if (!dev->is_physfn)
652d1100 791 return 0;
bff73156 792
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793 if (dev->sriov->driver_max_VFs)
794 return dev->sriov->driver_max_VFs;
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795
796 return dev->sriov->total_VFs;
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797}
798EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);