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7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
d1b054da YZ |
2 | /* |
3 | * drivers/pci/iov.c | |
4 | * | |
5 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
6 | * | |
7 | * PCI Express I/O Virtualization (IOV) support. | |
8 | * Single Root IOV 1.0 | |
302b4215 | 9 | * Address Translation Service 1.0 |
d1b054da YZ |
10 | */ |
11 | ||
12 | #include <linux/pci.h> | |
5a0e3ad6 | 13 | #include <linux/slab.h> |
d1b054da | 14 | #include <linux/mutex.h> |
363c75db | 15 | #include <linux/export.h> |
d1b054da YZ |
16 | #include <linux/string.h> |
17 | #include <linux/delay.h> | |
5cdede24 | 18 | #include <linux/pci-ats.h> |
d1b054da YZ |
19 | #include "pci.h" |
20 | ||
dd7cc44d | 21 | #define VIRTFN_ID_LEN 16 |
d1b054da | 22 | |
b07579c0 | 23 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 24 | { |
b07579c0 WY |
25 | if (!dev->is_physfn) |
26 | return -EINVAL; | |
a28724b0 | 27 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 28 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
29 | } |
30 | ||
b07579c0 | 31 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 32 | { |
b07579c0 WY |
33 | if (!dev->is_physfn) |
34 | return -EINVAL; | |
a28724b0 | 35 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 36 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
37 | } |
38 | ||
f59dca27 WY |
39 | /* |
40 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
41 | * change when NumVFs changes. | |
42 | * | |
43 | * Update iov->offset and iov->stride when NumVFs is written. | |
44 | */ | |
45 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
46 | { | |
47 | struct pci_sriov *iov = dev->sriov; | |
48 | ||
49 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
50 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
51 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
52 | } | |
53 | ||
4449f079 WY |
54 | /* |
55 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
56 | * determine how many additional bus numbers will be consumed by VFs. | |
57 | * | |
ea9a8854 AD |
58 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
59 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 60 | */ |
ea9a8854 | 61 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
62 | { |
63 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 64 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 65 | |
ea9a8854 | 66 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 67 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
68 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
69 | rc = -EIO; | |
70 | goto out; | |
71 | } | |
72 | ||
b07579c0 | 73 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
74 | if (busnr > iov->max_VF_buses) |
75 | iov->max_VF_buses = busnr; | |
4449f079 WY |
76 | } |
77 | ||
ea9a8854 AD |
78 | out: |
79 | pci_iov_set_numvfs(dev, 0); | |
80 | return rc; | |
4449f079 WY |
81 | } |
82 | ||
dd7cc44d YZ |
83 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
84 | { | |
dd7cc44d YZ |
85 | struct pci_bus *child; |
86 | ||
87 | if (bus->number == busnr) | |
88 | return bus; | |
89 | ||
90 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
91 | if (child) | |
92 | return child; | |
93 | ||
94 | child = pci_add_new_bus(bus, NULL, busnr); | |
95 | if (!child) | |
96 | return NULL; | |
97 | ||
b7eac055 | 98 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
99 | |
100 | return child; | |
101 | } | |
102 | ||
dc087f2f | 103 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 104 | { |
dc087f2f JL |
105 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
106 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
107 | } |
108 | ||
0e6c9122 WY |
109 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
110 | { | |
111 | if (!dev->is_physfn) | |
112 | return 0; | |
113 | ||
114 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
115 | } | |
116 | ||
753f6124 | 117 | int pci_iov_add_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
118 | { |
119 | int i; | |
dc087f2f | 120 | int rc = -ENOMEM; |
dd7cc44d YZ |
121 | u64 size; |
122 | char buf[VIRTFN_ID_LEN]; | |
123 | struct pci_dev *virtfn; | |
124 | struct resource *res; | |
125 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 126 | struct pci_bus *bus; |
dd7cc44d | 127 | |
b07579c0 | 128 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
129 | if (!bus) |
130 | goto failed; | |
131 | ||
132 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 133 | if (!virtfn) |
dc087f2f | 134 | goto failed0; |
dd7cc44d | 135 | |
b07579c0 | 136 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d | 137 | virtfn->vendor = dev->vendor; |
3142d832 | 138 | virtfn->device = iov->vf_device; |
156c5532 PL |
139 | rc = pci_setup_device(virtfn); |
140 | if (rc) | |
141 | goto failed0; | |
142 | ||
dd7cc44d | 143 | virtfn->dev.parent = dev->dev.parent; |
fbf33f51 XH |
144 | virtfn->physfn = pci_dev_get(dev); |
145 | virtfn->is_virtfn = 1; | |
aa931977 | 146 | virtfn->multifunction = 0; |
dd7cc44d YZ |
147 | |
148 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 149 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
150 | if (!res->parent) |
151 | continue; | |
152 | virtfn->resource[i].name = pci_name(virtfn); | |
153 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 154 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
155 | virtfn->resource[i].start = res->start + size * id; |
156 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
157 | rc = request_resource(res, &virtfn->resource[i]); | |
158 | BUG_ON(rc); | |
159 | } | |
160 | ||
dd7cc44d | 161 | pci_device_add(virtfn, virtfn->bus); |
dd7cc44d | 162 | |
dd7cc44d YZ |
163 | sprintf(buf, "virtfn%u", id); |
164 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
165 | if (rc) | |
166 | goto failed1; | |
167 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
168 | if (rc) | |
169 | goto failed2; | |
170 | ||
171 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
172 | ||
27d61629 SH |
173 | pci_bus_add_device(virtfn); |
174 | ||
dd7cc44d YZ |
175 | return 0; |
176 | ||
177 | failed2: | |
178 | sysfs_remove_link(&dev->dev.kobj, buf); | |
179 | failed1: | |
180 | pci_dev_put(dev); | |
210647af | 181 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f JL |
182 | failed0: |
183 | virtfn_remove_bus(dev->bus, bus); | |
184 | failed: | |
dd7cc44d YZ |
185 | |
186 | return rc; | |
187 | } | |
188 | ||
753f6124 | 189 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
190 | { |
191 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d | 192 | struct pci_dev *virtfn; |
dd7cc44d | 193 | |
dc087f2f | 194 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
195 | pci_iov_virtfn_bus(dev, id), |
196 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
197 | if (!virtfn) |
198 | return; | |
199 | ||
dd7cc44d YZ |
200 | sprintf(buf, "virtfn%u", id); |
201 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
202 | /* |
203 | * pci_stop_dev() could have been called for this virtfn already, | |
204 | * so the directory for the virtfn may have been removed before. | |
205 | * Double check to avoid spurious sysfs warnings. | |
206 | */ | |
207 | if (virtfn->dev.kobj.sd) | |
208 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d | 209 | |
210647af | 210 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 211 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d | 212 | |
dc087f2f JL |
213 | /* balance pci_get_domain_bus_and_slot() */ |
214 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
215 | pci_dev_put(dev); |
216 | } | |
217 | ||
995df527 WY |
218 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
219 | { | |
a39e3fcd AD |
220 | return 0; |
221 | } | |
222 | ||
223 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
224 | { | |
225 | return 0; | |
995df527 WY |
226 | } |
227 | ||
dd7cc44d YZ |
228 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
229 | { | |
230 | int rc; | |
3443c382 | 231 | int i; |
dd7cc44d | 232 | int nres; |
ce288ec3 | 233 | u16 initial; |
dd7cc44d YZ |
234 | struct resource *res; |
235 | struct pci_dev *pdev; | |
236 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 237 | int bars = 0; |
b07579c0 | 238 | int bus; |
dd7cc44d YZ |
239 | |
240 | if (!nr_virtfn) | |
241 | return 0; | |
242 | ||
6b136724 | 243 | if (iov->num_VFs) |
dd7cc44d YZ |
244 | return -EINVAL; |
245 | ||
246 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
247 | if (initial > iov->total_VFs || |
248 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
249 | return -EIO; |
250 | ||
6b136724 | 251 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
252 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
253 | return -EINVAL; | |
254 | ||
dd7cc44d YZ |
255 | nres = 0; |
256 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 257 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 258 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
259 | if (res->parent) |
260 | nres++; | |
261 | } | |
262 | if (nres != iov->nres) { | |
7506dc79 | 263 | pci_err(dev, "not enough MMIO resources for SR-IOV\n"); |
dd7cc44d YZ |
264 | return -ENOMEM; |
265 | } | |
266 | ||
b07579c0 | 267 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa | 268 | if (bus > dev->bus->busn_res.end) { |
7506dc79 | 269 | pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", |
68f8e9fa | 270 | nr_virtfn, bus, &dev->bus->busn_res); |
dd7cc44d YZ |
271 | return -ENOMEM; |
272 | } | |
273 | ||
bbef98ab | 274 | if (pci_enable_resources(dev, bars)) { |
7506dc79 | 275 | pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); |
bbef98ab RP |
276 | return -ENOMEM; |
277 | } | |
278 | ||
dd7cc44d YZ |
279 | if (iov->link != dev->devfn) { |
280 | pdev = pci_get_slot(dev->bus, iov->link); | |
281 | if (!pdev) | |
282 | return -ENODEV; | |
283 | ||
dc087f2f JL |
284 | if (!pdev->is_physfn) { |
285 | pci_dev_put(pdev); | |
652d1100 | 286 | return -ENOSYS; |
dc087f2f | 287 | } |
dd7cc44d YZ |
288 | |
289 | rc = sysfs_create_link(&dev->dev.kobj, | |
290 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 291 | pci_dev_put(pdev); |
dd7cc44d YZ |
292 | if (rc) |
293 | return rc; | |
294 | } | |
295 | ||
6b136724 | 296 | iov->initial_VFs = initial; |
dd7cc44d YZ |
297 | if (nr_virtfn < initial) |
298 | initial = nr_virtfn; | |
299 | ||
c23b6135 AD |
300 | rc = pcibios_sriov_enable(dev, initial); |
301 | if (rc) { | |
7506dc79 | 302 | pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); |
c23b6135 | 303 | goto err_pcibios; |
995df527 WY |
304 | } |
305 | ||
f40ec3c7 GS |
306 | pci_iov_set_numvfs(dev, nr_virtfn); |
307 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
308 | pci_cfg_access_lock(dev); | |
309 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
310 | msleep(100); | |
311 | pci_cfg_access_unlock(dev); | |
312 | ||
dd7cc44d | 313 | for (i = 0; i < initial; i++) { |
753f6124 | 314 | rc = pci_iov_add_virtfn(dev, i); |
dd7cc44d YZ |
315 | if (rc) |
316 | goto failed; | |
317 | } | |
318 | ||
319 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 320 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
321 | |
322 | return 0; | |
323 | ||
324 | failed: | |
3443c382 | 325 | while (i--) |
753f6124 | 326 | pci_iov_remove_virtfn(dev, i); |
dd7cc44d | 327 | |
c23b6135 | 328 | err_pcibios: |
dd7cc44d | 329 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 330 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
331 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
332 | ssleep(1); | |
fb51ccbf | 333 | pci_cfg_access_unlock(dev); |
dd7cc44d | 334 | |
0fc690a7 GS |
335 | pcibios_sriov_disable(dev); |
336 | ||
dd7cc44d YZ |
337 | if (iov->link != dev->devfn) |
338 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
339 | ||
b3908644 | 340 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
341 | return rc; |
342 | } | |
343 | ||
344 | static void sriov_disable(struct pci_dev *dev) | |
345 | { | |
346 | int i; | |
347 | struct pci_sriov *iov = dev->sriov; | |
348 | ||
6b136724 | 349 | if (!iov->num_VFs) |
dd7cc44d YZ |
350 | return; |
351 | ||
6b136724 | 352 | for (i = 0; i < iov->num_VFs; i++) |
753f6124 | 353 | pci_iov_remove_virtfn(dev, i); |
dd7cc44d YZ |
354 | |
355 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 356 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
357 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
358 | ssleep(1); | |
fb51ccbf | 359 | pci_cfg_access_unlock(dev); |
dd7cc44d | 360 | |
0fc690a7 GS |
361 | pcibios_sriov_disable(dev); |
362 | ||
dd7cc44d YZ |
363 | if (iov->link != dev->devfn) |
364 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
365 | ||
6b136724 | 366 | iov->num_VFs = 0; |
f59dca27 | 367 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
368 | } |
369 | ||
d1b054da YZ |
370 | static int sriov_init(struct pci_dev *dev, int pos) |
371 | { | |
0e6c9122 | 372 | int i, bar64; |
d1b054da YZ |
373 | int rc; |
374 | int nres; | |
375 | u32 pgsz; | |
ea9a8854 | 376 | u16 ctrl, total; |
d1b054da YZ |
377 | struct pci_sriov *iov; |
378 | struct resource *res; | |
379 | struct pci_dev *pdev; | |
380 | ||
d1b054da YZ |
381 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
382 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
383 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
384 | ssleep(1); | |
385 | } | |
386 | ||
d1b054da YZ |
387 | ctrl = 0; |
388 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
389 | if (pdev->is_physfn) | |
390 | goto found; | |
391 | ||
392 | pdev = NULL; | |
393 | if (pci_ari_enabled(dev->bus)) | |
394 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
395 | ||
396 | found: | |
397 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 398 | |
ff45f9dd BS |
399 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
400 | if (!total) | |
401 | return 0; | |
d1b054da YZ |
402 | |
403 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
404 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
405 | pgsz &= ~((1 << i) - 1); | |
406 | if (!pgsz) | |
407 | return -EIO; | |
408 | ||
409 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 410 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 411 | |
0e6c9122 WY |
412 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
413 | if (!iov) | |
414 | return -ENOMEM; | |
415 | ||
d1b054da YZ |
416 | nres = 0; |
417 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 418 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
419 | /* |
420 | * If it is already FIXED, don't change it, something | |
421 | * (perhaps EA or header fixups) wants it this way. | |
422 | */ | |
423 | if (res->flags & IORESOURCE_PCI_FIXED) | |
424 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
425 | else | |
426 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
427 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
428 | if (!res->flags) |
429 | continue; | |
430 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
431 | rc = -EIO; | |
432 | goto failed; | |
433 | } | |
0e6c9122 | 434 | iov->barsz[i] = resource_size(res); |
d1b054da | 435 | res->end = res->start + resource_size(res) * total - 1; |
7506dc79 | 436 | pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
e88ae01d | 437 | i, res, i, total); |
0e6c9122 | 438 | i += bar64; |
d1b054da YZ |
439 | nres++; |
440 | } | |
441 | ||
d1b054da YZ |
442 | iov->pos = pos; |
443 | iov->nres = nres; | |
444 | iov->ctrl = ctrl; | |
6b136724 | 445 | iov->total_VFs = total; |
3142d832 | 446 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); |
d1b054da YZ |
447 | iov->pgsz = pgsz; |
448 | iov->self = dev; | |
0e7df224 | 449 | iov->drivers_autoprobe = true; |
d1b054da YZ |
450 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); |
451 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 452 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 453 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
454 | |
455 | if (pdev) | |
456 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 457 | else |
d1b054da | 458 | iov->dev = dev; |
e277d2fc | 459 | |
d1b054da YZ |
460 | dev->sriov = iov; |
461 | dev->is_physfn = 1; | |
ea9a8854 AD |
462 | rc = compute_max_vf_buses(dev); |
463 | if (rc) | |
464 | goto fail_max_buses; | |
d1b054da YZ |
465 | |
466 | return 0; | |
467 | ||
ea9a8854 AD |
468 | fail_max_buses: |
469 | dev->sriov = NULL; | |
470 | dev->is_physfn = 0; | |
d1b054da YZ |
471 | failed: |
472 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 473 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
474 | res->flags = 0; |
475 | } | |
476 | ||
0e6c9122 | 477 | kfree(iov); |
d1b054da YZ |
478 | return rc; |
479 | } | |
480 | ||
481 | static void sriov_release(struct pci_dev *dev) | |
482 | { | |
6b136724 | 483 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 484 | |
e277d2fc | 485 | if (dev != dev->sriov->dev) |
d1b054da YZ |
486 | pci_dev_put(dev->sriov->dev); |
487 | ||
488 | kfree(dev->sriov); | |
489 | dev->sriov = NULL; | |
490 | } | |
491 | ||
8c5cdb6a YZ |
492 | static void sriov_restore_state(struct pci_dev *dev) |
493 | { | |
494 | int i; | |
495 | u16 ctrl; | |
496 | struct pci_sriov *iov = dev->sriov; | |
497 | ||
498 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
499 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
500 | return; | |
501 | ||
ff26449e TN |
502 | /* |
503 | * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because | |
504 | * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. | |
505 | */ | |
506 | ctrl &= ~PCI_SRIOV_CTRL_ARI; | |
507 | ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; | |
508 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); | |
509 | ||
8c5cdb6a YZ |
510 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) |
511 | pci_update_resource(dev, i); | |
512 | ||
513 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 514 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
515 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
516 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
517 | msleep(100); | |
518 | } | |
519 | ||
d1b054da YZ |
520 | /** |
521 | * pci_iov_init - initialize the IOV capability | |
522 | * @dev: the PCI device | |
523 | * | |
524 | * Returns 0 on success, or negative on failure. | |
525 | */ | |
526 | int pci_iov_init(struct pci_dev *dev) | |
527 | { | |
528 | int pos; | |
529 | ||
5f4d91a1 | 530 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
531 | return -ENODEV; |
532 | ||
533 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
534 | if (pos) | |
535 | return sriov_init(dev, pos); | |
536 | ||
537 | return -ENODEV; | |
538 | } | |
539 | ||
540 | /** | |
541 | * pci_iov_release - release resources used by the IOV capability | |
542 | * @dev: the PCI device | |
543 | */ | |
544 | void pci_iov_release(struct pci_dev *dev) | |
545 | { | |
546 | if (dev->is_physfn) | |
547 | sriov_release(dev); | |
548 | } | |
549 | ||
6ffa2489 BH |
550 | /** |
551 | * pci_iov_update_resource - update a VF BAR | |
552 | * @dev: the PCI device | |
553 | * @resno: the resource number | |
554 | * | |
555 | * Update a VF BAR in the SR-IOV capability of a PF. | |
556 | */ | |
557 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
558 | { | |
559 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
560 | struct resource *res = dev->resource + resno; | |
561 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
562 | struct pci_bus_region region; | |
546ba9f8 | 563 | u16 cmd; |
6ffa2489 BH |
564 | u32 new; |
565 | int reg; | |
566 | ||
567 | /* | |
568 | * The generic pci_restore_bars() path calls this for all devices, | |
569 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
570 | * have nothing to do. | |
571 | */ | |
572 | if (!iov) | |
573 | return; | |
574 | ||
546ba9f8 BH |
575 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
576 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
577 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
578 | vf_bar, res); | |
579 | return; | |
580 | } | |
581 | ||
6ffa2489 BH |
582 | /* |
583 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
584 | * BARs, and non-movable resources, e.g., those described via | |
585 | * Enhanced Allocation. | |
586 | */ | |
587 | if (!res->flags) | |
588 | return; | |
589 | ||
590 | if (res->flags & IORESOURCE_UNSET) | |
591 | return; | |
592 | ||
593 | if (res->flags & IORESOURCE_PCI_FIXED) | |
594 | return; | |
595 | ||
596 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
597 | new = region.start; | |
598 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
599 | ||
600 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
601 | pci_write_config_dword(dev, reg, new); | |
602 | if (res->flags & IORESOURCE_MEM_64) { | |
603 | new = region.start >> 16 >> 16; | |
604 | pci_write_config_dword(dev, reg + 4, new); | |
605 | } | |
606 | } | |
607 | ||
978d2d68 WY |
608 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
609 | int resno) | |
610 | { | |
611 | return pci_iov_resource_size(dev, resno); | |
612 | } | |
613 | ||
6faf17f6 CW |
614 | /** |
615 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
616 | * @dev: the PCI device | |
617 | * @resno: the resource number | |
618 | * | |
619 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
620 | * This is not the same as the resource size which is defined as | |
621 | * the VF BAR size multiplied by the number of VFs. The alignment | |
622 | * is just the VF BAR size. | |
623 | */ | |
0e52247a | 624 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 625 | { |
978d2d68 | 626 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
627 | } |
628 | ||
8c5cdb6a YZ |
629 | /** |
630 | * pci_restore_iov_state - restore the state of the IOV capability | |
631 | * @dev: the PCI device | |
632 | */ | |
633 | void pci_restore_iov_state(struct pci_dev *dev) | |
634 | { | |
635 | if (dev->is_physfn) | |
636 | sriov_restore_state(dev); | |
637 | } | |
a28724b0 | 638 | |
608c0d88 BL |
639 | /** |
640 | * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs | |
641 | * @dev: the PCI device | |
642 | * @auto_probe: set VF drivers auto probe flag | |
643 | */ | |
644 | void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe) | |
645 | { | |
646 | if (dev->is_physfn) | |
647 | dev->sriov->drivers_autoprobe = auto_probe; | |
648 | } | |
649 | ||
a28724b0 YZ |
650 | /** |
651 | * pci_iov_bus_range - find bus range used by Virtual Function | |
652 | * @bus: the PCI bus | |
653 | * | |
654 | * Returns max number of buses (exclude current one) used by Virtual | |
655 | * Functions. | |
656 | */ | |
657 | int pci_iov_bus_range(struct pci_bus *bus) | |
658 | { | |
659 | int max = 0; | |
a28724b0 YZ |
660 | struct pci_dev *dev; |
661 | ||
662 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
663 | if (!dev->is_physfn) | |
664 | continue; | |
4449f079 WY |
665 | if (dev->sriov->max_VF_buses > max) |
666 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
667 | } |
668 | ||
669 | return max ? max - bus->number : 0; | |
670 | } | |
dd7cc44d YZ |
671 | |
672 | /** | |
673 | * pci_enable_sriov - enable the SR-IOV capability | |
674 | * @dev: the PCI device | |
52a8873b | 675 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
676 | * |
677 | * Returns 0 on success, or negative on failure. | |
678 | */ | |
679 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
680 | { | |
681 | might_sleep(); | |
682 | ||
683 | if (!dev->is_physfn) | |
652d1100 | 684 | return -ENOSYS; |
dd7cc44d YZ |
685 | |
686 | return sriov_enable(dev, nr_virtfn); | |
687 | } | |
688 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
689 | ||
690 | /** | |
691 | * pci_disable_sriov - disable the SR-IOV capability | |
692 | * @dev: the PCI device | |
693 | */ | |
694 | void pci_disable_sriov(struct pci_dev *dev) | |
695 | { | |
696 | might_sleep(); | |
697 | ||
698 | if (!dev->is_physfn) | |
699 | return; | |
700 | ||
701 | sriov_disable(dev); | |
702 | } | |
703 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 704 | |
fb8a0d9d WM |
705 | /** |
706 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
707 | * @dev: the PCI device | |
708 | * | |
709 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
710 | */ | |
711 | int pci_num_vf(struct pci_dev *dev) | |
712 | { | |
1452cd76 | 713 | if (!dev->is_physfn) |
fb8a0d9d | 714 | return 0; |
1452cd76 BH |
715 | |
716 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
717 | } |
718 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 719 | |
5a8eb242 AD |
720 | /** |
721 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
722 | * @dev: the PCI device | |
723 | * | |
724 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 725 | * If device is not a physical function returns 0. |
5a8eb242 AD |
726 | */ |
727 | int pci_vfs_assigned(struct pci_dev *dev) | |
728 | { | |
729 | struct pci_dev *vfdev; | |
730 | unsigned int vfs_assigned = 0; | |
731 | unsigned short dev_id; | |
732 | ||
733 | /* only search if we are a PF */ | |
734 | if (!dev->is_physfn) | |
735 | return 0; | |
736 | ||
737 | /* | |
738 | * determine the device ID for the VFs, the vendor ID will be the | |
739 | * same as the PF so there is no need to check for that one | |
740 | */ | |
3142d832 | 741 | dev_id = dev->sriov->vf_device; |
5a8eb242 AD |
742 | |
743 | /* loop through all the VFs to see if we own any that are assigned */ | |
744 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
745 | while (vfdev) { | |
746 | /* | |
747 | * It is considered assigned if it is a virtual function with | |
748 | * our dev as the physical function and the assigned bit is set | |
749 | */ | |
750 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 751 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
752 | vfs_assigned++; |
753 | ||
754 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
755 | } | |
756 | ||
757 | return vfs_assigned; | |
758 | } | |
759 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
760 | ||
bff73156 DD |
761 | /** |
762 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
763 | * @dev: the PCI PF device | |
2094f167 | 764 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
765 | * |
766 | * Should be called from PF driver's probe routine with | |
767 | * device's mutex held. | |
768 | * | |
769 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
770 | * value of numvfs valid. If not a PF return -ENOSYS; |
771 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
772 | * if VFs already enabled, return -EBUSY. |
773 | */ | |
774 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
775 | { | |
652d1100 SA |
776 | if (!dev->is_physfn) |
777 | return -ENOSYS; | |
778 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
779 | return -EINVAL; |
780 | ||
781 | /* Shouldn't change if VFs already enabled */ | |
782 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
783 | return -EBUSY; | |
784 | else | |
6b136724 | 785 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
786 | |
787 | return 0; | |
788 | } | |
789 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
790 | ||
791 | /** | |
ddc191f5 | 792 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
793 | * @dev: the PCI PF device |
794 | * | |
795 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 796 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 797 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
798 | */ |
799 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
800 | { | |
1452cd76 | 801 | if (!dev->is_physfn) |
652d1100 | 802 | return 0; |
bff73156 | 803 | |
6b136724 BH |
804 | if (dev->sriov->driver_max_VFs) |
805 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
806 | |
807 | return dev->sriov->total_VFs; | |
bff73156 DD |
808 | } |
809 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |