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CommitLineData
d1b054da
YZ
1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
302b4215 8 * Address Translation Service 1.0
d1b054da
YZ
9 */
10
11#include <linux/pci.h>
5a0e3ad6 12#include <linux/slab.h>
d1b054da 13#include <linux/mutex.h>
363c75db 14#include <linux/export.h>
d1b054da
YZ
15#include <linux/string.h>
16#include <linux/delay.h>
5cdede24 17#include <linux/pci-ats.h>
d1b054da
YZ
18#include "pci.h"
19
dd7cc44d 20#define VIRTFN_ID_LEN 16
d1b054da 21
a28724b0
YZ
22static inline u8 virtfn_bus(struct pci_dev *dev, int id)
23{
24 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
25 dev->sriov->stride * id) >> 8);
26}
27
28static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
29{
30 return (dev->devfn + dev->sriov->offset +
31 dev->sriov->stride * id) & 0xff;
32}
33
dd7cc44d
YZ
34static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
35{
dd7cc44d
YZ
36 struct pci_bus *child;
37
38 if (bus->number == busnr)
39 return bus;
40
41 child = pci_find_bus(pci_domain_nr(bus), busnr);
42 if (child)
43 return child;
44
45 child = pci_add_new_bus(bus, NULL, busnr);
46 if (!child)
47 return NULL;
48
b7eac055 49 pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d
YZ
50
51 return child;
52}
53
dc087f2f 54static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
dd7cc44d 55{
dc087f2f
JL
56 if (physbus != virtbus && list_empty(&virtbus->devices))
57 pci_remove_bus(virtbus);
dd7cc44d
YZ
58}
59
60static int virtfn_add(struct pci_dev *dev, int id, int reset)
61{
62 int i;
dc087f2f 63 int rc = -ENOMEM;
dd7cc44d
YZ
64 u64 size;
65 char buf[VIRTFN_ID_LEN];
66 struct pci_dev *virtfn;
67 struct resource *res;
68 struct pci_sriov *iov = dev->sriov;
8b1fce04 69 struct pci_bus *bus;
dd7cc44d 70
dd7cc44d 71 mutex_lock(&iov->dev->sriov->lock);
8b1fce04 72 bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
dc087f2f
JL
73 if (!bus)
74 goto failed;
75
76 virtfn = pci_alloc_dev(bus);
dd7cc44d 77 if (!virtfn)
dc087f2f 78 goto failed0;
dd7cc44d 79
dd7cc44d
YZ
80 virtfn->devfn = virtfn_devfn(dev, id);
81 virtfn->vendor = dev->vendor;
82 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
83 pci_setup_device(virtfn);
84 virtfn->dev.parent = dev->dev.parent;
fbf33f51
XH
85 virtfn->physfn = pci_dev_get(dev);
86 virtfn->is_virtfn = 1;
dd7cc44d
YZ
87
88 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
89 res = dev->resource + PCI_IOV_RESOURCES + i;
90 if (!res->parent)
91 continue;
92 virtfn->resource[i].name = pci_name(virtfn);
93 virtfn->resource[i].flags = res->flags;
94 size = resource_size(res);
6b136724 95 do_div(size, iov->total_VFs);
dd7cc44d
YZ
96 virtfn->resource[i].start = res->start + size * id;
97 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
98 rc = request_resource(res, &virtfn->resource[i]);
99 BUG_ON(rc);
100 }
101
102 if (reset)
8c1c699f 103 __pci_reset_function(virtfn);
dd7cc44d
YZ
104
105 pci_device_add(virtfn, virtfn->bus);
106 mutex_unlock(&iov->dev->sriov->lock);
107
dd7cc44d 108 rc = pci_bus_add_device(virtfn);
dd7cc44d
YZ
109 sprintf(buf, "virtfn%u", id);
110 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
111 if (rc)
112 goto failed1;
113 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
114 if (rc)
115 goto failed2;
116
117 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
118
119 return 0;
120
121failed2:
122 sysfs_remove_link(&dev->dev.kobj, buf);
123failed1:
124 pci_dev_put(dev);
125 mutex_lock(&iov->dev->sriov->lock);
210647af 126 pci_stop_and_remove_bus_device(virtfn);
dc087f2f
JL
127failed0:
128 virtfn_remove_bus(dev->bus, bus);
129failed:
dd7cc44d
YZ
130 mutex_unlock(&iov->dev->sriov->lock);
131
132 return rc;
133}
134
135static void virtfn_remove(struct pci_dev *dev, int id, int reset)
136{
137 char buf[VIRTFN_ID_LEN];
dd7cc44d
YZ
138 struct pci_dev *virtfn;
139 struct pci_sriov *iov = dev->sriov;
140
dc087f2f
JL
141 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
142 virtfn_bus(dev, id),
143 virtfn_devfn(dev, id));
dd7cc44d
YZ
144 if (!virtfn)
145 return;
146
dd7cc44d
YZ
147 if (reset) {
148 device_release_driver(&virtfn->dev);
8c1c699f 149 __pci_reset_function(virtfn);
dd7cc44d
YZ
150 }
151
152 sprintf(buf, "virtfn%u", id);
153 sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef
YL
154 /*
155 * pci_stop_dev() could have been called for this virtfn already,
156 * so the directory for the virtfn may have been removed before.
157 * Double check to avoid spurious sysfs warnings.
158 */
159 if (virtfn->dev.kobj.sd)
160 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d
YZ
161
162 mutex_lock(&iov->dev->sriov->lock);
210647af 163 pci_stop_and_remove_bus_device(virtfn);
dc087f2f 164 virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d
YZ
165 mutex_unlock(&iov->dev->sriov->lock);
166
dc087f2f
JL
167 /* balance pci_get_domain_bus_and_slot() */
168 pci_dev_put(virtfn);
dd7cc44d
YZ
169 pci_dev_put(dev);
170}
171
74bb1bcc
YZ
172static int sriov_migration(struct pci_dev *dev)
173{
174 u16 status;
175 struct pci_sriov *iov = dev->sriov;
176
6b136724 177 if (!iov->num_VFs)
74bb1bcc
YZ
178 return 0;
179
180 if (!(iov->cap & PCI_SRIOV_CAP_VFM))
181 return 0;
182
183 pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
184 if (!(status & PCI_SRIOV_STATUS_VFM))
185 return 0;
186
187 schedule_work(&iov->mtask);
188
189 return 1;
190}
191
192static void sriov_migration_task(struct work_struct *work)
193{
194 int i;
195 u8 state;
196 u16 status;
197 struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
198
6b136724 199 for (i = iov->initial_VFs; i < iov->num_VFs; i++) {
74bb1bcc
YZ
200 state = readb(iov->mstate + i);
201 if (state == PCI_SRIOV_VFM_MI) {
202 writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
203 state = readb(iov->mstate + i);
204 if (state == PCI_SRIOV_VFM_AV)
205 virtfn_add(iov->self, i, 1);
206 } else if (state == PCI_SRIOV_VFM_MO) {
207 virtfn_remove(iov->self, i, 1);
208 writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
209 state = readb(iov->mstate + i);
210 if (state == PCI_SRIOV_VFM_AV)
211 virtfn_add(iov->self, i, 0);
212 }
213 }
214
215 pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
216 status &= ~PCI_SRIOV_STATUS_VFM;
217 pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
218}
219
220static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
221{
222 int bir;
223 u32 table;
224 resource_size_t pa;
225 struct pci_sriov *iov = dev->sriov;
226
6b136724 227 if (nr_virtfn <= iov->initial_VFs)
74bb1bcc
YZ
228 return 0;
229
230 pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
231 bir = PCI_SRIOV_VFM_BIR(table);
232 if (bir > PCI_STD_RESOURCE_END)
233 return -EIO;
234
235 table = PCI_SRIOV_VFM_OFFSET(table);
236 if (table + nr_virtfn > pci_resource_len(dev, bir))
237 return -EIO;
238
239 pa = pci_resource_start(dev, bir) + table;
240 iov->mstate = ioremap(pa, nr_virtfn);
241 if (!iov->mstate)
242 return -ENOMEM;
243
244 INIT_WORK(&iov->mtask, sriov_migration_task);
245
246 iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
247 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
248
249 return 0;
250}
251
252static void sriov_disable_migration(struct pci_dev *dev)
253{
254 struct pci_sriov *iov = dev->sriov;
255
256 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
257 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
258
259 cancel_work_sync(&iov->mtask);
260 iounmap(iov->mstate);
261}
262
dd7cc44d
YZ
263static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
264{
265 int rc;
266 int i, j;
267 int nres;
268 u16 offset, stride, initial;
269 struct resource *res;
270 struct pci_dev *pdev;
271 struct pci_sriov *iov = dev->sriov;
bbef98ab 272 int bars = 0;
dd7cc44d
YZ
273
274 if (!nr_virtfn)
275 return 0;
276
6b136724 277 if (iov->num_VFs)
dd7cc44d
YZ
278 return -EINVAL;
279
280 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724
BH
281 if (initial > iov->total_VFs ||
282 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d
YZ
283 return -EIO;
284
6b136724 285 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
dd7cc44d
YZ
286 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
287 return -EINVAL;
288
dd7cc44d
YZ
289 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
290 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
291 if (!offset || (nr_virtfn > 1 && !stride))
292 return -EIO;
293
294 nres = 0;
295 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab 296 bars |= (1 << (i + PCI_IOV_RESOURCES));
dd7cc44d
YZ
297 res = dev->resource + PCI_IOV_RESOURCES + i;
298 if (res->parent)
299 nres++;
300 }
301 if (nres != iov->nres) {
302 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
303 return -ENOMEM;
304 }
305
306 iov->offset = offset;
307 iov->stride = stride;
308
b918c62e 309 if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
dd7cc44d
YZ
310 dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
311 return -ENOMEM;
312 }
313
bbef98ab
RP
314 if (pci_enable_resources(dev, bars)) {
315 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
316 return -ENOMEM;
317 }
318
dd7cc44d
YZ
319 if (iov->link != dev->devfn) {
320 pdev = pci_get_slot(dev->bus, iov->link);
321 if (!pdev)
322 return -ENODEV;
323
dc087f2f
JL
324 if (!pdev->is_physfn) {
325 pci_dev_put(pdev);
652d1100 326 return -ENOSYS;
dc087f2f 327 }
dd7cc44d
YZ
328
329 rc = sysfs_create_link(&dev->dev.kobj,
330 &pdev->dev.kobj, "dep_link");
dc087f2f 331 pci_dev_put(pdev);
dd7cc44d
YZ
332 if (rc)
333 return rc;
334 }
335
19b6984e 336 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
dd7cc44d 337 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
fb51ccbf 338 pci_cfg_access_lock(dev);
dd7cc44d
YZ
339 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
340 msleep(100);
fb51ccbf 341 pci_cfg_access_unlock(dev);
dd7cc44d 342
6b136724 343 iov->initial_VFs = initial;
dd7cc44d
YZ
344 if (nr_virtfn < initial)
345 initial = nr_virtfn;
346
347 for (i = 0; i < initial; i++) {
348 rc = virtfn_add(dev, i, 0);
349 if (rc)
350 goto failed;
351 }
352
74bb1bcc
YZ
353 if (iov->cap & PCI_SRIOV_CAP_VFM) {
354 rc = sriov_enable_migration(dev, nr_virtfn);
355 if (rc)
356 goto failed;
357 }
358
dd7cc44d 359 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724 360 iov->num_VFs = nr_virtfn;
dd7cc44d
YZ
361
362 return 0;
363
364failed:
365 for (j = 0; j < i; j++)
366 virtfn_remove(dev, j, 0);
367
368 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 369 pci_cfg_access_lock(dev);
dd7cc44d 370 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
19b6984e 371 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d 372 ssleep(1);
fb51ccbf 373 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
374
375 if (iov->link != dev->devfn)
376 sysfs_remove_link(&dev->dev.kobj, "dep_link");
377
378 return rc;
379}
380
381static void sriov_disable(struct pci_dev *dev)
382{
383 int i;
384 struct pci_sriov *iov = dev->sriov;
385
6b136724 386 if (!iov->num_VFs)
dd7cc44d
YZ
387 return;
388
74bb1bcc
YZ
389 if (iov->cap & PCI_SRIOV_CAP_VFM)
390 sriov_disable_migration(dev);
391
6b136724 392 for (i = 0; i < iov->num_VFs; i++)
dd7cc44d
YZ
393 virtfn_remove(dev, i, 0);
394
395 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 396 pci_cfg_access_lock(dev);
dd7cc44d
YZ
397 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
398 ssleep(1);
fb51ccbf 399 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
400
401 if (iov->link != dev->devfn)
402 sysfs_remove_link(&dev->dev.kobj, "dep_link");
403
6b136724 404 iov->num_VFs = 0;
19b6984e 405 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d
YZ
406}
407
d1b054da
YZ
408static int sriov_init(struct pci_dev *dev, int pos)
409{
410 int i;
411 int rc;
412 int nres;
413 u32 pgsz;
414 u16 ctrl, total, offset, stride;
415 struct pci_sriov *iov;
416 struct resource *res;
417 struct pci_dev *pdev;
418
62f87c0e
YW
419 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
420 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
d1b054da
YZ
421 return -ENODEV;
422
423 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
424 if (ctrl & PCI_SRIOV_CTRL_VFE) {
425 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
426 ssleep(1);
427 }
428
429 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
430 if (!total)
431 return 0;
432
433 ctrl = 0;
434 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
435 if (pdev->is_physfn)
436 goto found;
437
438 pdev = NULL;
439 if (pci_ari_enabled(dev->bus))
440 ctrl |= PCI_SRIOV_CTRL_ARI;
441
442found:
443 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
045cc22e 444 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
d1b054da
YZ
445 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
446 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
447 if (!offset || (total > 1 && !stride))
448 return -EIO;
449
450 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
451 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
452 pgsz &= ~((1 << i) - 1);
453 if (!pgsz)
454 return -EIO;
455
456 pgsz &= ~(pgsz - 1);
8161fe91 457 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da
YZ
458
459 nres = 0;
460 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
461 res = dev->resource + PCI_IOV_RESOURCES + i;
462 i += __pci_read_base(dev, pci_bar_unknown, res,
463 pos + PCI_SRIOV_BAR + i * 4);
464 if (!res->flags)
465 continue;
466 if (resource_size(res) & (PAGE_SIZE - 1)) {
467 rc = -EIO;
468 goto failed;
469 }
470 res->end = res->start + resource_size(res) * total - 1;
471 nres++;
472 }
473
474 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
475 if (!iov) {
476 rc = -ENOMEM;
477 goto failed;
478 }
479
480 iov->pos = pos;
481 iov->nres = nres;
482 iov->ctrl = ctrl;
6b136724 483 iov->total_VFs = total;
d1b054da
YZ
484 iov->offset = offset;
485 iov->stride = stride;
486 iov->pgsz = pgsz;
487 iov->self = dev;
488 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
489 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e 490 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe 491 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da
YZ
492
493 if (pdev)
494 iov->dev = pci_dev_get(pdev);
e277d2fc 495 else
d1b054da 496 iov->dev = dev;
e277d2fc
YZ
497
498 mutex_init(&iov->lock);
d1b054da
YZ
499
500 dev->sriov = iov;
501 dev->is_physfn = 1;
502
503 return 0;
504
505failed:
506 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
507 res = dev->resource + PCI_IOV_RESOURCES + i;
508 res->flags = 0;
509 }
510
511 return rc;
512}
513
514static void sriov_release(struct pci_dev *dev)
515{
6b136724 516 BUG_ON(dev->sriov->num_VFs);
dd7cc44d 517
e277d2fc 518 if (dev != dev->sriov->dev)
d1b054da
YZ
519 pci_dev_put(dev->sriov->dev);
520
e277d2fc
YZ
521 mutex_destroy(&dev->sriov->lock);
522
d1b054da
YZ
523 kfree(dev->sriov);
524 dev->sriov = NULL;
525}
526
8c5cdb6a
YZ
527static void sriov_restore_state(struct pci_dev *dev)
528{
529 int i;
530 u16 ctrl;
531 struct pci_sriov *iov = dev->sriov;
532
533 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
534 if (ctrl & PCI_SRIOV_CTRL_VFE)
535 return;
536
537 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
538 pci_update_resource(dev, i);
539
540 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
6b136724 541 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
8c5cdb6a
YZ
542 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
543 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
544 msleep(100);
545}
546
d1b054da
YZ
547/**
548 * pci_iov_init - initialize the IOV capability
549 * @dev: the PCI device
550 *
551 * Returns 0 on success, or negative on failure.
552 */
553int pci_iov_init(struct pci_dev *dev)
554{
555 int pos;
556
5f4d91a1 557 if (!pci_is_pcie(dev))
d1b054da
YZ
558 return -ENODEV;
559
560 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
561 if (pos)
562 return sriov_init(dev, pos);
563
564 return -ENODEV;
565}
566
567/**
568 * pci_iov_release - release resources used by the IOV capability
569 * @dev: the PCI device
570 */
571void pci_iov_release(struct pci_dev *dev)
572{
573 if (dev->is_physfn)
574 sriov_release(dev);
575}
576
577/**
578 * pci_iov_resource_bar - get position of the SR-IOV BAR
579 * @dev: the PCI device
580 * @resno: the resource number
581 * @type: the BAR type to be filled in
582 *
583 * Returns position of the BAR encapsulated in the SR-IOV capability.
584 */
585int pci_iov_resource_bar(struct pci_dev *dev, int resno,
586 enum pci_bar_type *type)
587{
588 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
589 return 0;
590
591 BUG_ON(!dev->is_physfn);
592
593 *type = pci_bar_unknown;
594
595 return dev->sriov->pos + PCI_SRIOV_BAR +
596 4 * (resno - PCI_IOV_RESOURCES);
597}
8c5cdb6a 598
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599/**
600 * pci_sriov_resource_alignment - get resource alignment for VF BAR
601 * @dev: the PCI device
602 * @resno: the resource number
603 *
604 * Returns the alignment of the VF BAR found in the SR-IOV capability.
605 * This is not the same as the resource size which is defined as
606 * the VF BAR size multiplied by the number of VFs. The alignment
607 * is just the VF BAR size.
608 */
0e52247a 609resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
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610{
611 struct resource tmp;
612 enum pci_bar_type type;
613 int reg = pci_iov_resource_bar(dev, resno, &type);
f7625980 614
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615 if (!reg)
616 return 0;
617
618 __pci_read_base(dev, type, &tmp, reg);
619 return resource_alignment(&tmp);
620}
621
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622/**
623 * pci_restore_iov_state - restore the state of the IOV capability
624 * @dev: the PCI device
625 */
626void pci_restore_iov_state(struct pci_dev *dev)
627{
628 if (dev->is_physfn)
629 sriov_restore_state(dev);
630}
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631
632/**
633 * pci_iov_bus_range - find bus range used by Virtual Function
634 * @bus: the PCI bus
635 *
636 * Returns max number of buses (exclude current one) used by Virtual
637 * Functions.
638 */
639int pci_iov_bus_range(struct pci_bus *bus)
640{
641 int max = 0;
642 u8 busnr;
643 struct pci_dev *dev;
644
645 list_for_each_entry(dev, &bus->devices, bus_list) {
646 if (!dev->is_physfn)
647 continue;
6b136724 648 busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
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649 if (busnr > max)
650 max = busnr;
651 }
652
653 return max ? max - bus->number : 0;
654}
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655
656/**
657 * pci_enable_sriov - enable the SR-IOV capability
658 * @dev: the PCI device
52a8873b 659 * @nr_virtfn: number of virtual functions to enable
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660 *
661 * Returns 0 on success, or negative on failure.
662 */
663int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
664{
665 might_sleep();
666
667 if (!dev->is_physfn)
652d1100 668 return -ENOSYS;
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669
670 return sriov_enable(dev, nr_virtfn);
671}
672EXPORT_SYMBOL_GPL(pci_enable_sriov);
673
674/**
675 * pci_disable_sriov - disable the SR-IOV capability
676 * @dev: the PCI device
677 */
678void pci_disable_sriov(struct pci_dev *dev)
679{
680 might_sleep();
681
682 if (!dev->is_physfn)
683 return;
684
685 sriov_disable(dev);
686}
687EXPORT_SYMBOL_GPL(pci_disable_sriov);
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688
689/**
690 * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
691 * @dev: the PCI device
692 *
693 * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
694 *
695 * Physical Function driver is responsible to register IRQ handler using
696 * VF Migration Interrupt Message Number, and call this function when the
697 * interrupt is generated by the hardware.
698 */
699irqreturn_t pci_sriov_migration(struct pci_dev *dev)
700{
701 if (!dev->is_physfn)
702 return IRQ_NONE;
703
704 return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
705}
706EXPORT_SYMBOL_GPL(pci_sriov_migration);
302b4215 707
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708/**
709 * pci_num_vf - return number of VFs associated with a PF device_release_driver
710 * @dev: the PCI device
711 *
712 * Returns number of VFs, or 0 if SR-IOV is not enabled.
713 */
714int pci_num_vf(struct pci_dev *dev)
715{
1452cd76 716 if (!dev->is_physfn)
fb8a0d9d 717 return 0;
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718
719 return dev->sriov->num_VFs;
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720}
721EXPORT_SYMBOL_GPL(pci_num_vf);
bff73156 722
5a8eb242
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723/**
724 * pci_vfs_assigned - returns number of VFs are assigned to a guest
725 * @dev: the PCI device
726 *
727 * Returns number of VFs belonging to this device that are assigned to a guest.
652d1100 728 * If device is not a physical function returns 0.
5a8eb242
AD
729 */
730int pci_vfs_assigned(struct pci_dev *dev)
731{
732 struct pci_dev *vfdev;
733 unsigned int vfs_assigned = 0;
734 unsigned short dev_id;
735
736 /* only search if we are a PF */
737 if (!dev->is_physfn)
738 return 0;
739
740 /*
741 * determine the device ID for the VFs, the vendor ID will be the
742 * same as the PF so there is no need to check for that one
743 */
744 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
745
746 /* loop through all the VFs to see if we own any that are assigned */
747 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
748 while (vfdev) {
749 /*
750 * It is considered assigned if it is a virtual function with
751 * our dev as the physical function and the assigned bit is set
752 */
753 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
754 (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
755 vfs_assigned++;
756
757 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
758 }
759
760 return vfs_assigned;
761}
762EXPORT_SYMBOL_GPL(pci_vfs_assigned);
763
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764/**
765 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
766 * @dev: the PCI PF device
2094f167 767 * @numvfs: number that should be used for TotalVFs supported
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768 *
769 * Should be called from PF driver's probe routine with
770 * device's mutex held.
771 *
772 * Returns 0 if PF is an SRIOV-capable device and
652d1100
SA
773 * value of numvfs valid. If not a PF return -ENOSYS;
774 * if numvfs is invalid return -EINVAL;
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775 * if VFs already enabled, return -EBUSY.
776 */
777int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
778{
652d1100
SA
779 if (!dev->is_physfn)
780 return -ENOSYS;
781 if (numvfs > dev->sriov->total_VFs)
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782 return -EINVAL;
783
784 /* Shouldn't change if VFs already enabled */
785 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
786 return -EBUSY;
787 else
6b136724 788 dev->sriov->driver_max_VFs = numvfs;
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789
790 return 0;
791}
792EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
793
794/**
ddc191f5 795 * pci_sriov_get_totalvfs -- get total VFs supported on this device
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796 * @dev: the PCI PF device
797 *
798 * For a PCIe device with SRIOV support, return the PCIe
6b136724 799 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100 800 * if the driver reduced it. Otherwise 0.
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801 */
802int pci_sriov_get_totalvfs(struct pci_dev *dev)
803{
1452cd76 804 if (!dev->is_physfn)
652d1100 805 return 0;
bff73156 806
6b136724
BH
807 if (dev->sriov->driver_max_VFs)
808 return dev->sriov->driver_max_VFs;
1452cd76
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809
810 return dev->sriov->total_VFs;
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811}
812EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);