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PCI: Remove redundant validation of SR-IOV offset/stride registers
[mirror_ubuntu-zesty-kernel.git] / drivers / pci / iov.c
CommitLineData
d1b054da
YZ
1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
302b4215 8 * Address Translation Service 1.0
d1b054da
YZ
9 */
10
11#include <linux/pci.h>
5a0e3ad6 12#include <linux/slab.h>
d1b054da 13#include <linux/mutex.h>
363c75db 14#include <linux/export.h>
d1b054da
YZ
15#include <linux/string.h>
16#include <linux/delay.h>
5cdede24 17#include <linux/pci-ats.h>
d1b054da
YZ
18#include "pci.h"
19
dd7cc44d 20#define VIRTFN_ID_LEN 16
d1b054da 21
b07579c0 22int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
a28724b0 23{
b07579c0
WY
24 if (!dev->is_physfn)
25 return -EINVAL;
a28724b0 26 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
b07579c0 27 dev->sriov->stride * vf_id) >> 8);
a28724b0
YZ
28}
29
b07579c0 30int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
a28724b0 31{
b07579c0
WY
32 if (!dev->is_physfn)
33 return -EINVAL;
a28724b0 34 return (dev->devfn + dev->sriov->offset +
b07579c0 35 dev->sriov->stride * vf_id) & 0xff;
a28724b0
YZ
36}
37
f59dca27
WY
38/*
39 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
40 * change when NumVFs changes.
41 *
42 * Update iov->offset and iov->stride when NumVFs is written.
43 */
44static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
45{
46 struct pci_sriov *iov = dev->sriov;
47
48 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
49 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
50 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
51}
52
4449f079
WY
53/*
54 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
55 * determine how many additional bus numbers will be consumed by VFs.
56 *
ea9a8854
AD
57 * Iterate over all valid NumVFs, validate offset and stride, and calculate
58 * the maximum number of bus numbers that could ever be required.
4449f079 59 */
ea9a8854 60static int compute_max_vf_buses(struct pci_dev *dev)
4449f079
WY
61{
62 struct pci_sriov *iov = dev->sriov;
ea9a8854 63 int nr_virtfn, busnr, rc = 0;
4449f079 64
ea9a8854 65 for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
4449f079 66 pci_iov_set_numvfs(dev, nr_virtfn);
ea9a8854
AD
67 if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
68 rc = -EIO;
69 goto out;
70 }
71
b07579c0 72 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
ea9a8854
AD
73 if (busnr > iov->max_VF_buses)
74 iov->max_VF_buses = busnr;
4449f079
WY
75 }
76
ea9a8854
AD
77out:
78 pci_iov_set_numvfs(dev, 0);
79 return rc;
4449f079
WY
80}
81
dd7cc44d
YZ
82static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
83{
dd7cc44d
YZ
84 struct pci_bus *child;
85
86 if (bus->number == busnr)
87 return bus;
88
89 child = pci_find_bus(pci_domain_nr(bus), busnr);
90 if (child)
91 return child;
92
93 child = pci_add_new_bus(bus, NULL, busnr);
94 if (!child)
95 return NULL;
96
b7eac055 97 pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d
YZ
98
99 return child;
100}
101
dc087f2f 102static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
dd7cc44d 103{
dc087f2f
JL
104 if (physbus != virtbus && list_empty(&virtbus->devices))
105 pci_remove_bus(virtbus);
dd7cc44d
YZ
106}
107
0e6c9122
WY
108resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
109{
110 if (!dev->is_physfn)
111 return 0;
112
113 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
114}
115
dd7cc44d
YZ
116static int virtfn_add(struct pci_dev *dev, int id, int reset)
117{
118 int i;
dc087f2f 119 int rc = -ENOMEM;
dd7cc44d
YZ
120 u64 size;
121 char buf[VIRTFN_ID_LEN];
122 struct pci_dev *virtfn;
123 struct resource *res;
124 struct pci_sriov *iov = dev->sriov;
8b1fce04 125 struct pci_bus *bus;
dd7cc44d 126
dd7cc44d 127 mutex_lock(&iov->dev->sriov->lock);
b07579c0 128 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
dc087f2f
JL
129 if (!bus)
130 goto failed;
131
132 virtfn = pci_alloc_dev(bus);
dd7cc44d 133 if (!virtfn)
dc087f2f 134 goto failed0;
dd7cc44d 135
b07579c0 136 virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
dd7cc44d
YZ
137 virtfn->vendor = dev->vendor;
138 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
139 pci_setup_device(virtfn);
140 virtfn->dev.parent = dev->dev.parent;
fbf33f51
XH
141 virtfn->physfn = pci_dev_get(dev);
142 virtfn->is_virtfn = 1;
aa931977 143 virtfn->multifunction = 0;
dd7cc44d
YZ
144
145 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 146 res = &dev->resource[i + PCI_IOV_RESOURCES];
dd7cc44d
YZ
147 if (!res->parent)
148 continue;
149 virtfn->resource[i].name = pci_name(virtfn);
150 virtfn->resource[i].flags = res->flags;
0e6c9122 151 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
dd7cc44d
YZ
152 virtfn->resource[i].start = res->start + size * id;
153 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
154 rc = request_resource(res, &virtfn->resource[i]);
155 BUG_ON(rc);
156 }
157
158 if (reset)
8c1c699f 159 __pci_reset_function(virtfn);
dd7cc44d
YZ
160
161 pci_device_add(virtfn, virtfn->bus);
162 mutex_unlock(&iov->dev->sriov->lock);
163
c893d133 164 pci_bus_add_device(virtfn);
dd7cc44d
YZ
165 sprintf(buf, "virtfn%u", id);
166 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
167 if (rc)
168 goto failed1;
169 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
170 if (rc)
171 goto failed2;
172
173 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
174
175 return 0;
176
177failed2:
178 sysfs_remove_link(&dev->dev.kobj, buf);
179failed1:
180 pci_dev_put(dev);
181 mutex_lock(&iov->dev->sriov->lock);
210647af 182 pci_stop_and_remove_bus_device(virtfn);
dc087f2f
JL
183failed0:
184 virtfn_remove_bus(dev->bus, bus);
185failed:
dd7cc44d
YZ
186 mutex_unlock(&iov->dev->sriov->lock);
187
188 return rc;
189}
190
191static void virtfn_remove(struct pci_dev *dev, int id, int reset)
192{
193 char buf[VIRTFN_ID_LEN];
dd7cc44d
YZ
194 struct pci_dev *virtfn;
195 struct pci_sriov *iov = dev->sriov;
196
dc087f2f 197 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
b07579c0
WY
198 pci_iov_virtfn_bus(dev, id),
199 pci_iov_virtfn_devfn(dev, id));
dd7cc44d
YZ
200 if (!virtfn)
201 return;
202
dd7cc44d
YZ
203 if (reset) {
204 device_release_driver(&virtfn->dev);
8c1c699f 205 __pci_reset_function(virtfn);
dd7cc44d
YZ
206 }
207
208 sprintf(buf, "virtfn%u", id);
209 sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef
YL
210 /*
211 * pci_stop_dev() could have been called for this virtfn already,
212 * so the directory for the virtfn may have been removed before.
213 * Double check to avoid spurious sysfs warnings.
214 */
215 if (virtfn->dev.kobj.sd)
216 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d
YZ
217
218 mutex_lock(&iov->dev->sriov->lock);
210647af 219 pci_stop_and_remove_bus_device(virtfn);
dc087f2f 220 virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d
YZ
221 mutex_unlock(&iov->dev->sriov->lock);
222
dc087f2f
JL
223 /* balance pci_get_domain_bus_and_slot() */
224 pci_dev_put(virtfn);
dd7cc44d
YZ
225 pci_dev_put(dev);
226}
227
995df527
WY
228int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
229{
230 return 0;
231}
232
dd7cc44d
YZ
233static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
234{
235 int rc;
236 int i, j;
237 int nres;
ce288ec3 238 u16 initial;
dd7cc44d
YZ
239 struct resource *res;
240 struct pci_dev *pdev;
241 struct pci_sriov *iov = dev->sriov;
bbef98ab 242 int bars = 0;
b07579c0 243 int bus;
995df527 244 int retval;
dd7cc44d
YZ
245
246 if (!nr_virtfn)
247 return 0;
248
6b136724 249 if (iov->num_VFs)
dd7cc44d
YZ
250 return -EINVAL;
251
252 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724
BH
253 if (initial > iov->total_VFs ||
254 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d
YZ
255 return -EIO;
256
6b136724 257 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
dd7cc44d
YZ
258 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
259 return -EINVAL;
260
dd7cc44d
YZ
261 nres = 0;
262 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab 263 bars |= (1 << (i + PCI_IOV_RESOURCES));
c1fe1f96 264 res = &dev->resource[i + PCI_IOV_RESOURCES];
dd7cc44d
YZ
265 if (res->parent)
266 nres++;
267 }
268 if (nres != iov->nres) {
269 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
270 return -ENOMEM;
271 }
272
b07579c0 273 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
68f8e9fa
BH
274 if (bus > dev->bus->busn_res.end) {
275 dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
276 nr_virtfn, bus, &dev->bus->busn_res);
dd7cc44d
YZ
277 return -ENOMEM;
278 }
279
bbef98ab
RP
280 if (pci_enable_resources(dev, bars)) {
281 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
282 return -ENOMEM;
283 }
284
dd7cc44d
YZ
285 if (iov->link != dev->devfn) {
286 pdev = pci_get_slot(dev->bus, iov->link);
287 if (!pdev)
288 return -ENODEV;
289
dc087f2f
JL
290 if (!pdev->is_physfn) {
291 pci_dev_put(pdev);
652d1100 292 return -ENOSYS;
dc087f2f 293 }
dd7cc44d
YZ
294
295 rc = sysfs_create_link(&dev->dev.kobj,
296 &pdev->dev.kobj, "dep_link");
dc087f2f 297 pci_dev_put(pdev);
dd7cc44d
YZ
298 if (rc)
299 return rc;
300 }
301
f59dca27 302 pci_iov_set_numvfs(dev, nr_virtfn);
dd7cc44d 303 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
fb51ccbf 304 pci_cfg_access_lock(dev);
dd7cc44d
YZ
305 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
306 msleep(100);
fb51ccbf 307 pci_cfg_access_unlock(dev);
dd7cc44d 308
6b136724 309 iov->initial_VFs = initial;
dd7cc44d
YZ
310 if (nr_virtfn < initial)
311 initial = nr_virtfn;
312
995df527
WY
313 if ((retval = pcibios_sriov_enable(dev, initial))) {
314 dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n",
315 retval);
316 return retval;
317 }
318
dd7cc44d
YZ
319 for (i = 0; i < initial; i++) {
320 rc = virtfn_add(dev, i, 0);
321 if (rc)
322 goto failed;
323 }
324
325 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724 326 iov->num_VFs = nr_virtfn;
dd7cc44d
YZ
327
328 return 0;
329
330failed:
331 for (j = 0; j < i; j++)
332 virtfn_remove(dev, j, 0);
333
334 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 335 pci_cfg_access_lock(dev);
dd7cc44d 336 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
f59dca27 337 pci_iov_set_numvfs(dev, 0);
dd7cc44d 338 ssleep(1);
fb51ccbf 339 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
340
341 if (iov->link != dev->devfn)
342 sysfs_remove_link(&dev->dev.kobj, "dep_link");
343
344 return rc;
345}
346
995df527
WY
347int __weak pcibios_sriov_disable(struct pci_dev *pdev)
348{
349 return 0;
350}
351
dd7cc44d
YZ
352static void sriov_disable(struct pci_dev *dev)
353{
354 int i;
355 struct pci_sriov *iov = dev->sriov;
356
6b136724 357 if (!iov->num_VFs)
dd7cc44d
YZ
358 return;
359
6b136724 360 for (i = 0; i < iov->num_VFs; i++)
dd7cc44d
YZ
361 virtfn_remove(dev, i, 0);
362
995df527
WY
363 pcibios_sriov_disable(dev);
364
dd7cc44d 365 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 366 pci_cfg_access_lock(dev);
dd7cc44d
YZ
367 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
368 ssleep(1);
fb51ccbf 369 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
370
371 if (iov->link != dev->devfn)
372 sysfs_remove_link(&dev->dev.kobj, "dep_link");
373
6b136724 374 iov->num_VFs = 0;
f59dca27 375 pci_iov_set_numvfs(dev, 0);
dd7cc44d
YZ
376}
377
d1b054da
YZ
378static int sriov_init(struct pci_dev *dev, int pos)
379{
0e6c9122 380 int i, bar64;
d1b054da
YZ
381 int rc;
382 int nres;
383 u32 pgsz;
ea9a8854 384 u16 ctrl, total;
d1b054da
YZ
385 struct pci_sriov *iov;
386 struct resource *res;
387 struct pci_dev *pdev;
388
62f87c0e
YW
389 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
390 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
d1b054da
YZ
391 return -ENODEV;
392
393 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
394 if (ctrl & PCI_SRIOV_CTRL_VFE) {
395 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
396 ssleep(1);
397 }
398
d1b054da
YZ
399 ctrl = 0;
400 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
401 if (pdev->is_physfn)
402 goto found;
403
404 pdev = NULL;
405 if (pci_ari_enabled(dev->bus))
406 ctrl |= PCI_SRIOV_CTRL_ARI;
407
408found:
409 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
d1b054da 410
ff45f9dd
BS
411 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
412 if (!total)
413 return 0;
414
d1b054da
YZ
415 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
416 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
417 pgsz &= ~((1 << i) - 1);
418 if (!pgsz)
419 return -EIO;
420
421 pgsz &= ~(pgsz - 1);
8161fe91 422 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da 423
0e6c9122
WY
424 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
425 if (!iov)
426 return -ENOMEM;
427
d1b054da
YZ
428 nres = 0;
429 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 430 res = &dev->resource[i + PCI_IOV_RESOURCES];
0e6c9122
WY
431 bar64 = __pci_read_base(dev, pci_bar_unknown, res,
432 pos + PCI_SRIOV_BAR + i * 4);
d1b054da
YZ
433 if (!res->flags)
434 continue;
435 if (resource_size(res) & (PAGE_SIZE - 1)) {
436 rc = -EIO;
437 goto failed;
438 }
0e6c9122 439 iov->barsz[i] = resource_size(res);
d1b054da 440 res->end = res->start + resource_size(res) * total - 1;
e88ae01d
WY
441 dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
442 i, res, i, total);
0e6c9122 443 i += bar64;
d1b054da
YZ
444 nres++;
445 }
446
d1b054da
YZ
447 iov->pos = pos;
448 iov->nres = nres;
449 iov->ctrl = ctrl;
6b136724 450 iov->total_VFs = total;
d1b054da
YZ
451 iov->pgsz = pgsz;
452 iov->self = dev;
453 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
454 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e 455 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe 456 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da
YZ
457
458 if (pdev)
459 iov->dev = pci_dev_get(pdev);
e277d2fc 460 else
d1b054da 461 iov->dev = dev;
e277d2fc
YZ
462
463 mutex_init(&iov->lock);
d1b054da
YZ
464
465 dev->sriov = iov;
466 dev->is_physfn = 1;
ea9a8854
AD
467 rc = compute_max_vf_buses(dev);
468 if (rc)
469 goto fail_max_buses;
d1b054da
YZ
470
471 return 0;
472
ea9a8854
AD
473fail_max_buses:
474 dev->sriov = NULL;
475 dev->is_physfn = 0;
d1b054da
YZ
476failed:
477 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 478 res = &dev->resource[i + PCI_IOV_RESOURCES];
d1b054da
YZ
479 res->flags = 0;
480 }
481
0e6c9122 482 kfree(iov);
d1b054da
YZ
483 return rc;
484}
485
486static void sriov_release(struct pci_dev *dev)
487{
6b136724 488 BUG_ON(dev->sriov->num_VFs);
dd7cc44d 489
e277d2fc 490 if (dev != dev->sriov->dev)
d1b054da
YZ
491 pci_dev_put(dev->sriov->dev);
492
e277d2fc
YZ
493 mutex_destroy(&dev->sriov->lock);
494
d1b054da
YZ
495 kfree(dev->sriov);
496 dev->sriov = NULL;
497}
498
8c5cdb6a
YZ
499static void sriov_restore_state(struct pci_dev *dev)
500{
501 int i;
502 u16 ctrl;
503 struct pci_sriov *iov = dev->sriov;
504
505 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
506 if (ctrl & PCI_SRIOV_CTRL_VFE)
507 return;
508
509 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
510 pci_update_resource(dev, i);
511
512 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
f59dca27 513 pci_iov_set_numvfs(dev, iov->num_VFs);
8c5cdb6a
YZ
514 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
515 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
516 msleep(100);
517}
518
d1b054da
YZ
519/**
520 * pci_iov_init - initialize the IOV capability
521 * @dev: the PCI device
522 *
523 * Returns 0 on success, or negative on failure.
524 */
525int pci_iov_init(struct pci_dev *dev)
526{
527 int pos;
528
5f4d91a1 529 if (!pci_is_pcie(dev))
d1b054da
YZ
530 return -ENODEV;
531
532 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
533 if (pos)
534 return sriov_init(dev, pos);
535
536 return -ENODEV;
537}
538
539/**
540 * pci_iov_release - release resources used by the IOV capability
541 * @dev: the PCI device
542 */
543void pci_iov_release(struct pci_dev *dev)
544{
545 if (dev->is_physfn)
546 sriov_release(dev);
547}
548
549/**
550 * pci_iov_resource_bar - get position of the SR-IOV BAR
551 * @dev: the PCI device
552 * @resno: the resource number
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553 *
554 * Returns position of the BAR encapsulated in the SR-IOV capability.
555 */
26ff46c6 556int pci_iov_resource_bar(struct pci_dev *dev, int resno)
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557{
558 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
559 return 0;
560
561 BUG_ON(!dev->is_physfn);
562
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563 return dev->sriov->pos + PCI_SRIOV_BAR +
564 4 * (resno - PCI_IOV_RESOURCES);
565}
8c5cdb6a 566
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567resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
568 int resno)
569{
570 return pci_iov_resource_size(dev, resno);
571}
572
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573/**
574 * pci_sriov_resource_alignment - get resource alignment for VF BAR
575 * @dev: the PCI device
576 * @resno: the resource number
577 *
578 * Returns the alignment of the VF BAR found in the SR-IOV capability.
579 * This is not the same as the resource size which is defined as
580 * the VF BAR size multiplied by the number of VFs. The alignment
581 * is just the VF BAR size.
582 */
0e52247a 583resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6faf17f6 584{
978d2d68 585 return pcibios_iov_resource_alignment(dev, resno);
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586}
587
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588/**
589 * pci_restore_iov_state - restore the state of the IOV capability
590 * @dev: the PCI device
591 */
592void pci_restore_iov_state(struct pci_dev *dev)
593{
594 if (dev->is_physfn)
595 sriov_restore_state(dev);
596}
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597
598/**
599 * pci_iov_bus_range - find bus range used by Virtual Function
600 * @bus: the PCI bus
601 *
602 * Returns max number of buses (exclude current one) used by Virtual
603 * Functions.
604 */
605int pci_iov_bus_range(struct pci_bus *bus)
606{
607 int max = 0;
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608 struct pci_dev *dev;
609
610 list_for_each_entry(dev, &bus->devices, bus_list) {
611 if (!dev->is_physfn)
612 continue;
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613 if (dev->sriov->max_VF_buses > max)
614 max = dev->sriov->max_VF_buses;
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615 }
616
617 return max ? max - bus->number : 0;
618}
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619
620/**
621 * pci_enable_sriov - enable the SR-IOV capability
622 * @dev: the PCI device
52a8873b 623 * @nr_virtfn: number of virtual functions to enable
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624 *
625 * Returns 0 on success, or negative on failure.
626 */
627int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
628{
629 might_sleep();
630
631 if (!dev->is_physfn)
652d1100 632 return -ENOSYS;
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633
634 return sriov_enable(dev, nr_virtfn);
635}
636EXPORT_SYMBOL_GPL(pci_enable_sriov);
637
638/**
639 * pci_disable_sriov - disable the SR-IOV capability
640 * @dev: the PCI device
641 */
642void pci_disable_sriov(struct pci_dev *dev)
643{
644 might_sleep();
645
646 if (!dev->is_physfn)
647 return;
648
649 sriov_disable(dev);
650}
651EXPORT_SYMBOL_GPL(pci_disable_sriov);
74bb1bcc 652
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653/**
654 * pci_num_vf - return number of VFs associated with a PF device_release_driver
655 * @dev: the PCI device
656 *
657 * Returns number of VFs, or 0 if SR-IOV is not enabled.
658 */
659int pci_num_vf(struct pci_dev *dev)
660{
1452cd76 661 if (!dev->is_physfn)
fb8a0d9d 662 return 0;
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663
664 return dev->sriov->num_VFs;
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665}
666EXPORT_SYMBOL_GPL(pci_num_vf);
bff73156 667
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668/**
669 * pci_vfs_assigned - returns number of VFs are assigned to a guest
670 * @dev: the PCI device
671 *
672 * Returns number of VFs belonging to this device that are assigned to a guest.
652d1100 673 * If device is not a physical function returns 0.
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674 */
675int pci_vfs_assigned(struct pci_dev *dev)
676{
677 struct pci_dev *vfdev;
678 unsigned int vfs_assigned = 0;
679 unsigned short dev_id;
680
681 /* only search if we are a PF */
682 if (!dev->is_physfn)
683 return 0;
684
685 /*
686 * determine the device ID for the VFs, the vendor ID will be the
687 * same as the PF so there is no need to check for that one
688 */
689 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
690
691 /* loop through all the VFs to see if we own any that are assigned */
692 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
693 while (vfdev) {
694 /*
695 * It is considered assigned if it is a virtual function with
696 * our dev as the physical function and the assigned bit is set
697 */
698 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
be63497c 699 pci_is_dev_assigned(vfdev))
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700 vfs_assigned++;
701
702 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
703 }
704
705 return vfs_assigned;
706}
707EXPORT_SYMBOL_GPL(pci_vfs_assigned);
708
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709/**
710 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
711 * @dev: the PCI PF device
2094f167 712 * @numvfs: number that should be used for TotalVFs supported
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713 *
714 * Should be called from PF driver's probe routine with
715 * device's mutex held.
716 *
717 * Returns 0 if PF is an SRIOV-capable device and
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718 * value of numvfs valid. If not a PF return -ENOSYS;
719 * if numvfs is invalid return -EINVAL;
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720 * if VFs already enabled, return -EBUSY.
721 */
722int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
723{
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724 if (!dev->is_physfn)
725 return -ENOSYS;
726 if (numvfs > dev->sriov->total_VFs)
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727 return -EINVAL;
728
729 /* Shouldn't change if VFs already enabled */
730 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
731 return -EBUSY;
732 else
6b136724 733 dev->sriov->driver_max_VFs = numvfs;
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734
735 return 0;
736}
737EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
738
739/**
ddc191f5 740 * pci_sriov_get_totalvfs -- get total VFs supported on this device
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741 * @dev: the PCI PF device
742 *
743 * For a PCIe device with SRIOV support, return the PCIe
6b136724 744 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100 745 * if the driver reduced it. Otherwise 0.
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746 */
747int pci_sriov_get_totalvfs(struct pci_dev *dev)
748{
1452cd76 749 if (!dev->is_physfn)
652d1100 750 return 0;
bff73156 751
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752 if (dev->sriov->driver_max_VFs)
753 return dev->sriov->driver_max_VFs;
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754
755 return dev->sriov->total_VFs;
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756}
757EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);