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Commit | Line | Data |
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d1b054da YZ |
1 | /* |
2 | * drivers/pci/iov.c | |
3 | * | |
4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
5 | * | |
6 | * PCI Express I/O Virtualization (IOV) support. | |
7 | * Single Root IOV 1.0 | |
302b4215 | 8 | * Address Translation Service 1.0 |
d1b054da YZ |
9 | */ |
10 | ||
11 | #include <linux/pci.h> | |
5a0e3ad6 | 12 | #include <linux/slab.h> |
d1b054da | 13 | #include <linux/mutex.h> |
363c75db | 14 | #include <linux/export.h> |
d1b054da YZ |
15 | #include <linux/string.h> |
16 | #include <linux/delay.h> | |
5cdede24 | 17 | #include <linux/pci-ats.h> |
d1b054da YZ |
18 | #include "pci.h" |
19 | ||
dd7cc44d | 20 | #define VIRTFN_ID_LEN 16 |
d1b054da | 21 | |
b07579c0 | 22 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 23 | { |
b07579c0 WY |
24 | if (!dev->is_physfn) |
25 | return -EINVAL; | |
a28724b0 | 26 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 27 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
28 | } |
29 | ||
b07579c0 | 30 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 31 | { |
b07579c0 WY |
32 | if (!dev->is_physfn) |
33 | return -EINVAL; | |
a28724b0 | 34 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 35 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
36 | } |
37 | ||
f59dca27 WY |
38 | /* |
39 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
40 | * change when NumVFs changes. | |
41 | * | |
42 | * Update iov->offset and iov->stride when NumVFs is written. | |
43 | */ | |
44 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
45 | { | |
46 | struct pci_sriov *iov = dev->sriov; | |
47 | ||
48 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
49 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
50 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
51 | } | |
52 | ||
4449f079 WY |
53 | /* |
54 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
55 | * determine how many additional bus numbers will be consumed by VFs. | |
56 | * | |
ea9a8854 AD |
57 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
58 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 59 | */ |
ea9a8854 | 60 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
61 | { |
62 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 63 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 64 | |
ea9a8854 | 65 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 66 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
67 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
68 | rc = -EIO; | |
69 | goto out; | |
70 | } | |
71 | ||
b07579c0 | 72 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
73 | if (busnr > iov->max_VF_buses) |
74 | iov->max_VF_buses = busnr; | |
4449f079 WY |
75 | } |
76 | ||
ea9a8854 AD |
77 | out: |
78 | pci_iov_set_numvfs(dev, 0); | |
79 | return rc; | |
4449f079 WY |
80 | } |
81 | ||
dd7cc44d YZ |
82 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
83 | { | |
dd7cc44d YZ |
84 | struct pci_bus *child; |
85 | ||
86 | if (bus->number == busnr) | |
87 | return bus; | |
88 | ||
89 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
90 | if (child) | |
91 | return child; | |
92 | ||
93 | child = pci_add_new_bus(bus, NULL, busnr); | |
94 | if (!child) | |
95 | return NULL; | |
96 | ||
b7eac055 | 97 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
98 | |
99 | return child; | |
100 | } | |
101 | ||
dc087f2f | 102 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 103 | { |
dc087f2f JL |
104 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
105 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
106 | } |
107 | ||
0e6c9122 WY |
108 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
109 | { | |
110 | if (!dev->is_physfn) | |
111 | return 0; | |
112 | ||
113 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
114 | } | |
115 | ||
dd7cc44d YZ |
116 | static int virtfn_add(struct pci_dev *dev, int id, int reset) |
117 | { | |
118 | int i; | |
dc087f2f | 119 | int rc = -ENOMEM; |
dd7cc44d YZ |
120 | u64 size; |
121 | char buf[VIRTFN_ID_LEN]; | |
122 | struct pci_dev *virtfn; | |
123 | struct resource *res; | |
124 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 125 | struct pci_bus *bus; |
dd7cc44d | 126 | |
dd7cc44d | 127 | mutex_lock(&iov->dev->sriov->lock); |
b07579c0 | 128 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
129 | if (!bus) |
130 | goto failed; | |
131 | ||
132 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 133 | if (!virtfn) |
dc087f2f | 134 | goto failed0; |
dd7cc44d | 135 | |
b07579c0 | 136 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d YZ |
137 | virtfn->vendor = dev->vendor; |
138 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); | |
139 | pci_setup_device(virtfn); | |
140 | virtfn->dev.parent = dev->dev.parent; | |
fbf33f51 XH |
141 | virtfn->physfn = pci_dev_get(dev); |
142 | virtfn->is_virtfn = 1; | |
aa931977 | 143 | virtfn->multifunction = 0; |
dd7cc44d YZ |
144 | |
145 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 146 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
147 | if (!res->parent) |
148 | continue; | |
149 | virtfn->resource[i].name = pci_name(virtfn); | |
150 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 151 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
152 | virtfn->resource[i].start = res->start + size * id; |
153 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
154 | rc = request_resource(res, &virtfn->resource[i]); | |
155 | BUG_ON(rc); | |
156 | } | |
157 | ||
158 | if (reset) | |
8c1c699f | 159 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
160 | |
161 | pci_device_add(virtfn, virtfn->bus); | |
162 | mutex_unlock(&iov->dev->sriov->lock); | |
163 | ||
c893d133 | 164 | pci_bus_add_device(virtfn); |
dd7cc44d YZ |
165 | sprintf(buf, "virtfn%u", id); |
166 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
167 | if (rc) | |
168 | goto failed1; | |
169 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); | |
170 | if (rc) | |
171 | goto failed2; | |
172 | ||
173 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
174 | ||
175 | return 0; | |
176 | ||
177 | failed2: | |
178 | sysfs_remove_link(&dev->dev.kobj, buf); | |
179 | failed1: | |
180 | pci_dev_put(dev); | |
181 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 182 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f JL |
183 | failed0: |
184 | virtfn_remove_bus(dev->bus, bus); | |
185 | failed: | |
dd7cc44d YZ |
186 | mutex_unlock(&iov->dev->sriov->lock); |
187 | ||
188 | return rc; | |
189 | } | |
190 | ||
191 | static void virtfn_remove(struct pci_dev *dev, int id, int reset) | |
192 | { | |
193 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d YZ |
194 | struct pci_dev *virtfn; |
195 | struct pci_sriov *iov = dev->sriov; | |
196 | ||
dc087f2f | 197 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
198 | pci_iov_virtfn_bus(dev, id), |
199 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
200 | if (!virtfn) |
201 | return; | |
202 | ||
dd7cc44d YZ |
203 | if (reset) { |
204 | device_release_driver(&virtfn->dev); | |
8c1c699f | 205 | __pci_reset_function(virtfn); |
dd7cc44d YZ |
206 | } |
207 | ||
208 | sprintf(buf, "virtfn%u", id); | |
209 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
210 | /* |
211 | * pci_stop_dev() could have been called for this virtfn already, | |
212 | * so the directory for the virtfn may have been removed before. | |
213 | * Double check to avoid spurious sysfs warnings. | |
214 | */ | |
215 | if (virtfn->dev.kobj.sd) | |
216 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d YZ |
217 | |
218 | mutex_lock(&iov->dev->sriov->lock); | |
210647af | 219 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 220 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d YZ |
221 | mutex_unlock(&iov->dev->sriov->lock); |
222 | ||
dc087f2f JL |
223 | /* balance pci_get_domain_bus_and_slot() */ |
224 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
225 | pci_dev_put(dev); |
226 | } | |
227 | ||
995df527 WY |
228 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
229 | { | |
230 | return 0; | |
231 | } | |
232 | ||
dd7cc44d YZ |
233 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
234 | { | |
235 | int rc; | |
236 | int i, j; | |
237 | int nres; | |
238 | u16 offset, stride, initial; | |
239 | struct resource *res; | |
240 | struct pci_dev *pdev; | |
241 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 242 | int bars = 0; |
b07579c0 | 243 | int bus; |
995df527 | 244 | int retval; |
dd7cc44d YZ |
245 | |
246 | if (!nr_virtfn) | |
247 | return 0; | |
248 | ||
6b136724 | 249 | if (iov->num_VFs) |
dd7cc44d YZ |
250 | return -EINVAL; |
251 | ||
252 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
253 | if (initial > iov->total_VFs || |
254 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
255 | return -EIO; |
256 | ||
6b136724 | 257 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
258 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
259 | return -EINVAL; | |
260 | ||
dd7cc44d YZ |
261 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset); |
262 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride); | |
263 | if (!offset || (nr_virtfn > 1 && !stride)) | |
264 | return -EIO; | |
265 | ||
266 | nres = 0; | |
267 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 268 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 269 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
270 | if (res->parent) |
271 | nres++; | |
272 | } | |
273 | if (nres != iov->nres) { | |
274 | dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); | |
275 | return -ENOMEM; | |
276 | } | |
277 | ||
278 | iov->offset = offset; | |
279 | iov->stride = stride; | |
280 | ||
b07579c0 | 281 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa BH |
282 | if (bus > dev->bus->busn_res.end) { |
283 | dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", | |
284 | nr_virtfn, bus, &dev->bus->busn_res); | |
dd7cc44d YZ |
285 | return -ENOMEM; |
286 | } | |
287 | ||
bbef98ab RP |
288 | if (pci_enable_resources(dev, bars)) { |
289 | dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); | |
290 | return -ENOMEM; | |
291 | } | |
292 | ||
dd7cc44d YZ |
293 | if (iov->link != dev->devfn) { |
294 | pdev = pci_get_slot(dev->bus, iov->link); | |
295 | if (!pdev) | |
296 | return -ENODEV; | |
297 | ||
dc087f2f JL |
298 | if (!pdev->is_physfn) { |
299 | pci_dev_put(pdev); | |
652d1100 | 300 | return -ENOSYS; |
dc087f2f | 301 | } |
dd7cc44d YZ |
302 | |
303 | rc = sysfs_create_link(&dev->dev.kobj, | |
304 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 305 | pci_dev_put(pdev); |
dd7cc44d YZ |
306 | if (rc) |
307 | return rc; | |
308 | } | |
309 | ||
f59dca27 | 310 | pci_iov_set_numvfs(dev, nr_virtfn); |
dd7cc44d | 311 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; |
fb51ccbf | 312 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
313 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
314 | msleep(100); | |
fb51ccbf | 315 | pci_cfg_access_unlock(dev); |
dd7cc44d | 316 | |
6b136724 | 317 | iov->initial_VFs = initial; |
dd7cc44d YZ |
318 | if (nr_virtfn < initial) |
319 | initial = nr_virtfn; | |
320 | ||
995df527 WY |
321 | if ((retval = pcibios_sriov_enable(dev, initial))) { |
322 | dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", | |
323 | retval); | |
324 | return retval; | |
325 | } | |
326 | ||
dd7cc44d YZ |
327 | for (i = 0; i < initial; i++) { |
328 | rc = virtfn_add(dev, i, 0); | |
329 | if (rc) | |
330 | goto failed; | |
331 | } | |
332 | ||
333 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 334 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
335 | |
336 | return 0; | |
337 | ||
338 | failed: | |
339 | for (j = 0; j < i; j++) | |
340 | virtfn_remove(dev, j, 0); | |
341 | ||
342 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 343 | pci_cfg_access_lock(dev); |
dd7cc44d | 344 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
f59dca27 | 345 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d | 346 | ssleep(1); |
fb51ccbf | 347 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
348 | |
349 | if (iov->link != dev->devfn) | |
350 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
351 | ||
352 | return rc; | |
353 | } | |
354 | ||
995df527 WY |
355 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) |
356 | { | |
357 | return 0; | |
358 | } | |
359 | ||
dd7cc44d YZ |
360 | static void sriov_disable(struct pci_dev *dev) |
361 | { | |
362 | int i; | |
363 | struct pci_sriov *iov = dev->sriov; | |
364 | ||
6b136724 | 365 | if (!iov->num_VFs) |
dd7cc44d YZ |
366 | return; |
367 | ||
6b136724 | 368 | for (i = 0; i < iov->num_VFs; i++) |
dd7cc44d YZ |
369 | virtfn_remove(dev, i, 0); |
370 | ||
995df527 WY |
371 | pcibios_sriov_disable(dev); |
372 | ||
dd7cc44d | 373 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 374 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
375 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
376 | ssleep(1); | |
fb51ccbf | 377 | pci_cfg_access_unlock(dev); |
dd7cc44d YZ |
378 | |
379 | if (iov->link != dev->devfn) | |
380 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
381 | ||
6b136724 | 382 | iov->num_VFs = 0; |
f59dca27 | 383 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
384 | } |
385 | ||
d1b054da YZ |
386 | static int sriov_init(struct pci_dev *dev, int pos) |
387 | { | |
0e6c9122 | 388 | int i, bar64; |
d1b054da YZ |
389 | int rc; |
390 | int nres; | |
391 | u32 pgsz; | |
ea9a8854 | 392 | u16 ctrl, total; |
d1b054da YZ |
393 | struct pci_sriov *iov; |
394 | struct resource *res; | |
395 | struct pci_dev *pdev; | |
396 | ||
62f87c0e YW |
397 | if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END && |
398 | pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT) | |
d1b054da YZ |
399 | return -ENODEV; |
400 | ||
401 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); | |
402 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
403 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
404 | ssleep(1); | |
405 | } | |
406 | ||
d1b054da YZ |
407 | ctrl = 0; |
408 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
409 | if (pdev->is_physfn) | |
410 | goto found; | |
411 | ||
412 | pdev = NULL; | |
413 | if (pci_ari_enabled(dev->bus)) | |
414 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
415 | ||
416 | found: | |
417 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 418 | |
ff45f9dd BS |
419 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
420 | if (!total) | |
421 | return 0; | |
422 | ||
d1b054da YZ |
423 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); |
424 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
425 | pgsz &= ~((1 << i) - 1); | |
426 | if (!pgsz) | |
427 | return -EIO; | |
428 | ||
429 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 430 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 431 | |
0e6c9122 WY |
432 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
433 | if (!iov) | |
434 | return -ENOMEM; | |
435 | ||
d1b054da YZ |
436 | nres = 0; |
437 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 438 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
0e6c9122 WY |
439 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, |
440 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
441 | if (!res->flags) |
442 | continue; | |
443 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
444 | rc = -EIO; | |
445 | goto failed; | |
446 | } | |
0e6c9122 | 447 | iov->barsz[i] = resource_size(res); |
d1b054da | 448 | res->end = res->start + resource_size(res) * total - 1; |
e88ae01d WY |
449 | dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
450 | i, res, i, total); | |
0e6c9122 | 451 | i += bar64; |
d1b054da YZ |
452 | nres++; |
453 | } | |
454 | ||
d1b054da YZ |
455 | iov->pos = pos; |
456 | iov->nres = nres; | |
457 | iov->ctrl = ctrl; | |
6b136724 | 458 | iov->total_VFs = total; |
d1b054da YZ |
459 | iov->pgsz = pgsz; |
460 | iov->self = dev; | |
461 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); | |
462 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 463 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 464 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
465 | |
466 | if (pdev) | |
467 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 468 | else |
d1b054da | 469 | iov->dev = dev; |
e277d2fc YZ |
470 | |
471 | mutex_init(&iov->lock); | |
d1b054da YZ |
472 | |
473 | dev->sriov = iov; | |
474 | dev->is_physfn = 1; | |
ea9a8854 AD |
475 | rc = compute_max_vf_buses(dev); |
476 | if (rc) | |
477 | goto fail_max_buses; | |
d1b054da YZ |
478 | |
479 | return 0; | |
480 | ||
ea9a8854 AD |
481 | fail_max_buses: |
482 | dev->sriov = NULL; | |
483 | dev->is_physfn = 0; | |
d1b054da YZ |
484 | failed: |
485 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 486 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
487 | res->flags = 0; |
488 | } | |
489 | ||
0e6c9122 | 490 | kfree(iov); |
d1b054da YZ |
491 | return rc; |
492 | } | |
493 | ||
494 | static void sriov_release(struct pci_dev *dev) | |
495 | { | |
6b136724 | 496 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 497 | |
e277d2fc | 498 | if (dev != dev->sriov->dev) |
d1b054da YZ |
499 | pci_dev_put(dev->sriov->dev); |
500 | ||
e277d2fc YZ |
501 | mutex_destroy(&dev->sriov->lock); |
502 | ||
d1b054da YZ |
503 | kfree(dev->sriov); |
504 | dev->sriov = NULL; | |
505 | } | |
506 | ||
8c5cdb6a YZ |
507 | static void sriov_restore_state(struct pci_dev *dev) |
508 | { | |
509 | int i; | |
510 | u16 ctrl; | |
511 | struct pci_sriov *iov = dev->sriov; | |
512 | ||
513 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
514 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
515 | return; | |
516 | ||
517 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) | |
518 | pci_update_resource(dev, i); | |
519 | ||
520 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 521 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
522 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
523 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
524 | msleep(100); | |
525 | } | |
526 | ||
d1b054da YZ |
527 | /** |
528 | * pci_iov_init - initialize the IOV capability | |
529 | * @dev: the PCI device | |
530 | * | |
531 | * Returns 0 on success, or negative on failure. | |
532 | */ | |
533 | int pci_iov_init(struct pci_dev *dev) | |
534 | { | |
535 | int pos; | |
536 | ||
5f4d91a1 | 537 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
538 | return -ENODEV; |
539 | ||
540 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
541 | if (pos) | |
542 | return sriov_init(dev, pos); | |
543 | ||
544 | return -ENODEV; | |
545 | } | |
546 | ||
547 | /** | |
548 | * pci_iov_release - release resources used by the IOV capability | |
549 | * @dev: the PCI device | |
550 | */ | |
551 | void pci_iov_release(struct pci_dev *dev) | |
552 | { | |
553 | if (dev->is_physfn) | |
554 | sriov_release(dev); | |
555 | } | |
556 | ||
557 | /** | |
558 | * pci_iov_resource_bar - get position of the SR-IOV BAR | |
559 | * @dev: the PCI device | |
560 | * @resno: the resource number | |
d1b054da YZ |
561 | * |
562 | * Returns position of the BAR encapsulated in the SR-IOV capability. | |
563 | */ | |
26ff46c6 | 564 | int pci_iov_resource_bar(struct pci_dev *dev, int resno) |
d1b054da YZ |
565 | { |
566 | if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END) | |
567 | return 0; | |
568 | ||
569 | BUG_ON(!dev->is_physfn); | |
570 | ||
d1b054da YZ |
571 | return dev->sriov->pos + PCI_SRIOV_BAR + |
572 | 4 * (resno - PCI_IOV_RESOURCES); | |
573 | } | |
8c5cdb6a | 574 | |
978d2d68 WY |
575 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
576 | int resno) | |
577 | { | |
578 | return pci_iov_resource_size(dev, resno); | |
579 | } | |
580 | ||
6faf17f6 CW |
581 | /** |
582 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
583 | * @dev: the PCI device | |
584 | * @resno: the resource number | |
585 | * | |
586 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
587 | * This is not the same as the resource size which is defined as | |
588 | * the VF BAR size multiplied by the number of VFs. The alignment | |
589 | * is just the VF BAR size. | |
590 | */ | |
0e52247a | 591 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 592 | { |
978d2d68 | 593 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
594 | } |
595 | ||
8c5cdb6a YZ |
596 | /** |
597 | * pci_restore_iov_state - restore the state of the IOV capability | |
598 | * @dev: the PCI device | |
599 | */ | |
600 | void pci_restore_iov_state(struct pci_dev *dev) | |
601 | { | |
602 | if (dev->is_physfn) | |
603 | sriov_restore_state(dev); | |
604 | } | |
a28724b0 YZ |
605 | |
606 | /** | |
607 | * pci_iov_bus_range - find bus range used by Virtual Function | |
608 | * @bus: the PCI bus | |
609 | * | |
610 | * Returns max number of buses (exclude current one) used by Virtual | |
611 | * Functions. | |
612 | */ | |
613 | int pci_iov_bus_range(struct pci_bus *bus) | |
614 | { | |
615 | int max = 0; | |
a28724b0 YZ |
616 | struct pci_dev *dev; |
617 | ||
618 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
619 | if (!dev->is_physfn) | |
620 | continue; | |
4449f079 WY |
621 | if (dev->sriov->max_VF_buses > max) |
622 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
623 | } |
624 | ||
625 | return max ? max - bus->number : 0; | |
626 | } | |
dd7cc44d YZ |
627 | |
628 | /** | |
629 | * pci_enable_sriov - enable the SR-IOV capability | |
630 | * @dev: the PCI device | |
52a8873b | 631 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
632 | * |
633 | * Returns 0 on success, or negative on failure. | |
634 | */ | |
635 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
636 | { | |
637 | might_sleep(); | |
638 | ||
639 | if (!dev->is_physfn) | |
652d1100 | 640 | return -ENOSYS; |
dd7cc44d YZ |
641 | |
642 | return sriov_enable(dev, nr_virtfn); | |
643 | } | |
644 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
645 | ||
646 | /** | |
647 | * pci_disable_sriov - disable the SR-IOV capability | |
648 | * @dev: the PCI device | |
649 | */ | |
650 | void pci_disable_sriov(struct pci_dev *dev) | |
651 | { | |
652 | might_sleep(); | |
653 | ||
654 | if (!dev->is_physfn) | |
655 | return; | |
656 | ||
657 | sriov_disable(dev); | |
658 | } | |
659 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 660 | |
fb8a0d9d WM |
661 | /** |
662 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
663 | * @dev: the PCI device | |
664 | * | |
665 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
666 | */ | |
667 | int pci_num_vf(struct pci_dev *dev) | |
668 | { | |
1452cd76 | 669 | if (!dev->is_physfn) |
fb8a0d9d | 670 | return 0; |
1452cd76 BH |
671 | |
672 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
673 | } |
674 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 675 | |
5a8eb242 AD |
676 | /** |
677 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
678 | * @dev: the PCI device | |
679 | * | |
680 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 681 | * If device is not a physical function returns 0. |
5a8eb242 AD |
682 | */ |
683 | int pci_vfs_assigned(struct pci_dev *dev) | |
684 | { | |
685 | struct pci_dev *vfdev; | |
686 | unsigned int vfs_assigned = 0; | |
687 | unsigned short dev_id; | |
688 | ||
689 | /* only search if we are a PF */ | |
690 | if (!dev->is_physfn) | |
691 | return 0; | |
692 | ||
693 | /* | |
694 | * determine the device ID for the VFs, the vendor ID will be the | |
695 | * same as the PF so there is no need to check for that one | |
696 | */ | |
697 | pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id); | |
698 | ||
699 | /* loop through all the VFs to see if we own any that are assigned */ | |
700 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
701 | while (vfdev) { | |
702 | /* | |
703 | * It is considered assigned if it is a virtual function with | |
704 | * our dev as the physical function and the assigned bit is set | |
705 | */ | |
706 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 707 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
708 | vfs_assigned++; |
709 | ||
710 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
711 | } | |
712 | ||
713 | return vfs_assigned; | |
714 | } | |
715 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
716 | ||
bff73156 DD |
717 | /** |
718 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
719 | * @dev: the PCI PF device | |
2094f167 | 720 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
721 | * |
722 | * Should be called from PF driver's probe routine with | |
723 | * device's mutex held. | |
724 | * | |
725 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
726 | * value of numvfs valid. If not a PF return -ENOSYS; |
727 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
728 | * if VFs already enabled, return -EBUSY. |
729 | */ | |
730 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
731 | { | |
652d1100 SA |
732 | if (!dev->is_physfn) |
733 | return -ENOSYS; | |
734 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
735 | return -EINVAL; |
736 | ||
737 | /* Shouldn't change if VFs already enabled */ | |
738 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
739 | return -EBUSY; | |
740 | else | |
6b136724 | 741 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
742 | |
743 | return 0; | |
744 | } | |
745 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
746 | ||
747 | /** | |
ddc191f5 | 748 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
749 | * @dev: the PCI PF device |
750 | * | |
751 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 752 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 753 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
754 | */ |
755 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
756 | { | |
1452cd76 | 757 | if (!dev->is_physfn) |
652d1100 | 758 | return 0; |
bff73156 | 759 | |
6b136724 BH |
760 | if (dev->sriov->driver_max_VFs) |
761 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
762 | |
763 | return dev->sriov->total_VFs; | |
bff73156 DD |
764 | } |
765 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |