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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * File: pci-acpi.c | |
a406d9e6 | 3 | * Purpose: Provide PCI support in ACPI |
1da177e4 | 4 | * |
84df749f DSL |
5 | * Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com> |
6 | * Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com> | |
7 | * Copyright (C) 2004 Intel Corp. | |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/module.h> | |
5fde244d | 14 | #include <linux/pci-aspm.h> |
1da177e4 | 15 | #include <acpi/acpi.h> |
1da177e4 LT |
16 | #include <acpi/acpi_bus.h> |
17 | ||
18 | #include <linux/pci-acpi.h> | |
b67ea761 | 19 | #include <linux/pm_runtime.h> |
8b713a88 | 20 | #include <linux/pm_qos.h> |
0f64474b | 21 | #include "pci.h" |
1da177e4 | 22 | |
b67ea761 RW |
23 | /** |
24 | * pci_acpi_wake_bus - Wake-up notification handler for root buses. | |
25 | * @handle: ACPI handle of a device the notification is for. | |
26 | * @event: Type of the signaled event. | |
27 | * @context: PCI root bus to wake up devices on. | |
28 | */ | |
29 | static void pci_acpi_wake_bus(acpi_handle handle, u32 event, void *context) | |
30 | { | |
31 | struct pci_bus *pci_bus = context; | |
32 | ||
33 | if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_bus) | |
34 | pci_pme_wakeup_bus(pci_bus); | |
35 | } | |
36 | ||
37 | /** | |
38 | * pci_acpi_wake_dev - Wake-up notification handler for PCI devices. | |
39 | * @handle: ACPI handle of a device the notification is for. | |
40 | * @event: Type of the signaled event. | |
41 | * @context: PCI device object to wake up. | |
42 | */ | |
43 | static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context) | |
44 | { | |
45 | struct pci_dev *pci_dev = context; | |
46 | ||
a424948d RW |
47 | if (event != ACPI_NOTIFY_DEVICE_WAKE || !pci_dev) |
48 | return; | |
49 | ||
83414515 RW |
50 | if (pci_dev->pme_poll) |
51 | pci_dev->pme_poll = false; | |
52 | ||
448bd857 HY |
53 | if (pci_dev->current_state == PCI_D3cold) { |
54 | pci_wakeup_event(pci_dev); | |
55 | pm_runtime_resume(&pci_dev->dev); | |
56 | return; | |
57 | } | |
58 | ||
24ad0ef9 RW |
59 | /* Clear PME Status if set. */ |
60 | if (pci_dev->pme_support) | |
61 | pci_check_pme_status(pci_dev); | |
379021d5 | 62 | |
24ad0ef9 RW |
63 | pci_wakeup_event(pci_dev); |
64 | pm_runtime_resume(&pci_dev->dev); | |
a424948d RW |
65 | |
66 | if (pci_dev->subordinate) | |
67 | pci_pme_wakeup_bus(pci_dev->subordinate); | |
b67ea761 RW |
68 | } |
69 | ||
b67ea761 RW |
70 | /** |
71 | * pci_acpi_add_bus_pm_notifier - Register PM notifier for given PCI bus. | |
72 | * @dev: ACPI device to add the notifier for. | |
73 | * @pci_bus: PCI bus to walk checking for PME status if an event is signaled. | |
74 | */ | |
75 | acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev, | |
76 | struct pci_bus *pci_bus) | |
77 | { | |
ec2cd81c | 78 | return acpi_add_pm_notifier(dev, pci_acpi_wake_bus, pci_bus); |
b67ea761 RW |
79 | } |
80 | ||
81 | /** | |
82 | * pci_acpi_remove_bus_pm_notifier - Unregister PCI bus PM notifier. | |
83 | * @dev: ACPI device to remove the notifier from. | |
84 | */ | |
85 | acpi_status pci_acpi_remove_bus_pm_notifier(struct acpi_device *dev) | |
86 | { | |
ec2cd81c | 87 | return acpi_remove_pm_notifier(dev, pci_acpi_wake_bus); |
b67ea761 RW |
88 | } |
89 | ||
90 | /** | |
91 | * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device. | |
92 | * @dev: ACPI device to add the notifier for. | |
93 | * @pci_dev: PCI device to check for the PME status if an event is signaled. | |
94 | */ | |
95 | acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev, | |
96 | struct pci_dev *pci_dev) | |
97 | { | |
ec2cd81c | 98 | return acpi_add_pm_notifier(dev, pci_acpi_wake_dev, pci_dev); |
b67ea761 RW |
99 | } |
100 | ||
101 | /** | |
102 | * pci_acpi_remove_pm_notifier - Unregister PCI device PM notifier. | |
103 | * @dev: ACPI device to remove the notifier from. | |
104 | */ | |
105 | acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev) | |
106 | { | |
ec2cd81c | 107 | return acpi_remove_pm_notifier(dev, pci_acpi_wake_dev); |
b67ea761 RW |
108 | } |
109 | ||
f4b57a3b JL |
110 | phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle) |
111 | { | |
112 | acpi_status status = AE_NOT_EXIST; | |
113 | unsigned long long mcfg_addr; | |
114 | ||
115 | if (handle) | |
116 | status = acpi_evaluate_integer(handle, METHOD_NAME__CBA, | |
117 | NULL, &mcfg_addr); | |
118 | if (ACPI_FAILURE(status)) | |
119 | return 0; | |
120 | ||
121 | return (phys_addr_t)mcfg_addr; | |
122 | } | |
123 | ||
0f64474b DSL |
124 | /* |
125 | * _SxD returns the D-state with the highest power | |
126 | * (lowest D-state number) supported in the S-state "x". | |
127 | * | |
128 | * If the devices does not have a _PRW | |
129 | * (Power Resources for Wake) supporting system wakeup from "x" | |
130 | * then the OS is free to choose a lower power (higher number | |
131 | * D-state) than the return value from _SxD. | |
132 | * | |
133 | * But if _PRW is enabled at S-state "x", the OS | |
134 | * must not choose a power lower than _SxD -- | |
135 | * unless the device has an _SxW method specifying | |
136 | * the lowest power (highest D-state number) the device | |
137 | * may enter while still able to wake the system. | |
138 | * | |
139 | * ie. depending on global OS policy: | |
140 | * | |
141 | * if (_PRW at S-state x) | |
142 | * choose from highest power _SxD to lowest power _SxW | |
143 | * else // no _PRW at S-state x | |
f7625980 | 144 | * choose highest power _SxD or any lower power |
0f64474b DSL |
145 | */ |
146 | ||
8d2bdf49 | 147 | static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev) |
0f64474b | 148 | { |
448bd857 | 149 | int acpi_state, d_max; |
0f64474b | 150 | |
448bd857 HY |
151 | if (pdev->no_d3cold) |
152 | d_max = ACPI_STATE_D3_HOT; | |
153 | else | |
154 | d_max = ACPI_STATE_D3_COLD; | |
155 | acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max); | |
ab826ca4 SL |
156 | if (acpi_state < 0) |
157 | return PCI_POWER_ERROR; | |
158 | ||
159 | switch (acpi_state) { | |
160 | case ACPI_STATE_D0: | |
161 | return PCI_D0; | |
162 | case ACPI_STATE_D1: | |
163 | return PCI_D1; | |
164 | case ACPI_STATE_D2: | |
165 | return PCI_D2; | |
1cc0c998 | 166 | case ACPI_STATE_D3_HOT: |
ab826ca4 | 167 | return PCI_D3hot; |
28c2103d LM |
168 | case ACPI_STATE_D3_COLD: |
169 | return PCI_D3cold; | |
ab826ca4 SL |
170 | } |
171 | return PCI_POWER_ERROR; | |
0f64474b | 172 | } |
961d9120 RW |
173 | |
174 | static bool acpi_pci_power_manageable(struct pci_dev *dev) | |
175 | { | |
3a83f992 | 176 | acpi_handle handle = ACPI_HANDLE(&dev->dev); |
961d9120 RW |
177 | |
178 | return handle ? acpi_bus_power_manageable(handle) : false; | |
179 | } | |
0f64474b | 180 | |
b913100d DSL |
181 | static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
182 | { | |
3a83f992 | 183 | acpi_handle handle = ACPI_HANDLE(&dev->dev); |
583c377f DB |
184 | static const u8 state_conv[] = { |
185 | [PCI_D0] = ACPI_STATE_D0, | |
186 | [PCI_D1] = ACPI_STATE_D1, | |
187 | [PCI_D2] = ACPI_STATE_D2, | |
fc6504b3 RW |
188 | [PCI_D3hot] = ACPI_STATE_D3_COLD, |
189 | [PCI_D3cold] = ACPI_STATE_D3_COLD, | |
b913100d | 190 | }; |
44e4e66e | 191 | int error = -EINVAL; |
b913100d | 192 | |
10b3dcae | 193 | /* If the ACPI device has _EJ0, ignore the device */ |
be07c00e | 194 | if (!handle || acpi_has_method(handle, "_EJ0")) |
44e4e66e | 195 | return -ENODEV; |
583c377f DB |
196 | |
197 | switch (state) { | |
8b713a88 RW |
198 | case PCI_D3cold: |
199 | if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) == | |
200 | PM_QOS_FLAGS_ALL) { | |
201 | error = -EBUSY; | |
202 | break; | |
203 | } | |
583c377f DB |
204 | case PCI_D0: |
205 | case PCI_D1: | |
206 | case PCI_D2: | |
207 | case PCI_D3hot: | |
44e4e66e | 208 | error = acpi_bus_set_power(handle, state_conv[state]); |
583c377f | 209 | } |
44e4e66e RW |
210 | |
211 | if (!error) | |
d010e576 | 212 | dev_dbg(&dev->dev, "power state changed by ACPI to %s\n", |
fc6504b3 | 213 | acpi_power_state_string(state_conv[state])); |
44e4e66e RW |
214 | |
215 | return error; | |
b913100d DSL |
216 | } |
217 | ||
eb9d0fe4 RW |
218 | static bool acpi_pci_can_wakeup(struct pci_dev *dev) |
219 | { | |
3a83f992 | 220 | acpi_handle handle = ACPI_HANDLE(&dev->dev); |
eb9d0fe4 RW |
221 | |
222 | return handle ? acpi_bus_can_wakeup(handle) : false; | |
223 | } | |
224 | ||
0baed8da RW |
225 | static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable) |
226 | { | |
227 | while (bus->parent) { | |
dc1a94ae | 228 | if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable)) |
0baed8da RW |
229 | return; |
230 | bus = bus->parent; | |
231 | } | |
232 | ||
233 | /* We have reached the root bus. */ | |
234 | if (bus->bridge) | |
235 | acpi_pm_device_sleep_wake(bus->bridge, enable); | |
236 | } | |
237 | ||
eb9d0fe4 RW |
238 | static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable) |
239 | { | |
0baed8da RW |
240 | if (acpi_pci_can_wakeup(dev)) |
241 | return acpi_pm_device_sleep_wake(&dev->dev, enable); | |
242 | ||
dc1a94ae | 243 | acpi_pci_propagate_wakeup_enable(dev->bus, enable); |
0baed8da | 244 | return 0; |
eb9d0fe4 RW |
245 | } |
246 | ||
b67ea761 RW |
247 | static void acpi_pci_propagate_run_wake(struct pci_bus *bus, bool enable) |
248 | { | |
249 | while (bus->parent) { | |
250 | struct pci_dev *bridge = bus->self; | |
251 | ||
252 | if (bridge->pme_interrupt) | |
253 | return; | |
b24e5098 | 254 | if (!acpi_pm_device_run_wake(&bridge->dev, enable)) |
b67ea761 RW |
255 | return; |
256 | bus = bus->parent; | |
257 | } | |
258 | ||
259 | /* We have reached the root bus. */ | |
260 | if (bus->bridge) | |
b24e5098 | 261 | acpi_pm_device_run_wake(bus->bridge, enable); |
b67ea761 RW |
262 | } |
263 | ||
264 | static int acpi_pci_run_wake(struct pci_dev *dev, bool enable) | |
265 | { | |
448bd857 HY |
266 | /* |
267 | * Per PCI Express Base Specification Revision 2.0 section | |
268 | * 5.3.3.2 Link Wakeup, platform support is needed for D3cold | |
269 | * waking up to power on the main link even if there is PME | |
270 | * support for D3cold | |
271 | */ | |
272 | if (dev->pme_interrupt && !dev->runtime_d3cold) | |
b67ea761 RW |
273 | return 0; |
274 | ||
b24e5098 | 275 | if (!acpi_pm_device_run_wake(&dev->dev, enable)) |
b67ea761 RW |
276 | return 0; |
277 | ||
278 | acpi_pci_propagate_run_wake(dev->bus, enable); | |
279 | return 0; | |
280 | } | |
281 | ||
961d9120 RW |
282 | static struct pci_platform_pm_ops acpi_pci_platform_pm = { |
283 | .is_manageable = acpi_pci_power_manageable, | |
284 | .set_state = acpi_pci_set_power_state, | |
285 | .choose_state = acpi_pci_choose_state, | |
eb9d0fe4 | 286 | .sleep_wake = acpi_pci_sleep_wake, |
b67ea761 | 287 | .run_wake = acpi_pci_run_wake, |
961d9120 | 288 | }; |
b913100d | 289 | |
5090d4a6 JL |
290 | void acpi_pci_add_bus(struct pci_bus *bus) |
291 | { | |
be1c9de9 | 292 | if (acpi_pci_disabled || !bus->bridge) |
5090d4a6 JL |
293 | return; |
294 | ||
be1c9de9 RW |
295 | acpi_pci_slot_enumerate(bus); |
296 | acpiphp_enumerate_slots(bus); | |
5090d4a6 JL |
297 | } |
298 | ||
299 | void acpi_pci_remove_bus(struct pci_bus *bus) | |
300 | { | |
be1c9de9 | 301 | if (acpi_pci_disabled || !bus->bridge) |
5090d4a6 JL |
302 | return; |
303 | ||
3b63aaa7 | 304 | acpiphp_remove_slots(bus); |
5c0b04e3 | 305 | acpi_pci_slot_remove(bus); |
5090d4a6 JL |
306 | } |
307 | ||
84df749f | 308 | /* ACPI bus type */ |
9c273b95 | 309 | static int acpi_pci_find_device(struct device *dev, acpi_handle *handle) |
84df749f | 310 | { |
60f75b8e RW |
311 | struct pci_dev *pci_dev = to_pci_dev(dev); |
312 | bool is_bridge; | |
313 | u64 addr; | |
84df749f | 314 | |
60f75b8e RW |
315 | /* |
316 | * pci_is_bridge() is not suitable here, because pci_dev->subordinate | |
317 | * is set only after acpi_pci_find_device() has been called for the | |
318 | * given device. | |
319 | */ | |
320 | is_bridge = pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE | |
321 | || pci_dev->hdr_type == PCI_HEADER_TYPE_CARDBUS; | |
84df749f DSL |
322 | /* Please ref to ACPI spec for the syntax of _ADR */ |
323 | addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); | |
60f75b8e | 324 | *handle = acpi_find_child(ACPI_HANDLE(dev->parent), addr, is_bridge); |
84df749f DSL |
325 | if (!*handle) |
326 | return -ENODEV; | |
327 | return 0; | |
328 | } | |
329 | ||
38a9a67a | 330 | static void pci_acpi_setup(struct device *dev) |
d2e5f0c1 | 331 | { |
d2e5f0c1 | 332 | struct pci_dev *pci_dev = to_pci_dev(dev); |
f084280c | 333 | struct acpi_device *adev = ACPI_COMPANION(dev); |
38a9a67a | 334 | |
f084280c RW |
335 | if (!adev) |
336 | return; | |
337 | ||
338 | pci_acpi_add_pm_notifier(adev, pci_dev); | |
339 | if (!adev->wakeup.flags.valid) | |
d2e5f0c1 RW |
340 | return; |
341 | ||
342 | device_set_wakeup_capable(dev, true); | |
343 | acpi_pci_sleep_wake(pci_dev, false); | |
d2e5f0c1 RW |
344 | if (adev->wakeup.flags.run_wake) |
345 | device_set_run_wake(dev, true); | |
346 | } | |
347 | ||
38a9a67a | 348 | static void pci_acpi_cleanup(struct device *dev) |
d2e5f0c1 | 349 | { |
f084280c RW |
350 | struct acpi_device *adev = ACPI_COMPANION(dev); |
351 | ||
352 | if (!adev) | |
353 | return; | |
d2e5f0c1 | 354 | |
f084280c RW |
355 | pci_acpi_remove_pm_notifier(adev); |
356 | if (adev->wakeup.flags.valid) { | |
d2e5f0c1 RW |
357 | device_set_wakeup_capable(dev, false); |
358 | device_set_run_wake(dev, false); | |
d2e5f0c1 RW |
359 | } |
360 | } | |
361 | ||
53540098 RW |
362 | static bool pci_acpi_bus_match(struct device *dev) |
363 | { | |
364 | return dev->bus == &pci_bus_type; | |
365 | } | |
366 | ||
9c273b95 | 367 | static struct acpi_bus_type acpi_pci_bus = { |
53540098 RW |
368 | .name = "PCI", |
369 | .match = pci_acpi_bus_match, | |
9c273b95 | 370 | .find_device = acpi_pci_find_device, |
38a9a67a RW |
371 | .setup = pci_acpi_setup, |
372 | .cleanup = pci_acpi_cleanup, | |
84df749f DSL |
373 | }; |
374 | ||
9c273b95 | 375 | static int __init acpi_pci_init(void) |
84df749f DSL |
376 | { |
377 | int ret; | |
378 | ||
993958fe | 379 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) { |
e7d45152 | 380 | pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); |
f8993aff SL |
381 | pci_no_msi(); |
382 | } | |
5fde244d | 383 | |
993958fe | 384 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
e7d45152 | 385 | pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); |
5fde244d SL |
386 | pcie_no_aspm(); |
387 | } | |
388 | ||
9c273b95 | 389 | ret = register_acpi_bus_type(&acpi_pci_bus); |
84df749f DSL |
390 | if (ret) |
391 | return 0; | |
5c0b04e3 | 392 | |
961d9120 | 393 | pci_set_platform_pm(&acpi_pci_platform_pm); |
5c0b04e3 | 394 | acpi_pci_slot_init(); |
3b63aaa7 | 395 | acpiphp_init(); |
5c0b04e3 | 396 | |
84df749f DSL |
397 | return 0; |
398 | } | |
9c273b95 | 399 | arch_initcall(acpi_pci_init); |