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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[mirror_ubuntu-zesty-kernel.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/stat.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
aa0ac365 23#include <linux/capability.h>
7d715a6c 24#include <linux/pci-aspm.h>
1da177e4
LT
25#include "pci.h"
26
27static int sysfs_initialized; /* = 0 */
28
29/* show configuration fields */
30#define pci_config_attr(field, format_string) \
31static ssize_t \
e404e274 32field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
33{ \
34 struct pci_dev *pdev; \
35 \
36 pdev = to_pci_dev (dev); \
37 return sprintf (buf, format_string, pdev->field); \
38}
39
40pci_config_attr(vendor, "0x%04x\n");
41pci_config_attr(device, "0x%04x\n");
42pci_config_attr(subsystem_vendor, "0x%04x\n");
43pci_config_attr(subsystem_device, "0x%04x\n");
44pci_config_attr(class, "0x%06x\n");
45pci_config_attr(irq, "%u\n");
46
bdee9d98
DT
47static ssize_t broken_parity_status_show(struct device *dev,
48 struct device_attribute *attr,
49 char *buf)
50{
51 struct pci_dev *pdev = to_pci_dev(dev);
52 return sprintf (buf, "%u\n", pdev->broken_parity_status);
53}
54
55static ssize_t broken_parity_status_store(struct device *dev,
56 struct device_attribute *attr,
57 const char *buf, size_t count)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60 ssize_t consumed = -EINVAL;
61
62 if ((count > 0) && (*buf == '0' || *buf == '1')) {
63 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
64 consumed = count;
65 }
66 return consumed;
67}
68
4327edf6
AC
69static ssize_t local_cpus_show(struct device *dev,
70 struct device_attribute *attr, char *buf)
1da177e4 71{
4327edf6
AC
72 cpumask_t mask;
73 int len;
74
75 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
76 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
77 buf[len++] = '\n';
78 buf[len] = '\0';
79 return len;
80}
81
82
83static ssize_t local_cpulist_show(struct device *dev,
84 struct device_attribute *attr, char *buf)
85{
86 cpumask_t mask;
87 int len;
88
89 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
90 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
91 buf[len++] = '\n';
92 buf[len] = '\0';
93 return len;
1da177e4
LT
94}
95
96/* show resources */
97static ssize_t
e404e274 98resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
99{
100 struct pci_dev * pci_dev = to_pci_dev(dev);
101 char * str = buf;
102 int i;
103 int max = 7;
e31dd6e4 104 resource_size_t start, end;
1da177e4
LT
105
106 if (pci_dev->subordinate)
107 max = DEVICE_COUNT_RESOURCE;
108
109 for (i = 0; i < max; i++) {
2311b1f2
ME
110 struct resource *res = &pci_dev->resource[i];
111 pci_resource_to_user(pci_dev, i, res, &start, &end);
112 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
113 (unsigned long long)start,
114 (unsigned long long)end,
115 (unsigned long long)res->flags);
1da177e4
LT
116 }
117 return (str - buf);
118}
119
87c8a443 120static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
121{
122 struct pci_dev *pci_dev = to_pci_dev(dev);
123
124 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
125 pci_dev->vendor, pci_dev->device,
126 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
127 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
128 (u8)(pci_dev->class));
129}
bae94d02
IPG
130
131static ssize_t is_enabled_store(struct device *dev,
132 struct device_attribute *attr, const char *buf,
133 size_t count)
9f125d30 134{
bae94d02 135 ssize_t result = -EINVAL;
9f125d30
AV
136 struct pci_dev *pdev = to_pci_dev(dev);
137
138 /* this can crash the machine when done on the "wrong" device */
139 if (!capable(CAP_SYS_ADMIN))
140 return count;
141
bae94d02
IPG
142 if (*buf == '0') {
143 if (atomic_read(&pdev->enable_cnt) != 0)
144 pci_disable_device(pdev);
145 else
146 result = -EIO;
147 } else if (*buf == '1')
148 result = pci_enable_device(pdev);
9f125d30 149
bae94d02
IPG
150 return result < 0 ? result : count;
151}
152
153static ssize_t is_enabled_show(struct device *dev,
154 struct device_attribute *attr, char *buf)
155{
156 struct pci_dev *pdev;
9f125d30 157
bae94d02
IPG
158 pdev = to_pci_dev (dev);
159 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
160}
161
81bb0e19
BG
162#ifdef CONFIG_NUMA
163static ssize_t
164numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
165{
166 return sprintf (buf, "%d\n", dev->numa_node);
167}
168#endif
169
fe97064c
BG
170static ssize_t
171msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
172{
173 struct pci_dev *pdev = to_pci_dev(dev);
174
175 if (!pdev->subordinate)
176 return 0;
177
178 return sprintf (buf, "%u\n",
179 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
180}
181
182static ssize_t
183msi_bus_store(struct device *dev, struct device_attribute *attr,
184 const char *buf, size_t count)
185{
186 struct pci_dev *pdev = to_pci_dev(dev);
187
188 /* bad things may happen if the no_msi flag is changed
189 * while some drivers are loaded */
190 if (!capable(CAP_SYS_ADMIN))
191 return count;
192
193 if (!pdev->subordinate)
194 return count;
195
196 if (*buf == '0') {
197 pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
198 dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
199 " bad things could happen.\n");
200 }
201
202 if (*buf == '1') {
203 pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
204 dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
205 " bad things could happen.\n");
206 }
207
208 return count;
209}
9888549e 210
1da177e4
LT
211struct device_attribute pci_dev_attrs[] = {
212 __ATTR_RO(resource),
213 __ATTR_RO(vendor),
214 __ATTR_RO(device),
215 __ATTR_RO(subsystem_vendor),
216 __ATTR_RO(subsystem_device),
217 __ATTR_RO(class),
218 __ATTR_RO(irq),
219 __ATTR_RO(local_cpus),
39106dcf 220 __ATTR_RO(local_cpulist),
9888549e 221 __ATTR_RO(modalias),
81bb0e19
BG
222#ifdef CONFIG_NUMA
223 __ATTR_RO(numa_node),
224#endif
9f125d30 225 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
226 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
227 broken_parity_status_show,broken_parity_status_store),
fe97064c 228 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
229 __ATTR_NULL,
230};
231
232static ssize_t
91a69029
ZR
233pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
234 char *buf, loff_t off, size_t count)
1da177e4
LT
235{
236 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
237 unsigned int size = 64;
238 loff_t init_off = off;
4c0619ad 239 u8 *data = (u8*) buf;
1da177e4
LT
240
241 /* Several chips lock up trying to read undefined config space */
242 if (capable(CAP_SYS_ADMIN)) {
243 size = dev->cfg_size;
244 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
245 size = 128;
246 }
247
248 if (off > size)
249 return 0;
250 if (off + count > size) {
251 size -= off;
252 count = size;
253 } else {
254 size = count;
255 }
256
4c0619ad
SS
257 if ((off & 1) && size) {
258 u8 val;
e04b0ea2 259 pci_user_read_config_byte(dev, off, &val);
4c0619ad 260 data[off - init_off] = val;
1da177e4 261 off++;
4c0619ad
SS
262 size--;
263 }
264
265 if ((off & 3) && size > 2) {
266 u16 val;
e04b0ea2 267 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
268 data[off - init_off] = val & 0xff;
269 data[off - init_off + 1] = (val >> 8) & 0xff;
270 off += 2;
271 size -= 2;
1da177e4
LT
272 }
273
274 while (size > 3) {
4c0619ad 275 u32 val;
e04b0ea2 276 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
277 data[off - init_off] = val & 0xff;
278 data[off - init_off + 1] = (val >> 8) & 0xff;
279 data[off - init_off + 2] = (val >> 16) & 0xff;
280 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
281 off += 4;
282 size -= 4;
283 }
284
4c0619ad
SS
285 if (size >= 2) {
286 u16 val;
e04b0ea2 287 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
288 data[off - init_off] = val & 0xff;
289 data[off - init_off + 1] = (val >> 8) & 0xff;
290 off += 2;
291 size -= 2;
292 }
293
294 if (size > 0) {
295 u8 val;
e04b0ea2 296 pci_user_read_config_byte(dev, off, &val);
4c0619ad 297 data[off - init_off] = val;
1da177e4
LT
298 off++;
299 --size;
300 }
301
302 return count;
303}
304
305static ssize_t
91a69029
ZR
306pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
307 char *buf, loff_t off, size_t count)
1da177e4
LT
308{
309 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
310 unsigned int size = count;
311 loff_t init_off = off;
4c0619ad 312 u8 *data = (u8*) buf;
1da177e4
LT
313
314 if (off > dev->cfg_size)
315 return 0;
316 if (off + count > dev->cfg_size) {
317 size = dev->cfg_size - off;
318 count = size;
319 }
4c0619ad
SS
320
321 if ((off & 1) && size) {
e04b0ea2 322 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 323 off++;
4c0619ad 324 size--;
1da177e4 325 }
4c0619ad
SS
326
327 if ((off & 3) && size > 2) {
328 u16 val = data[off - init_off];
329 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 330 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
331 off += 2;
332 size -= 2;
333 }
1da177e4
LT
334
335 while (size > 3) {
4c0619ad
SS
336 u32 val = data[off - init_off];
337 val |= (u32) data[off - init_off + 1] << 8;
338 val |= (u32) data[off - init_off + 2] << 16;
339 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 340 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
341 off += 4;
342 size -= 4;
343 }
4c0619ad
SS
344
345 if (size >= 2) {
346 u16 val = data[off - init_off];
347 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 348 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
349 off += 2;
350 size -= 2;
351 }
1da177e4 352
4c0619ad 353 if (size) {
e04b0ea2 354 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
355 off++;
356 --size;
357 }
358
359 return count;
360}
361
94e61088
BH
362static ssize_t
363pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
364 char *buf, loff_t off, size_t count)
365{
366 struct pci_dev *dev =
367 to_pci_dev(container_of(kobj, struct device, kobj));
368 int end;
369 int ret;
370
371 if (off > bin_attr->size)
372 count = 0;
373 else if (count > bin_attr->size - off)
374 count = bin_attr->size - off;
375 end = off + count;
376
377 while (off < end) {
378 ret = dev->vpd->ops->read(dev, off, end - off, buf);
379 if (ret < 0)
380 return ret;
381 buf += ret;
382 off += ret;
383 }
384
385 return count;
386}
387
388static ssize_t
389pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
390 char *buf, loff_t off, size_t count)
391{
392 struct pci_dev *dev =
393 to_pci_dev(container_of(kobj, struct device, kobj));
394 int end;
395 int ret;
396
397 if (off > bin_attr->size)
398 count = 0;
399 else if (count > bin_attr->size - off)
400 count = bin_attr->size - off;
401 end = off + count;
402
403 while (off < end) {
404 ret = dev->vpd->ops->write(dev, off, end - off, buf);
405 if (ret < 0)
406 return ret;
407 buf += ret;
408 off += ret;
409 }
410
411 return count;
412}
413
1da177e4
LT
414#ifdef HAVE_PCI_LEGACY
415/**
416 * pci_read_legacy_io - read byte(s) from legacy I/O port space
417 * @kobj: kobject corresponding to file to read from
418 * @buf: buffer to store results
419 * @off: offset into legacy I/O port space
420 * @count: number of bytes to read
421 *
422 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
423 * callback routine (pci_legacy_read).
424 */
425ssize_t
91a69029
ZR
426pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
427 char *buf, loff_t off, size_t count)
1da177e4
LT
428{
429 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 430 struct device,
1da177e4
LT
431 kobj));
432
433 /* Only support 1, 2 or 4 byte accesses */
434 if (count != 1 && count != 2 && count != 4)
435 return -EINVAL;
436
437 return pci_legacy_read(bus, off, (u32 *)buf, count);
438}
439
440/**
441 * pci_write_legacy_io - write byte(s) to legacy I/O port space
442 * @kobj: kobject corresponding to file to read from
443 * @buf: buffer containing value to be written
444 * @off: offset into legacy I/O port space
445 * @count: number of bytes to write
446 *
447 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
448 * callback routine (pci_legacy_write).
449 */
450ssize_t
91a69029
ZR
451pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
452 char *buf, loff_t off, size_t count)
1da177e4
LT
453{
454 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 455 struct device,
1da177e4
LT
456 kobj));
457 /* Only support 1, 2 or 4 byte accesses */
458 if (count != 1 && count != 2 && count != 4)
459 return -EINVAL;
460
461 return pci_legacy_write(bus, off, *(u32 *)buf, count);
462}
463
464/**
465 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
466 * @kobj: kobject corresponding to device to be mapped
467 * @attr: struct bin_attribute for this file
468 * @vma: struct vm_area_struct passed to mmap
469 *
470 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
471 * legacy memory space (first meg of bus space) into application virtual
472 * memory space.
473 */
474int
475pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
476 struct vm_area_struct *vma)
477{
478 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 479 struct device,
1da177e4
LT
480 kobj));
481
482 return pci_mmap_legacy_page_range(bus, vma);
483}
484#endif /* HAVE_PCI_LEGACY */
485
486#ifdef HAVE_PCI_MMAP
487/**
488 * pci_mmap_resource - map a PCI resource into user memory space
489 * @kobj: kobject for mapping
490 * @attr: struct bin_attribute for the file being mapped
491 * @vma: struct vm_area_struct passed into the mmap
492 *
493 * Use the regular PCI mapping routines to map a PCI resource into userspace.
494 * FIXME: write combining? maybe automatic for prefetchable regions?
495 */
496static int
497pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
498 struct vm_area_struct *vma)
499{
500 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
501 struct device, kobj));
502 struct resource *res = (struct resource *)attr->private;
503 enum pci_mmap_state mmap_type;
e31dd6e4 504 resource_size_t start, end;
2311b1f2 505 int i;
1da177e4 506
2311b1f2
ME
507 for (i = 0; i < PCI_ROM_RESOURCE; i++)
508 if (res == &pdev->resource[i])
509 break;
510 if (i >= PCI_ROM_RESOURCE)
511 return -ENODEV;
512
513 /* pci_mmap_page_range() expects the same kind of entry as coming
514 * from /proc/bus/pci/ which is a "user visible" value. If this is
515 * different from the resource itself, arch will do necessary fixup.
516 */
517 pci_resource_to_user(pdev, i, res, &start, &end);
518 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
519 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
520
521 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
522}
523
b19441af
GKH
524/**
525 * pci_remove_resource_files - cleanup resource files
526 * @dev: dev to cleanup
527 *
528 * If we created resource files for @dev, remove them from sysfs and
529 * free their resources.
530 */
531static void
532pci_remove_resource_files(struct pci_dev *pdev)
533{
534 int i;
535
536 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
537 struct bin_attribute *res_attr;
538
539 res_attr = pdev->res_attr[i];
540 if (res_attr) {
541 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
542 kfree(res_attr);
543 }
544 }
545}
546
1da177e4
LT
547/**
548 * pci_create_resource_files - create resource files in sysfs for @dev
549 * @dev: dev in question
550 *
551 * Walk the resources in @dev creating files for each resource available.
552 */
b19441af 553static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
554{
555 int i;
b19441af 556 int retval;
1da177e4
LT
557
558 /* Expose the PCI resources from this device as files */
559 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
560 struct bin_attribute *res_attr;
561
562 /* skip empty resources */
563 if (!pci_resource_len(pdev, i))
564 continue;
565
d48593bf 566 /* allocate attribute structure, piggyback attribute name */
656da9da 567 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4 568 if (res_attr) {
d48593bf
DT
569 char *res_attr_name = (char *)(res_attr + 1);
570
1da177e4 571 pdev->res_attr[i] = res_attr;
d48593bf
DT
572 sprintf(res_attr_name, "resource%d", i);
573 res_attr->attr.name = res_attr_name;
1da177e4 574 res_attr->attr.mode = S_IRUSR | S_IWUSR;
d48593bf 575 res_attr->size = pci_resource_len(pdev, i);
1da177e4
LT
576 res_attr->mmap = pci_mmap_resource;
577 res_attr->private = &pdev->resource[i];
b19441af
GKH
578 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
579 if (retval) {
580 pci_remove_resource_files(pdev);
581 return retval;
582 }
583 } else {
584 return -ENOMEM;
1da177e4
LT
585 }
586 }
b19441af 587 return 0;
1da177e4
LT
588}
589#else /* !HAVE_PCI_MMAP */
b19441af 590static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
591static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
592#endif /* HAVE_PCI_MMAP */
593
594/**
595 * pci_write_rom - used to enable access to the PCI ROM display
596 * @kobj: kernel object handle
597 * @buf: user input
598 * @off: file offset
599 * @count: number of byte in input
600 *
601 * writing anything except 0 enables it
602 */
603static ssize_t
91a69029
ZR
604pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
605 char *buf, loff_t off, size_t count)
1da177e4
LT
606{
607 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
608
609 if ((off == 0) && (*buf == '0') && (count == 2))
610 pdev->rom_attr_enabled = 0;
611 else
612 pdev->rom_attr_enabled = 1;
613
614 return count;
615}
616
617/**
618 * pci_read_rom - read a PCI ROM
619 * @kobj: kernel object handle
620 * @buf: where to put the data we read from the ROM
621 * @off: file offset
622 * @count: number of bytes to read
623 *
624 * Put @count bytes starting at @off into @buf from the ROM in the PCI
625 * device corresponding to @kobj.
626 */
627static ssize_t
91a69029
ZR
628pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
629 char *buf, loff_t off, size_t count)
1da177e4
LT
630{
631 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
632 void __iomem *rom;
633 size_t size;
634
635 if (!pdev->rom_attr_enabled)
636 return -EINVAL;
637
638 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
639 if (!rom)
640 return 0;
641
642 if (off >= size)
643 count = 0;
644 else {
645 if (off + count > size)
646 count = size - off;
647
648 memcpy_fromio(buf, rom + off, count);
649 }
650 pci_unmap_rom(pdev, rom);
651
652 return count;
653}
654
655static struct bin_attribute pci_config_attr = {
656 .attr = {
657 .name = "config",
658 .mode = S_IRUGO | S_IWUSR,
1da177e4
LT
659 },
660 .size = 256,
661 .read = pci_read_config,
662 .write = pci_write_config,
663};
664
665static struct bin_attribute pcie_config_attr = {
666 .attr = {
667 .name = "config",
668 .mode = S_IRUGO | S_IWUSR,
1da177e4
LT
669 },
670 .size = 4096,
671 .read = pci_read_config,
672 .write = pci_write_config,
673};
674
a2cd52ca 675int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 676{
a2cd52ca 677 return 0;
575e3348
ME
678}
679
b19441af 680int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 681{
94e61088 682 struct bin_attribute *attr = NULL;
b19441af
GKH
683 int retval;
684
1da177e4
LT
685 if (!sysfs_initialized)
686 return -EACCES;
687
688 if (pdev->cfg_size < 4096)
b19441af 689 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 690 else
b19441af
GKH
691 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
692 if (retval)
693 goto err;
1da177e4 694
94e61088
BH
695 /* If the device has VPD, try to expose it in sysfs. */
696 if (pdev->vpd) {
697 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
698 if (attr) {
699 pdev->vpd->attr = attr;
700 attr->size = pdev->vpd->ops->get_size(pdev);
701 attr->attr.name = "vpd";
702 attr->attr.mode = S_IRUGO | S_IWUSR;
703 attr->read = pci_read_vpd;
704 attr->write = pci_write_vpd;
705 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
706 if (retval)
707 goto err_vpd;
708 } else {
709 retval = -ENOMEM;
710 goto err_config_file;
711 }
712 }
713
b19441af
GKH
714 retval = pci_create_resource_files(pdev);
715 if (retval)
94e61088 716 goto err_vpd_file;
1da177e4
LT
717
718 /* If the device has a ROM, try to expose it in sysfs. */
40ee9e9f
JB
719 if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
720 (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
94e61088
BH
721 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
722 if (attr) {
723 pdev->rom_attr = attr;
724 attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
725 attr->attr.name = "rom";
726 attr->attr.mode = S_IRUSR;
727 attr->read = pci_read_rom;
728 attr->write = pci_write_rom;
729 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
b19441af
GKH
730 if (retval)
731 goto err_rom;
732 } else {
733 retval = -ENOMEM;
9890b12a 734 goto err_resource_files;
1da177e4
LT
735 }
736 }
737 /* add platform-specific attributes */
a2cd52ca
ME
738 if (pcibios_add_platform_entries(pdev))
739 goto err_rom_file;
b19441af 740
7d715a6c
SL
741 pcie_aspm_create_sysfs_dev_files(pdev);
742
1da177e4 743 return 0;
b19441af 744
a2cd52ca
ME
745err_rom_file:
746 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
94e61088 747 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
b19441af 748err_rom:
94e61088 749 kfree(pdev->rom_attr);
9890b12a
ME
750err_resource_files:
751 pci_remove_resource_files(pdev);
94e61088
BH
752err_vpd_file:
753 if (pdev->vpd) {
754 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->vpd->attr);
755err_vpd:
756 kfree(pdev->vpd->attr);
757 }
758err_config_file:
b19441af
GKH
759 if (pdev->cfg_size < 4096)
760 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
761 else
762 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
763err:
764 return retval;
1da177e4
LT
765}
766
767/**
768 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
769 * @pdev: device whose entries we should free
770 *
771 * Cleanup when @pdev is removed from sysfs.
772 */
773void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
774{
d67afe5e
DM
775 if (!sysfs_initialized)
776 return;
777
7d715a6c
SL
778 pcie_aspm_remove_sysfs_dev_files(pdev);
779
94e61088
BH
780 if (pdev->vpd) {
781 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->vpd->attr);
782 kfree(pdev->vpd->attr);
783 }
1da177e4
LT
784 if (pdev->cfg_size < 4096)
785 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
786 else
787 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
788
789 pci_remove_resource_files(pdev);
790
791 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
792 if (pdev->rom_attr) {
793 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
794 kfree(pdev->rom_attr);
795 }
796 }
797}
798
799static int __init pci_sysfs_init(void)
800{
801 struct pci_dev *pdev = NULL;
b19441af
GKH
802 int retval;
803
1da177e4 804 sysfs_initialized = 1;
b19441af
GKH
805 for_each_pci_dev(pdev) {
806 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
807 if (retval) {
808 pci_dev_put(pdev);
b19441af 809 return retval;
151fc5df 810 }
b19441af 811 }
1da177e4
LT
812
813 return 0;
814}
815
40ee9e9f 816late_initcall(pci_sysfs_init);