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[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/stat.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23
24#include "pci.h"
25
26static int sysfs_initialized; /* = 0 */
27
28/* show configuration fields */
29#define pci_config_attr(field, format_string) \
30static ssize_t \
e404e274 31field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
32{ \
33 struct pci_dev *pdev; \
34 \
35 pdev = to_pci_dev (dev); \
36 return sprintf (buf, format_string, pdev->field); \
37}
38
39pci_config_attr(vendor, "0x%04x\n");
40pci_config_attr(device, "0x%04x\n");
41pci_config_attr(subsystem_vendor, "0x%04x\n");
42pci_config_attr(subsystem_device, "0x%04x\n");
43pci_config_attr(class, "0x%06x\n");
44pci_config_attr(irq, "%u\n");
45
bdee9d98
DT
46static ssize_t broken_parity_status_show(struct device *dev,
47 struct device_attribute *attr,
48 char *buf)
49{
50 struct pci_dev *pdev = to_pci_dev(dev);
51 return sprintf (buf, "%u\n", pdev->broken_parity_status);
52}
53
54static ssize_t broken_parity_status_store(struct device *dev,
55 struct device_attribute *attr,
56 const char *buf, size_t count)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 ssize_t consumed = -EINVAL;
60
61 if ((count > 0) && (*buf == '0' || *buf == '1')) {
62 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
63 consumed = count;
64 }
65 return consumed;
66}
67
4327edf6
AC
68static ssize_t local_cpus_show(struct device *dev,
69 struct device_attribute *attr, char *buf)
1da177e4 70{
4327edf6
AC
71 cpumask_t mask;
72 int len;
73
74 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
75 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
1da177e4
LT
76 strcat(buf,"\n");
77 return 1+len;
78}
79
80/* show resources */
81static ssize_t
e404e274 82resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
83{
84 struct pci_dev * pci_dev = to_pci_dev(dev);
85 char * str = buf;
86 int i;
87 int max = 7;
e31dd6e4 88 resource_size_t start, end;
1da177e4
LT
89
90 if (pci_dev->subordinate)
91 max = DEVICE_COUNT_RESOURCE;
92
93 for (i = 0; i < max; i++) {
2311b1f2
ME
94 struct resource *res = &pci_dev->resource[i];
95 pci_resource_to_user(pci_dev, i, res, &start, &end);
96 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
97 (unsigned long long)start,
98 (unsigned long long)end,
99 (unsigned long long)res->flags);
1da177e4
LT
100 }
101 return (str - buf);
102}
103
87c8a443 104static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
105{
106 struct pci_dev *pci_dev = to_pci_dev(dev);
107
108 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
109 pci_dev->vendor, pci_dev->device,
110 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
111 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
112 (u8)(pci_dev->class));
113}
bae94d02
IPG
114
115static ssize_t is_enabled_store(struct device *dev,
116 struct device_attribute *attr, const char *buf,
117 size_t count)
9f125d30 118{
bae94d02 119 ssize_t result = -EINVAL;
9f125d30
AV
120 struct pci_dev *pdev = to_pci_dev(dev);
121
122 /* this can crash the machine when done on the "wrong" device */
123 if (!capable(CAP_SYS_ADMIN))
124 return count;
125
bae94d02
IPG
126 if (*buf == '0') {
127 if (atomic_read(&pdev->enable_cnt) != 0)
128 pci_disable_device(pdev);
129 else
130 result = -EIO;
131 } else if (*buf == '1')
132 result = pci_enable_device(pdev);
9f125d30 133
bae94d02
IPG
134 return result < 0 ? result : count;
135}
136
137static ssize_t is_enabled_show(struct device *dev,
138 struct device_attribute *attr, char *buf)
139{
140 struct pci_dev *pdev;
9f125d30 141
bae94d02
IPG
142 pdev = to_pci_dev (dev);
143 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
144}
145
fe97064c
BG
146static ssize_t
147msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
148{
149 struct pci_dev *pdev = to_pci_dev(dev);
150
151 if (!pdev->subordinate)
152 return 0;
153
154 return sprintf (buf, "%u\n",
155 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
156}
157
158static ssize_t
159msi_bus_store(struct device *dev, struct device_attribute *attr,
160 const char *buf, size_t count)
161{
162 struct pci_dev *pdev = to_pci_dev(dev);
163
164 /* bad things may happen if the no_msi flag is changed
165 * while some drivers are loaded */
166 if (!capable(CAP_SYS_ADMIN))
167 return count;
168
169 if (!pdev->subordinate)
170 return count;
171
172 if (*buf == '0') {
173 pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
174 dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
175 " bad things could happen.\n");
176 }
177
178 if (*buf == '1') {
179 pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
180 dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
181 " bad things could happen.\n");
182 }
183
184 return count;
185}
9888549e 186
1da177e4
LT
187struct device_attribute pci_dev_attrs[] = {
188 __ATTR_RO(resource),
189 __ATTR_RO(vendor),
190 __ATTR_RO(device),
191 __ATTR_RO(subsystem_vendor),
192 __ATTR_RO(subsystem_device),
193 __ATTR_RO(class),
194 __ATTR_RO(irq),
195 __ATTR_RO(local_cpus),
9888549e 196 __ATTR_RO(modalias),
9f125d30 197 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
198 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
199 broken_parity_status_show,broken_parity_status_store),
fe97064c 200 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
201 __ATTR_NULL,
202};
203
204static ssize_t
205pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
206{
207 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
208 unsigned int size = 64;
209 loff_t init_off = off;
4c0619ad 210 u8 *data = (u8*) buf;
1da177e4
LT
211
212 /* Several chips lock up trying to read undefined config space */
213 if (capable(CAP_SYS_ADMIN)) {
214 size = dev->cfg_size;
215 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
216 size = 128;
217 }
218
219 if (off > size)
220 return 0;
221 if (off + count > size) {
222 size -= off;
223 count = size;
224 } else {
225 size = count;
226 }
227
4c0619ad
SS
228 if ((off & 1) && size) {
229 u8 val;
e04b0ea2 230 pci_user_read_config_byte(dev, off, &val);
4c0619ad 231 data[off - init_off] = val;
1da177e4 232 off++;
4c0619ad
SS
233 size--;
234 }
235
236 if ((off & 3) && size > 2) {
237 u16 val;
e04b0ea2 238 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
239 data[off - init_off] = val & 0xff;
240 data[off - init_off + 1] = (val >> 8) & 0xff;
241 off += 2;
242 size -= 2;
1da177e4
LT
243 }
244
245 while (size > 3) {
4c0619ad 246 u32 val;
e04b0ea2 247 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
248 data[off - init_off] = val & 0xff;
249 data[off - init_off + 1] = (val >> 8) & 0xff;
250 data[off - init_off + 2] = (val >> 16) & 0xff;
251 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
252 off += 4;
253 size -= 4;
254 }
255
4c0619ad
SS
256 if (size >= 2) {
257 u16 val;
e04b0ea2 258 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
259 data[off - init_off] = val & 0xff;
260 data[off - init_off + 1] = (val >> 8) & 0xff;
261 off += 2;
262 size -= 2;
263 }
264
265 if (size > 0) {
266 u8 val;
e04b0ea2 267 pci_user_read_config_byte(dev, off, &val);
4c0619ad 268 data[off - init_off] = val;
1da177e4
LT
269 off++;
270 --size;
271 }
272
273 return count;
274}
275
276static ssize_t
277pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
278{
279 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
280 unsigned int size = count;
281 loff_t init_off = off;
4c0619ad 282 u8 *data = (u8*) buf;
1da177e4
LT
283
284 if (off > dev->cfg_size)
285 return 0;
286 if (off + count > dev->cfg_size) {
287 size = dev->cfg_size - off;
288 count = size;
289 }
4c0619ad
SS
290
291 if ((off & 1) && size) {
e04b0ea2 292 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 293 off++;
4c0619ad 294 size--;
1da177e4 295 }
4c0619ad
SS
296
297 if ((off & 3) && size > 2) {
298 u16 val = data[off - init_off];
299 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 300 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
301 off += 2;
302 size -= 2;
303 }
1da177e4
LT
304
305 while (size > 3) {
4c0619ad
SS
306 u32 val = data[off - init_off];
307 val |= (u32) data[off - init_off + 1] << 8;
308 val |= (u32) data[off - init_off + 2] << 16;
309 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 310 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
311 off += 4;
312 size -= 4;
313 }
4c0619ad
SS
314
315 if (size >= 2) {
316 u16 val = data[off - init_off];
317 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 318 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
319 off += 2;
320 size -= 2;
321 }
1da177e4 322
4c0619ad 323 if (size) {
e04b0ea2 324 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
325 off++;
326 --size;
327 }
328
329 return count;
330}
331
332#ifdef HAVE_PCI_LEGACY
333/**
334 * pci_read_legacy_io - read byte(s) from legacy I/O port space
335 * @kobj: kobject corresponding to file to read from
336 * @buf: buffer to store results
337 * @off: offset into legacy I/O port space
338 * @count: number of bytes to read
339 *
340 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
341 * callback routine (pci_legacy_read).
342 */
343ssize_t
344pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
345{
346 struct pci_bus *bus = to_pci_bus(container_of(kobj,
347 struct class_device,
348 kobj));
349
350 /* Only support 1, 2 or 4 byte accesses */
351 if (count != 1 && count != 2 && count != 4)
352 return -EINVAL;
353
354 return pci_legacy_read(bus, off, (u32 *)buf, count);
355}
356
357/**
358 * pci_write_legacy_io - write byte(s) to legacy I/O port space
359 * @kobj: kobject corresponding to file to read from
360 * @buf: buffer containing value to be written
361 * @off: offset into legacy I/O port space
362 * @count: number of bytes to write
363 *
364 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
365 * callback routine (pci_legacy_write).
366 */
367ssize_t
368pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
369{
370 struct pci_bus *bus = to_pci_bus(container_of(kobj,
371 struct class_device,
372 kobj));
373 /* Only support 1, 2 or 4 byte accesses */
374 if (count != 1 && count != 2 && count != 4)
375 return -EINVAL;
376
377 return pci_legacy_write(bus, off, *(u32 *)buf, count);
378}
379
380/**
381 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
382 * @kobj: kobject corresponding to device to be mapped
383 * @attr: struct bin_attribute for this file
384 * @vma: struct vm_area_struct passed to mmap
385 *
386 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
387 * legacy memory space (first meg of bus space) into application virtual
388 * memory space.
389 */
390int
391pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
392 struct vm_area_struct *vma)
393{
394 struct pci_bus *bus = to_pci_bus(container_of(kobj,
395 struct class_device,
396 kobj));
397
398 return pci_mmap_legacy_page_range(bus, vma);
399}
400#endif /* HAVE_PCI_LEGACY */
401
402#ifdef HAVE_PCI_MMAP
403/**
404 * pci_mmap_resource - map a PCI resource into user memory space
405 * @kobj: kobject for mapping
406 * @attr: struct bin_attribute for the file being mapped
407 * @vma: struct vm_area_struct passed into the mmap
408 *
409 * Use the regular PCI mapping routines to map a PCI resource into userspace.
410 * FIXME: write combining? maybe automatic for prefetchable regions?
411 */
412static int
413pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
414 struct vm_area_struct *vma)
415{
416 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
417 struct device, kobj));
418 struct resource *res = (struct resource *)attr->private;
419 enum pci_mmap_state mmap_type;
e31dd6e4 420 resource_size_t start, end;
2311b1f2 421 int i;
1da177e4 422
2311b1f2
ME
423 for (i = 0; i < PCI_ROM_RESOURCE; i++)
424 if (res == &pdev->resource[i])
425 break;
426 if (i >= PCI_ROM_RESOURCE)
427 return -ENODEV;
428
429 /* pci_mmap_page_range() expects the same kind of entry as coming
430 * from /proc/bus/pci/ which is a "user visible" value. If this is
431 * different from the resource itself, arch will do necessary fixup.
432 */
433 pci_resource_to_user(pdev, i, res, &start, &end);
434 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
435 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
436
437 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
438}
439
b19441af
GKH
440/**
441 * pci_remove_resource_files - cleanup resource files
442 * @dev: dev to cleanup
443 *
444 * If we created resource files for @dev, remove them from sysfs and
445 * free their resources.
446 */
447static void
448pci_remove_resource_files(struct pci_dev *pdev)
449{
450 int i;
451
452 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
453 struct bin_attribute *res_attr;
454
455 res_attr = pdev->res_attr[i];
456 if (res_attr) {
457 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
458 kfree(res_attr);
459 }
460 }
461}
462
1da177e4
LT
463/**
464 * pci_create_resource_files - create resource files in sysfs for @dev
465 * @dev: dev in question
466 *
467 * Walk the resources in @dev creating files for each resource available.
468 */
b19441af 469static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
470{
471 int i;
b19441af 472 int retval;
1da177e4
LT
473
474 /* Expose the PCI resources from this device as files */
475 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
476 struct bin_attribute *res_attr;
477
478 /* skip empty resources */
479 if (!pci_resource_len(pdev, i))
480 continue;
481
d48593bf 482 /* allocate attribute structure, piggyback attribute name */
656da9da 483 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4 484 if (res_attr) {
d48593bf
DT
485 char *res_attr_name = (char *)(res_attr + 1);
486
1da177e4 487 pdev->res_attr[i] = res_attr;
d48593bf
DT
488 sprintf(res_attr_name, "resource%d", i);
489 res_attr->attr.name = res_attr_name;
1da177e4
LT
490 res_attr->attr.mode = S_IRUSR | S_IWUSR;
491 res_attr->attr.owner = THIS_MODULE;
d48593bf 492 res_attr->size = pci_resource_len(pdev, i);
1da177e4
LT
493 res_attr->mmap = pci_mmap_resource;
494 res_attr->private = &pdev->resource[i];
b19441af
GKH
495 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
496 if (retval) {
497 pci_remove_resource_files(pdev);
498 return retval;
499 }
500 } else {
501 return -ENOMEM;
1da177e4
LT
502 }
503 }
b19441af 504 return 0;
1da177e4
LT
505}
506#else /* !HAVE_PCI_MMAP */
b19441af 507static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
508static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
509#endif /* HAVE_PCI_MMAP */
510
511/**
512 * pci_write_rom - used to enable access to the PCI ROM display
513 * @kobj: kernel object handle
514 * @buf: user input
515 * @off: file offset
516 * @count: number of byte in input
517 *
518 * writing anything except 0 enables it
519 */
520static ssize_t
521pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
522{
523 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
524
525 if ((off == 0) && (*buf == '0') && (count == 2))
526 pdev->rom_attr_enabled = 0;
527 else
528 pdev->rom_attr_enabled = 1;
529
530 return count;
531}
532
533/**
534 * pci_read_rom - read a PCI ROM
535 * @kobj: kernel object handle
536 * @buf: where to put the data we read from the ROM
537 * @off: file offset
538 * @count: number of bytes to read
539 *
540 * Put @count bytes starting at @off into @buf from the ROM in the PCI
541 * device corresponding to @kobj.
542 */
543static ssize_t
544pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
545{
546 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
547 void __iomem *rom;
548 size_t size;
549
550 if (!pdev->rom_attr_enabled)
551 return -EINVAL;
552
553 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
554 if (!rom)
555 return 0;
556
557 if (off >= size)
558 count = 0;
559 else {
560 if (off + count > size)
561 count = size - off;
562
563 memcpy_fromio(buf, rom + off, count);
564 }
565 pci_unmap_rom(pdev, rom);
566
567 return count;
568}
569
570static struct bin_attribute pci_config_attr = {
571 .attr = {
572 .name = "config",
573 .mode = S_IRUGO | S_IWUSR,
574 .owner = THIS_MODULE,
575 },
576 .size = 256,
577 .read = pci_read_config,
578 .write = pci_write_config,
579};
580
581static struct bin_attribute pcie_config_attr = {
582 .attr = {
583 .name = "config",
584 .mode = S_IRUGO | S_IWUSR,
585 .owner = THIS_MODULE,
586 },
587 .size = 4096,
588 .read = pci_read_config,
589 .write = pci_write_config,
590};
591
b19441af 592int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 593{
b19441af
GKH
594 struct bin_attribute *rom_attr = NULL;
595 int retval;
596
1da177e4
LT
597 if (!sysfs_initialized)
598 return -EACCES;
599
600 if (pdev->cfg_size < 4096)
b19441af 601 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 602 else
b19441af
GKH
603 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
604 if (retval)
605 goto err;
1da177e4 606
b19441af
GKH
607 retval = pci_create_resource_files(pdev);
608 if (retval)
609 goto err_bin_file;
1da177e4
LT
610
611 /* If the device has a ROM, try to expose it in sysfs. */
612 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
f5afe806 613 rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
1da177e4 614 if (rom_attr) {
1da177e4
LT
615 pdev->rom_attr = rom_attr;
616 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
617 rom_attr->attr.name = "rom";
618 rom_attr->attr.mode = S_IRUSR;
619 rom_attr->attr.owner = THIS_MODULE;
620 rom_attr->read = pci_read_rom;
621 rom_attr->write = pci_write_rom;
b19441af
GKH
622 retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
623 if (retval)
624 goto err_rom;
625 } else {
626 retval = -ENOMEM;
627 goto err_bin_file;
1da177e4
LT
628 }
629 }
630 /* add platform-specific attributes */
631 pcibios_add_platform_entries(pdev);
b19441af 632
1da177e4 633 return 0;
b19441af
GKH
634
635err_rom:
636 kfree(rom_attr);
637err_bin_file:
638 if (pdev->cfg_size < 4096)
639 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
640 else
641 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
642err:
643 return retval;
1da177e4
LT
644}
645
646/**
647 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
648 * @pdev: device whose entries we should free
649 *
650 * Cleanup when @pdev is removed from sysfs.
651 */
652void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
653{
d67afe5e
DM
654 if (!sysfs_initialized)
655 return;
656
1da177e4
LT
657 if (pdev->cfg_size < 4096)
658 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
659 else
660 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
661
662 pci_remove_resource_files(pdev);
663
664 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
665 if (pdev->rom_attr) {
666 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
667 kfree(pdev->rom_attr);
668 }
669 }
670}
671
672static int __init pci_sysfs_init(void)
673{
674 struct pci_dev *pdev = NULL;
b19441af
GKH
675 int retval;
676
1da177e4 677 sysfs_initialized = 1;
b19441af
GKH
678 for_each_pci_dev(pdev) {
679 retval = pci_create_sysfs_dev_files(pdev);
680 if (retval)
681 return retval;
682 }
1da177e4
LT
683
684 return 0;
685}
686
687__initcall(pci_sysfs_init);