]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/pci/pci-sysfs.c
PCI: Make PCI_SCAN_ALL_PCIE_DEVS work for Root as well as Downstream Ports
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pci-sysfs.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * drivers/pci/pci-sysfs.c
4 *
5 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
6 * (C) Copyright 2002-2004 IBM Corp.
7 * (C) Copyright 2003 Matthew Wilcox
8 * (C) Copyright 2003 Hewlett-Packard
9 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
10 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
11 *
12 * File attributes for PCI devices
13 *
f7625980 14 * Modeled after usb's driverfs.c
1da177e4
LT
15 *
16 */
17
18
1da177e4 19#include <linux/kernel.h>
b5ff7df3 20#include <linux/sched.h>
1da177e4
LT
21#include <linux/pci.h>
22#include <linux/stat.h>
363c75db 23#include <linux/export.h>
1da177e4
LT
24#include <linux/topology.h>
25#include <linux/mm.h>
de139a33 26#include <linux/fs.h>
aa0ac365 27#include <linux/capability.h>
a628e7b8 28#include <linux/security.h>
7d715a6c 29#include <linux/pci-aspm.h>
5a0e3ad6 30#include <linux/slab.h>
1a39b310 31#include <linux/vgaarb.h>
448bd857 32#include <linux/pm_runtime.h>
dfc73e7a 33#include <linux/of.h>
1da177e4
LT
34#include "pci.h"
35
36static int sysfs_initialized; /* = 0 */
37
38/* show configuration fields */
39#define pci_config_attr(field, format_string) \
40static ssize_t \
e404e274 41field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
42{ \
43 struct pci_dev *pdev; \
44 \
3c78bc61
RD
45 pdev = to_pci_dev(dev); \
46 return sprintf(buf, format_string, pdev->field); \
5136b2da
GKH
47} \
48static DEVICE_ATTR_RO(field)
1da177e4
LT
49
50pci_config_attr(vendor, "0x%04x\n");
51pci_config_attr(device, "0x%04x\n");
52pci_config_attr(subsystem_vendor, "0x%04x\n");
53pci_config_attr(subsystem_device, "0x%04x\n");
702ed3be 54pci_config_attr(revision, "0x%02x\n");
1da177e4
LT
55pci_config_attr(class, "0x%06x\n");
56pci_config_attr(irq, "%u\n");
57
bdee9d98
DT
58static ssize_t broken_parity_status_show(struct device *dev,
59 struct device_attribute *attr,
60 char *buf)
61{
62 struct pci_dev *pdev = to_pci_dev(dev);
3c78bc61 63 return sprintf(buf, "%u\n", pdev->broken_parity_status);
bdee9d98
DT
64}
65
66static ssize_t broken_parity_status_store(struct device *dev,
67 struct device_attribute *attr,
68 const char *buf, size_t count)
69{
70 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 71 unsigned long val;
bdee9d98 72
9a994e8e 73 if (kstrtoul(buf, 0, &val) < 0)
92425a40
TP
74 return -EINVAL;
75
76 pdev->broken_parity_status = !!val;
77
78 return count;
bdee9d98 79}
5136b2da 80static DEVICE_ATTR_RW(broken_parity_status);
bdee9d98 81
5aaba363 82static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
3c78bc61 83 struct device_attribute *attr, char *buf)
c489f5fb 84{
3be83050 85 const struct cpumask *mask;
4327edf6 86
e0cd5160 87#ifdef CONFIG_NUMA
6be954d1
DJ
88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
89 cpumask_of_node(dev_to_node(dev));
e0cd5160 90#else
3be83050 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 92#endif
5aaba363 93 return cpumap_print_to_pagebuf(list, buf, mask);
39106dcf
MT
94}
95
c489f5fb 96static ssize_t local_cpus_show(struct device *dev,
3c78bc61 97 struct device_attribute *attr, char *buf)
c489f5fb 98{
5aaba363 99 return pci_dev_show_local_cpu(dev, false, attr, buf);
c489f5fb 100}
5136b2da 101static DEVICE_ATTR_RO(local_cpus);
39106dcf
MT
102
103static ssize_t local_cpulist_show(struct device *dev,
3c78bc61 104 struct device_attribute *attr, char *buf)
39106dcf 105{
5aaba363 106 return pci_dev_show_local_cpu(dev, true, attr, buf);
1da177e4 107}
5136b2da 108static DEVICE_ATTR_RO(local_cpulist);
1da177e4 109
dc2c2c9d
YL
110/*
111 * PCI Bus Class Devices
112 */
56039e65
GKH
113static ssize_t cpuaffinity_show(struct device *dev,
114 struct device_attribute *attr, char *buf)
dc2c2c9d 115{
5aaba363
SH
116 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
117
118 return cpumap_print_to_pagebuf(false, buf, cpumask);
dc2c2c9d 119}
56039e65 120static DEVICE_ATTR_RO(cpuaffinity);
dc2c2c9d 121
56039e65
GKH
122static ssize_t cpulistaffinity_show(struct device *dev,
123 struct device_attribute *attr, char *buf)
dc2c2c9d 124{
5aaba363
SH
125 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
126
127 return cpumap_print_to_pagebuf(true, buf, cpumask);
dc2c2c9d 128}
56039e65 129static DEVICE_ATTR_RO(cpulistaffinity);
dc2c2c9d 130
1da177e4 131/* show resources */
3c78bc61
RD
132static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
133 char *buf)
1da177e4 134{
3c78bc61
RD
135 struct pci_dev *pci_dev = to_pci_dev(dev);
136 char *str = buf;
1da177e4 137 int i;
fde09c6d 138 int max;
e31dd6e4 139 resource_size_t start, end;
1da177e4
LT
140
141 if (pci_dev->subordinate)
142 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
143 else
144 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
145
146 for (i = 0; i < max; i++) {
2311b1f2
ME
147 struct resource *res = &pci_dev->resource[i];
148 pci_resource_to_user(pci_dev, i, res, &start, &end);
3c78bc61 149 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
2311b1f2
ME
150 (unsigned long long)start,
151 (unsigned long long)end,
152 (unsigned long long)res->flags);
1da177e4
LT
153 }
154 return (str - buf);
155}
5136b2da 156static DEVICE_ATTR_RO(resource);
1da177e4 157
56c1af46
WVK
158static ssize_t max_link_speed_show(struct device *dev,
159 struct device_attribute *attr, char *buf)
160{
161 struct pci_dev *pci_dev = to_pci_dev(dev);
162 u32 linkcap;
163 int err;
164 const char *speed;
165
166 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
167 if (err)
168 return -EINVAL;
169
170 switch (linkcap & PCI_EXP_LNKCAP_SLS) {
171 case PCI_EXP_LNKCAP_SLS_8_0GB:
172 speed = "8 GT/s";
173 break;
174 case PCI_EXP_LNKCAP_SLS_5_0GB:
175 speed = "5 GT/s";
176 break;
177 case PCI_EXP_LNKCAP_SLS_2_5GB:
178 speed = "2.5 GT/s";
179 break;
180 default:
181 speed = "Unknown speed";
182 }
183
184 return sprintf(buf, "%s\n", speed);
185}
186static DEVICE_ATTR_RO(max_link_speed);
187
188static ssize_t max_link_width_show(struct device *dev,
189 struct device_attribute *attr, char *buf)
190{
191 struct pci_dev *pci_dev = to_pci_dev(dev);
192 u32 linkcap;
193 int err;
194
195 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
196 if (err)
197 return -EINVAL;
198
199 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4);
200}
201static DEVICE_ATTR_RO(max_link_width);
202
203static ssize_t current_link_speed_show(struct device *dev,
204 struct device_attribute *attr, char *buf)
205{
206 struct pci_dev *pci_dev = to_pci_dev(dev);
207 u16 linkstat;
208 int err;
209 const char *speed;
210
211 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
212 if (err)
213 return -EINVAL;
214
215 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
216 case PCI_EXP_LNKSTA_CLS_8_0GB:
217 speed = "8 GT/s";
218 break;
219 case PCI_EXP_LNKSTA_CLS_5_0GB:
220 speed = "5 GT/s";
221 break;
222 case PCI_EXP_LNKSTA_CLS_2_5GB:
223 speed = "2.5 GT/s";
224 break;
225 default:
226 speed = "Unknown speed";
227 }
228
229 return sprintf(buf, "%s\n", speed);
230}
231static DEVICE_ATTR_RO(current_link_speed);
232
233static ssize_t current_link_width_show(struct device *dev,
234 struct device_attribute *attr, char *buf)
235{
236 struct pci_dev *pci_dev = to_pci_dev(dev);
237 u16 linkstat;
238 int err;
239
240 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
241 if (err)
242 return -EINVAL;
243
244 return sprintf(buf, "%u\n",
245 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
246}
247static DEVICE_ATTR_RO(current_link_width);
248
249static ssize_t secondary_bus_number_show(struct device *dev,
250 struct device_attribute *attr,
251 char *buf)
252{
253 struct pci_dev *pci_dev = to_pci_dev(dev);
254 u8 sec_bus;
255 int err;
256
257 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
258 if (err)
259 return -EINVAL;
260
261 return sprintf(buf, "%u\n", sec_bus);
262}
263static DEVICE_ATTR_RO(secondary_bus_number);
264
265static ssize_t subordinate_bus_number_show(struct device *dev,
266 struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270 u8 sub_bus;
271 int err;
272
273 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
274 if (err)
275 return -EINVAL;
276
277 return sprintf(buf, "%u\n", sub_bus);
278}
279static DEVICE_ATTR_RO(subordinate_bus_number);
280
3c78bc61
RD
281static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
282 char *buf)
9888549e
GKH
283{
284 struct pci_dev *pci_dev = to_pci_dev(dev);
285
89ec3dcf 286 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
9888549e
GKH
287 pci_dev->vendor, pci_dev->device,
288 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
289 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
290 (u8)(pci_dev->class));
291}
5136b2da 292static DEVICE_ATTR_RO(modalias);
bae94d02 293
d8e7d53a 294static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
3c78bc61 295 const char *buf, size_t count)
9f125d30
AV
296{
297 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 298 unsigned long val;
9a994e8e 299 ssize_t result = kstrtoul(buf, 0, &val);
92425a40
TP
300
301 if (result < 0)
302 return result;
9f125d30
AV
303
304 /* this can crash the machine when done on the "wrong" device */
305 if (!capable(CAP_SYS_ADMIN))
92425a40 306 return -EPERM;
9f125d30 307
92425a40 308 if (!val) {
296ccb08 309 if (pci_is_enabled(pdev))
bae94d02
IPG
310 pci_disable_device(pdev);
311 else
312 result = -EIO;
92425a40 313 } else
bae94d02 314 result = pci_enable_device(pdev);
9f125d30 315
bae94d02
IPG
316 return result < 0 ? result : count;
317}
318
d8e7d53a 319static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
3c78bc61 320 char *buf)
bae94d02
IPG
321{
322 struct pci_dev *pdev;
9f125d30 323
3c78bc61
RD
324 pdev = to_pci_dev(dev);
325 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30 326}
d8e7d53a 327static DEVICE_ATTR_RW(enable);
9f125d30 328
81bb0e19 329#ifdef CONFIG_NUMA
63692df1
PB
330static ssize_t numa_node_store(struct device *dev,
331 struct device_attribute *attr, const char *buf,
332 size_t count)
333{
334 struct pci_dev *pdev = to_pci_dev(dev);
335 int node, ret;
336
337 if (!capable(CAP_SYS_ADMIN))
338 return -EPERM;
339
340 ret = kstrtoint(buf, 0, &node);
341 if (ret)
342 return ret;
343
3dcc8d39
MK
344 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
345 return -EINVAL;
346
347 if (node != NUMA_NO_NODE && !node_online(node))
63692df1
PB
348 return -EINVAL;
349
350 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
351 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
352 node);
353
354 dev->numa_node = node;
355 return count;
356}
357
3c78bc61
RD
358static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
359 char *buf)
81bb0e19 360{
3c78bc61 361 return sprintf(buf, "%d\n", dev->numa_node);
81bb0e19 362}
63692df1 363static DEVICE_ATTR_RW(numa_node);
81bb0e19
BG
364#endif
365
3c78bc61
RD
366static ssize_t dma_mask_bits_show(struct device *dev,
367 struct device_attribute *attr, char *buf)
bb965401
YL
368{
369 struct pci_dev *pdev = to_pci_dev(dev);
370
3c78bc61 371 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
bb965401 372}
5136b2da 373static DEVICE_ATTR_RO(dma_mask_bits);
bb965401 374
3c78bc61
RD
375static ssize_t consistent_dma_mask_bits_show(struct device *dev,
376 struct device_attribute *attr,
377 char *buf)
bb965401 378{
3c78bc61 379 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
bb965401 380}
5136b2da 381static DEVICE_ATTR_RO(consistent_dma_mask_bits);
bb965401 382
3c78bc61
RD
383static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
384 char *buf)
fe97064c
BG
385{
386 struct pci_dev *pdev = to_pci_dev(dev);
468ff15a 387 struct pci_bus *subordinate = pdev->subordinate;
fe97064c 388
468ff15a
YW
389 return sprintf(buf, "%u\n", subordinate ?
390 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
391 : !pdev->no_msi);
fe97064c
BG
392}
393
3c78bc61
RD
394static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
395 const char *buf, size_t count)
fe97064c
BG
396{
397 struct pci_dev *pdev = to_pci_dev(dev);
468ff15a 398 struct pci_bus *subordinate = pdev->subordinate;
92425a40
TP
399 unsigned long val;
400
9a994e8e 401 if (kstrtoul(buf, 0, &val) < 0)
92425a40 402 return -EINVAL;
fe97064c 403
fe97064c 404 if (!capable(CAP_SYS_ADMIN))
92425a40 405 return -EPERM;
fe97064c 406
f7625980 407 /*
468ff15a
YW
408 * "no_msi" and "bus_flags" only affect what happens when a driver
409 * requests MSI or MSI-X. They don't affect any drivers that have
410 * already requested MSI or MSI-X.
f7625980 411 */
468ff15a
YW
412 if (!subordinate) {
413 pdev->no_msi = !val;
414 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
415 val ? "allowed" : "disallowed");
fe97064c 416 return count;
fe97064c
BG
417 }
418
468ff15a
YW
419 if (val)
420 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
421 else
422 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
423
424 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
425 val ? "allowed" : "disallowed");
fe97064c
BG
426 return count;
427}
5136b2da 428static DEVICE_ATTR_RW(msi_bus);
9888549e 429
705b1aaa
AC
430static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
431 size_t count)
432{
433 unsigned long val;
434 struct pci_bus *b = NULL;
435
9a994e8e 436 if (kstrtoul(buf, 0, &val) < 0)
705b1aaa
AC
437 return -EINVAL;
438
439 if (val) {
9d16947b 440 pci_lock_rescan_remove();
705b1aaa
AC
441 while ((b = pci_find_next_bus(b)) != NULL)
442 pci_rescan_bus(b);
9d16947b 443 pci_unlock_rescan_remove();
705b1aaa
AC
444 }
445 return count;
446}
0f49ba55 447static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
705b1aaa 448
bf22c90f 449static struct attribute *pci_bus_attrs[] = {
0f49ba55
GKH
450 &bus_attr_rescan.attr,
451 NULL,
452};
453
454static const struct attribute_group pci_bus_group = {
455 .attrs = pci_bus_attrs,
456};
457
458const struct attribute_group *pci_bus_groups[] = {
459 &pci_bus_group,
460 NULL,
705b1aaa 461};
77c27c7b 462
3c78bc61
RD
463static ssize_t dev_rescan_store(struct device *dev,
464 struct device_attribute *attr, const char *buf,
465 size_t count)
738a6396
AC
466{
467 unsigned long val;
468 struct pci_dev *pdev = to_pci_dev(dev);
469
9a994e8e 470 if (kstrtoul(buf, 0, &val) < 0)
738a6396
AC
471 return -EINVAL;
472
473 if (val) {
9d16947b 474 pci_lock_rescan_remove();
738a6396 475 pci_rescan_bus(pdev->bus);
9d16947b 476 pci_unlock_rescan_remove();
738a6396
AC
477 }
478 return count;
479}
bf22c90f
SK
480static struct device_attribute dev_rescan_attr = __ATTR(rescan,
481 (S_IWUSR|S_IWGRP),
482 NULL, dev_rescan_store);
738a6396 483
3c78bc61
RD
484static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
485 const char *buf, size_t count)
77c27c7b 486{
77c27c7b 487 unsigned long val;
77c27c7b 488
9a994e8e 489 if (kstrtoul(buf, 0, &val) < 0)
77c27c7b
AC
490 return -EINVAL;
491
bc6caf02
TH
492 if (val && device_remove_file_self(dev, attr))
493 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
77c27c7b
AC
494 return count;
495}
bf22c90f
SK
496static struct device_attribute dev_remove_attr = __ATTR(remove,
497 (S_IWUSR|S_IWGRP),
498 NULL, remove_store);
b9d320fc 499
3c78bc61
RD
500static ssize_t dev_bus_rescan_store(struct device *dev,
501 struct device_attribute *attr,
502 const char *buf, size_t count)
b9d320fc
YL
503{
504 unsigned long val;
505 struct pci_bus *bus = to_pci_bus(dev);
506
9a994e8e 507 if (kstrtoul(buf, 0, &val) < 0)
b9d320fc
YL
508 return -EINVAL;
509
510 if (val) {
9d16947b 511 pci_lock_rescan_remove();
2f320521
YL
512 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
513 pci_rescan_bus_bridge_resize(bus->self);
514 else
515 pci_rescan_bus(bus);
9d16947b 516 pci_unlock_rescan_remove();
b9d320fc
YL
517 }
518 return count;
519}
56039e65 520static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
b9d320fc 521
fbb988be 522#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
448bd857
HY
523static ssize_t d3cold_allowed_store(struct device *dev,
524 struct device_attribute *attr,
525 const char *buf, size_t count)
526{
527 struct pci_dev *pdev = to_pci_dev(dev);
528 unsigned long val;
529
9a994e8e 530 if (kstrtoul(buf, 0, &val) < 0)
448bd857
HY
531 return -EINVAL;
532
533 pdev->d3cold_allowed = !!val;
9d26d3a8
MW
534 if (pdev->d3cold_allowed)
535 pci_d3cold_enable(pdev);
536 else
537 pci_d3cold_disable(pdev);
538
448bd857
HY
539 pm_runtime_resume(dev);
540
541 return count;
542}
543
544static ssize_t d3cold_allowed_show(struct device *dev,
545 struct device_attribute *attr, char *buf)
546{
547 struct pci_dev *pdev = to_pci_dev(dev);
3c78bc61 548 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
448bd857 549}
5136b2da 550static DEVICE_ATTR_RW(d3cold_allowed);
448bd857
HY
551#endif
552
dfc73e7a
SO
553#ifdef CONFIG_OF
554static ssize_t devspec_show(struct device *dev,
555 struct device_attribute *attr, char *buf)
556{
557 struct pci_dev *pdev = to_pci_dev(dev);
558 struct device_node *np = pci_device_to_OF_node(pdev);
559
b63773a8 560 if (np == NULL)
dfc73e7a 561 return 0;
b63773a8 562 return sprintf(buf, "%pOF", np);
dfc73e7a
SO
563}
564static DEVICE_ATTR_RO(devspec);
565#endif
566
1789382a
DD
567#ifdef CONFIG_PCI_IOV
568static ssize_t sriov_totalvfs_show(struct device *dev,
569 struct device_attribute *attr,
570 char *buf)
571{
572 struct pci_dev *pdev = to_pci_dev(dev);
573
bff73156 574 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
1789382a
DD
575}
576
577
578static ssize_t sriov_numvfs_show(struct device *dev,
579 struct device_attribute *attr,
580 char *buf)
581{
582 struct pci_dev *pdev = to_pci_dev(dev);
583
6b136724 584 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
1789382a
DD
585}
586
587/*
faa48a50
BH
588 * num_vfs > 0; number of VFs to enable
589 * num_vfs = 0; disable all VFs
1789382a
DD
590 *
591 * Note: SRIOV spec doesn't allow partial VF
faa48a50 592 * disable, so it's all or none.
1789382a
DD
593 */
594static ssize_t sriov_numvfs_store(struct device *dev,
595 struct device_attribute *attr,
596 const char *buf, size_t count)
597{
598 struct pci_dev *pdev = to_pci_dev(dev);
faa48a50
BH
599 int ret;
600 u16 num_vfs;
1789382a 601
faa48a50
BH
602 ret = kstrtou16(buf, 0, &num_vfs);
603 if (ret < 0)
604 return ret;
605
606 if (num_vfs > pci_sriov_get_totalvfs(pdev))
607 return -ERANGE;
608
17530e71 609 device_lock(&pdev->dev);
5b0948df 610
faa48a50 611 if (num_vfs == pdev->sriov->num_VFs)
5b0948df 612 goto exit;
1789382a
DD
613
614 /* is PF driver loaded w/callback */
615 if (!pdev->driver || !pdev->driver->sriov_configure) {
faa48a50 616 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
5b0948df
ET
617 ret = -ENOENT;
618 goto exit;
1789382a
DD
619 }
620
faa48a50
BH
621 if (num_vfs == 0) {
622 /* disable VFs */
623 ret = pdev->driver->sriov_configure(pdev, 0);
5b0948df 624 goto exit;
1789382a
DD
625 }
626
faa48a50
BH
627 /* enable VFs */
628 if (pdev->sriov->num_VFs) {
629 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
630 pdev->sriov->num_VFs, num_vfs);
5b0948df
ET
631 ret = -EBUSY;
632 goto exit;
1789382a
DD
633 }
634
faa48a50
BH
635 ret = pdev->driver->sriov_configure(pdev, num_vfs);
636 if (ret < 0)
5b0948df 637 goto exit;
1789382a 638
faa48a50
BH
639 if (ret != num_vfs)
640 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
641 num_vfs, ret);
642
5b0948df 643exit:
17530e71 644 device_unlock(&pdev->dev);
5b0948df
ET
645
646 if (ret < 0)
647 return ret;
648
faa48a50 649 return count;
1789382a
DD
650}
651
7dfca152
FS
652static ssize_t sriov_offset_show(struct device *dev,
653 struct device_attribute *attr,
654 char *buf)
655{
656 struct pci_dev *pdev = to_pci_dev(dev);
657
658 return sprintf(buf, "%u\n", pdev->sriov->offset);
659}
660
661static ssize_t sriov_stride_show(struct device *dev,
662 struct device_attribute *attr,
663 char *buf)
664{
665 struct pci_dev *pdev = to_pci_dev(dev);
666
667 return sprintf(buf, "%u\n", pdev->sriov->stride);
668}
669
670static ssize_t sriov_vf_device_show(struct device *dev,
671 struct device_attribute *attr,
672 char *buf)
673{
674 struct pci_dev *pdev = to_pci_dev(dev);
675
676 return sprintf(buf, "%x\n", pdev->sriov->vf_device);
677}
678
0e7df224
BW
679static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682{
683 struct pci_dev *pdev = to_pci_dev(dev);
684
685 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
686}
687
688static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
689 struct device_attribute *attr,
690 const char *buf, size_t count)
691{
692 struct pci_dev *pdev = to_pci_dev(dev);
693 bool drivers_autoprobe;
694
695 if (kstrtobool(buf, &drivers_autoprobe) < 0)
696 return -EINVAL;
697
698 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
699
700 return count;
701}
702
1789382a
DD
703static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
704static struct device_attribute sriov_numvfs_attr =
705 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
706 sriov_numvfs_show, sriov_numvfs_store);
7dfca152
FS
707static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
708static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
709static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
0e7df224
BW
710static struct device_attribute sriov_drivers_autoprobe_attr =
711 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
712 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
1789382a
DD
713#endif /* CONFIG_PCI_IOV */
714
782a985d
AW
715static ssize_t driver_override_store(struct device *dev,
716 struct device_attribute *attr,
717 const char *buf, size_t count)
718{
719 struct pci_dev *pdev = to_pci_dev(dev);
9561475d 720 char *driver_override, *old, *cp;
782a985d 721
4efe874a
SL
722 /* We need to keep extra room for a newline */
723 if (count >= (PAGE_SIZE - 1))
782a985d
AW
724 return -EINVAL;
725
726 driver_override = kstrndup(buf, count, GFP_KERNEL);
727 if (!driver_override)
728 return -ENOMEM;
729
730 cp = strchr(driver_override, '\n');
731 if (cp)
732 *cp = '\0';
733
9561475d
NS
734 device_lock(dev);
735 old = pdev->driver_override;
782a985d
AW
736 if (strlen(driver_override)) {
737 pdev->driver_override = driver_override;
738 } else {
739 kfree(driver_override);
740 pdev->driver_override = NULL;
741 }
9561475d 742 device_unlock(dev);
782a985d
AW
743
744 kfree(old);
745
746 return count;
747}
748
749static ssize_t driver_override_show(struct device *dev,
750 struct device_attribute *attr, char *buf)
751{
752 struct pci_dev *pdev = to_pci_dev(dev);
9561475d 753 ssize_t len;
782a985d 754
9561475d
NS
755 device_lock(dev);
756 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
757 device_unlock(dev);
758 return len;
782a985d
AW
759}
760static DEVICE_ATTR_RW(driver_override);
761
bf22c90f 762static struct attribute *pci_dev_attrs[] = {
5136b2da
GKH
763 &dev_attr_resource.attr,
764 &dev_attr_vendor.attr,
765 &dev_attr_device.attr,
766 &dev_attr_subsystem_vendor.attr,
767 &dev_attr_subsystem_device.attr,
702ed3be 768 &dev_attr_revision.attr,
5136b2da
GKH
769 &dev_attr_class.attr,
770 &dev_attr_irq.attr,
771 &dev_attr_local_cpus.attr,
772 &dev_attr_local_cpulist.attr,
773 &dev_attr_modalias.attr,
81bb0e19 774#ifdef CONFIG_NUMA
5136b2da 775 &dev_attr_numa_node.attr,
81bb0e19 776#endif
5136b2da
GKH
777 &dev_attr_dma_mask_bits.attr,
778 &dev_attr_consistent_dma_mask_bits.attr,
d8e7d53a 779 &dev_attr_enable.attr,
5136b2da
GKH
780 &dev_attr_broken_parity_status.attr,
781 &dev_attr_msi_bus.attr,
fbb988be 782#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
5136b2da 783 &dev_attr_d3cold_allowed.attr,
dfc73e7a
SO
784#endif
785#ifdef CONFIG_OF
786 &dev_attr_devspec.attr,
77c27c7b 787#endif
782a985d 788 &dev_attr_driver_override.attr,
5136b2da
GKH
789 NULL,
790};
791
56c1af46
WVK
792static struct attribute *pci_bridge_attrs[] = {
793 &dev_attr_subordinate_bus_number.attr,
794 &dev_attr_secondary_bus_number.attr,
795 NULL,
5136b2da
GKH
796};
797
56c1af46
WVK
798static struct attribute *pcie_dev_attrs[] = {
799 &dev_attr_current_link_speed.attr,
800 &dev_attr_current_link_width.attr,
801 &dev_attr_max_link_width.attr,
802 &dev_attr_max_link_speed.attr,
5136b2da 803 NULL,
1da177e4
LT
804};
805
56039e65
GKH
806static struct attribute *pcibus_attrs[] = {
807 &dev_attr_rescan.attr,
808 &dev_attr_cpuaffinity.attr,
809 &dev_attr_cpulistaffinity.attr,
810 NULL,
811};
812
813static const struct attribute_group pcibus_group = {
814 .attrs = pcibus_attrs,
815};
816
817const struct attribute_group *pcibus_groups[] = {
818 &pcibus_group,
819 NULL,
b9d320fc
YL
820};
821
3c78bc61
RD
822static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
823 char *buf)
217f45de
DA
824{
825 struct pci_dev *pdev = to_pci_dev(dev);
1a39b310
MG
826 struct pci_dev *vga_dev = vga_default_device();
827
828 if (vga_dev)
829 return sprintf(buf, "%u\n", (pdev == vga_dev));
217f45de
DA
830
831 return sprintf(buf, "%u\n",
832 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
833 IORESOURCE_ROM_SHADOW));
834}
bf22c90f 835static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
217f45de 836
3c78bc61
RD
837static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
838 struct bin_attribute *bin_attr, char *buf,
839 loff_t off, size_t count)
1da177e4 840{
554a6037 841 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
842 unsigned int size = 64;
843 loff_t init_off = off;
3c78bc61 844 u8 *data = (u8 *) buf;
1da177e4
LT
845
846 /* Several chips lock up trying to read undefined config space */
ab0fa82b 847 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
1da177e4 848 size = dev->cfg_size;
3c78bc61 849 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1da177e4 850 size = 128;
1da177e4
LT
851
852 if (off > size)
853 return 0;
854 if (off + count > size) {
855 size -= off;
856 count = size;
857 } else {
858 size = count;
859 }
860
3d8387ef
HY
861 pci_config_pm_runtime_get(dev);
862
4c0619ad
SS
863 if ((off & 1) && size) {
864 u8 val;
e04b0ea2 865 pci_user_read_config_byte(dev, off, &val);
4c0619ad 866 data[off - init_off] = val;
1da177e4 867 off++;
4c0619ad
SS
868 size--;
869 }
870
871 if ((off & 3) && size > 2) {
872 u16 val;
e04b0ea2 873 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
874 data[off - init_off] = val & 0xff;
875 data[off - init_off + 1] = (val >> 8) & 0xff;
876 off += 2;
877 size -= 2;
1da177e4
LT
878 }
879
880 while (size > 3) {
4c0619ad 881 u32 val;
e04b0ea2 882 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
883 data[off - init_off] = val & 0xff;
884 data[off - init_off + 1] = (val >> 8) & 0xff;
885 data[off - init_off + 2] = (val >> 16) & 0xff;
886 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
887 off += 4;
888 size -= 4;
889 }
890
4c0619ad
SS
891 if (size >= 2) {
892 u16 val;
e04b0ea2 893 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
894 data[off - init_off] = val & 0xff;
895 data[off - init_off + 1] = (val >> 8) & 0xff;
896 off += 2;
897 size -= 2;
898 }
899
900 if (size > 0) {
901 u8 val;
e04b0ea2 902 pci_user_read_config_byte(dev, off, &val);
4c0619ad 903 data[off - init_off] = val;
1da177e4
LT
904 off++;
905 --size;
906 }
907
3d8387ef
HY
908 pci_config_pm_runtime_put(dev);
909
1da177e4
LT
910 return count;
911}
912
3c78bc61
RD
913static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
914 struct bin_attribute *bin_attr, char *buf,
915 loff_t off, size_t count)
1da177e4 916{
554a6037 917 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
918 unsigned int size = count;
919 loff_t init_off = off;
3c78bc61 920 u8 *data = (u8 *) buf;
1da177e4 921
cf53ecd8
MG
922 if (kernel_is_locked_down("Direct PCI access"))
923 return -EPERM;
924
1da177e4
LT
925 if (off > dev->cfg_size)
926 return 0;
927 if (off + count > dev->cfg_size) {
928 size = dev->cfg_size - off;
929 count = size;
930 }
f7625980 931
3d8387ef
HY
932 pci_config_pm_runtime_get(dev);
933
4c0619ad 934 if ((off & 1) && size) {
e04b0ea2 935 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 936 off++;
4c0619ad 937 size--;
1da177e4 938 }
f7625980 939
4c0619ad
SS
940 if ((off & 3) && size > 2) {
941 u16 val = data[off - init_off];
942 val |= (u16) data[off - init_off + 1] << 8;
3c78bc61
RD
943 pci_user_write_config_word(dev, off, val);
944 off += 2;
945 size -= 2;
946 }
1da177e4
LT
947
948 while (size > 3) {
4c0619ad
SS
949 u32 val = data[off - init_off];
950 val |= (u32) data[off - init_off + 1] << 8;
951 val |= (u32) data[off - init_off + 2] << 16;
952 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 953 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
954 off += 4;
955 size -= 4;
956 }
f7625980 957
4c0619ad
SS
958 if (size >= 2) {
959 u16 val = data[off - init_off];
960 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 961 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
962 off += 2;
963 size -= 2;
964 }
1da177e4 965
4c0619ad 966 if (size) {
e04b0ea2 967 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
968 off++;
969 --size;
970 }
971
3d8387ef
HY
972 pci_config_pm_runtime_put(dev);
973
1da177e4
LT
974 return count;
975}
976
3c78bc61
RD
977static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
978 struct bin_attribute *bin_attr, char *buf,
979 loff_t off, size_t count)
94e61088 980{
554a6037 981 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
94e61088 982
f52e5629
HR
983 if (bin_attr->size > 0) {
984 if (off > bin_attr->size)
985 count = 0;
986 else if (count > bin_attr->size - off)
987 count = bin_attr->size - off;
988 }
94e61088 989
287d19ce 990 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
991}
992
3c78bc61
RD
993static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
994 struct bin_attribute *bin_attr, char *buf,
995 loff_t off, size_t count)
94e61088 996{
554a6037 997 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
94e61088 998
f52e5629
HR
999 if (bin_attr->size > 0) {
1000 if (off > bin_attr->size)
1001 count = 0;
1002 else if (count > bin_attr->size - off)
1003 count = bin_attr->size - off;
1004 }
94e61088 1005
287d19ce 1006 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
1007}
1008
1da177e4
LT
1009#ifdef HAVE_PCI_LEGACY
1010/**
1011 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 1012 * @filp: open sysfs file
1da177e4 1013 * @kobj: kobject corresponding to file to read from
cffb2faf 1014 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1015 * @buf: buffer to store results
1016 * @off: offset into legacy I/O port space
1017 * @count: number of bytes to read
1018 *
1019 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1020 * callback routine (pci_legacy_read).
1021 */
3c78bc61
RD
1022static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
1023 struct bin_attribute *bin_attr, char *buf,
1024 loff_t off, size_t count)
1da177e4 1025{
554a6037 1026 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1027
3c78bc61
RD
1028 /* Only support 1, 2 or 4 byte accesses */
1029 if (count != 1 && count != 2 && count != 4)
1030 return -EINVAL;
1da177e4 1031
3c78bc61 1032 return pci_legacy_read(bus, off, (u32 *)buf, count);
1da177e4
LT
1033}
1034
1035/**
1036 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 1037 * @filp: open sysfs file
1da177e4 1038 * @kobj: kobject corresponding to file to read from
cffb2faf 1039 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1040 * @buf: buffer containing value to be written
1041 * @off: offset into legacy I/O port space
1042 * @count: number of bytes to write
1043 *
1044 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1045 * callback routine (pci_legacy_write).
1046 */
3c78bc61
RD
1047static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
1048 struct bin_attribute *bin_attr, char *buf,
1049 loff_t off, size_t count)
1da177e4 1050{
554a6037 1051 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1052
3c78bc61
RD
1053 /* Only support 1, 2 or 4 byte accesses */
1054 if (count != 1 && count != 2 && count != 4)
1055 return -EINVAL;
1056
1057 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1da177e4
LT
1058}
1059
1060/**
1061 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 1062 * @filp: open sysfs file
1da177e4
LT
1063 * @kobj: kobject corresponding to device to be mapped
1064 * @attr: struct bin_attribute for this file
1065 * @vma: struct vm_area_struct passed to mmap
1066 *
f19aeb1f 1067 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
1068 * legacy memory space (first meg of bus space) into application virtual
1069 * memory space.
1070 */
3c78bc61
RD
1071static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1072 struct bin_attribute *attr,
1073 struct vm_area_struct *vma)
1da177e4 1074{
554a6037 1075 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1076
3c78bc61 1077 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
f19aeb1f
BH
1078}
1079
1080/**
1081 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 1082 * @filp: open sysfs file
f19aeb1f
BH
1083 * @kobj: kobject corresponding to device to be mapped
1084 * @attr: struct bin_attribute for this file
1085 * @vma: struct vm_area_struct passed to mmap
1086 *
1087 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1088 * legacy IO space (first meg of bus space) into application virtual
1089 * memory space. Returns -ENOSYS if the operation isn't supported
1090 */
3c78bc61
RD
1091static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1092 struct bin_attribute *attr,
1093 struct vm_area_struct *vma)
f19aeb1f 1094{
554a6037 1095 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
f19aeb1f 1096
3c78bc61 1097 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
f19aeb1f
BH
1098}
1099
10a0ef39
IK
1100/**
1101 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1102 * @b: bus to create files under
1103 * @mmap_type: I/O port or memory
1104 *
1105 * Stub implementation. Can be overridden by arch if necessary.
1106 */
3c78bc61
RD
1107void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1108 enum pci_mmap_state mmap_type)
10a0ef39 1109{
10a0ef39
IK
1110}
1111
f19aeb1f
BH
1112/**
1113 * pci_create_legacy_files - create legacy I/O port and memory files
1114 * @b: bus to create files under
1115 *
1116 * Some platforms allow access to legacy I/O port and ISA memory space on
1117 * a per-bus basis. This routine creates the files and ties them into
1118 * their associated read, write and mmap files from pci-sysfs.c
1119 *
25985edc 1120 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
1121 * as it is ok to set up the PCI bus without these files.
1122 */
1123void pci_create_legacy_files(struct pci_bus *b)
1124{
1125 int error;
1126
1127 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
1128 GFP_ATOMIC);
1129 if (!b->legacy_io)
1130 goto kzalloc_err;
1131
62e877b8 1132 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
1133 b->legacy_io->attr.name = "legacy_io";
1134 b->legacy_io->size = 0xffff;
1135 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1136 b->legacy_io->read = pci_read_legacy_io;
1137 b->legacy_io->write = pci_write_legacy_io;
1138 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 1139 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
1140 error = device_create_bin_file(&b->dev, b->legacy_io);
1141 if (error)
1142 goto legacy_io_err;
1143
1144 /* Allocated above after the legacy_io struct */
1145 b->legacy_mem = b->legacy_io + 1;
6757eca3 1146 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
1147 b->legacy_mem->attr.name = "legacy_mem";
1148 b->legacy_mem->size = 1024*1024;
1149 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1150 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 1151 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
1152 error = device_create_bin_file(&b->dev, b->legacy_mem);
1153 if (error)
1154 goto legacy_mem_err;
1155
1156 return;
1157
1158legacy_mem_err:
1159 device_remove_bin_file(&b->dev, b->legacy_io);
1160legacy_io_err:
1161 kfree(b->legacy_io);
1162 b->legacy_io = NULL;
1163kzalloc_err:
227f0647 1164 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
f19aeb1f
BH
1165 return;
1166}
1167
1168void pci_remove_legacy_files(struct pci_bus *b)
1169{
1170 if (b->legacy_io) {
1171 device_remove_bin_file(&b->dev, b->legacy_io);
1172 device_remove_bin_file(&b->dev, b->legacy_mem);
1173 kfree(b->legacy_io); /* both are allocated here */
1174 }
1da177e4
LT
1175}
1176#endif /* HAVE_PCI_LEGACY */
1177
f7195824 1178#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
b5ff7df3 1179
3b519e4e
MW
1180int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1181 enum pci_mmap_api mmap_api)
b5ff7df3 1182{
6bccc7f4
DW
1183 unsigned long nr, start, size;
1184 resource_size_t pci_start = 0, pci_end;
b5ff7df3 1185
3b519e4e
MW
1186 if (pci_resource_len(pdev, resno) == 0)
1187 return 0;
64b00175 1188 nr = vma_pages(vma);
b5ff7df3 1189 start = vma->vm_pgoff;
88e7df0b 1190 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
6bccc7f4
DW
1191 if (mmap_api == PCI_MMAP_PROCFS) {
1192 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1193 &pci_start, &pci_end);
1194 pci_start >>= PAGE_SHIFT;
1195 }
3b519e4e
MW
1196 if (start >= pci_start && start < pci_start + size &&
1197 start + nr <= pci_start + size)
b5ff7df3 1198 return 1;
b5ff7df3
LT
1199 return 0;
1200}
1201
1da177e4
LT
1202/**
1203 * pci_mmap_resource - map a PCI resource into user memory space
1204 * @kobj: kobject for mapping
1205 * @attr: struct bin_attribute for the file being mapped
1206 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 1207 * @write_combine: 1 for write_combine mapping
1da177e4
LT
1208 *
1209 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4 1210 */
3c78bc61
RD
1211static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1212 struct vm_area_struct *vma, int write_combine)
1da177e4 1213{
554a6037 1214 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
dca40b18 1215 int bar = (unsigned long)attr->private;
1da177e4 1216 enum pci_mmap_state mmap_type;
dca40b18 1217 struct resource *res = &pdev->resource[bar];
2311b1f2 1218
cf53ecd8
MG
1219 if (kernel_is_locked_down("Direct PCI access"))
1220 return -EPERM;
1221
ca620723
BH
1222 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1223 return -EINVAL;
1224
dca40b18 1225 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) {
227f0647 1226 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
3b519e4e 1227 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
dca40b18
DW
1228 pci_name(pdev), bar,
1229 (u64)pci_resource_start(pdev, bar),
1230 (u64)pci_resource_len(pdev, bar));
b5ff7df3 1231 return -EINVAL;
3b519e4e 1232 }
1da177e4 1233 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
f7195824
DW
1234
1235 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
45aec1ae 1236}
1237
3c78bc61
RD
1238static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1239 struct bin_attribute *attr,
1240 struct vm_area_struct *vma)
45aec1ae 1241{
1242 return pci_mmap_resource(kobj, attr, vma, 0);
1243}
1244
3c78bc61
RD
1245static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1246 struct bin_attribute *attr,
1247 struct vm_area_struct *vma)
45aec1ae 1248{
1249 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
1250}
1251
3c78bc61
RD
1252static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1253 struct bin_attribute *attr, char *buf,
1254 loff_t off, size_t count, bool write)
8633328b 1255{
554a6037 1256 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
dca40b18 1257 int bar = (unsigned long)attr->private;
8633328b 1258 unsigned long port = off;
8633328b 1259
dca40b18 1260 port += pci_resource_start(pdev, bar);
8633328b 1261
dca40b18 1262 if (port > pci_resource_end(pdev, bar))
8633328b
AW
1263 return 0;
1264
dca40b18 1265 if (port + count - 1 > pci_resource_end(pdev, bar))
8633328b
AW
1266 return -EINVAL;
1267
1268 switch (count) {
1269 case 1:
1270 if (write)
1271 outb(*(u8 *)buf, port);
1272 else
1273 *(u8 *)buf = inb(port);
1274 return 1;
1275 case 2:
1276 if (write)
1277 outw(*(u16 *)buf, port);
1278 else
1279 *(u16 *)buf = inw(port);
1280 return 2;
1281 case 4:
1282 if (write)
1283 outl(*(u32 *)buf, port);
1284 else
1285 *(u32 *)buf = inl(port);
1286 return 4;
1287 }
1288 return -EINVAL;
1289}
1290
3c78bc61
RD
1291static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1292 struct bin_attribute *attr, char *buf,
1293 loff_t off, size_t count)
8633328b
AW
1294{
1295 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1296}
1297
3c78bc61
RD
1298static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1299 struct bin_attribute *attr, char *buf,
1300 loff_t off, size_t count)
8633328b 1301{
cf53ecd8
MG
1302 if (kernel_is_locked_down("Direct PCI access"))
1303 return -EPERM;
1304
8633328b
AW
1305 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1306}
1307
b19441af
GKH
1308/**
1309 * pci_remove_resource_files - cleanup resource files
cffb2faf 1310 * @pdev: dev to cleanup
b19441af 1311 *
cffb2faf 1312 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
1313 * free their resources.
1314 */
3c78bc61 1315static void pci_remove_resource_files(struct pci_dev *pdev)
b19441af
GKH
1316{
1317 int i;
1318
1319 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1320 struct bin_attribute *res_attr;
1321
1322 res_attr = pdev->res_attr[i];
1323 if (res_attr) {
1324 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1325 kfree(res_attr);
1326 }
45aec1ae 1327
1328 res_attr = pdev->res_attr_wc[i];
1329 if (res_attr) {
1330 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1331 kfree(res_attr);
1332 }
b19441af
GKH
1333 }
1334}
1335
45aec1ae 1336static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1337{
1338 /* allocate attribute structure, piggyback attribute name */
1339 int name_len = write_combine ? 13 : 10;
1340 struct bin_attribute *res_attr;
bd5174df 1341 char *res_attr_name;
45aec1ae 1342 int retval;
1343
1344 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
bd5174df
BH
1345 if (!res_attr)
1346 return -ENOMEM;
1347
1348 res_attr_name = (char *)(res_attr + 1);
1349
1350 sysfs_bin_attr_init(res_attr);
1351 if (write_combine) {
1352 pdev->res_attr_wc[num] = res_attr;
1353 sprintf(res_attr_name, "resource%d_wc", num);
1354 res_attr->mmap = pci_mmap_resource_wc;
1355 } else {
1356 pdev->res_attr[num] = res_attr;
1357 sprintf(res_attr_name, "resource%d", num);
e854d8b2
DW
1358 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1359 res_attr->read = pci_read_resource_io;
1360 res_attr->write = pci_write_resource_io;
1361 if (arch_can_pci_mmap_io())
1362 res_attr->mmap = pci_mmap_resource_uc;
1363 } else {
1364 res_attr->mmap = pci_mmap_resource_uc;
1365 }
bd5174df
BH
1366 }
1367 res_attr->attr.name = res_attr_name;
1368 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1369 res_attr->size = pci_resource_len(pdev, num);
dca40b18 1370 res_attr->private = (void *)(unsigned long)num;
bd5174df
BH
1371 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1372 if (retval)
1373 kfree(res_attr);
45aec1ae 1374
1375 return retval;
1376}
1377
1da177e4
LT
1378/**
1379 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 1380 * @pdev: dev in question
1da177e4 1381 *
cffb2faf 1382 * Walk the resources in @pdev creating files for each resource available.
1da177e4 1383 */
b19441af 1384static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
1385{
1386 int i;
b19441af 1387 int retval;
1da177e4
LT
1388
1389 /* Expose the PCI resources from this device as files */
1390 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
1391
1392 /* skip empty resources */
1393 if (!pci_resource_len(pdev, i))
1394 continue;
1395
45aec1ae 1396 retval = pci_create_attr(pdev, i, 0);
1397 /* for prefetchable resources, create a WC mappable file */
ae749c7a
DW
1398 if (!retval && arch_can_pci_mmap_wc() &&
1399 pdev->resource[i].flags & IORESOURCE_PREFETCH)
45aec1ae 1400 retval = pci_create_attr(pdev, i, 1);
45aec1ae 1401 if (retval) {
1402 pci_remove_resource_files(pdev);
1403 return retval;
1da177e4
LT
1404 }
1405 }
b19441af 1406 return 0;
1da177e4
LT
1407}
1408#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1409int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1410void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1411#endif /* HAVE_PCI_MMAP */
1412
1413/**
1414 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1415 * @filp: sysfs file
1da177e4 1416 * @kobj: kernel object handle
cffb2faf 1417 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1418 * @buf: user input
1419 * @off: file offset
1420 * @count: number of byte in input
1421 *
1422 * writing anything except 0 enables it
1423 */
3c78bc61
RD
1424static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1425 struct bin_attribute *bin_attr, char *buf,
1426 loff_t off, size_t count)
1da177e4 1427{
554a6037 1428 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
1429
1430 if ((off == 0) && (*buf == '0') && (count == 2))
1431 pdev->rom_attr_enabled = 0;
1432 else
1433 pdev->rom_attr_enabled = 1;
1434
1435 return count;
1436}
1437
1438/**
1439 * pci_read_rom - read a PCI ROM
2c3c8bea 1440 * @filp: sysfs file
1da177e4 1441 * @kobj: kernel object handle
cffb2faf 1442 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1443 * @buf: where to put the data we read from the ROM
1444 * @off: file offset
1445 * @count: number of bytes to read
1446 *
1447 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1448 * device corresponding to @kobj.
1449 */
3c78bc61
RD
1450static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1451 struct bin_attribute *bin_attr, char *buf,
1452 loff_t off, size_t count)
1da177e4 1453{
554a6037 1454 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
1455 void __iomem *rom;
1456 size_t size;
1457
1458 if (!pdev->rom_attr_enabled)
1459 return -EINVAL;
f7625980 1460
1da177e4 1461 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1462 if (!rom || !size)
1463 return -EIO;
f7625980 1464
1da177e4
LT
1465 if (off >= size)
1466 count = 0;
1467 else {
1468 if (off + count > size)
1469 count = size - off;
f7625980 1470
1da177e4
LT
1471 memcpy_fromio(buf, rom + off, count);
1472 }
1473 pci_unmap_rom(pdev, rom);
f7625980 1474
1da177e4
LT
1475 return count;
1476}
1477
8bdc50ac 1478static const struct bin_attribute pci_config_attr = {
1da177e4
LT
1479 .attr = {
1480 .name = "config",
1481 .mode = S_IRUGO | S_IWUSR,
1da177e4 1482 },
557848c3 1483 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1484 .read = pci_read_config,
1485 .write = pci_write_config,
1486};
1487
8bdc50ac 1488static const struct bin_attribute pcie_config_attr = {
1da177e4
LT
1489 .attr = {
1490 .name = "config",
1491 .mode = S_IRUGO | S_IWUSR,
1da177e4 1492 },
557848c3 1493 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1494 .read = pci_read_config,
1495 .write = pci_write_config,
1496};
1497
3c78bc61
RD
1498static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1499 const char *buf, size_t count)
711d5779
MT
1500{
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502 unsigned long val;
9a994e8e 1503 ssize_t result = kstrtoul(buf, 0, &val);
711d5779
MT
1504
1505 if (result < 0)
1506 return result;
1507
1508 if (val != 1)
1509 return -EINVAL;
447c5dd7
MS
1510
1511 result = pci_reset_function(pdev);
1512 if (result < 0)
1513 return result;
1514
1515 return count;
711d5779
MT
1516}
1517
1518static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1519
280c73d3
ZY
1520static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1521{
1522 int retval;
1523 struct bin_attribute *attr;
1524
1525 /* If the device has VPD, try to expose it in sysfs. */
1526 if (dev->vpd) {
1527 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1528 if (!attr)
1529 return -ENOMEM;
1530
a07e4156 1531 sysfs_bin_attr_init(attr);
104daa71 1532 attr->size = 0;
280c73d3
ZY
1533 attr->attr.name = "vpd";
1534 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1535 attr->read = read_vpd_attr;
1536 attr->write = write_vpd_attr;
280c73d3
ZY
1537 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1538 if (retval) {
0f12a4e2 1539 kfree(attr);
280c73d3
ZY
1540 return retval;
1541 }
1542 dev->vpd->attr = attr;
1543 }
1544
1545 /* Active State Power Management */
1546 pcie_aspm_create_sysfs_dev_files(dev);
1547
711d5779
MT
1548 if (!pci_probe_reset_function(dev)) {
1549 retval = device_create_file(&dev->dev, &reset_attr);
1550 if (retval)
1551 goto error;
1552 dev->reset_fn = 1;
1553 }
280c73d3 1554 return 0;
711d5779
MT
1555
1556error:
1557 pcie_aspm_remove_sysfs_dev_files(dev);
1558 if (dev->vpd && dev->vpd->attr) {
1559 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1560 kfree(dev->vpd->attr);
1561 }
1562
1563 return retval;
280c73d3
ZY
1564}
1565
3c78bc61 1566int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1da177e4 1567{
b19441af 1568 int retval;
ac0c302a 1569 int rom_size;
280c73d3 1570 struct bin_attribute *attr;
b19441af 1571
1da177e4
LT
1572 if (!sysfs_initialized)
1573 return -EACCES;
1574
c20aecf6 1575 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
b19441af 1576 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1577 else
1578 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
b19441af
GKH
1579 if (retval)
1580 goto err;
1da177e4 1581
b19441af
GKH
1582 retval = pci_create_resource_files(pdev);
1583 if (retval)
280c73d3
ZY
1584 goto err_config_file;
1585
1da177e4 1586 /* If the device has a ROM, try to expose it in sysfs. */
ac0c302a 1587 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
280c73d3 1588 if (rom_size) {
94e61088 1589 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1590 if (!attr) {
b19441af 1591 retval = -ENOMEM;
9890b12a 1592 goto err_resource_files;
1da177e4 1593 }
a07e4156 1594 sysfs_bin_attr_init(attr);
280c73d3
ZY
1595 attr->size = rom_size;
1596 attr->attr.name = "rom";
ff29530e 1597 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1598 attr->read = pci_read_rom;
1599 attr->write = pci_write_rom;
1600 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1601 if (retval) {
1602 kfree(attr);
1603 goto err_resource_files;
1604 }
1605 pdev->rom_attr = attr;
1da177e4 1606 }
280c73d3 1607
280c73d3
ZY
1608 /* add sysfs entries for various capabilities */
1609 retval = pci_create_capabilities_sysfs(pdev);
1610 if (retval)
625e1d59 1611 goto err_rom_file;
7d715a6c 1612
911e1c9b
N
1613 pci_create_firmware_label_files(pdev);
1614
1da177e4 1615 return 0;
b19441af 1616
a2cd52ca 1617err_rom_file:
9d88b93b 1618 if (pdev->rom_attr) {
94e61088 1619 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1620 kfree(pdev->rom_attr);
1621 pdev->rom_attr = NULL;
1622 }
9890b12a
ME
1623err_resource_files:
1624 pci_remove_resource_files(pdev);
94e61088 1625err_config_file:
c20aecf6 1626 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
b19441af 1627 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1628 else
1629 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
b19441af
GKH
1630err:
1631 return retval;
1da177e4
LT
1632}
1633
280c73d3
ZY
1634static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1635{
1636 if (dev->vpd && dev->vpd->attr) {
1637 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1638 kfree(dev->vpd->attr);
1639 }
1640
1641 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1642 if (dev->reset_fn) {
1643 device_remove_file(&dev->dev, &reset_attr);
1644 dev->reset_fn = 0;
1645 }
280c73d3
ZY
1646}
1647
1da177e4
LT
1648/**
1649 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1650 * @pdev: device whose entries we should free
1651 *
1652 * Cleanup when @pdev is removed from sysfs.
1653 */
1654void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1655{
d67afe5e
DM
1656 if (!sysfs_initialized)
1657 return;
1658
280c73d3 1659 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1660
c20aecf6 1661 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1da177e4 1662 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1663 else
1664 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4
LT
1665
1666 pci_remove_resource_files(pdev);
1667
9d88b93b 1668 if (pdev->rom_attr) {
280c73d3
ZY
1669 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1670 kfree(pdev->rom_attr);
9d88b93b 1671 pdev->rom_attr = NULL;
1da177e4 1672 }
911e1c9b
N
1673
1674 pci_remove_firmware_label_files(pdev);
1da177e4
LT
1675}
1676
1677static int __init pci_sysfs_init(void)
1678{
1679 struct pci_dev *pdev = NULL;
b19441af
GKH
1680 int retval;
1681
1da177e4 1682 sysfs_initialized = 1;
b19441af
GKH
1683 for_each_pci_dev(pdev) {
1684 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1685 if (retval) {
1686 pci_dev_put(pdev);
b19441af 1687 return retval;
151fc5df 1688 }
b19441af 1689 }
1da177e4
LT
1690
1691 return 0;
1692}
40ee9e9f 1693late_initcall(pci_sysfs_init);
4e15c46b
YL
1694
1695static struct attribute *pci_dev_dev_attrs[] = {
625e1d59 1696 &vga_attr.attr,
4e15c46b
YL
1697 NULL,
1698};
1699
1700static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
3c78bc61 1701 struct attribute *a, int n)
4e15c46b 1702{
554a6037 1703 struct device *dev = kobj_to_dev(kobj);
625e1d59
YL
1704 struct pci_dev *pdev = to_pci_dev(dev);
1705
1706 if (a == &vga_attr.attr)
1707 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1708 return 0;
1709
4e15c46b
YL
1710 return a->mode;
1711}
1712
dfab88be
JL
1713static struct attribute *pci_dev_hp_attrs[] = {
1714 &dev_remove_attr.attr,
1715 &dev_rescan_attr.attr,
1716 NULL,
1717};
1718
1719static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
3c78bc61 1720 struct attribute *a, int n)
dfab88be 1721{
554a6037 1722 struct device *dev = kobj_to_dev(kobj);
dfab88be
JL
1723 struct pci_dev *pdev = to_pci_dev(dev);
1724
1725 if (pdev->is_virtfn)
1726 return 0;
1727
1728 return a->mode;
1729}
1730
56c1af46
WVK
1731static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1732 struct attribute *a, int n)
1733{
1734 struct device *dev = kobj_to_dev(kobj);
1735 struct pci_dev *pdev = to_pci_dev(dev);
1736
1737 if (pci_is_bridge(pdev))
1738 return a->mode;
1739
1740 return 0;
1741}
1742
1743static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1744 struct attribute *a, int n)
1745{
1746 struct device *dev = kobj_to_dev(kobj);
1747 struct pci_dev *pdev = to_pci_dev(dev);
1748
1749 if (pci_is_pcie(pdev))
1750 return a->mode;
1751
1752 return 0;
1753}
1754
1755static const struct attribute_group pci_dev_group = {
1756 .attrs = pci_dev_attrs,
1757};
1758
1759const struct attribute_group *pci_dev_groups[] = {
1760 &pci_dev_group,
1761 NULL,
1762};
1763
1764static const struct attribute_group pci_bridge_group = {
1765 .attrs = pci_bridge_attrs,
1766};
1767
1768const struct attribute_group *pci_bridge_groups[] = {
1769 &pci_bridge_group,
1770 NULL,
1771};
1772
1773static const struct attribute_group pcie_dev_group = {
1774 .attrs = pcie_dev_attrs,
1775};
1776
1777const struct attribute_group *pcie_dev_groups[] = {
1778 &pcie_dev_group,
1779 NULL,
1780};
1781
e7ea9825 1782static const struct attribute_group pci_dev_hp_attr_group = {
dfab88be
JL
1783 .attrs = pci_dev_hp_attrs,
1784 .is_visible = pci_dev_hp_attrs_are_visible,
1785};
1786
1789382a
DD
1787#ifdef CONFIG_PCI_IOV
1788static struct attribute *sriov_dev_attrs[] = {
1789 &sriov_totalvfs_attr.attr,
1790 &sriov_numvfs_attr.attr,
7dfca152
FS
1791 &sriov_offset_attr.attr,
1792 &sriov_stride_attr.attr,
1793 &sriov_vf_device_attr.attr,
0e7df224 1794 &sriov_drivers_autoprobe_attr.attr,
1789382a
DD
1795 NULL,
1796};
1797
1798static umode_t sriov_attrs_are_visible(struct kobject *kobj,
3c78bc61 1799 struct attribute *a, int n)
1789382a 1800{
554a6037 1801 struct device *dev = kobj_to_dev(kobj);
1789382a
DD
1802
1803 if (!dev_is_pf(dev))
1804 return 0;
1805
1806 return a->mode;
1807}
1808
e7ea9825 1809static const struct attribute_group sriov_dev_attr_group = {
1789382a
DD
1810 .attrs = sriov_dev_attrs,
1811 .is_visible = sriov_attrs_are_visible,
1812};
1813#endif /* CONFIG_PCI_IOV */
1814
e7ea9825 1815static const struct attribute_group pci_dev_attr_group = {
4e15c46b
YL
1816 .attrs = pci_dev_dev_attrs,
1817 .is_visible = pci_dev_attrs_are_visible,
1818};
1819
e7ea9825 1820static const struct attribute_group pci_bridge_attr_group = {
56c1af46
WVK
1821 .attrs = pci_bridge_attrs,
1822 .is_visible = pci_bridge_attrs_are_visible,
1823};
1824
e7ea9825 1825static const struct attribute_group pcie_dev_attr_group = {
56c1af46
WVK
1826 .attrs = pcie_dev_attrs,
1827 .is_visible = pcie_dev_attrs_are_visible,
1828};
1829
4e15c46b
YL
1830static const struct attribute_group *pci_dev_attr_groups[] = {
1831 &pci_dev_attr_group,
dfab88be 1832 &pci_dev_hp_attr_group,
1789382a
DD
1833#ifdef CONFIG_PCI_IOV
1834 &sriov_dev_attr_group,
1835#endif
56c1af46
WVK
1836 &pci_bridge_attr_group,
1837 &pcie_dev_attr_group,
4e15c46b
YL
1838 NULL,
1839};
1840
69f2dc24 1841const struct device_type pci_dev_type = {
4e15c46b
YL
1842 .groups = pci_dev_attr_groups,
1843};