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PCI: fix codingstyle issues in include/linux/pci.h
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/stat.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
aa0ac365 23#include <linux/capability.h>
6c723d5b 24#include <linux/aspm.h>
1da177e4
LT
25#include "pci.h"
26
27static int sysfs_initialized; /* = 0 */
28
29/* show configuration fields */
30#define pci_config_attr(field, format_string) \
31static ssize_t \
e404e274 32field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
33{ \
34 struct pci_dev *pdev; \
35 \
36 pdev = to_pci_dev (dev); \
37 return sprintf (buf, format_string, pdev->field); \
38}
39
40pci_config_attr(vendor, "0x%04x\n");
41pci_config_attr(device, "0x%04x\n");
42pci_config_attr(subsystem_vendor, "0x%04x\n");
43pci_config_attr(subsystem_device, "0x%04x\n");
44pci_config_attr(class, "0x%06x\n");
45pci_config_attr(irq, "%u\n");
46
bdee9d98
DT
47static ssize_t broken_parity_status_show(struct device *dev,
48 struct device_attribute *attr,
49 char *buf)
50{
51 struct pci_dev *pdev = to_pci_dev(dev);
52 return sprintf (buf, "%u\n", pdev->broken_parity_status);
53}
54
55static ssize_t broken_parity_status_store(struct device *dev,
56 struct device_attribute *attr,
57 const char *buf, size_t count)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60 ssize_t consumed = -EINVAL;
61
62 if ((count > 0) && (*buf == '0' || *buf == '1')) {
63 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
64 consumed = count;
65 }
66 return consumed;
67}
68
4327edf6
AC
69static ssize_t local_cpus_show(struct device *dev,
70 struct device_attribute *attr, char *buf)
1da177e4 71{
4327edf6
AC
72 cpumask_t mask;
73 int len;
74
75 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
76 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
1da177e4
LT
77 strcat(buf,"\n");
78 return 1+len;
79}
80
81/* show resources */
82static ssize_t
e404e274 83resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
84{
85 struct pci_dev * pci_dev = to_pci_dev(dev);
86 char * str = buf;
87 int i;
88 int max = 7;
e31dd6e4 89 resource_size_t start, end;
1da177e4
LT
90
91 if (pci_dev->subordinate)
92 max = DEVICE_COUNT_RESOURCE;
93
94 for (i = 0; i < max; i++) {
2311b1f2
ME
95 struct resource *res = &pci_dev->resource[i];
96 pci_resource_to_user(pci_dev, i, res, &start, &end);
97 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
98 (unsigned long long)start,
99 (unsigned long long)end,
100 (unsigned long long)res->flags);
1da177e4
LT
101 }
102 return (str - buf);
103}
104
87c8a443 105static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
106{
107 struct pci_dev *pci_dev = to_pci_dev(dev);
108
109 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
110 pci_dev->vendor, pci_dev->device,
111 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
112 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
113 (u8)(pci_dev->class));
114}
bae94d02
IPG
115
116static ssize_t is_enabled_store(struct device *dev,
117 struct device_attribute *attr, const char *buf,
118 size_t count)
9f125d30 119{
bae94d02 120 ssize_t result = -EINVAL;
9f125d30
AV
121 struct pci_dev *pdev = to_pci_dev(dev);
122
123 /* this can crash the machine when done on the "wrong" device */
124 if (!capable(CAP_SYS_ADMIN))
125 return count;
126
bae94d02
IPG
127 if (*buf == '0') {
128 if (atomic_read(&pdev->enable_cnt) != 0)
129 pci_disable_device(pdev);
130 else
131 result = -EIO;
132 } else if (*buf == '1')
133 result = pci_enable_device(pdev);
9f125d30 134
bae94d02
IPG
135 return result < 0 ? result : count;
136}
137
138static ssize_t is_enabled_show(struct device *dev,
139 struct device_attribute *attr, char *buf)
140{
141 struct pci_dev *pdev;
9f125d30 142
bae94d02
IPG
143 pdev = to_pci_dev (dev);
144 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
145}
146
81bb0e19
BG
147#ifdef CONFIG_NUMA
148static ssize_t
149numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
150{
151 return sprintf (buf, "%d\n", dev->numa_node);
152}
153#endif
154
fe97064c
BG
155static ssize_t
156msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
157{
158 struct pci_dev *pdev = to_pci_dev(dev);
159
160 if (!pdev->subordinate)
161 return 0;
162
163 return sprintf (buf, "%u\n",
164 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
165}
166
167static ssize_t
168msi_bus_store(struct device *dev, struct device_attribute *attr,
169 const char *buf, size_t count)
170{
171 struct pci_dev *pdev = to_pci_dev(dev);
172
173 /* bad things may happen if the no_msi flag is changed
174 * while some drivers are loaded */
175 if (!capable(CAP_SYS_ADMIN))
176 return count;
177
178 if (!pdev->subordinate)
179 return count;
180
181 if (*buf == '0') {
182 pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
183 dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
184 " bad things could happen.\n");
185 }
186
187 if (*buf == '1') {
188 pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
189 dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
190 " bad things could happen.\n");
191 }
192
193 return count;
194}
9888549e 195
1da177e4
LT
196struct device_attribute pci_dev_attrs[] = {
197 __ATTR_RO(resource),
198 __ATTR_RO(vendor),
199 __ATTR_RO(device),
200 __ATTR_RO(subsystem_vendor),
201 __ATTR_RO(subsystem_device),
202 __ATTR_RO(class),
203 __ATTR_RO(irq),
204 __ATTR_RO(local_cpus),
9888549e 205 __ATTR_RO(modalias),
81bb0e19
BG
206#ifdef CONFIG_NUMA
207 __ATTR_RO(numa_node),
208#endif
9f125d30 209 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
210 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
211 broken_parity_status_show,broken_parity_status_store),
fe97064c 212 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
213 __ATTR_NULL,
214};
215
216static ssize_t
91a69029
ZR
217pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
218 char *buf, loff_t off, size_t count)
1da177e4
LT
219{
220 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
221 unsigned int size = 64;
222 loff_t init_off = off;
4c0619ad 223 u8 *data = (u8*) buf;
1da177e4
LT
224
225 /* Several chips lock up trying to read undefined config space */
226 if (capable(CAP_SYS_ADMIN)) {
227 size = dev->cfg_size;
228 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
229 size = 128;
230 }
231
232 if (off > size)
233 return 0;
234 if (off + count > size) {
235 size -= off;
236 count = size;
237 } else {
238 size = count;
239 }
240
4c0619ad
SS
241 if ((off & 1) && size) {
242 u8 val;
e04b0ea2 243 pci_user_read_config_byte(dev, off, &val);
4c0619ad 244 data[off - init_off] = val;
1da177e4 245 off++;
4c0619ad
SS
246 size--;
247 }
248
249 if ((off & 3) && size > 2) {
250 u16 val;
e04b0ea2 251 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
252 data[off - init_off] = val & 0xff;
253 data[off - init_off + 1] = (val >> 8) & 0xff;
254 off += 2;
255 size -= 2;
1da177e4
LT
256 }
257
258 while (size > 3) {
4c0619ad 259 u32 val;
e04b0ea2 260 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
261 data[off - init_off] = val & 0xff;
262 data[off - init_off + 1] = (val >> 8) & 0xff;
263 data[off - init_off + 2] = (val >> 16) & 0xff;
264 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
265 off += 4;
266 size -= 4;
267 }
268
4c0619ad
SS
269 if (size >= 2) {
270 u16 val;
e04b0ea2 271 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
272 data[off - init_off] = val & 0xff;
273 data[off - init_off + 1] = (val >> 8) & 0xff;
274 off += 2;
275 size -= 2;
276 }
277
278 if (size > 0) {
279 u8 val;
e04b0ea2 280 pci_user_read_config_byte(dev, off, &val);
4c0619ad 281 data[off - init_off] = val;
1da177e4
LT
282 off++;
283 --size;
284 }
285
286 return count;
287}
288
289static ssize_t
91a69029
ZR
290pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
291 char *buf, loff_t off, size_t count)
1da177e4
LT
292{
293 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
294 unsigned int size = count;
295 loff_t init_off = off;
4c0619ad 296 u8 *data = (u8*) buf;
1da177e4
LT
297
298 if (off > dev->cfg_size)
299 return 0;
300 if (off + count > dev->cfg_size) {
301 size = dev->cfg_size - off;
302 count = size;
303 }
4c0619ad
SS
304
305 if ((off & 1) && size) {
e04b0ea2 306 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 307 off++;
4c0619ad 308 size--;
1da177e4 309 }
4c0619ad
SS
310
311 if ((off & 3) && size > 2) {
312 u16 val = data[off - init_off];
313 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 314 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
315 off += 2;
316 size -= 2;
317 }
1da177e4
LT
318
319 while (size > 3) {
4c0619ad
SS
320 u32 val = data[off - init_off];
321 val |= (u32) data[off - init_off + 1] << 8;
322 val |= (u32) data[off - init_off + 2] << 16;
323 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 324 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
325 off += 4;
326 size -= 4;
327 }
4c0619ad
SS
328
329 if (size >= 2) {
330 u16 val = data[off - init_off];
331 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 332 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
333 off += 2;
334 size -= 2;
335 }
1da177e4 336
4c0619ad 337 if (size) {
e04b0ea2 338 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
339 off++;
340 --size;
341 }
342
343 return count;
344}
345
346#ifdef HAVE_PCI_LEGACY
347/**
348 * pci_read_legacy_io - read byte(s) from legacy I/O port space
349 * @kobj: kobject corresponding to file to read from
350 * @buf: buffer to store results
351 * @off: offset into legacy I/O port space
352 * @count: number of bytes to read
353 *
354 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
355 * callback routine (pci_legacy_read).
356 */
357ssize_t
91a69029
ZR
358pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
359 char *buf, loff_t off, size_t count)
1da177e4
LT
360{
361 struct pci_bus *bus = to_pci_bus(container_of(kobj,
362 struct class_device,
363 kobj));
364
365 /* Only support 1, 2 or 4 byte accesses */
366 if (count != 1 && count != 2 && count != 4)
367 return -EINVAL;
368
369 return pci_legacy_read(bus, off, (u32 *)buf, count);
370}
371
372/**
373 * pci_write_legacy_io - write byte(s) to legacy I/O port space
374 * @kobj: kobject corresponding to file to read from
375 * @buf: buffer containing value to be written
376 * @off: offset into legacy I/O port space
377 * @count: number of bytes to write
378 *
379 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
380 * callback routine (pci_legacy_write).
381 */
382ssize_t
91a69029
ZR
383pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
384 char *buf, loff_t off, size_t count)
1da177e4
LT
385{
386 struct pci_bus *bus = to_pci_bus(container_of(kobj,
387 struct class_device,
388 kobj));
389 /* Only support 1, 2 or 4 byte accesses */
390 if (count != 1 && count != 2 && count != 4)
391 return -EINVAL;
392
393 return pci_legacy_write(bus, off, *(u32 *)buf, count);
394}
395
396/**
397 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
398 * @kobj: kobject corresponding to device to be mapped
399 * @attr: struct bin_attribute for this file
400 * @vma: struct vm_area_struct passed to mmap
401 *
402 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
403 * legacy memory space (first meg of bus space) into application virtual
404 * memory space.
405 */
406int
407pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
408 struct vm_area_struct *vma)
409{
410 struct pci_bus *bus = to_pci_bus(container_of(kobj,
411 struct class_device,
412 kobj));
413
414 return pci_mmap_legacy_page_range(bus, vma);
415}
416#endif /* HAVE_PCI_LEGACY */
417
418#ifdef HAVE_PCI_MMAP
419/**
420 * pci_mmap_resource - map a PCI resource into user memory space
421 * @kobj: kobject for mapping
422 * @attr: struct bin_attribute for the file being mapped
423 * @vma: struct vm_area_struct passed into the mmap
424 *
425 * Use the regular PCI mapping routines to map a PCI resource into userspace.
426 * FIXME: write combining? maybe automatic for prefetchable regions?
427 */
428static int
429pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
430 struct vm_area_struct *vma)
431{
432 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
433 struct device, kobj));
434 struct resource *res = (struct resource *)attr->private;
435 enum pci_mmap_state mmap_type;
e31dd6e4 436 resource_size_t start, end;
2311b1f2 437 int i;
1da177e4 438
2311b1f2
ME
439 for (i = 0; i < PCI_ROM_RESOURCE; i++)
440 if (res == &pdev->resource[i])
441 break;
442 if (i >= PCI_ROM_RESOURCE)
443 return -ENODEV;
444
445 /* pci_mmap_page_range() expects the same kind of entry as coming
446 * from /proc/bus/pci/ which is a "user visible" value. If this is
447 * different from the resource itself, arch will do necessary fixup.
448 */
449 pci_resource_to_user(pdev, i, res, &start, &end);
450 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
451 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
452
453 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
454}
455
b19441af
GKH
456/**
457 * pci_remove_resource_files - cleanup resource files
458 * @dev: dev to cleanup
459 *
460 * If we created resource files for @dev, remove them from sysfs and
461 * free their resources.
462 */
463static void
464pci_remove_resource_files(struct pci_dev *pdev)
465{
466 int i;
467
468 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
469 struct bin_attribute *res_attr;
470
471 res_attr = pdev->res_attr[i];
472 if (res_attr) {
473 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
474 kfree(res_attr);
475 }
476 }
477}
478
1da177e4
LT
479/**
480 * pci_create_resource_files - create resource files in sysfs for @dev
481 * @dev: dev in question
482 *
483 * Walk the resources in @dev creating files for each resource available.
484 */
b19441af 485static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
486{
487 int i;
b19441af 488 int retval;
1da177e4
LT
489
490 /* Expose the PCI resources from this device as files */
491 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
492 struct bin_attribute *res_attr;
493
494 /* skip empty resources */
495 if (!pci_resource_len(pdev, i))
496 continue;
497
d48593bf 498 /* allocate attribute structure, piggyback attribute name */
656da9da 499 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4 500 if (res_attr) {
d48593bf
DT
501 char *res_attr_name = (char *)(res_attr + 1);
502
1da177e4 503 pdev->res_attr[i] = res_attr;
d48593bf
DT
504 sprintf(res_attr_name, "resource%d", i);
505 res_attr->attr.name = res_attr_name;
1da177e4 506 res_attr->attr.mode = S_IRUSR | S_IWUSR;
d48593bf 507 res_attr->size = pci_resource_len(pdev, i);
1da177e4
LT
508 res_attr->mmap = pci_mmap_resource;
509 res_attr->private = &pdev->resource[i];
b19441af
GKH
510 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
511 if (retval) {
512 pci_remove_resource_files(pdev);
513 return retval;
514 }
515 } else {
516 return -ENOMEM;
1da177e4
LT
517 }
518 }
b19441af 519 return 0;
1da177e4
LT
520}
521#else /* !HAVE_PCI_MMAP */
b19441af 522static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
523static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
524#endif /* HAVE_PCI_MMAP */
525
526/**
527 * pci_write_rom - used to enable access to the PCI ROM display
528 * @kobj: kernel object handle
529 * @buf: user input
530 * @off: file offset
531 * @count: number of byte in input
532 *
533 * writing anything except 0 enables it
534 */
535static ssize_t
91a69029
ZR
536pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
537 char *buf, loff_t off, size_t count)
1da177e4
LT
538{
539 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
540
541 if ((off == 0) && (*buf == '0') && (count == 2))
542 pdev->rom_attr_enabled = 0;
543 else
544 pdev->rom_attr_enabled = 1;
545
546 return count;
547}
548
549/**
550 * pci_read_rom - read a PCI ROM
551 * @kobj: kernel object handle
552 * @buf: where to put the data we read from the ROM
553 * @off: file offset
554 * @count: number of bytes to read
555 *
556 * Put @count bytes starting at @off into @buf from the ROM in the PCI
557 * device corresponding to @kobj.
558 */
559static ssize_t
91a69029
ZR
560pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
561 char *buf, loff_t off, size_t count)
1da177e4
LT
562{
563 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
564 void __iomem *rom;
565 size_t size;
566
567 if (!pdev->rom_attr_enabled)
568 return -EINVAL;
569
570 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
571 if (!rom)
572 return 0;
573
574 if (off >= size)
575 count = 0;
576 else {
577 if (off + count > size)
578 count = size - off;
579
580 memcpy_fromio(buf, rom + off, count);
581 }
582 pci_unmap_rom(pdev, rom);
583
584 return count;
585}
586
587static struct bin_attribute pci_config_attr = {
588 .attr = {
589 .name = "config",
590 .mode = S_IRUGO | S_IWUSR,
1da177e4
LT
591 },
592 .size = 256,
593 .read = pci_read_config,
594 .write = pci_write_config,
595};
596
597static struct bin_attribute pcie_config_attr = {
598 .attr = {
599 .name = "config",
600 .mode = S_IRUGO | S_IWUSR,
1da177e4
LT
601 },
602 .size = 4096,
603 .read = pci_read_config,
604 .write = pci_write_config,
605};
606
a2cd52ca 607int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 608{
a2cd52ca 609 return 0;
575e3348
ME
610}
611
b19441af 612int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 613{
b19441af
GKH
614 struct bin_attribute *rom_attr = NULL;
615 int retval;
616
1da177e4
LT
617 if (!sysfs_initialized)
618 return -EACCES;
619
620 if (pdev->cfg_size < 4096)
b19441af 621 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 622 else
b19441af
GKH
623 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
624 if (retval)
625 goto err;
1da177e4 626
b19441af
GKH
627 retval = pci_create_resource_files(pdev);
628 if (retval)
629 goto err_bin_file;
1da177e4
LT
630
631 /* If the device has a ROM, try to expose it in sysfs. */
40ee9e9f
JB
632 if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
633 (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
f5afe806 634 rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
1da177e4 635 if (rom_attr) {
1da177e4
LT
636 pdev->rom_attr = rom_attr;
637 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
638 rom_attr->attr.name = "rom";
639 rom_attr->attr.mode = S_IRUSR;
1da177e4
LT
640 rom_attr->read = pci_read_rom;
641 rom_attr->write = pci_write_rom;
b19441af
GKH
642 retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
643 if (retval)
644 goto err_rom;
645 } else {
646 retval = -ENOMEM;
9890b12a 647 goto err_resource_files;
1da177e4
LT
648 }
649 }
650 /* add platform-specific attributes */
a2cd52ca
ME
651 if (pcibios_add_platform_entries(pdev))
652 goto err_rom_file;
b19441af 653
6c723d5b
SL
654 pcie_aspm_create_sysfs_dev_files(pdev);
655
1da177e4 656 return 0;
b19441af 657
a2cd52ca
ME
658err_rom_file:
659 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
660 sysfs_remove_bin_file(&pdev->dev.kobj, rom_attr);
b19441af
GKH
661err_rom:
662 kfree(rom_attr);
9890b12a
ME
663err_resource_files:
664 pci_remove_resource_files(pdev);
b19441af
GKH
665err_bin_file:
666 if (pdev->cfg_size < 4096)
667 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
668 else
669 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
670err:
671 return retval;
1da177e4
LT
672}
673
674/**
675 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
676 * @pdev: device whose entries we should free
677 *
678 * Cleanup when @pdev is removed from sysfs.
679 */
680void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
681{
d67afe5e
DM
682 if (!sysfs_initialized)
683 return;
684
6c723d5b
SL
685 pcie_aspm_remove_sysfs_dev_files(pdev);
686
1da177e4
LT
687 if (pdev->cfg_size < 4096)
688 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
689 else
690 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
691
692 pci_remove_resource_files(pdev);
693
694 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
695 if (pdev->rom_attr) {
696 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
697 kfree(pdev->rom_attr);
698 }
699 }
700}
701
702static int __init pci_sysfs_init(void)
703{
704 struct pci_dev *pdev = NULL;
b19441af
GKH
705 int retval;
706
1da177e4 707 sysfs_initialized = 1;
b19441af
GKH
708 for_each_pci_dev(pdev) {
709 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
710 if (retval) {
711 pci_dev_put(pdev);
b19441af 712 return retval;
151fc5df 713 }
b19441af 714 }
1da177e4
LT
715
716 return 0;
717}
718
40ee9e9f 719late_initcall(pci_sysfs_init);