]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/pci/pci-sysfs.c
PCI: handle long delays in VPD access
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
aa0ac365 24#include <linux/capability.h>
7d715a6c 25#include <linux/pci-aspm.h>
1da177e4
LT
26#include "pci.h"
27
28static int sysfs_initialized; /* = 0 */
29
30/* show configuration fields */
31#define pci_config_attr(field, format_string) \
32static ssize_t \
e404e274 33field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
34{ \
35 struct pci_dev *pdev; \
36 \
37 pdev = to_pci_dev (dev); \
38 return sprintf (buf, format_string, pdev->field); \
39}
40
41pci_config_attr(vendor, "0x%04x\n");
42pci_config_attr(device, "0x%04x\n");
43pci_config_attr(subsystem_vendor, "0x%04x\n");
44pci_config_attr(subsystem_device, "0x%04x\n");
45pci_config_attr(class, "0x%06x\n");
46pci_config_attr(irq, "%u\n");
47
bdee9d98
DT
48static ssize_t broken_parity_status_show(struct device *dev,
49 struct device_attribute *attr,
50 char *buf)
51{
52 struct pci_dev *pdev = to_pci_dev(dev);
53 return sprintf (buf, "%u\n", pdev->broken_parity_status);
54}
55
56static ssize_t broken_parity_status_store(struct device *dev,
57 struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 61 unsigned long val;
bdee9d98 62
92425a40
TP
63 if (strict_strtoul(buf, 0, &val) < 0)
64 return -EINVAL;
65
66 pdev->broken_parity_status = !!val;
67
68 return count;
bdee9d98
DT
69}
70
4327edf6
AC
71static ssize_t local_cpus_show(struct device *dev,
72 struct device_attribute *attr, char *buf)
1da177e4 73{
4327edf6
AC
74 cpumask_t mask;
75 int len;
76
77 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
29c0177e 78 len = cpumask_scnprintf(buf, PAGE_SIZE-2, &mask);
39106dcf
MT
79 buf[len++] = '\n';
80 buf[len] = '\0';
81 return len;
82}
83
84
85static ssize_t local_cpulist_show(struct device *dev,
86 struct device_attribute *attr, char *buf)
87{
88 cpumask_t mask;
89 int len;
90
91 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
29c0177e 92 len = cpulist_scnprintf(buf, PAGE_SIZE-2, &mask);
39106dcf
MT
93 buf[len++] = '\n';
94 buf[len] = '\0';
95 return len;
1da177e4
LT
96}
97
98/* show resources */
99static ssize_t
e404e274 100resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
101{
102 struct pci_dev * pci_dev = to_pci_dev(dev);
103 char * str = buf;
104 int i;
fde09c6d 105 int max;
e31dd6e4 106 resource_size_t start, end;
1da177e4
LT
107
108 if (pci_dev->subordinate)
109 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
110 else
111 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
112
113 for (i = 0; i < max; i++) {
2311b1f2
ME
114 struct resource *res = &pci_dev->resource[i];
115 pci_resource_to_user(pci_dev, i, res, &start, &end);
116 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
117 (unsigned long long)start,
118 (unsigned long long)end,
119 (unsigned long long)res->flags);
1da177e4
LT
120 }
121 return (str - buf);
122}
123
87c8a443 124static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
125{
126 struct pci_dev *pci_dev = to_pci_dev(dev);
127
128 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
129 pci_dev->vendor, pci_dev->device,
130 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
131 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
132 (u8)(pci_dev->class));
133}
bae94d02
IPG
134
135static ssize_t is_enabled_store(struct device *dev,
136 struct device_attribute *attr, const char *buf,
137 size_t count)
9f125d30
AV
138{
139 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
140 unsigned long val;
141 ssize_t result = strict_strtoul(buf, 0, &val);
142
143 if (result < 0)
144 return result;
9f125d30
AV
145
146 /* this can crash the machine when done on the "wrong" device */
147 if (!capable(CAP_SYS_ADMIN))
92425a40 148 return -EPERM;
9f125d30 149
92425a40 150 if (!val) {
bae94d02
IPG
151 if (atomic_read(&pdev->enable_cnt) != 0)
152 pci_disable_device(pdev);
153 else
154 result = -EIO;
92425a40 155 } else
bae94d02 156 result = pci_enable_device(pdev);
9f125d30 157
bae94d02
IPG
158 return result < 0 ? result : count;
159}
160
161static ssize_t is_enabled_show(struct device *dev,
162 struct device_attribute *attr, char *buf)
163{
164 struct pci_dev *pdev;
9f125d30 165
bae94d02
IPG
166 pdev = to_pci_dev (dev);
167 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
168}
169
81bb0e19
BG
170#ifdef CONFIG_NUMA
171static ssize_t
172numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
173{
174 return sprintf (buf, "%d\n", dev->numa_node);
175}
176#endif
177
fe97064c
BG
178static ssize_t
179msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
180{
181 struct pci_dev *pdev = to_pci_dev(dev);
182
183 if (!pdev->subordinate)
184 return 0;
185
186 return sprintf (buf, "%u\n",
187 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
188}
189
190static ssize_t
191msi_bus_store(struct device *dev, struct device_attribute *attr,
192 const char *buf, size_t count)
193{
194 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
195 unsigned long val;
196
197 if (strict_strtoul(buf, 0, &val) < 0)
198 return -EINVAL;
fe97064c
BG
199
200 /* bad things may happen if the no_msi flag is changed
201 * while some drivers are loaded */
202 if (!capable(CAP_SYS_ADMIN))
92425a40 203 return -EPERM;
fe97064c 204
92425a40
TP
205 /* Maybe pci devices without subordinate busses shouldn't even have this
206 * attribute in the first place? */
fe97064c
BG
207 if (!pdev->subordinate)
208 return count;
209
92425a40
TP
210 /* Is the flag going to change, or keep the value it already had? */
211 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
212 !!val) {
213 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 214
92425a40
TP
215 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
216 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
217 }
218
219 return count;
220}
9888549e 221
1da177e4
LT
222struct device_attribute pci_dev_attrs[] = {
223 __ATTR_RO(resource),
224 __ATTR_RO(vendor),
225 __ATTR_RO(device),
226 __ATTR_RO(subsystem_vendor),
227 __ATTR_RO(subsystem_device),
228 __ATTR_RO(class),
229 __ATTR_RO(irq),
230 __ATTR_RO(local_cpus),
39106dcf 231 __ATTR_RO(local_cpulist),
9888549e 232 __ATTR_RO(modalias),
81bb0e19
BG
233#ifdef CONFIG_NUMA
234 __ATTR_RO(numa_node),
235#endif
9f125d30 236 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
237 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
238 broken_parity_status_show,broken_parity_status_store),
fe97064c 239 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
240 __ATTR_NULL,
241};
242
243static ssize_t
91a69029
ZR
244pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
245 char *buf, loff_t off, size_t count)
1da177e4
LT
246{
247 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
248 unsigned int size = 64;
249 loff_t init_off = off;
4c0619ad 250 u8 *data = (u8*) buf;
1da177e4
LT
251
252 /* Several chips lock up trying to read undefined config space */
253 if (capable(CAP_SYS_ADMIN)) {
254 size = dev->cfg_size;
255 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
256 size = 128;
257 }
258
259 if (off > size)
260 return 0;
261 if (off + count > size) {
262 size -= off;
263 count = size;
264 } else {
265 size = count;
266 }
267
4c0619ad
SS
268 if ((off & 1) && size) {
269 u8 val;
e04b0ea2 270 pci_user_read_config_byte(dev, off, &val);
4c0619ad 271 data[off - init_off] = val;
1da177e4 272 off++;
4c0619ad
SS
273 size--;
274 }
275
276 if ((off & 3) && size > 2) {
277 u16 val;
e04b0ea2 278 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
279 data[off - init_off] = val & 0xff;
280 data[off - init_off + 1] = (val >> 8) & 0xff;
281 off += 2;
282 size -= 2;
1da177e4
LT
283 }
284
285 while (size > 3) {
4c0619ad 286 u32 val;
e04b0ea2 287 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
288 data[off - init_off] = val & 0xff;
289 data[off - init_off + 1] = (val >> 8) & 0xff;
290 data[off - init_off + 2] = (val >> 16) & 0xff;
291 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
292 off += 4;
293 size -= 4;
294 }
295
4c0619ad
SS
296 if (size >= 2) {
297 u16 val;
e04b0ea2 298 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
299 data[off - init_off] = val & 0xff;
300 data[off - init_off + 1] = (val >> 8) & 0xff;
301 off += 2;
302 size -= 2;
303 }
304
305 if (size > 0) {
306 u8 val;
e04b0ea2 307 pci_user_read_config_byte(dev, off, &val);
4c0619ad 308 data[off - init_off] = val;
1da177e4
LT
309 off++;
310 --size;
311 }
312
313 return count;
314}
315
316static ssize_t
91a69029
ZR
317pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
318 char *buf, loff_t off, size_t count)
1da177e4
LT
319{
320 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
321 unsigned int size = count;
322 loff_t init_off = off;
4c0619ad 323 u8 *data = (u8*) buf;
1da177e4
LT
324
325 if (off > dev->cfg_size)
326 return 0;
327 if (off + count > dev->cfg_size) {
328 size = dev->cfg_size - off;
329 count = size;
330 }
4c0619ad
SS
331
332 if ((off & 1) && size) {
e04b0ea2 333 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 334 off++;
4c0619ad 335 size--;
1da177e4 336 }
4c0619ad
SS
337
338 if ((off & 3) && size > 2) {
339 u16 val = data[off - init_off];
340 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 341 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
342 off += 2;
343 size -= 2;
344 }
1da177e4
LT
345
346 while (size > 3) {
4c0619ad
SS
347 u32 val = data[off - init_off];
348 val |= (u32) data[off - init_off + 1] << 8;
349 val |= (u32) data[off - init_off + 2] << 16;
350 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 351 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
352 off += 4;
353 size -= 4;
354 }
4c0619ad
SS
355
356 if (size >= 2) {
357 u16 val = data[off - init_off];
358 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 359 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
360 off += 2;
361 size -= 2;
362 }
1da177e4 363
4c0619ad 364 if (size) {
e04b0ea2 365 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
366 off++;
367 --size;
368 }
369
370 return count;
371}
372
94e61088
BH
373static ssize_t
374pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
375 char *buf, loff_t off, size_t count)
376{
377 struct pci_dev *dev =
378 to_pci_dev(container_of(kobj, struct device, kobj));
379 int end;
380 int ret;
381
382 if (off > bin_attr->size)
383 count = 0;
384 else if (count > bin_attr->size - off)
385 count = bin_attr->size - off;
386 end = off + count;
387
388 while (off < end) {
389 ret = dev->vpd->ops->read(dev, off, end - off, buf);
390 if (ret < 0)
391 return ret;
392 buf += ret;
393 off += ret;
394 }
395
396 return count;
397}
398
399static ssize_t
400pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
401 char *buf, loff_t off, size_t count)
402{
403 struct pci_dev *dev =
404 to_pci_dev(container_of(kobj, struct device, kobj));
405 int end;
406 int ret;
407
408 if (off > bin_attr->size)
409 count = 0;
410 else if (count > bin_attr->size - off)
411 count = bin_attr->size - off;
412 end = off + count;
413
414 while (off < end) {
415 ret = dev->vpd->ops->write(dev, off, end - off, buf);
416 if (ret < 0)
417 return ret;
418 buf += ret;
419 off += ret;
420 }
421
422 return count;
423}
424
1da177e4
LT
425#ifdef HAVE_PCI_LEGACY
426/**
427 * pci_read_legacy_io - read byte(s) from legacy I/O port space
428 * @kobj: kobject corresponding to file to read from
429 * @buf: buffer to store results
430 * @off: offset into legacy I/O port space
431 * @count: number of bytes to read
432 *
433 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
434 * callback routine (pci_legacy_read).
435 */
f19aeb1f 436static ssize_t
91a69029
ZR
437pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
438 char *buf, loff_t off, size_t count)
1da177e4
LT
439{
440 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 441 struct device,
1da177e4
LT
442 kobj));
443
444 /* Only support 1, 2 or 4 byte accesses */
445 if (count != 1 && count != 2 && count != 4)
446 return -EINVAL;
447
448 return pci_legacy_read(bus, off, (u32 *)buf, count);
449}
450
451/**
452 * pci_write_legacy_io - write byte(s) to legacy I/O port space
453 * @kobj: kobject corresponding to file to read from
454 * @buf: buffer containing value to be written
455 * @off: offset into legacy I/O port space
456 * @count: number of bytes to write
457 *
458 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
459 * callback routine (pci_legacy_write).
460 */
f19aeb1f 461static ssize_t
91a69029
ZR
462pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
463 char *buf, loff_t off, size_t count)
1da177e4
LT
464{
465 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 466 struct device,
1da177e4
LT
467 kobj));
468 /* Only support 1, 2 or 4 byte accesses */
469 if (count != 1 && count != 2 && count != 4)
470 return -EINVAL;
471
472 return pci_legacy_write(bus, off, *(u32 *)buf, count);
473}
474
475/**
476 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
477 * @kobj: kobject corresponding to device to be mapped
478 * @attr: struct bin_attribute for this file
479 * @vma: struct vm_area_struct passed to mmap
480 *
f19aeb1f 481 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
482 * legacy memory space (first meg of bus space) into application virtual
483 * memory space.
484 */
f19aeb1f 485static int
1da177e4
LT
486pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
487 struct vm_area_struct *vma)
488{
489 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 490 struct device,
1da177e4
LT
491 kobj));
492
f19aeb1f
BH
493 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
494}
495
496/**
497 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
498 * @kobj: kobject corresponding to device to be mapped
499 * @attr: struct bin_attribute for this file
500 * @vma: struct vm_area_struct passed to mmap
501 *
502 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
503 * legacy IO space (first meg of bus space) into application virtual
504 * memory space. Returns -ENOSYS if the operation isn't supported
505 */
506static int
507pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
508 struct vm_area_struct *vma)
509{
510 struct pci_bus *bus = to_pci_bus(container_of(kobj,
511 struct device,
512 kobj));
513
514 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
515}
516
517/**
518 * pci_create_legacy_files - create legacy I/O port and memory files
519 * @b: bus to create files under
520 *
521 * Some platforms allow access to legacy I/O port and ISA memory space on
522 * a per-bus basis. This routine creates the files and ties them into
523 * their associated read, write and mmap files from pci-sysfs.c
524 *
525 * On error unwind, but don't propogate the error to the caller
526 * as it is ok to set up the PCI bus without these files.
527 */
528void pci_create_legacy_files(struct pci_bus *b)
529{
530 int error;
531
532 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
533 GFP_ATOMIC);
534 if (!b->legacy_io)
535 goto kzalloc_err;
536
537 b->legacy_io->attr.name = "legacy_io";
538 b->legacy_io->size = 0xffff;
539 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
540 b->legacy_io->read = pci_read_legacy_io;
541 b->legacy_io->write = pci_write_legacy_io;
542 b->legacy_io->mmap = pci_mmap_legacy_io;
543 error = device_create_bin_file(&b->dev, b->legacy_io);
544 if (error)
545 goto legacy_io_err;
546
547 /* Allocated above after the legacy_io struct */
548 b->legacy_mem = b->legacy_io + 1;
549 b->legacy_mem->attr.name = "legacy_mem";
550 b->legacy_mem->size = 1024*1024;
551 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
552 b->legacy_mem->mmap = pci_mmap_legacy_mem;
553 error = device_create_bin_file(&b->dev, b->legacy_mem);
554 if (error)
555 goto legacy_mem_err;
556
557 return;
558
559legacy_mem_err:
560 device_remove_bin_file(&b->dev, b->legacy_io);
561legacy_io_err:
562 kfree(b->legacy_io);
563 b->legacy_io = NULL;
564kzalloc_err:
565 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
566 "and ISA memory resources to sysfs\n");
567 return;
568}
569
570void pci_remove_legacy_files(struct pci_bus *b)
571{
572 if (b->legacy_io) {
573 device_remove_bin_file(&b->dev, b->legacy_io);
574 device_remove_bin_file(&b->dev, b->legacy_mem);
575 kfree(b->legacy_io); /* both are allocated here */
576 }
1da177e4
LT
577}
578#endif /* HAVE_PCI_LEGACY */
579
580#ifdef HAVE_PCI_MMAP
b5ff7df3 581
9eff02e2 582int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
b5ff7df3
LT
583{
584 unsigned long nr, start, size;
585
586 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
587 start = vma->vm_pgoff;
88e7df0b 588 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
b5ff7df3
LT
589 if (start < size && size - start >= nr)
590 return 1;
591 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
592 current->comm, start, start+nr, pci_name(pdev), resno, size);
593 return 0;
594}
595
1da177e4
LT
596/**
597 * pci_mmap_resource - map a PCI resource into user memory space
598 * @kobj: kobject for mapping
599 * @attr: struct bin_attribute for the file being mapped
600 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 601 * @write_combine: 1 for write_combine mapping
1da177e4
LT
602 *
603 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
604 */
605static int
606pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 607 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
608{
609 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
610 struct device, kobj));
611 struct resource *res = (struct resource *)attr->private;
612 enum pci_mmap_state mmap_type;
e31dd6e4 613 resource_size_t start, end;
2311b1f2 614 int i;
1da177e4 615
2311b1f2
ME
616 for (i = 0; i < PCI_ROM_RESOURCE; i++)
617 if (res == &pdev->resource[i])
618 break;
619 if (i >= PCI_ROM_RESOURCE)
620 return -ENODEV;
621
b5ff7df3
LT
622 if (!pci_mmap_fits(pdev, i, vma))
623 return -EINVAL;
624
2311b1f2
ME
625 /* pci_mmap_page_range() expects the same kind of entry as coming
626 * from /proc/bus/pci/ which is a "user visible" value. If this is
627 * different from the resource itself, arch will do necessary fixup.
628 */
629 pci_resource_to_user(pdev, i, res, &start, &end);
630 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
631 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
632
e8de1481
AV
633 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
634 return -EINVAL;
635
45aec1ae 636 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
637}
638
639static int
640pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
641 struct vm_area_struct *vma)
642{
643 return pci_mmap_resource(kobj, attr, vma, 0);
644}
645
646static int
647pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
648 struct vm_area_struct *vma)
649{
650 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
651}
652
b19441af
GKH
653/**
654 * pci_remove_resource_files - cleanup resource files
655 * @dev: dev to cleanup
656 *
657 * If we created resource files for @dev, remove them from sysfs and
658 * free their resources.
659 */
660static void
661pci_remove_resource_files(struct pci_dev *pdev)
662{
663 int i;
664
665 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
666 struct bin_attribute *res_attr;
667
668 res_attr = pdev->res_attr[i];
669 if (res_attr) {
670 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
671 kfree(res_attr);
672 }
45aec1ae 673
674 res_attr = pdev->res_attr_wc[i];
675 if (res_attr) {
676 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
677 kfree(res_attr);
678 }
b19441af
GKH
679 }
680}
681
45aec1ae 682static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
683{
684 /* allocate attribute structure, piggyback attribute name */
685 int name_len = write_combine ? 13 : 10;
686 struct bin_attribute *res_attr;
687 int retval;
688
689 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
690 if (res_attr) {
691 char *res_attr_name = (char *)(res_attr + 1);
692
693 if (write_combine) {
694 pdev->res_attr_wc[num] = res_attr;
695 sprintf(res_attr_name, "resource%d_wc", num);
696 res_attr->mmap = pci_mmap_resource_wc;
697 } else {
698 pdev->res_attr[num] = res_attr;
699 sprintf(res_attr_name, "resource%d", num);
700 res_attr->mmap = pci_mmap_resource_uc;
701 }
702 res_attr->attr.name = res_attr_name;
703 res_attr->attr.mode = S_IRUSR | S_IWUSR;
704 res_attr->size = pci_resource_len(pdev, num);
705 res_attr->private = &pdev->resource[num];
706 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
707 } else
708 retval = -ENOMEM;
709
710 return retval;
711}
712
1da177e4
LT
713/**
714 * pci_create_resource_files - create resource files in sysfs for @dev
715 * @dev: dev in question
716 *
717 * Walk the resources in @dev creating files for each resource available.
718 */
b19441af 719static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
720{
721 int i;
b19441af 722 int retval;
1da177e4
LT
723
724 /* Expose the PCI resources from this device as files */
725 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
726
727 /* skip empty resources */
728 if (!pci_resource_len(pdev, i))
729 continue;
730
45aec1ae 731 retval = pci_create_attr(pdev, i, 0);
732 /* for prefetchable resources, create a WC mappable file */
733 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
734 retval = pci_create_attr(pdev, i, 1);
735
736 if (retval) {
737 pci_remove_resource_files(pdev);
738 return retval;
1da177e4
LT
739 }
740 }
b19441af 741 return 0;
1da177e4
LT
742}
743#else /* !HAVE_PCI_MMAP */
b19441af 744static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
745static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
746#endif /* HAVE_PCI_MMAP */
747
748/**
749 * pci_write_rom - used to enable access to the PCI ROM display
750 * @kobj: kernel object handle
751 * @buf: user input
752 * @off: file offset
753 * @count: number of byte in input
754 *
755 * writing anything except 0 enables it
756 */
757static ssize_t
91a69029
ZR
758pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
759 char *buf, loff_t off, size_t count)
1da177e4
LT
760{
761 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
762
763 if ((off == 0) && (*buf == '0') && (count == 2))
764 pdev->rom_attr_enabled = 0;
765 else
766 pdev->rom_attr_enabled = 1;
767
768 return count;
769}
770
771/**
772 * pci_read_rom - read a PCI ROM
773 * @kobj: kernel object handle
774 * @buf: where to put the data we read from the ROM
775 * @off: file offset
776 * @count: number of bytes to read
777 *
778 * Put @count bytes starting at @off into @buf from the ROM in the PCI
779 * device corresponding to @kobj.
780 */
781static ssize_t
91a69029
ZR
782pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
783 char *buf, loff_t off, size_t count)
1da177e4
LT
784{
785 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
786 void __iomem *rom;
787 size_t size;
788
789 if (!pdev->rom_attr_enabled)
790 return -EINVAL;
791
792 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
793 if (!rom)
794 return 0;
795
796 if (off >= size)
797 count = 0;
798 else {
799 if (off + count > size)
800 count = size - off;
801
802 memcpy_fromio(buf, rom + off, count);
803 }
804 pci_unmap_rom(pdev, rom);
805
806 return count;
807}
808
809static struct bin_attribute pci_config_attr = {
810 .attr = {
811 .name = "config",
812 .mode = S_IRUGO | S_IWUSR,
1da177e4 813 },
557848c3 814 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
815 .read = pci_read_config,
816 .write = pci_write_config,
817};
818
819static struct bin_attribute pcie_config_attr = {
820 .attr = {
821 .name = "config",
822 .mode = S_IRUGO | S_IWUSR,
1da177e4 823 },
557848c3 824 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
825 .read = pci_read_config,
826 .write = pci_write_config,
827};
828
a2cd52ca 829int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 830{
a2cd52ca 831 return 0;
575e3348
ME
832}
833
280c73d3
ZY
834static int pci_create_capabilities_sysfs(struct pci_dev *dev)
835{
836 int retval;
837 struct bin_attribute *attr;
838
839 /* If the device has VPD, try to expose it in sysfs. */
840 if (dev->vpd) {
841 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
842 if (!attr)
843 return -ENOMEM;
844
845 attr->size = dev->vpd->len;
846 attr->attr.name = "vpd";
847 attr->attr.mode = S_IRUSR | S_IWUSR;
848 attr->read = pci_read_vpd;
849 attr->write = pci_write_vpd;
850 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
851 if (retval) {
852 kfree(dev->vpd->attr);
853 return retval;
854 }
855 dev->vpd->attr = attr;
856 }
857
858 /* Active State Power Management */
859 pcie_aspm_create_sysfs_dev_files(dev);
860
861 return 0;
862}
863
b19441af 864int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 865{
b19441af 866 int retval;
280c73d3
ZY
867 int rom_size = 0;
868 struct bin_attribute *attr;
b19441af 869
1da177e4
LT
870 if (!sysfs_initialized)
871 return -EACCES;
872
557848c3 873 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 874 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 875 else
b19441af
GKH
876 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
877 if (retval)
878 goto err;
1da177e4 879
b19441af
GKH
880 retval = pci_create_resource_files(pdev);
881 if (retval)
280c73d3
ZY
882 goto err_config_file;
883
884 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
885 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
886 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
887 rom_size = 0x20000;
1da177e4
LT
888
889 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 890 if (rom_size) {
94e61088 891 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 892 if (!attr) {
b19441af 893 retval = -ENOMEM;
9890b12a 894 goto err_resource_files;
1da177e4 895 }
280c73d3
ZY
896 attr->size = rom_size;
897 attr->attr.name = "rom";
898 attr->attr.mode = S_IRUSR;
899 attr->read = pci_read_rom;
900 attr->write = pci_write_rom;
901 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
902 if (retval) {
903 kfree(attr);
904 goto err_resource_files;
905 }
906 pdev->rom_attr = attr;
1da177e4 907 }
280c73d3 908
1da177e4 909 /* add platform-specific attributes */
280c73d3
ZY
910 retval = pcibios_add_platform_entries(pdev);
911 if (retval)
a2cd52ca 912 goto err_rom_file;
b19441af 913
280c73d3
ZY
914 /* add sysfs entries for various capabilities */
915 retval = pci_create_capabilities_sysfs(pdev);
916 if (retval)
917 goto err_rom_file;
7d715a6c 918
1da177e4 919 return 0;
b19441af 920
a2cd52ca 921err_rom_file:
280c73d3 922 if (rom_size) {
94e61088 923 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
924 kfree(pdev->rom_attr);
925 pdev->rom_attr = NULL;
926 }
9890b12a
ME
927err_resource_files:
928 pci_remove_resource_files(pdev);
94e61088 929err_config_file:
557848c3 930 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
931 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
932 else
933 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
934err:
935 return retval;
1da177e4
LT
936}
937
280c73d3
ZY
938static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
939{
940 if (dev->vpd && dev->vpd->attr) {
941 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
942 kfree(dev->vpd->attr);
943 }
944
945 pcie_aspm_remove_sysfs_dev_files(dev);
946}
947
1da177e4
LT
948/**
949 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
950 * @pdev: device whose entries we should free
951 *
952 * Cleanup when @pdev is removed from sysfs.
953 */
954void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
955{
280c73d3
ZY
956 int rom_size = 0;
957
d67afe5e
DM
958 if (!sysfs_initialized)
959 return;
960
280c73d3 961 pci_remove_capabilities_sysfs(pdev);
7d715a6c 962
557848c3 963 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
964 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
965 else
966 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
967
968 pci_remove_resource_files(pdev);
969
280c73d3
ZY
970 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
971 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
972 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
973 rom_size = 0x20000;
974
975 if (rom_size && pdev->rom_attr) {
976 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
977 kfree(pdev->rom_attr);
1da177e4
LT
978 }
979}
980
981static int __init pci_sysfs_init(void)
982{
983 struct pci_dev *pdev = NULL;
b19441af
GKH
984 int retval;
985
1da177e4 986 sysfs_initialized = 1;
b19441af
GKH
987 for_each_pci_dev(pdev) {
988 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
989 if (retval) {
990 pci_dev_put(pdev);
b19441af 991 return retval;
151fc5df 992 }
b19441af 993 }
1da177e4
LT
994
995 return 0;
996}
997
40ee9e9f 998late_initcall(pci_sysfs_init);