[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pci-sysfs.c

/*
 * drivers/pci/pci-sysfs.c
 *
 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
 * (C) Copyright 2002-2004 IBM Corp.
 * (C) Copyright 2003 Matthew Wilcox
 * (C) Copyright 2003 Hewlett-Packard
 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
 *
 * File attributes for PCI devices
 *
 * Modeled after usb's driverfs.c 
 *
 */


#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/stat.h>
#include <linux/topology.h>
#include <linux/mm.h>

#include "pci.h"

static int sysfs_initialized;	/* = 0 */

/* show configuration fields */
#define pci_config_attr(field, format_string)				\
static ssize_t								\
field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
{									\
	struct pci_dev *pdev;						\
									\
	pdev = to_pci_dev (dev);					\
	return sprintf (buf, format_string, pdev->field);		\
}

pci_config_attr(vendor, "0x%04x\n");
pci_config_attr(device, "0x%04x\n");
pci_config_attr(subsystem_vendor, "0x%04x\n");
pci_config_attr(subsystem_device, "0x%04x\n");
pci_config_attr(class, "0x%06x\n");
pci_config_attr(irq, "%u\n");
pci_config_attr(is_enabled, "%u\n");

static ssize_t broken_parity_status_show(struct device *dev,
					 struct device_attribute *attr,
					 char *buf)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	return sprintf (buf, "%u\n", pdev->broken_parity_status);
}

static ssize_t broken_parity_status_store(struct device *dev,
					  struct device_attribute *attr,
					  const char *buf, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	ssize_t consumed = -EINVAL;

	if ((count > 0) && (*buf == '0' || *buf == '1')) {
		pdev->broken_parity_status = *buf == '1' ? 1 : 0;
		consumed = count;
	}
	return consumed;
}

static ssize_t local_cpus_show(struct device *dev,
			struct device_attribute *attr, char *buf)
{		
	cpumask_t mask;
	int len;

	mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
	len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
	strcat(buf,"\n"); 
	return 1+len;
}

/* show resources */
static ssize_t
resource_show(struct device * dev, struct device_attribute *attr, char * buf)
{
	struct pci_dev * pci_dev = to_pci_dev(dev);
	char * str = buf;
	int i;
	int max = 7;
	resource_size_t start, end;

	if (pci_dev->subordinate)
		max = DEVICE_COUNT_RESOURCE;

	for (i = 0; i < max; i++) {
		struct resource *res =  &pci_dev->resource[i];
		pci_resource_to_user(pci_dev, i, res, &start, &end);
		str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
			       (unsigned long long)start,
			       (unsigned long long)end,
			       (unsigned long long)res->flags);
	}
	return (str - buf);
}

static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct pci_dev *pci_dev = to_pci_dev(dev);

	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
		       pci_dev->vendor, pci_dev->device,
		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
		       (u8)(pci_dev->class));
}
static ssize_t
is_enabled_store(struct device *dev, struct device_attribute *attr,
		const char *buf, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(dev);

	/* this can crash the machine when done on the "wrong" device */
	if (!capable(CAP_SYS_ADMIN))
		return count;

	if (*buf == '0')
		pci_disable_device(pdev);

	if (*buf == '1')
		pci_enable_device(pdev);

	return count;
}


struct device_attribute pci_dev_attrs[] = {
	__ATTR_RO(resource),
	__ATTR_RO(vendor),
	__ATTR_RO(device),
	__ATTR_RO(subsystem_vendor),
	__ATTR_RO(subsystem_device),
	__ATTR_RO(class),
	__ATTR_RO(irq),
	__ATTR_RO(local_cpus),
	__ATTR_RO(modalias),
	__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
	__ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
		broken_parity_status_show,broken_parity_status_store),
	__ATTR_NULL,
};

static ssize_t
pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	unsigned int size = 64;
	loff_t init_off = off;
	u8 *data = (u8*) buf;

	/* Several chips lock up trying to read undefined config space */
	if (capable(CAP_SYS_ADMIN)) {
		size = dev->cfg_size;
	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
		size = 128;
	}

	if (off > size)
		return 0;
	if (off + count > size) {
		size -= off;
		count = size;
	} else {
		size = count;
	}

	if ((off & 1) && size) {
		u8 val;
		pci_user_read_config_byte(dev, off, &val);
		data[off - init_off] = val;
		off++;
		size--;
	}

	if ((off & 3) && size > 2) {
		u16 val;
		pci_user_read_config_word(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		off += 2;
		size -= 2;
	}

	while (size > 3) {
		u32 val;
		pci_user_read_config_dword(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		data[off - init_off + 2] = (val >> 16) & 0xff;
		data[off - init_off + 3] = (val >> 24) & 0xff;
		off += 4;
		size -= 4;
	}

	if (size >= 2) {
		u16 val;
		pci_user_read_config_word(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		off += 2;
		size -= 2;
	}

	if (size > 0) {
		u8 val;
		pci_user_read_config_byte(dev, off, &val);
		data[off - init_off] = val;
		off++;
		--size;
	}

	return count;
}

static ssize_t
pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	unsigned int size = count;
	loff_t init_off = off;
	u8 *data = (u8*) buf;

	if (off > dev->cfg_size)
		return 0;
	if (off + count > dev->cfg_size) {
		size = dev->cfg_size - off;
		count = size;
	}
	
	if ((off & 1) && size) {
		pci_user_write_config_byte(dev, off, data[off - init_off]);
		off++;
		size--;
	}
	
	if ((off & 3) && size > 2) {
		u16 val = data[off - init_off];
		val |= (u16) data[off - init_off + 1] << 8;
                pci_user_write_config_word(dev, off, val);
                off += 2;
                size -= 2;
        }

	while (size > 3) {
		u32 val = data[off - init_off];
		val |= (u32) data[off - init_off + 1] << 8;
		val |= (u32) data[off - init_off + 2] << 16;
		val |= (u32) data[off - init_off + 3] << 24;
		pci_user_write_config_dword(dev, off, val);
		off += 4;
		size -= 4;
	}
	
	if (size >= 2) {
		u16 val = data[off - init_off];
		val |= (u16) data[off - init_off + 1] << 8;
		pci_user_write_config_word(dev, off, val);
		off += 2;
		size -= 2;
	}

	if (size) {
		pci_user_write_config_byte(dev, off, data[off - init_off]);
		off++;
		--size;
	}

	return count;
}

#ifdef HAVE_PCI_LEGACY
/**
 * pci_read_legacy_io - read byte(s) from legacy I/O port space
 * @kobj: kobject corresponding to file to read from
 * @buf: buffer to store results
 * @off: offset into legacy I/O port space
 * @count: number of bytes to read
 *
 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
 * callback routine (pci_legacy_read).
 */
ssize_t
pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
                                                      struct class_device,
						      kobj));

        /* Only support 1, 2 or 4 byte accesses */
        if (count != 1 && count != 2 && count != 4)
                return -EINVAL;

        return pci_legacy_read(bus, off, (u32 *)buf, count);
}

/**
 * pci_write_legacy_io - write byte(s) to legacy I/O port space
 * @kobj: kobject corresponding to file to read from
 * @buf: buffer containing value to be written
 * @off: offset into legacy I/O port space
 * @count: number of bytes to write
 *
 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
 * callback routine (pci_legacy_write).
 */
ssize_t
pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
						      struct class_device,
						      kobj));
        /* Only support 1, 2 or 4 byte accesses */
        if (count != 1 && count != 2 && count != 4)
                return -EINVAL;

        return pci_legacy_write(bus, off, *(u32 *)buf, count);
}

/**
 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
 * @kobj: kobject corresponding to device to be mapped
 * @attr: struct bin_attribute for this file
 * @vma: struct vm_area_struct passed to mmap
 *
 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
 * legacy memory space (first meg of bus space) into application virtual
 * memory space.
 */
int
pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
                    struct vm_area_struct *vma)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
                                                      struct class_device,
						      kobj));

        return pci_mmap_legacy_page_range(bus, vma);
}
#endif /* HAVE_PCI_LEGACY */

#ifdef HAVE_PCI_MMAP
/**
 * pci_mmap_resource - map a PCI resource into user memory space
 * @kobj: kobject for mapping
 * @attr: struct bin_attribute for the file being mapped
 * @vma: struct vm_area_struct passed into the mmap
 *
 * Use the regular PCI mapping routines to map a PCI resource into userspace.
 * FIXME: write combining?  maybe automatic for prefetchable regions?
 */
static int
pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
		  struct vm_area_struct *vma)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
						       struct device, kobj));
	struct resource *res = (struct resource *)attr->private;
	enum pci_mmap_state mmap_type;
	resource_size_t start, end;
	int i;

	for (i = 0; i < PCI_ROM_RESOURCE; i++)
		if (res == &pdev->resource[i])
			break;
	if (i >= PCI_ROM_RESOURCE)
		return -ENODEV;

	/* pci_mmap_page_range() expects the same kind of entry as coming
	 * from /proc/bus/pci/ which is a "user visible" value. If this is
	 * different from the resource itself, arch will do necessary fixup.
	 */
	pci_resource_to_user(pdev, i, res, &start, &end);
	vma->vm_pgoff += start >> PAGE_SHIFT;
	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;

	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
}

/**
 * pci_create_resource_files - create resource files in sysfs for @dev
 * @dev: dev in question
 *
 * Walk the resources in @dev creating files for each resource available.
 */
static void
pci_create_resource_files(struct pci_dev *pdev)
{
	int i;

	/* Expose the PCI resources from this device as files */
	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
		struct bin_attribute *res_attr;

		/* skip empty resources */
		if (!pci_resource_len(pdev, i))
			continue;

		/* allocate attribute structure, piggyback attribute name */
		res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
		if (res_attr) {
			char *res_attr_name = (char *)(res_attr + 1);

			pdev->res_attr[i] = res_attr;
			sprintf(res_attr_name, "resource%d", i);
			res_attr->attr.name = res_attr_name;
			res_attr->attr.mode = S_IRUSR | S_IWUSR;
			res_attr->attr.owner = THIS_MODULE;
			res_attr->size = pci_resource_len(pdev, i);
			res_attr->mmap = pci_mmap_resource;
			res_attr->private = &pdev->resource[i];
			sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
		}
	}
}

/**
 * pci_remove_resource_files - cleanup resource files
 * @dev: dev to cleanup
 *
 * If we created resource files for @dev, remove them from sysfs and
 * free their resources.
 */
static void
pci_remove_resource_files(struct pci_dev *pdev)
{
	int i;

	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
		struct bin_attribute *res_attr;

		res_attr = pdev->res_attr[i];
		if (res_attr) {
			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
			kfree(res_attr);
		}
	}
}
#else /* !HAVE_PCI_MMAP */
static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
#endif /* HAVE_PCI_MMAP */

/**
 * pci_write_rom - used to enable access to the PCI ROM display
 * @kobj: kernel object handle
 * @buf: user input
 * @off: file offset
 * @count: number of byte in input
 *
 * writing anything except 0 enables it
 */
static ssize_t
pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));

	if ((off ==  0) && (*buf == '0') && (count == 2))
		pdev->rom_attr_enabled = 0;
	else
		pdev->rom_attr_enabled = 1;

	return count;
}

/**
 * pci_read_rom - read a PCI ROM
 * @kobj: kernel object handle
 * @buf: where to put the data we read from the ROM
 * @off: file offset
 * @count: number of bytes to read
 *
 * Put @count bytes starting at @off into @buf from the ROM in the PCI
 * device corresponding to @kobj.
 */
static ssize_t
pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
	void __iomem *rom;
	size_t size;

	if (!pdev->rom_attr_enabled)
		return -EINVAL;
	
	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
	if (!rom)
		return 0;
		
	if (off >= size)
		count = 0;
	else {
		if (off + count > size)
			count = size - off;
		
		memcpy_fromio(buf, rom + off, count);
	}
	pci_unmap_rom(pdev, rom);
		
	return count;
}

static struct bin_attribute pci_config_attr = {
	.attr =	{
		.name = "config",
		.mode = S_IRUGO | S_IWUSR,
		.owner = THIS_MODULE,
	},
	.size = 256,
	.read = pci_read_config,
	.write = pci_write_config,
};

static struct bin_attribute pcie_config_attr = {
	.attr =	{
		.name = "config",
		.mode = S_IRUGO | S_IWUSR,
		.owner = THIS_MODULE,
	},
	.size = 4096,
	.read = pci_read_config,
	.write = pci_write_config,
};

int pci_create_sysfs_dev_files (struct pci_dev *pdev)
{
	if (!sysfs_initialized)
		return -EACCES;

	if (pdev->cfg_size < 4096)
		sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
	else
		sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);

	pci_create_resource_files(pdev);

	/* If the device has a ROM, try to expose it in sysfs. */
	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
		struct bin_attribute *rom_attr;
		
		rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
		if (rom_attr) {
			pdev->rom_attr = rom_attr;
			rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
			rom_attr->attr.name = "rom";
			rom_attr->attr.mode = S_IRUSR;
			rom_attr->attr.owner = THIS_MODULE;
			rom_attr->read = pci_read_rom;
			rom_attr->write = pci_write_rom;
			sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
		}
	}
	/* add platform-specific attributes */
	pcibios_add_platform_entries(pdev);
	
	return 0;
}

/**
 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
 * @pdev: device whose entries we should free
 *
 * Cleanup when @pdev is removed from sysfs.
 */
void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
{
	if (pdev->cfg_size < 4096)
		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
	else
		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);

	pci_remove_resource_files(pdev);

	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
		if (pdev->rom_attr) {
			sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
			kfree(pdev->rom_attr);
		}
	}
}

static int __init pci_sysfs_init(void)
{
	struct pci_dev *pdev = NULL;
	
	sysfs_initialized = 1;
	for_each_pci_dev(pdev)
		pci_create_sysfs_dev_files(pdev);

	return 0;
}

__initcall(pci_sysfs_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* drivers/pci/pci-sysfs.c
	3	*
	4	* (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
	5	* (C) Copyright 2002-2004 IBM Corp.
	6	* (C) Copyright 2003 Matthew Wilcox
	7	* (C) Copyright 2003 Hewlett-Packard
	8	* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
	9	* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
	10	*
	11	* File attributes for PCI devices
	12	*
	13	* Modeled after usb's driverfs.c
	14	*
	15	*/
	16
	17
1da177e4 LT	18	#include <linux/kernel.h>
	19	#include <linux/pci.h>
	20	#include <linux/stat.h>
	21	#include <linux/topology.h>
	22	#include <linux/mm.h>
	23
	24	#include "pci.h"
	25
	26	static int sysfs_initialized; /* = 0 */
	27
	28	/* show configuration fields */
	29	#define pci_config_attr(field, format_string) \
	30	static ssize_t \
e404e274	31	field##_show(struct device dev, struct device_attribute attr, char *buf) \
1da177e4 LT	32	{ \
	33	struct pci_dev *pdev; \
	34	\
	35	pdev = to_pci_dev (dev); \
	36	return sprintf (buf, format_string, pdev->field); \
	37	}
	38
	39	pci_config_attr(vendor, "0x%04x\n");
	40	pci_config_attr(device, "0x%04x\n");
	41	pci_config_attr(subsystem_vendor, "0x%04x\n");
	42	pci_config_attr(subsystem_device, "0x%04x\n");
	43	pci_config_attr(class, "0x%06x\n");
	44	pci_config_attr(irq, "%u\n");
9f125d30	45	pci_config_attr(is_enabled, "%u\n");
1da177e4	46
bdee9d98 DT	47	static ssize_t broken_parity_status_show(struct device *dev,
	48	struct device_attribute *attr,
	49	char *buf)
	50	{
	51	struct pci_dev *pdev = to_pci_dev(dev);
	52	return sprintf (buf, "%u\n", pdev->broken_parity_status);
	53	}
	54
	55	static ssize_t broken_parity_status_store(struct device *dev,
	56	struct device_attribute *attr,
	57	const char *buf, size_t count)
	58	{
	59	struct pci_dev *pdev = to_pci_dev(dev);
	60	ssize_t consumed = -EINVAL;
	61
	62	if ((count > 0) && (buf == '0' \|\| buf == '1')) {
	63	pdev->broken_parity_status = *buf == '1' ? 1 : 0;
	64	consumed = count;
	65	}
	66	return consumed;
	67	}
	68
4327edf6 AC	69	static ssize_t local_cpus_show(struct device *dev,
4327edf6 AC	70	struct device_attribute attr, char buf)
1da177e4	71	{
4327edf6 AC	72	cpumask_t mask;
	73	int len;
	74
	75	mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
	76	len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
1da177e4 LT	77	strcat(buf,"\n");
	78	return 1+len;
	79	}
	80
	81	/* show resources */
	82	static ssize_t
e404e274	83	resource_show(struct device * dev, struct device_attribute attr, char buf)
1da177e4 LT	84	{
	85	struct pci_dev * pci_dev = to_pci_dev(dev);
	86	char * str = buf;
	87	int i;
	88	int max = 7;
e31dd6e4	89	resource_size_t start, end;
1da177e4 LT	90
	91	if (pci_dev->subordinate)
	92	max = DEVICE_COUNT_RESOURCE;
	93
	94	for (i = 0; i < max; i++) {
2311b1f2 ME	95	struct resource *res = &pci_dev->resource[i];
	96	pci_resource_to_user(pci_dev, i, res, &start, &end);
	97	str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
	98	(unsigned long long)start,
	99	(unsigned long long)end,
	100	(unsigned long long)res->flags);
1da177e4 LT	101	}
	102	return (str - buf);
	103	}
	104
87c8a443	105	static ssize_t modalias_show(struct device dev, struct device_attribute attr, char *buf)
9888549e GKH	106	{
	107	struct pci_dev *pci_dev = to_pci_dev(dev);
	108
	109	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
	110	pci_dev->vendor, pci_dev->device,
	111	pci_dev->subsystem_vendor, pci_dev->subsystem_device,
	112	(u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
	113	(u8)(pci_dev->class));
	114	}
9f125d30 AV	115	static ssize_t
	116	is_enabled_store(struct device dev, struct device_attribute attr,
	117	const char *buf, size_t count)
	118	{
	119	struct pci_dev *pdev = to_pci_dev(dev);
	120
	121	/* this can crash the machine when done on the "wrong" device */
	122	if (!capable(CAP_SYS_ADMIN))
	123	return count;
	124
	125	if (*buf == '0')
	126	pci_disable_device(pdev);
	127
	128	if (*buf == '1')
	129	pci_enable_device(pdev);
	130
	131	return count;
	132	}
	133
9888549e	134
1da177e4 LT	135	struct device_attribute pci_dev_attrs[] = {
	136	__ATTR_RO(resource),
	137	__ATTR_RO(vendor),
	138	__ATTR_RO(device),
	139	__ATTR_RO(subsystem_vendor),
	140	__ATTR_RO(subsystem_device),
	141	__ATTR_RO(class),
	142	__ATTR_RO(irq),
	143	__ATTR_RO(local_cpus),
9888549e	144	__ATTR_RO(modalias),
9f125d30	145	__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98 DT	146	__ATTR(broken_parity_status,(S_IRUGO\|S_IWUSR),
bdee9d98 DT	147	broken_parity_status_show,broken_parity_status_store),
1da177e4 LT	148	__ATTR_NULL,
	149	};
	150
	151	static ssize_t
	152	pci_read_config(struct kobject kobj, char buf, loff_t off, size_t count)
	153	{
	154	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	155	unsigned int size = 64;
	156	loff_t init_off = off;
4c0619ad	157	u8 data = (u8) buf;
1da177e4 LT	158
	159	/* Several chips lock up trying to read undefined config space */
	160	if (capable(CAP_SYS_ADMIN)) {
	161	size = dev->cfg_size;
	162	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
	163	size = 128;
	164	}
	165
	166	if (off > size)
	167	return 0;
	168	if (off + count > size) {
	169	size -= off;
	170	count = size;
	171	} else {
	172	size = count;
	173	}
	174
4c0619ad SS	175	if ((off & 1) && size) {
4c0619ad SS	176	u8 val;
e04b0ea2	177	pci_user_read_config_byte(dev, off, &val);
4c0619ad	178	data[off - init_off] = val;
1da177e4	179	off++;
4c0619ad SS	180	size--;
	181	}
	182
	183	if ((off & 3) && size > 2) {
	184	u16 val;
e04b0ea2	185	pci_user_read_config_word(dev, off, &val);
4c0619ad SS	186	data[off - init_off] = val & 0xff;
	187	data[off - init_off + 1] = (val >> 8) & 0xff;
	188	off += 2;
	189	size -= 2;
1da177e4 LT	190	}
	191
	192	while (size > 3) {
4c0619ad	193	u32 val;
e04b0ea2	194	pci_user_read_config_dword(dev, off, &val);
4c0619ad SS	195	data[off - init_off] = val & 0xff;
	196	data[off - init_off + 1] = (val >> 8) & 0xff;
	197	data[off - init_off + 2] = (val >> 16) & 0xff;
	198	data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4 LT	199	off += 4;
	200	size -= 4;
	201	}
	202
4c0619ad SS	203	if (size >= 2) {
4c0619ad SS	204	u16 val;
e04b0ea2	205	pci_user_read_config_word(dev, off, &val);
4c0619ad SS	206	data[off - init_off] = val & 0xff;
	207	data[off - init_off + 1] = (val >> 8) & 0xff;
	208	off += 2;
	209	size -= 2;
	210	}
	211
	212	if (size > 0) {
	213	u8 val;
e04b0ea2	214	pci_user_read_config_byte(dev, off, &val);
4c0619ad	215	data[off - init_off] = val;
1da177e4 LT	216	off++;
	217	--size;
	218	}
	219
	220	return count;
	221	}
	222
	223	static ssize_t
	224	pci_write_config(struct kobject kobj, char buf, loff_t off, size_t count)
	225	{
	226	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	227	unsigned int size = count;
	228	loff_t init_off = off;
4c0619ad	229	u8 data = (u8) buf;
1da177e4 LT	230
	231	if (off > dev->cfg_size)
	232	return 0;
	233	if (off + count > dev->cfg_size) {
	234	size = dev->cfg_size - off;
	235	count = size;
	236	}
4c0619ad SS	237
4c0619ad SS	238	if ((off & 1) && size) {
e04b0ea2	239	pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4	240	off++;
4c0619ad	241	size--;
1da177e4	242	}
4c0619ad SS	243
	244	if ((off & 3) && size > 2) {
	245	u16 val = data[off - init_off];
	246	val \|= (u16) data[off - init_off + 1] << 8;
e04b0ea2	247	pci_user_write_config_word(dev, off, val);
4c0619ad SS	248	off += 2;
	249	size -= 2;
	250	}
1da177e4 LT	251
1da177e4 LT	252	while (size > 3) {
4c0619ad SS	253	u32 val = data[off - init_off];
	254	val \|= (u32) data[off - init_off + 1] << 8;
	255	val \|= (u32) data[off - init_off + 2] << 16;
	256	val \|= (u32) data[off - init_off + 3] << 24;
e04b0ea2	257	pci_user_write_config_dword(dev, off, val);
1da177e4 LT	258	off += 4;
	259	size -= 4;
	260	}
4c0619ad SS	261
	262	if (size >= 2) {
	263	u16 val = data[off - init_off];
	264	val \|= (u16) data[off - init_off + 1] << 8;
e04b0ea2	265	pci_user_write_config_word(dev, off, val);
4c0619ad SS	266	off += 2;
	267	size -= 2;
	268	}
1da177e4	269
4c0619ad	270	if (size) {
e04b0ea2	271	pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 LT	272	off++;
	273	--size;
	274	}
	275
	276	return count;
	277	}
	278
	279	#ifdef HAVE_PCI_LEGACY
	280	/**
	281	* pci_read_legacy_io - read byte(s) from legacy I/O port space
	282	* @kobj: kobject corresponding to file to read from
	283	* @buf: buffer to store results
	284	* @off: offset into legacy I/O port space
	285	* @count: number of bytes to read
	286	*
	287	* Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
	288	* callback routine (pci_legacy_read).
	289	*/
	290	ssize_t
	291	pci_read_legacy_io(struct kobject kobj, char buf, loff_t off, size_t count)
	292	{
	293	struct pci_bus *bus = to_pci_bus(container_of(kobj,
	294	struct class_device,
	295	kobj));
	296
	297	/* Only support 1, 2 or 4 byte accesses */
	298	if (count != 1 && count != 2 && count != 4)
	299	return -EINVAL;
	300
	301	return pci_legacy_read(bus, off, (u32 *)buf, count);
	302	}
	303
	304	/**
	305	* pci_write_legacy_io - write byte(s) to legacy I/O port space
	306	* @kobj: kobject corresponding to file to read from
	307	* @buf: buffer containing value to be written
	308	* @off: offset into legacy I/O port space
	309	* @count: number of bytes to write
	310	*
	311	* Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
	312	* callback routine (pci_legacy_write).
	313	*/
	314	ssize_t
	315	pci_write_legacy_io(struct kobject kobj, char buf, loff_t off, size_t count)
	316	{
	317	struct pci_bus *bus = to_pci_bus(container_of(kobj,
	318	struct class_device,
	319	kobj));
	320	/* Only support 1, 2 or 4 byte accesses */
	321	if (count != 1 && count != 2 && count != 4)
	322	return -EINVAL;
	323
	324	return pci_legacy_write(bus, off, (u32 )buf, count);
	325	}
	326
	327	/**
	328	* pci_mmap_legacy_mem - map legacy PCI memory into user memory space
	329	* @kobj: kobject corresponding to device to be mapped
	330	* @attr: struct bin_attribute for this file
	331	* @vma: struct vm_area_struct passed to mmap
	332	*
	333	* Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
	334	* legacy memory space (first meg of bus space) into application virtual
	335	* memory space.
336	*/
337	int
338	pci_mmap_legacy_mem(struct kobject kobj, struct bin_attribute attr,
339	struct vm_area_struct *vma)
340	{
341	struct pci_bus *bus = to_pci_bus(container_of(kobj,
342	struct class_device,
343	kobj));
344
345	return pci_mmap_legacy_page_range(bus, vma);
346	}
347	#endif /* HAVE_PCI_LEGACY */
348
349	#ifdef HAVE_PCI_MMAP
350	/**
351	* pci_mmap_resource - map a PCI resource into user memory space
352	* @kobj: kobject for mapping
353	* @attr: struct bin_attribute for the file being mapped
354	* @vma: struct vm_area_struct passed into the mmap
355	*
356	* Use the regular PCI mapping routines to map a PCI resource into userspace.
357	* FIXME: write combining? maybe automatic for prefetchable regions?
358	*/
359	static int
360	pci_mmap_resource(struct kobject kobj, struct bin_attribute attr,
361	struct vm_area_struct *vma)
362	{
363	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
364	struct device, kobj));
365	struct resource res = (struct resource )attr->private;
366	enum pci_mmap_state mmap_type;
e31dd6e4	367	resource_size_t start, end;
2311b1f2	368	int i;
1da177e4	369
2311b1f2 ME	370	for (i = 0; i < PCI_ROM_RESOURCE; i++)
	371	if (res == &pdev->resource[i])
	372	break;
	373	if (i >= PCI_ROM_RESOURCE)
	374	return -ENODEV;
	375
	376	/* pci_mmap_page_range() expects the same kind of entry as coming
	377	* from /proc/bus/pci/ which is a "user visible" value. If this is
	378	* different from the resource itself, arch will do necessary fixup.
	379	*/
	380	pci_resource_to_user(pdev, i, res, &start, &end);
	381	vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4 LT	382	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
	383
	384	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
	385	}
	386
	387	/**
	388	* pci_create_resource_files - create resource files in sysfs for @dev
	389	* @dev: dev in question
	390	*
	391	* Walk the resources in @dev creating files for each resource available.
	392	*/
	393	static void
	394	pci_create_resource_files(struct pci_dev *pdev)
	395	{
	396	int i;
	397
	398	/* Expose the PCI resources from this device as files */
	399	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
	400	struct bin_attribute *res_attr;
	401
	402	/* skip empty resources */
	403	if (!pci_resource_len(pdev, i))
	404	continue;
	405
d48593bf	406	/* allocate attribute structure, piggyback attribute name */
656da9da	407	res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4	408	if (res_attr) {
d48593bf DT	409	char res_attr_name = (char )(res_attr + 1);
d48593bf DT	410
1da177e4	411	pdev->res_attr[i] = res_attr;
d48593bf DT	412	sprintf(res_attr_name, "resource%d", i);
d48593bf DT	413	res_attr->attr.name = res_attr_name;
1da177e4 LT	414	res_attr->attr.mode = S_IRUSR \| S_IWUSR;
1da177e4 LT	415	res_attr->attr.owner = THIS_MODULE;
d48593bf	416	res_attr->size = pci_resource_len(pdev, i);
1da177e4 LT	417	res_attr->mmap = pci_mmap_resource;
	418	res_attr->private = &pdev->resource[i];
	419	sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
	420	}
	421	}
	422	}
	423
	424	/**
	425	* pci_remove_resource_files - cleanup resource files
	426	* @dev: dev to cleanup
	427	*
	428	* If we created resource files for @dev, remove them from sysfs and
	429	* free their resources.
	430	*/
	431	static void
	432	pci_remove_resource_files(struct pci_dev *pdev)
	433	{
	434	int i;
	435
	436	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
	437	struct bin_attribute *res_attr;
	438
	439	res_attr = pdev->res_attr[i];
	440	if (res_attr) {
	441	sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
	442	kfree(res_attr);
	443	}
	444	}
	445	}
	446	#else /* !HAVE_PCI_MMAP */
	447	static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
	448	static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
	449	#endif /* HAVE_PCI_MMAP */
	450
	451	/**
	452	* pci_write_rom - used to enable access to the PCI ROM display
	453	* @kobj: kernel object handle
	454	* @buf: user input
	455	* @off: file offset
	456	* @count: number of byte in input
	457	*
	458	* writing anything except 0 enables it
	459	*/
	460	static ssize_t
	461	pci_write_rom(struct kobject kobj, char buf, loff_t off, size_t count)
	462	{
	463	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
	464
	465	if ((off == 0) && (*buf == '0') && (count == 2))
	466	pdev->rom_attr_enabled = 0;
	467	else
	468	pdev->rom_attr_enabled = 1;
	469
	470	return count;
	471	}
	472
	473	/**
	474	* pci_read_rom - read a PCI ROM
	475	* @kobj: kernel object handle
	476	* @buf: where to put the data we read from the ROM
	477	* @off: file offset
	478	* @count: number of bytes to read
	479	*
	480	* Put @count bytes starting at @off into @buf from the ROM in the PCI
481	* device corresponding to @kobj.
482	*/
483	static ssize_t
484	pci_read_rom(struct kobject kobj, char buf, loff_t off, size_t count)
485	{
486	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
487	void __iomem *rom;
488	size_t size;
489
490	if (!pdev->rom_attr_enabled)
491	return -EINVAL;
492
493	rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
494	if (!rom)
495	return 0;
496
497	if (off >= size)
498	count = 0;
499	else {
500	if (off + count > size)
501	count = size - off;
502
503	memcpy_fromio(buf, rom + off, count);
504	}
505	pci_unmap_rom(pdev, rom);
506
507	return count;
508	}
509
510	static struct bin_attribute pci_config_attr = {
511	.attr = {
512	.name = "config",
513	.mode = S_IRUGO \| S_IWUSR,
514	.owner = THIS_MODULE,
515	},
516	.size = 256,
517	.read = pci_read_config,
518	.write = pci_write_config,
519	};
520
521	static struct bin_attribute pcie_config_attr = {
522	.attr = {
523	.name = "config",
524	.mode = S_IRUGO \| S_IWUSR,
525	.owner = THIS_MODULE,
526	},
527	.size = 4096,
528	.read = pci_read_config,
529	.write = pci_write_config,
530	};
531
532	int pci_create_sysfs_dev_files (struct pci_dev *pdev)
533	{
534	if (!sysfs_initialized)
535	return -EACCES;
536
537	if (pdev->cfg_size < 4096)
538	sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
539	else
540	sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
541
542	pci_create_resource_files(pdev);
543
544	/* If the device has a ROM, try to expose it in sysfs. */
545	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
546	struct bin_attribute *rom_attr;
547
f5afe806	548	rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
1da177e4	549	if (rom_attr) {
1da177e4 LT	550	pdev->rom_attr = rom_attr;
	551	rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
	552	rom_attr->attr.name = "rom";
	553	rom_attr->attr.mode = S_IRUSR;
	554	rom_attr->attr.owner = THIS_MODULE;
	555	rom_attr->read = pci_read_rom;
	556	rom_attr->write = pci_write_rom;
	557	sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
	558	}
	559	}
	560	/* add platform-specific attributes */
	561	pcibios_add_platform_entries(pdev);
	562
	563	return 0;
	564	}
	565
	566	/**
	567	* pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
	568	* @pdev: device whose entries we should free
	569	*
	570	* Cleanup when @pdev is removed from sysfs.
	571	*/
	572	void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
	573	{
	574	if (pdev->cfg_size < 4096)
	575	sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
	576	else
	577	sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
	578
	579	pci_remove_resource_files(pdev);
	580
	581	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
	582	if (pdev->rom_attr) {
	583	sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
	584	kfree(pdev->rom_attr);
	585	}
	586	}
	587	}
	588
	589	static int __init pci_sysfs_init(void)
	590	{
	591	struct pci_dev *pdev = NULL;
	592
	593	sysfs_initialized = 1;
	594	for_each_pci_dev(pdev)
	595	pci_create_sysfs_dev_files(pdev);
	596
	597	return 0;
	598	}
	599
	600	__initcall(pci_sysfs_init);