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CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/stat.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23
24#include "pci.h"
25
26static int sysfs_initialized; /* = 0 */
27
28/* show configuration fields */
29#define pci_config_attr(field, format_string) \
30static ssize_t \
e404e274 31field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
32{ \
33 struct pci_dev *pdev; \
34 \
35 pdev = to_pci_dev (dev); \
36 return sprintf (buf, format_string, pdev->field); \
37}
38
39pci_config_attr(vendor, "0x%04x\n");
40pci_config_attr(device, "0x%04x\n");
41pci_config_attr(subsystem_vendor, "0x%04x\n");
42pci_config_attr(subsystem_device, "0x%04x\n");
43pci_config_attr(class, "0x%06x\n");
44pci_config_attr(irq, "%u\n");
9f125d30 45pci_config_attr(is_enabled, "%u\n");
1da177e4 46
bdee9d98
DT
47static ssize_t broken_parity_status_show(struct device *dev,
48 struct device_attribute *attr,
49 char *buf)
50{
51 struct pci_dev *pdev = to_pci_dev(dev);
52 return sprintf (buf, "%u\n", pdev->broken_parity_status);
53}
54
55static ssize_t broken_parity_status_store(struct device *dev,
56 struct device_attribute *attr,
57 const char *buf, size_t count)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60 ssize_t consumed = -EINVAL;
61
62 if ((count > 0) && (*buf == '0' || *buf == '1')) {
63 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
64 consumed = count;
65 }
66 return consumed;
67}
68
4327edf6
AC
69static ssize_t local_cpus_show(struct device *dev,
70 struct device_attribute *attr, char *buf)
1da177e4 71{
4327edf6
AC
72 cpumask_t mask;
73 int len;
74
75 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
76 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
1da177e4
LT
77 strcat(buf,"\n");
78 return 1+len;
79}
80
81/* show resources */
82static ssize_t
e404e274 83resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
84{
85 struct pci_dev * pci_dev = to_pci_dev(dev);
86 char * str = buf;
87 int i;
88 int max = 7;
e31dd6e4 89 resource_size_t start, end;
1da177e4
LT
90
91 if (pci_dev->subordinate)
92 max = DEVICE_COUNT_RESOURCE;
93
94 for (i = 0; i < max; i++) {
2311b1f2
ME
95 struct resource *res = &pci_dev->resource[i];
96 pci_resource_to_user(pci_dev, i, res, &start, &end);
97 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
98 (unsigned long long)start,
99 (unsigned long long)end,
100 (unsigned long long)res->flags);
1da177e4
LT
101 }
102 return (str - buf);
103}
104
87c8a443 105static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
106{
107 struct pci_dev *pci_dev = to_pci_dev(dev);
108
109 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
110 pci_dev->vendor, pci_dev->device,
111 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
112 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
113 (u8)(pci_dev->class));
114}
9f125d30
AV
115static ssize_t
116is_enabled_store(struct device *dev, struct device_attribute *attr,
117 const char *buf, size_t count)
118{
119 struct pci_dev *pdev = to_pci_dev(dev);
b19441af 120 int retval = 0;
9f125d30
AV
121
122 /* this can crash the machine when done on the "wrong" device */
123 if (!capable(CAP_SYS_ADMIN))
124 return count;
125
126 if (*buf == '0')
127 pci_disable_device(pdev);
128
129 if (*buf == '1')
b19441af 130 retval = pci_enable_device(pdev);
9f125d30 131
b19441af
GKH
132 if (retval)
133 return retval;
9f125d30
AV
134 return count;
135}
136
fe97064c
BG
137static ssize_t
138msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
139{
140 struct pci_dev *pdev = to_pci_dev(dev);
141
142 if (!pdev->subordinate)
143 return 0;
144
145 return sprintf (buf, "%u\n",
146 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
147}
148
149static ssize_t
150msi_bus_store(struct device *dev, struct device_attribute *attr,
151 const char *buf, size_t count)
152{
153 struct pci_dev *pdev = to_pci_dev(dev);
154
155 /* bad things may happen if the no_msi flag is changed
156 * while some drivers are loaded */
157 if (!capable(CAP_SYS_ADMIN))
158 return count;
159
160 if (!pdev->subordinate)
161 return count;
162
163 if (*buf == '0') {
164 pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
165 dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
166 " bad things could happen.\n");
167 }
168
169 if (*buf == '1') {
170 pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
171 dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
172 " bad things could happen.\n");
173 }
174
175 return count;
176}
9888549e 177
1da177e4
LT
178struct device_attribute pci_dev_attrs[] = {
179 __ATTR_RO(resource),
180 __ATTR_RO(vendor),
181 __ATTR_RO(device),
182 __ATTR_RO(subsystem_vendor),
183 __ATTR_RO(subsystem_device),
184 __ATTR_RO(class),
185 __ATTR_RO(irq),
186 __ATTR_RO(local_cpus),
9888549e 187 __ATTR_RO(modalias),
9f125d30 188 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
189 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
190 broken_parity_status_show,broken_parity_status_store),
fe97064c 191 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
192 __ATTR_NULL,
193};
194
195static ssize_t
196pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
197{
198 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
199 unsigned int size = 64;
200 loff_t init_off = off;
4c0619ad 201 u8 *data = (u8*) buf;
1da177e4
LT
202
203 /* Several chips lock up trying to read undefined config space */
204 if (capable(CAP_SYS_ADMIN)) {
205 size = dev->cfg_size;
206 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
207 size = 128;
208 }
209
210 if (off > size)
211 return 0;
212 if (off + count > size) {
213 size -= off;
214 count = size;
215 } else {
216 size = count;
217 }
218
4c0619ad
SS
219 if ((off & 1) && size) {
220 u8 val;
e04b0ea2 221 pci_user_read_config_byte(dev, off, &val);
4c0619ad 222 data[off - init_off] = val;
1da177e4 223 off++;
4c0619ad
SS
224 size--;
225 }
226
227 if ((off & 3) && size > 2) {
228 u16 val;
e04b0ea2 229 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
230 data[off - init_off] = val & 0xff;
231 data[off - init_off + 1] = (val >> 8) & 0xff;
232 off += 2;
233 size -= 2;
1da177e4
LT
234 }
235
236 while (size > 3) {
4c0619ad 237 u32 val;
e04b0ea2 238 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
239 data[off - init_off] = val & 0xff;
240 data[off - init_off + 1] = (val >> 8) & 0xff;
241 data[off - init_off + 2] = (val >> 16) & 0xff;
242 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
243 off += 4;
244 size -= 4;
245 }
246
4c0619ad
SS
247 if (size >= 2) {
248 u16 val;
e04b0ea2 249 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
250 data[off - init_off] = val & 0xff;
251 data[off - init_off + 1] = (val >> 8) & 0xff;
252 off += 2;
253 size -= 2;
254 }
255
256 if (size > 0) {
257 u8 val;
e04b0ea2 258 pci_user_read_config_byte(dev, off, &val);
4c0619ad 259 data[off - init_off] = val;
1da177e4
LT
260 off++;
261 --size;
262 }
263
264 return count;
265}
266
267static ssize_t
268pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
269{
270 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
271 unsigned int size = count;
272 loff_t init_off = off;
4c0619ad 273 u8 *data = (u8*) buf;
1da177e4
LT
274
275 if (off > dev->cfg_size)
276 return 0;
277 if (off + count > dev->cfg_size) {
278 size = dev->cfg_size - off;
279 count = size;
280 }
4c0619ad
SS
281
282 if ((off & 1) && size) {
e04b0ea2 283 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 284 off++;
4c0619ad 285 size--;
1da177e4 286 }
4c0619ad
SS
287
288 if ((off & 3) && size > 2) {
289 u16 val = data[off - init_off];
290 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 291 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
292 off += 2;
293 size -= 2;
294 }
1da177e4
LT
295
296 while (size > 3) {
4c0619ad
SS
297 u32 val = data[off - init_off];
298 val |= (u32) data[off - init_off + 1] << 8;
299 val |= (u32) data[off - init_off + 2] << 16;
300 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 301 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
302 off += 4;
303 size -= 4;
304 }
4c0619ad
SS
305
306 if (size >= 2) {
307 u16 val = data[off - init_off];
308 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 309 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
310 off += 2;
311 size -= 2;
312 }
1da177e4 313
4c0619ad 314 if (size) {
e04b0ea2 315 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
316 off++;
317 --size;
318 }
319
320 return count;
321}
322
323#ifdef HAVE_PCI_LEGACY
324/**
325 * pci_read_legacy_io - read byte(s) from legacy I/O port space
326 * @kobj: kobject corresponding to file to read from
327 * @buf: buffer to store results
328 * @off: offset into legacy I/O port space
329 * @count: number of bytes to read
330 *
331 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
332 * callback routine (pci_legacy_read).
333 */
334ssize_t
335pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
336{
337 struct pci_bus *bus = to_pci_bus(container_of(kobj,
338 struct class_device,
339 kobj));
340
341 /* Only support 1, 2 or 4 byte accesses */
342 if (count != 1 && count != 2 && count != 4)
343 return -EINVAL;
344
345 return pci_legacy_read(bus, off, (u32 *)buf, count);
346}
347
348/**
349 * pci_write_legacy_io - write byte(s) to legacy I/O port space
350 * @kobj: kobject corresponding to file to read from
351 * @buf: buffer containing value to be written
352 * @off: offset into legacy I/O port space
353 * @count: number of bytes to write
354 *
355 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
356 * callback routine (pci_legacy_write).
357 */
358ssize_t
359pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
360{
361 struct pci_bus *bus = to_pci_bus(container_of(kobj,
362 struct class_device,
363 kobj));
364 /* Only support 1, 2 or 4 byte accesses */
365 if (count != 1 && count != 2 && count != 4)
366 return -EINVAL;
367
368 return pci_legacy_write(bus, off, *(u32 *)buf, count);
369}
370
371/**
372 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
373 * @kobj: kobject corresponding to device to be mapped
374 * @attr: struct bin_attribute for this file
375 * @vma: struct vm_area_struct passed to mmap
376 *
377 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
378 * legacy memory space (first meg of bus space) into application virtual
379 * memory space.
380 */
381int
382pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
383 struct vm_area_struct *vma)
384{
385 struct pci_bus *bus = to_pci_bus(container_of(kobj,
386 struct class_device,
387 kobj));
388
389 return pci_mmap_legacy_page_range(bus, vma);
390}
391#endif /* HAVE_PCI_LEGACY */
392
393#ifdef HAVE_PCI_MMAP
394/**
395 * pci_mmap_resource - map a PCI resource into user memory space
396 * @kobj: kobject for mapping
397 * @attr: struct bin_attribute for the file being mapped
398 * @vma: struct vm_area_struct passed into the mmap
399 *
400 * Use the regular PCI mapping routines to map a PCI resource into userspace.
401 * FIXME: write combining? maybe automatic for prefetchable regions?
402 */
403static int
404pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
405 struct vm_area_struct *vma)
406{
407 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
408 struct device, kobj));
409 struct resource *res = (struct resource *)attr->private;
410 enum pci_mmap_state mmap_type;
e31dd6e4 411 resource_size_t start, end;
2311b1f2 412 int i;
1da177e4 413
2311b1f2
ME
414 for (i = 0; i < PCI_ROM_RESOURCE; i++)
415 if (res == &pdev->resource[i])
416 break;
417 if (i >= PCI_ROM_RESOURCE)
418 return -ENODEV;
419
420 /* pci_mmap_page_range() expects the same kind of entry as coming
421 * from /proc/bus/pci/ which is a "user visible" value. If this is
422 * different from the resource itself, arch will do necessary fixup.
423 */
424 pci_resource_to_user(pdev, i, res, &start, &end);
425 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
426 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
427
428 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
429}
430
b19441af
GKH
431/**
432 * pci_remove_resource_files - cleanup resource files
433 * @dev: dev to cleanup
434 *
435 * If we created resource files for @dev, remove them from sysfs and
436 * free their resources.
437 */
438static void
439pci_remove_resource_files(struct pci_dev *pdev)
440{
441 int i;
442
443 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
444 struct bin_attribute *res_attr;
445
446 res_attr = pdev->res_attr[i];
447 if (res_attr) {
448 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
449 kfree(res_attr);
450 }
451 }
452}
453
1da177e4
LT
454/**
455 * pci_create_resource_files - create resource files in sysfs for @dev
456 * @dev: dev in question
457 *
458 * Walk the resources in @dev creating files for each resource available.
459 */
b19441af 460static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
461{
462 int i;
b19441af 463 int retval;
1da177e4
LT
464
465 /* Expose the PCI resources from this device as files */
466 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
467 struct bin_attribute *res_attr;
468
469 /* skip empty resources */
470 if (!pci_resource_len(pdev, i))
471 continue;
472
d48593bf 473 /* allocate attribute structure, piggyback attribute name */
656da9da 474 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4 475 if (res_attr) {
d48593bf
DT
476 char *res_attr_name = (char *)(res_attr + 1);
477
1da177e4 478 pdev->res_attr[i] = res_attr;
d48593bf
DT
479 sprintf(res_attr_name, "resource%d", i);
480 res_attr->attr.name = res_attr_name;
1da177e4
LT
481 res_attr->attr.mode = S_IRUSR | S_IWUSR;
482 res_attr->attr.owner = THIS_MODULE;
d48593bf 483 res_attr->size = pci_resource_len(pdev, i);
1da177e4
LT
484 res_attr->mmap = pci_mmap_resource;
485 res_attr->private = &pdev->resource[i];
b19441af
GKH
486 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
487 if (retval) {
488 pci_remove_resource_files(pdev);
489 return retval;
490 }
491 } else {
492 return -ENOMEM;
1da177e4
LT
493 }
494 }
b19441af 495 return 0;
1da177e4
LT
496}
497#else /* !HAVE_PCI_MMAP */
b19441af 498static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
499static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
500#endif /* HAVE_PCI_MMAP */
501
502/**
503 * pci_write_rom - used to enable access to the PCI ROM display
504 * @kobj: kernel object handle
505 * @buf: user input
506 * @off: file offset
507 * @count: number of byte in input
508 *
509 * writing anything except 0 enables it
510 */
511static ssize_t
512pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
513{
514 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
515
516 if ((off == 0) && (*buf == '0') && (count == 2))
517 pdev->rom_attr_enabled = 0;
518 else
519 pdev->rom_attr_enabled = 1;
520
521 return count;
522}
523
524/**
525 * pci_read_rom - read a PCI ROM
526 * @kobj: kernel object handle
527 * @buf: where to put the data we read from the ROM
528 * @off: file offset
529 * @count: number of bytes to read
530 *
531 * Put @count bytes starting at @off into @buf from the ROM in the PCI
532 * device corresponding to @kobj.
533 */
534static ssize_t
535pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
536{
537 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
538 void __iomem *rom;
539 size_t size;
540
541 if (!pdev->rom_attr_enabled)
542 return -EINVAL;
543
544 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
545 if (!rom)
546 return 0;
547
548 if (off >= size)
549 count = 0;
550 else {
551 if (off + count > size)
552 count = size - off;
553
554 memcpy_fromio(buf, rom + off, count);
555 }
556 pci_unmap_rom(pdev, rom);
557
558 return count;
559}
560
561static struct bin_attribute pci_config_attr = {
562 .attr = {
563 .name = "config",
564 .mode = S_IRUGO | S_IWUSR,
565 .owner = THIS_MODULE,
566 },
567 .size = 256,
568 .read = pci_read_config,
569 .write = pci_write_config,
570};
571
572static struct bin_attribute pcie_config_attr = {
573 .attr = {
574 .name = "config",
575 .mode = S_IRUGO | S_IWUSR,
576 .owner = THIS_MODULE,
577 },
578 .size = 4096,
579 .read = pci_read_config,
580 .write = pci_write_config,
581};
582
b19441af 583int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 584{
b19441af
GKH
585 struct bin_attribute *rom_attr = NULL;
586 int retval;
587
1da177e4
LT
588 if (!sysfs_initialized)
589 return -EACCES;
590
591 if (pdev->cfg_size < 4096)
b19441af 592 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 593 else
b19441af
GKH
594 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
595 if (retval)
596 goto err;
1da177e4 597
b19441af
GKH
598 retval = pci_create_resource_files(pdev);
599 if (retval)
600 goto err_bin_file;
1da177e4
LT
601
602 /* If the device has a ROM, try to expose it in sysfs. */
603 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
f5afe806 604 rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
1da177e4 605 if (rom_attr) {
1da177e4
LT
606 pdev->rom_attr = rom_attr;
607 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
608 rom_attr->attr.name = "rom";
609 rom_attr->attr.mode = S_IRUSR;
610 rom_attr->attr.owner = THIS_MODULE;
611 rom_attr->read = pci_read_rom;
612 rom_attr->write = pci_write_rom;
b19441af
GKH
613 retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
614 if (retval)
615 goto err_rom;
616 } else {
617 retval = -ENOMEM;
618 goto err_bin_file;
1da177e4
LT
619 }
620 }
621 /* add platform-specific attributes */
622 pcibios_add_platform_entries(pdev);
b19441af 623
1da177e4 624 return 0;
b19441af
GKH
625
626err_rom:
627 kfree(rom_attr);
628err_bin_file:
629 if (pdev->cfg_size < 4096)
630 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
631 else
632 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
633err:
634 return retval;
1da177e4
LT
635}
636
637/**
638 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
639 * @pdev: device whose entries we should free
640 *
641 * Cleanup when @pdev is removed from sysfs.
642 */
643void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
644{
645 if (pdev->cfg_size < 4096)
646 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
647 else
648 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
649
650 pci_remove_resource_files(pdev);
651
652 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
653 if (pdev->rom_attr) {
654 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
655 kfree(pdev->rom_attr);
656 }
657 }
658}
659
660static int __init pci_sysfs_init(void)
661{
662 struct pci_dev *pdev = NULL;
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GKH
663 int retval;
664
1da177e4 665 sysfs_initialized = 1;
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GKH
666 for_each_pci_dev(pdev) {
667 retval = pci_create_sysfs_dev_files(pdev);
668 if (retval)
669 return retval;
670 }
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671
672 return 0;
673}
674
675__initcall(pci_sysfs_init);