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pci: Fix files needing export.h for EXPORT_SYMBOL/THIS_MODULE
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CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
363c75db 22#include <linux/export.h>
1da177e4
LT
23#include <linux/topology.h>
24#include <linux/mm.h>
de139a33 25#include <linux/fs.h>
aa0ac365 26#include <linux/capability.h>
a628e7b8 27#include <linux/security.h>
7d715a6c 28#include <linux/pci-aspm.h>
5a0e3ad6 29#include <linux/slab.h>
1da177e4
LT
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
e404e274 37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev (dev); \
42 return sprintf (buf, format_string, pdev->field); \
43}
44
45pci_config_attr(vendor, "0x%04x\n");
46pci_config_attr(device, "0x%04x\n");
47pci_config_attr(subsystem_vendor, "0x%04x\n");
48pci_config_attr(subsystem_device, "0x%04x\n");
49pci_config_attr(class, "0x%06x\n");
50pci_config_attr(irq, "%u\n");
51
bdee9d98
DT
52static ssize_t broken_parity_status_show(struct device *dev,
53 struct device_attribute *attr,
54 char *buf)
55{
56 struct pci_dev *pdev = to_pci_dev(dev);
57 return sprintf (buf, "%u\n", pdev->broken_parity_status);
58}
59
60static ssize_t broken_parity_status_store(struct device *dev,
61 struct device_attribute *attr,
62 const char *buf, size_t count)
63{
64 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 65 unsigned long val;
bdee9d98 66
92425a40
TP
67 if (strict_strtoul(buf, 0, &val) < 0)
68 return -EINVAL;
69
70 pdev->broken_parity_status = !!val;
71
72 return count;
bdee9d98
DT
73}
74
4327edf6
AC
75static ssize_t local_cpus_show(struct device *dev,
76 struct device_attribute *attr, char *buf)
1da177e4 77{
3be83050 78 const struct cpumask *mask;
4327edf6
AC
79 int len;
80
e0cd5160 81#ifdef CONFIG_NUMA
6be954d1
DJ
82 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
83 cpumask_of_node(dev_to_node(dev));
e0cd5160 84#else
3be83050 85 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 86#endif
3be83050 87 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
88 buf[len++] = '\n';
89 buf[len] = '\0';
90 return len;
91}
92
93
94static ssize_t local_cpulist_show(struct device *dev,
95 struct device_attribute *attr, char *buf)
96{
3be83050 97 const struct cpumask *mask;
39106dcf
MT
98 int len;
99
e0cd5160 100#ifdef CONFIG_NUMA
6be954d1
DJ
101 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
102 cpumask_of_node(dev_to_node(dev));
e0cd5160 103#else
3be83050 104 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 105#endif
3be83050 106 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
107 buf[len++] = '\n';
108 buf[len] = '\0';
109 return len;
1da177e4
LT
110}
111
dc2c2c9d
YL
112/*
113 * PCI Bus Class Devices
114 */
115static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
116 int type,
117 struct device_attribute *attr,
118 char *buf)
119{
120 int ret;
121 const struct cpumask *cpumask;
122
123 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
124 ret = type ?
125 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
126 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
127 buf[ret++] = '\n';
128 buf[ret] = '\0';
129 return ret;
130}
131
132static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
133 struct device_attribute *attr,
134 char *buf)
135{
136 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
137}
138
139static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
140 struct device_attribute *attr,
141 char *buf)
142{
143 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
144}
145
1da177e4
LT
146/* show resources */
147static ssize_t
e404e274 148resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
149{
150 struct pci_dev * pci_dev = to_pci_dev(dev);
151 char * str = buf;
152 int i;
fde09c6d 153 int max;
e31dd6e4 154 resource_size_t start, end;
1da177e4
LT
155
156 if (pci_dev->subordinate)
157 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
158 else
159 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
160
161 for (i = 0; i < max; i++) {
2311b1f2
ME
162 struct resource *res = &pci_dev->resource[i];
163 pci_resource_to_user(pci_dev, i, res, &start, &end);
164 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
165 (unsigned long long)start,
166 (unsigned long long)end,
167 (unsigned long long)res->flags);
1da177e4
LT
168 }
169 return (str - buf);
170}
171
87c8a443 172static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
173{
174 struct pci_dev *pci_dev = to_pci_dev(dev);
175
176 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
177 pci_dev->vendor, pci_dev->device,
178 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
179 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
180 (u8)(pci_dev->class));
181}
bae94d02
IPG
182
183static ssize_t is_enabled_store(struct device *dev,
184 struct device_attribute *attr, const char *buf,
185 size_t count)
9f125d30
AV
186{
187 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
188 unsigned long val;
189 ssize_t result = strict_strtoul(buf, 0, &val);
190
191 if (result < 0)
192 return result;
9f125d30
AV
193
194 /* this can crash the machine when done on the "wrong" device */
195 if (!capable(CAP_SYS_ADMIN))
92425a40 196 return -EPERM;
9f125d30 197
92425a40 198 if (!val) {
296ccb08 199 if (pci_is_enabled(pdev))
bae94d02
IPG
200 pci_disable_device(pdev);
201 else
202 result = -EIO;
92425a40 203 } else
bae94d02 204 result = pci_enable_device(pdev);
9f125d30 205
bae94d02
IPG
206 return result < 0 ? result : count;
207}
208
209static ssize_t is_enabled_show(struct device *dev,
210 struct device_attribute *attr, char *buf)
211{
212 struct pci_dev *pdev;
9f125d30 213
bae94d02
IPG
214 pdev = to_pci_dev (dev);
215 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
216}
217
81bb0e19
BG
218#ifdef CONFIG_NUMA
219static ssize_t
220numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
221{
222 return sprintf (buf, "%d\n", dev->numa_node);
223}
224#endif
225
bb965401
YL
226static ssize_t
227dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
228{
229 struct pci_dev *pdev = to_pci_dev(dev);
230
231 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
232}
233
234static ssize_t
235consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
236 char *buf)
237{
238 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
239}
240
fe97064c
BG
241static ssize_t
242msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
243{
244 struct pci_dev *pdev = to_pci_dev(dev);
245
246 if (!pdev->subordinate)
247 return 0;
248
249 return sprintf (buf, "%u\n",
250 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
251}
252
253static ssize_t
254msi_bus_store(struct device *dev, struct device_attribute *attr,
255 const char *buf, size_t count)
256{
257 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
258 unsigned long val;
259
260 if (strict_strtoul(buf, 0, &val) < 0)
261 return -EINVAL;
fe97064c
BG
262
263 /* bad things may happen if the no_msi flag is changed
264 * while some drivers are loaded */
265 if (!capable(CAP_SYS_ADMIN))
92425a40 266 return -EPERM;
fe97064c 267
92425a40
TP
268 /* Maybe pci devices without subordinate busses shouldn't even have this
269 * attribute in the first place? */
fe97064c
BG
270 if (!pdev->subordinate)
271 return count;
272
92425a40
TP
273 /* Is the flag going to change, or keep the value it already had? */
274 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
275 !!val) {
276 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 277
92425a40
TP
278 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
279 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
280 }
281
282 return count;
283}
9888549e 284
705b1aaa
AC
285#ifdef CONFIG_HOTPLUG
286static DEFINE_MUTEX(pci_remove_rescan_mutex);
287static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
288 size_t count)
289{
290 unsigned long val;
291 struct pci_bus *b = NULL;
292
293 if (strict_strtoul(buf, 0, &val) < 0)
294 return -EINVAL;
295
296 if (val) {
297 mutex_lock(&pci_remove_rescan_mutex);
298 while ((b = pci_find_next_bus(b)) != NULL)
299 pci_rescan_bus(b);
300 mutex_unlock(&pci_remove_rescan_mutex);
301 }
302 return count;
303}
304
305struct bus_attribute pci_bus_attrs[] = {
306 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
307 __ATTR_NULL
308};
77c27c7b 309
738a6396
AC
310static ssize_t
311dev_rescan_store(struct device *dev, struct device_attribute *attr,
312 const char *buf, size_t count)
313{
314 unsigned long val;
315 struct pci_dev *pdev = to_pci_dev(dev);
316
317 if (strict_strtoul(buf, 0, &val) < 0)
318 return -EINVAL;
319
320 if (val) {
321 mutex_lock(&pci_remove_rescan_mutex);
322 pci_rescan_bus(pdev->bus);
323 mutex_unlock(&pci_remove_rescan_mutex);
324 }
325 return count;
326}
327
77c27c7b
AC
328static void remove_callback(struct device *dev)
329{
330 struct pci_dev *pdev = to_pci_dev(dev);
331
332 mutex_lock(&pci_remove_rescan_mutex);
333 pci_remove_bus_device(pdev);
334 mutex_unlock(&pci_remove_rescan_mutex);
335}
336
337static ssize_t
338remove_store(struct device *dev, struct device_attribute *dummy,
339 const char *buf, size_t count)
340{
341 int ret = 0;
342 unsigned long val;
77c27c7b
AC
343
344 if (strict_strtoul(buf, 0, &val) < 0)
345 return -EINVAL;
346
77c27c7b
AC
347 /* An attribute cannot be unregistered by one of its own methods,
348 * so we have to use this roundabout approach.
349 */
350 if (val)
351 ret = device_schedule_callback(dev, remove_callback);
352 if (ret)
353 count = ret;
354 return count;
355}
b9d320fc
YL
356
357static ssize_t
358dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
359 const char *buf, size_t count)
360{
361 unsigned long val;
362 struct pci_bus *bus = to_pci_bus(dev);
363
364 if (strict_strtoul(buf, 0, &val) < 0)
365 return -EINVAL;
366
367 if (val) {
368 mutex_lock(&pci_remove_rescan_mutex);
369 pci_rescan_bus(bus);
370 mutex_unlock(&pci_remove_rescan_mutex);
371 }
372 return count;
373}
374
705b1aaa
AC
375#endif
376
1da177e4
LT
377struct device_attribute pci_dev_attrs[] = {
378 __ATTR_RO(resource),
379 __ATTR_RO(vendor),
380 __ATTR_RO(device),
381 __ATTR_RO(subsystem_vendor),
382 __ATTR_RO(subsystem_device),
383 __ATTR_RO(class),
384 __ATTR_RO(irq),
385 __ATTR_RO(local_cpus),
39106dcf 386 __ATTR_RO(local_cpulist),
9888549e 387 __ATTR_RO(modalias),
81bb0e19
BG
388#ifdef CONFIG_NUMA
389 __ATTR_RO(numa_node),
390#endif
bb965401
YL
391 __ATTR_RO(dma_mask_bits),
392 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 393 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
394 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
395 broken_parity_status_show,broken_parity_status_store),
fe97064c 396 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
77c27c7b
AC
397#ifdef CONFIG_HOTPLUG
398 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
738a6396 399 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
77c27c7b 400#endif
1da177e4
LT
401 __ATTR_NULL,
402};
403
b9d320fc
YL
404struct device_attribute pcibus_dev_attrs[] = {
405#ifdef CONFIG_HOTPLUG
406 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
407#endif
dc2c2c9d
YL
408 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
409 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
b9d320fc
YL
410 __ATTR_NULL,
411};
412
217f45de
DA
413static ssize_t
414boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
415{
416 struct pci_dev *pdev = to_pci_dev(dev);
417
418 return sprintf(buf, "%u\n",
419 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
420 IORESOURCE_ROM_SHADOW));
421}
422struct device_attribute vga_attr = __ATTR_RO(boot_vga);
423
1da177e4 424static ssize_t
2c3c8bea
CW
425pci_read_config(struct file *filp, struct kobject *kobj,
426 struct bin_attribute *bin_attr,
91a69029 427 char *buf, loff_t off, size_t count)
1da177e4
LT
428{
429 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
430 unsigned int size = 64;
431 loff_t init_off = off;
4c0619ad 432 u8 *data = (u8*) buf;
1da177e4
LT
433
434 /* Several chips lock up trying to read undefined config space */
3486740a 435 if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
1da177e4
LT
436 size = dev->cfg_size;
437 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
438 size = 128;
439 }
440
441 if (off > size)
442 return 0;
443 if (off + count > size) {
444 size -= off;
445 count = size;
446 } else {
447 size = count;
448 }
449
4c0619ad
SS
450 if ((off & 1) && size) {
451 u8 val;
e04b0ea2 452 pci_user_read_config_byte(dev, off, &val);
4c0619ad 453 data[off - init_off] = val;
1da177e4 454 off++;
4c0619ad
SS
455 size--;
456 }
457
458 if ((off & 3) && size > 2) {
459 u16 val;
e04b0ea2 460 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
461 data[off - init_off] = val & 0xff;
462 data[off - init_off + 1] = (val >> 8) & 0xff;
463 off += 2;
464 size -= 2;
1da177e4
LT
465 }
466
467 while (size > 3) {
4c0619ad 468 u32 val;
e04b0ea2 469 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
470 data[off - init_off] = val & 0xff;
471 data[off - init_off + 1] = (val >> 8) & 0xff;
472 data[off - init_off + 2] = (val >> 16) & 0xff;
473 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
474 off += 4;
475 size -= 4;
476 }
477
4c0619ad
SS
478 if (size >= 2) {
479 u16 val;
e04b0ea2 480 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
481 data[off - init_off] = val & 0xff;
482 data[off - init_off + 1] = (val >> 8) & 0xff;
483 off += 2;
484 size -= 2;
485 }
486
487 if (size > 0) {
488 u8 val;
e04b0ea2 489 pci_user_read_config_byte(dev, off, &val);
4c0619ad 490 data[off - init_off] = val;
1da177e4
LT
491 off++;
492 --size;
493 }
494
495 return count;
496}
497
498static ssize_t
2c3c8bea
CW
499pci_write_config(struct file* filp, struct kobject *kobj,
500 struct bin_attribute *bin_attr,
91a69029 501 char *buf, loff_t off, size_t count)
1da177e4
LT
502{
503 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
504 unsigned int size = count;
505 loff_t init_off = off;
4c0619ad 506 u8 *data = (u8*) buf;
1da177e4
LT
507
508 if (off > dev->cfg_size)
509 return 0;
510 if (off + count > dev->cfg_size) {
511 size = dev->cfg_size - off;
512 count = size;
513 }
4c0619ad
SS
514
515 if ((off & 1) && size) {
e04b0ea2 516 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 517 off++;
4c0619ad 518 size--;
1da177e4 519 }
4c0619ad
SS
520
521 if ((off & 3) && size > 2) {
522 u16 val = data[off - init_off];
523 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 524 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
525 off += 2;
526 size -= 2;
527 }
1da177e4
LT
528
529 while (size > 3) {
4c0619ad
SS
530 u32 val = data[off - init_off];
531 val |= (u32) data[off - init_off + 1] << 8;
532 val |= (u32) data[off - init_off + 2] << 16;
533 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 534 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
535 off += 4;
536 size -= 4;
537 }
4c0619ad
SS
538
539 if (size >= 2) {
540 u16 val = data[off - init_off];
541 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 542 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
543 off += 2;
544 size -= 2;
545 }
1da177e4 546
4c0619ad 547 if (size) {
e04b0ea2 548 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
549 off++;
550 --size;
551 }
552
553 return count;
554}
555
94e61088 556static ssize_t
2c3c8bea
CW
557read_vpd_attr(struct file *filp, struct kobject *kobj,
558 struct bin_attribute *bin_attr,
287d19ce 559 char *buf, loff_t off, size_t count)
94e61088
BH
560{
561 struct pci_dev *dev =
562 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
563
564 if (off > bin_attr->size)
565 count = 0;
566 else if (count > bin_attr->size - off)
567 count = bin_attr->size - off;
94e61088 568
287d19ce 569 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
570}
571
572static ssize_t
2c3c8bea
CW
573write_vpd_attr(struct file *filp, struct kobject *kobj,
574 struct bin_attribute *bin_attr,
287d19ce 575 char *buf, loff_t off, size_t count)
94e61088
BH
576{
577 struct pci_dev *dev =
578 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
579
580 if (off > bin_attr->size)
581 count = 0;
582 else if (count > bin_attr->size - off)
583 count = bin_attr->size - off;
94e61088 584
287d19ce 585 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
586}
587
1da177e4
LT
588#ifdef HAVE_PCI_LEGACY
589/**
590 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 591 * @filp: open sysfs file
1da177e4 592 * @kobj: kobject corresponding to file to read from
cffb2faf 593 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
594 * @buf: buffer to store results
595 * @off: offset into legacy I/O port space
596 * @count: number of bytes to read
597 *
598 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
599 * callback routine (pci_legacy_read).
600 */
f19aeb1f 601static ssize_t
2c3c8bea
CW
602pci_read_legacy_io(struct file *filp, struct kobject *kobj,
603 struct bin_attribute *bin_attr,
91a69029 604 char *buf, loff_t off, size_t count)
1da177e4
LT
605{
606 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 607 struct device,
1da177e4
LT
608 kobj));
609
610 /* Only support 1, 2 or 4 byte accesses */
611 if (count != 1 && count != 2 && count != 4)
612 return -EINVAL;
613
614 return pci_legacy_read(bus, off, (u32 *)buf, count);
615}
616
617/**
618 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 619 * @filp: open sysfs file
1da177e4 620 * @kobj: kobject corresponding to file to read from
cffb2faf 621 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
622 * @buf: buffer containing value to be written
623 * @off: offset into legacy I/O port space
624 * @count: number of bytes to write
625 *
626 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
627 * callback routine (pci_legacy_write).
628 */
f19aeb1f 629static ssize_t
2c3c8bea
CW
630pci_write_legacy_io(struct file *filp, struct kobject *kobj,
631 struct bin_attribute *bin_attr,
91a69029 632 char *buf, loff_t off, size_t count)
1da177e4
LT
633{
634 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 635 struct device,
1da177e4
LT
636 kobj));
637 /* Only support 1, 2 or 4 byte accesses */
638 if (count != 1 && count != 2 && count != 4)
639 return -EINVAL;
640
641 return pci_legacy_write(bus, off, *(u32 *)buf, count);
642}
643
644/**
645 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 646 * @filp: open sysfs file
1da177e4
LT
647 * @kobj: kobject corresponding to device to be mapped
648 * @attr: struct bin_attribute for this file
649 * @vma: struct vm_area_struct passed to mmap
650 *
f19aeb1f 651 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
652 * legacy memory space (first meg of bus space) into application virtual
653 * memory space.
654 */
f19aeb1f 655static int
2c3c8bea
CW
656pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
657 struct bin_attribute *attr,
1da177e4
LT
658 struct vm_area_struct *vma)
659{
660 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 661 struct device,
1da177e4
LT
662 kobj));
663
f19aeb1f
BH
664 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
665}
666
667/**
668 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 669 * @filp: open sysfs file
f19aeb1f
BH
670 * @kobj: kobject corresponding to device to be mapped
671 * @attr: struct bin_attribute for this file
672 * @vma: struct vm_area_struct passed to mmap
673 *
674 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
675 * legacy IO space (first meg of bus space) into application virtual
676 * memory space. Returns -ENOSYS if the operation isn't supported
677 */
678static int
2c3c8bea
CW
679pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
680 struct bin_attribute *attr,
f19aeb1f
BH
681 struct vm_area_struct *vma)
682{
683 struct pci_bus *bus = to_pci_bus(container_of(kobj,
684 struct device,
685 kobj));
686
687 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
688}
689
10a0ef39
IK
690/**
691 * pci_adjust_legacy_attr - adjustment of legacy file attributes
692 * @b: bus to create files under
693 * @mmap_type: I/O port or memory
694 *
695 * Stub implementation. Can be overridden by arch if necessary.
696 */
697void __weak
698pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
699{
700 return;
701}
702
f19aeb1f
BH
703/**
704 * pci_create_legacy_files - create legacy I/O port and memory files
705 * @b: bus to create files under
706 *
707 * Some platforms allow access to legacy I/O port and ISA memory space on
708 * a per-bus basis. This routine creates the files and ties them into
709 * their associated read, write and mmap files from pci-sysfs.c
710 *
25985edc 711 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
712 * as it is ok to set up the PCI bus without these files.
713 */
714void pci_create_legacy_files(struct pci_bus *b)
715{
716 int error;
717
718 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
719 GFP_ATOMIC);
720 if (!b->legacy_io)
721 goto kzalloc_err;
722
62e877b8 723 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
724 b->legacy_io->attr.name = "legacy_io";
725 b->legacy_io->size = 0xffff;
726 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
727 b->legacy_io->read = pci_read_legacy_io;
728 b->legacy_io->write = pci_write_legacy_io;
729 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 730 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
731 error = device_create_bin_file(&b->dev, b->legacy_io);
732 if (error)
733 goto legacy_io_err;
734
735 /* Allocated above after the legacy_io struct */
736 b->legacy_mem = b->legacy_io + 1;
6757eca3 737 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
738 b->legacy_mem->attr.name = "legacy_mem";
739 b->legacy_mem->size = 1024*1024;
740 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
741 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 742 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
743 error = device_create_bin_file(&b->dev, b->legacy_mem);
744 if (error)
745 goto legacy_mem_err;
746
747 return;
748
749legacy_mem_err:
750 device_remove_bin_file(&b->dev, b->legacy_io);
751legacy_io_err:
752 kfree(b->legacy_io);
753 b->legacy_io = NULL;
754kzalloc_err:
755 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
756 "and ISA memory resources to sysfs\n");
757 return;
758}
759
760void pci_remove_legacy_files(struct pci_bus *b)
761{
762 if (b->legacy_io) {
763 device_remove_bin_file(&b->dev, b->legacy_io);
764 device_remove_bin_file(&b->dev, b->legacy_mem);
765 kfree(b->legacy_io); /* both are allocated here */
766 }
1da177e4
LT
767}
768#endif /* HAVE_PCI_LEGACY */
769
770#ifdef HAVE_PCI_MMAP
b5ff7df3 771
3b519e4e
MW
772int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
773 enum pci_mmap_api mmap_api)
b5ff7df3 774{
3b519e4e 775 unsigned long nr, start, size, pci_start;
b5ff7df3 776
3b519e4e
MW
777 if (pci_resource_len(pdev, resno) == 0)
778 return 0;
b5ff7df3
LT
779 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
780 start = vma->vm_pgoff;
88e7df0b 781 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
8c05cd08 782 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
3b519e4e
MW
783 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
784 if (start >= pci_start && start < pci_start + size &&
785 start + nr <= pci_start + size)
b5ff7df3 786 return 1;
b5ff7df3
LT
787 return 0;
788}
789
1da177e4
LT
790/**
791 * pci_mmap_resource - map a PCI resource into user memory space
792 * @kobj: kobject for mapping
793 * @attr: struct bin_attribute for the file being mapped
794 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 795 * @write_combine: 1 for write_combine mapping
1da177e4
LT
796 *
797 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
798 */
799static int
800pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 801 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
802{
803 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
804 struct device, kobj));
a3f5835a 805 struct resource *res = attr->private;
1da177e4 806 enum pci_mmap_state mmap_type;
e31dd6e4 807 resource_size_t start, end;
2311b1f2 808 int i;
1da177e4 809
2311b1f2
ME
810 for (i = 0; i < PCI_ROM_RESOURCE; i++)
811 if (res == &pdev->resource[i])
812 break;
813 if (i >= PCI_ROM_RESOURCE)
814 return -ENODEV;
815
3b519e4e
MW
816 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
817 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
818 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
819 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
820 pci_name(pdev), i,
e25cd062
RD
821 (u64)pci_resource_start(pdev, i),
822 (u64)pci_resource_len(pdev, i));
b5ff7df3 823 return -EINVAL;
3b519e4e 824 }
b5ff7df3 825
2311b1f2
ME
826 /* pci_mmap_page_range() expects the same kind of entry as coming
827 * from /proc/bus/pci/ which is a "user visible" value. If this is
828 * different from the resource itself, arch will do necessary fixup.
829 */
830 pci_resource_to_user(pdev, i, res, &start, &end);
831 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
832 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
833
e8de1481
AV
834 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
835 return -EINVAL;
836
45aec1ae 837 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
838}
839
840static int
2c3c8bea
CW
841pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
842 struct bin_attribute *attr,
45aec1ae 843 struct vm_area_struct *vma)
844{
845 return pci_mmap_resource(kobj, attr, vma, 0);
846}
847
848static int
2c3c8bea
CW
849pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
850 struct bin_attribute *attr,
45aec1ae 851 struct vm_area_struct *vma)
852{
853 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
854}
855
8633328b
AW
856static ssize_t
857pci_resource_io(struct file *filp, struct kobject *kobj,
858 struct bin_attribute *attr, char *buf,
859 loff_t off, size_t count, bool write)
860{
861 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
862 struct device, kobj));
863 struct resource *res = attr->private;
864 unsigned long port = off;
865 int i;
866
867 for (i = 0; i < PCI_ROM_RESOURCE; i++)
868 if (res == &pdev->resource[i])
869 break;
870 if (i >= PCI_ROM_RESOURCE)
871 return -ENODEV;
872
873 port += pci_resource_start(pdev, i);
874
875 if (port > pci_resource_end(pdev, i))
876 return 0;
877
878 if (port + count - 1 > pci_resource_end(pdev, i))
879 return -EINVAL;
880
881 switch (count) {
882 case 1:
883 if (write)
884 outb(*(u8 *)buf, port);
885 else
886 *(u8 *)buf = inb(port);
887 return 1;
888 case 2:
889 if (write)
890 outw(*(u16 *)buf, port);
891 else
892 *(u16 *)buf = inw(port);
893 return 2;
894 case 4:
895 if (write)
896 outl(*(u32 *)buf, port);
897 else
898 *(u32 *)buf = inl(port);
899 return 4;
900 }
901 return -EINVAL;
902}
903
904static ssize_t
905pci_read_resource_io(struct file *filp, struct kobject *kobj,
906 struct bin_attribute *attr, char *buf,
907 loff_t off, size_t count)
908{
909 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
910}
911
912static ssize_t
913pci_write_resource_io(struct file *filp, struct kobject *kobj,
914 struct bin_attribute *attr, char *buf,
915 loff_t off, size_t count)
916{
917 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
918}
919
b19441af
GKH
920/**
921 * pci_remove_resource_files - cleanup resource files
cffb2faf 922 * @pdev: dev to cleanup
b19441af 923 *
cffb2faf 924 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
925 * free their resources.
926 */
927static void
928pci_remove_resource_files(struct pci_dev *pdev)
929{
930 int i;
931
932 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
933 struct bin_attribute *res_attr;
934
935 res_attr = pdev->res_attr[i];
936 if (res_attr) {
937 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
938 kfree(res_attr);
939 }
45aec1ae 940
941 res_attr = pdev->res_attr_wc[i];
942 if (res_attr) {
943 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
944 kfree(res_attr);
945 }
b19441af
GKH
946 }
947}
948
45aec1ae 949static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
950{
951 /* allocate attribute structure, piggyback attribute name */
952 int name_len = write_combine ? 13 : 10;
953 struct bin_attribute *res_attr;
954 int retval;
955
956 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
957 if (res_attr) {
958 char *res_attr_name = (char *)(res_attr + 1);
959
a07e4156 960 sysfs_bin_attr_init(res_attr);
45aec1ae 961 if (write_combine) {
962 pdev->res_attr_wc[num] = res_attr;
963 sprintf(res_attr_name, "resource%d_wc", num);
964 res_attr->mmap = pci_mmap_resource_wc;
965 } else {
966 pdev->res_attr[num] = res_attr;
967 sprintf(res_attr_name, "resource%d", num);
968 res_attr->mmap = pci_mmap_resource_uc;
969 }
8633328b
AW
970 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
971 res_attr->read = pci_read_resource_io;
972 res_attr->write = pci_write_resource_io;
973 }
45aec1ae 974 res_attr->attr.name = res_attr_name;
975 res_attr->attr.mode = S_IRUSR | S_IWUSR;
976 res_attr->size = pci_resource_len(pdev, num);
977 res_attr->private = &pdev->resource[num];
978 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
979 } else
980 retval = -ENOMEM;
981
982 return retval;
983}
984
1da177e4
LT
985/**
986 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 987 * @pdev: dev in question
1da177e4 988 *
cffb2faf 989 * Walk the resources in @pdev creating files for each resource available.
1da177e4 990 */
b19441af 991static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
992{
993 int i;
b19441af 994 int retval;
1da177e4
LT
995
996 /* Expose the PCI resources from this device as files */
997 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
998
999 /* skip empty resources */
1000 if (!pci_resource_len(pdev, i))
1001 continue;
1002
45aec1ae 1003 retval = pci_create_attr(pdev, i, 0);
1004 /* for prefetchable resources, create a WC mappable file */
1005 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1006 retval = pci_create_attr(pdev, i, 1);
1007
1008 if (retval) {
1009 pci_remove_resource_files(pdev);
1010 return retval;
1da177e4
LT
1011 }
1012 }
b19441af 1013 return 0;
1da177e4
LT
1014}
1015#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1016int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1017void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1018#endif /* HAVE_PCI_MMAP */
1019
1020/**
1021 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1022 * @filp: sysfs file
1da177e4 1023 * @kobj: kernel object handle
cffb2faf 1024 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1025 * @buf: user input
1026 * @off: file offset
1027 * @count: number of byte in input
1028 *
1029 * writing anything except 0 enables it
1030 */
1031static ssize_t
2c3c8bea
CW
1032pci_write_rom(struct file *filp, struct kobject *kobj,
1033 struct bin_attribute *bin_attr,
91a69029 1034 char *buf, loff_t off, size_t count)
1da177e4
LT
1035{
1036 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1037
1038 if ((off == 0) && (*buf == '0') && (count == 2))
1039 pdev->rom_attr_enabled = 0;
1040 else
1041 pdev->rom_attr_enabled = 1;
1042
1043 return count;
1044}
1045
1046/**
1047 * pci_read_rom - read a PCI ROM
2c3c8bea 1048 * @filp: sysfs file
1da177e4 1049 * @kobj: kernel object handle
cffb2faf 1050 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1051 * @buf: where to put the data we read from the ROM
1052 * @off: file offset
1053 * @count: number of bytes to read
1054 *
1055 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1056 * device corresponding to @kobj.
1057 */
1058static ssize_t
2c3c8bea
CW
1059pci_read_rom(struct file *filp, struct kobject *kobj,
1060 struct bin_attribute *bin_attr,
91a69029 1061 char *buf, loff_t off, size_t count)
1da177e4
LT
1062{
1063 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1064 void __iomem *rom;
1065 size_t size;
1066
1067 if (!pdev->rom_attr_enabled)
1068 return -EINVAL;
1069
1070 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1071 if (!rom || !size)
1072 return -EIO;
1da177e4
LT
1073
1074 if (off >= size)
1075 count = 0;
1076 else {
1077 if (off + count > size)
1078 count = size - off;
1079
1080 memcpy_fromio(buf, rom + off, count);
1081 }
1082 pci_unmap_rom(pdev, rom);
1083
1084 return count;
1085}
1086
1087static struct bin_attribute pci_config_attr = {
1088 .attr = {
1089 .name = "config",
1090 .mode = S_IRUGO | S_IWUSR,
1da177e4 1091 },
557848c3 1092 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1093 .read = pci_read_config,
1094 .write = pci_write_config,
1095};
1096
1097static struct bin_attribute pcie_config_attr = {
1098 .attr = {
1099 .name = "config",
1100 .mode = S_IRUGO | S_IWUSR,
1da177e4 1101 },
557848c3 1102 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1103 .read = pci_read_config,
1104 .write = pci_write_config,
1105};
1106
a2cd52ca 1107int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 1108{
a2cd52ca 1109 return 0;
575e3348
ME
1110}
1111
711d5779
MT
1112static ssize_t reset_store(struct device *dev,
1113 struct device_attribute *attr, const char *buf,
1114 size_t count)
1115{
1116 struct pci_dev *pdev = to_pci_dev(dev);
1117 unsigned long val;
1118 ssize_t result = strict_strtoul(buf, 0, &val);
1119
1120 if (result < 0)
1121 return result;
1122
1123 if (val != 1)
1124 return -EINVAL;
447c5dd7
MS
1125
1126 result = pci_reset_function(pdev);
1127 if (result < 0)
1128 return result;
1129
1130 return count;
711d5779
MT
1131}
1132
1133static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1134
280c73d3
ZY
1135static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1136{
1137 int retval;
1138 struct bin_attribute *attr;
1139
1140 /* If the device has VPD, try to expose it in sysfs. */
1141 if (dev->vpd) {
1142 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1143 if (!attr)
1144 return -ENOMEM;
1145
a07e4156 1146 sysfs_bin_attr_init(attr);
280c73d3
ZY
1147 attr->size = dev->vpd->len;
1148 attr->attr.name = "vpd";
1149 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1150 attr->read = read_vpd_attr;
1151 attr->write = write_vpd_attr;
280c73d3
ZY
1152 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1153 if (retval) {
0f12a4e2 1154 kfree(attr);
280c73d3
ZY
1155 return retval;
1156 }
1157 dev->vpd->attr = attr;
1158 }
1159
1160 /* Active State Power Management */
1161 pcie_aspm_create_sysfs_dev_files(dev);
1162
711d5779
MT
1163 if (!pci_probe_reset_function(dev)) {
1164 retval = device_create_file(&dev->dev, &reset_attr);
1165 if (retval)
1166 goto error;
1167 dev->reset_fn = 1;
1168 }
280c73d3 1169 return 0;
711d5779
MT
1170
1171error:
1172 pcie_aspm_remove_sysfs_dev_files(dev);
1173 if (dev->vpd && dev->vpd->attr) {
1174 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1175 kfree(dev->vpd->attr);
1176 }
1177
1178 return retval;
280c73d3
ZY
1179}
1180
b19441af 1181int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1182{
b19441af 1183 int retval;
280c73d3
ZY
1184 int rom_size = 0;
1185 struct bin_attribute *attr;
b19441af 1186
1da177e4
LT
1187 if (!sysfs_initialized)
1188 return -EACCES;
1189
557848c3 1190 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1191 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1192 else
b19441af
GKH
1193 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1194 if (retval)
1195 goto err;
1da177e4 1196
b19441af
GKH
1197 retval = pci_create_resource_files(pdev);
1198 if (retval)
280c73d3
ZY
1199 goto err_config_file;
1200
1201 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1202 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1203 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1204 rom_size = 0x20000;
1da177e4
LT
1205
1206 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1207 if (rom_size) {
94e61088 1208 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1209 if (!attr) {
b19441af 1210 retval = -ENOMEM;
9890b12a 1211 goto err_resource_files;
1da177e4 1212 }
a07e4156 1213 sysfs_bin_attr_init(attr);
280c73d3
ZY
1214 attr->size = rom_size;
1215 attr->attr.name = "rom";
ff29530e 1216 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1217 attr->read = pci_read_rom;
1218 attr->write = pci_write_rom;
1219 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1220 if (retval) {
1221 kfree(attr);
1222 goto err_resource_files;
1223 }
1224 pdev->rom_attr = attr;
1da177e4 1225 }
280c73d3 1226
217f45de
DA
1227 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1228 retval = device_create_file(&pdev->dev, &vga_attr);
1229 if (retval)
1230 goto err_rom_file;
1231 }
1232
1da177e4 1233 /* add platform-specific attributes */
280c73d3
ZY
1234 retval = pcibios_add_platform_entries(pdev);
1235 if (retval)
217f45de 1236 goto err_vga_file;
b19441af 1237
280c73d3
ZY
1238 /* add sysfs entries for various capabilities */
1239 retval = pci_create_capabilities_sysfs(pdev);
1240 if (retval)
217f45de 1241 goto err_vga_file;
7d715a6c 1242
911e1c9b
N
1243 pci_create_firmware_label_files(pdev);
1244
1da177e4 1245 return 0;
b19441af 1246
217f45de
DA
1247err_vga_file:
1248 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1249 device_remove_file(&pdev->dev, &vga_attr);
a2cd52ca 1250err_rom_file:
280c73d3 1251 if (rom_size) {
94e61088 1252 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1253 kfree(pdev->rom_attr);
1254 pdev->rom_attr = NULL;
1255 }
9890b12a
ME
1256err_resource_files:
1257 pci_remove_resource_files(pdev);
94e61088 1258err_config_file:
557848c3 1259 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1260 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1261 else
1262 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1263err:
1264 return retval;
1da177e4
LT
1265}
1266
280c73d3
ZY
1267static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1268{
1269 if (dev->vpd && dev->vpd->attr) {
1270 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1271 kfree(dev->vpd->attr);
1272 }
1273
1274 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1275 if (dev->reset_fn) {
1276 device_remove_file(&dev->dev, &reset_attr);
1277 dev->reset_fn = 0;
1278 }
280c73d3
ZY
1279}
1280
1da177e4
LT
1281/**
1282 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1283 * @pdev: device whose entries we should free
1284 *
1285 * Cleanup when @pdev is removed from sysfs.
1286 */
1287void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1288{
280c73d3
ZY
1289 int rom_size = 0;
1290
d67afe5e
DM
1291 if (!sysfs_initialized)
1292 return;
1293
280c73d3 1294 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1295
557848c3 1296 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1297 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1298 else
1299 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1300
1301 pci_remove_resource_files(pdev);
1302
280c73d3
ZY
1303 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1304 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1305 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1306 rom_size = 0x20000;
1307
1308 if (rom_size && pdev->rom_attr) {
1309 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1310 kfree(pdev->rom_attr);
1da177e4 1311 }
911e1c9b
N
1312
1313 pci_remove_firmware_label_files(pdev);
1314
1da177e4
LT
1315}
1316
1317static int __init pci_sysfs_init(void)
1318{
1319 struct pci_dev *pdev = NULL;
b19441af
GKH
1320 int retval;
1321
1da177e4 1322 sysfs_initialized = 1;
b19441af
GKH
1323 for_each_pci_dev(pdev) {
1324 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1325 if (retval) {
1326 pci_dev_put(pdev);
b19441af 1327 return retval;
151fc5df 1328 }
b19441af 1329 }
1da177e4
LT
1330
1331 return 0;
1332}
1333
40ee9e9f 1334late_initcall(pci_sysfs_init);